4
0
mirror of https://github.com/RT-Thread/rt-thread.git synced 2025-02-02 20:54:33 +08:00

Add pm driver for F472 and add lVD unlock in board_init

This commit is contained in:
Jamie 2025-01-22 07:43:46 +08:00 committed by GitHub
parent ed3222c2f8
commit 0800db1400
No known key found for this signature in database
GPG Key ID: B5690EEEBB952194
8 changed files with 22 additions and 14 deletions

View File

@ -15,7 +15,7 @@
/* unlock/lock peripheral */ /* unlock/lock peripheral */
#define EXAMPLE_PERIPH_WE (LL_PERIPH_GPIO | LL_PERIPH_EFM | LL_PERIPH_FCG | \ #define EXAMPLE_PERIPH_WE (LL_PERIPH_GPIO | LL_PERIPH_EFM | LL_PERIPH_FCG | \
LL_PERIPH_PWC_CLK_RMU | LL_PERIPH_SRAM) LL_PERIPH_PWC_CLK_RMU | LL_PERIPH_SRAM | LL_PERIPH_LVD)
#define EXAMPLE_PERIPH_WP (LL_PERIPH_EFM | LL_PERIPH_FCG | LL_PERIPH_SRAM) #define EXAMPLE_PERIPH_WP (LL_PERIPH_EFM | LL_PERIPH_FCG | LL_PERIPH_SRAM)
/** System Base Configuration /** System Base Configuration

View File

@ -14,7 +14,7 @@
/* unlock/lock peripheral */ /* unlock/lock peripheral */
#define EXAMPLE_PERIPH_WE (LL_PERIPH_GPIO | LL_PERIPH_EFM | LL_PERIPH_FCG | \ #define EXAMPLE_PERIPH_WE (LL_PERIPH_GPIO | LL_PERIPH_EFM | LL_PERIPH_FCG | \
LL_PERIPH_PWC_CLK_RMU | LL_PERIPH_SRAM) LL_PERIPH_PWC_CLK_RMU | LL_PERIPH_SRAM | LL_PERIPH_LVD)
#define EXAMPLE_PERIPH_WP (LL_PERIPH_EFM | LL_PERIPH_FCG | LL_PERIPH_SRAM) #define EXAMPLE_PERIPH_WP (LL_PERIPH_EFM | LL_PERIPH_FCG | LL_PERIPH_SRAM)
/** System Base Configuration /** System Base Configuration

View File

@ -15,7 +15,7 @@
/* unlock/lock peripheral */ /* unlock/lock peripheral */
#define EXAMPLE_PERIPH_WE (LL_PERIPH_GPIO | LL_PERIPH_EFM | LL_PERIPH_FCG | \ #define EXAMPLE_PERIPH_WE (LL_PERIPH_GPIO | LL_PERIPH_EFM | LL_PERIPH_FCG | \
LL_PERIPH_PWC_CLK_RMU) LL_PERIPH_PWC_CLK_RMU | LL_PERIPH_SRAM | LL_PERIPH_LVD)
#define EXAMPLE_PERIPH_WP (LL_PERIPH_EFM | LL_PERIPH_FCG) #define EXAMPLE_PERIPH_WP (LL_PERIPH_EFM | LL_PERIPH_FCG)
/** System Base Configuration /** System Base Configuration

View File

@ -14,7 +14,7 @@
/* unlock/lock peripheral */ /* unlock/lock peripheral */
#define EXAMPLE_PERIPH_WE (LL_PERIPH_GPIO | LL_PERIPH_EFM | LL_PERIPH_FCG | \ #define EXAMPLE_PERIPH_WE (LL_PERIPH_GPIO | LL_PERIPH_EFM | LL_PERIPH_FCG | \
LL_PERIPH_PWC_CLK_RMU | LL_PERIPH_SRAM) LL_PERIPH_PWC_CLK_RMU | LL_PERIPH_SRAM | LL_PERIPH_LVD)
#define EXAMPLE_PERIPH_WP (LL_PERIPH_EFM | LL_PERIPH_FCG | LL_PERIPH_SRAM) #define EXAMPLE_PERIPH_WP (LL_PERIPH_EFM | LL_PERIPH_FCG | LL_PERIPH_SRAM)
/** System Base Configuration /** System Base Configuration

View File

@ -13,7 +13,7 @@
/* unlock/lock peripheral */ /* unlock/lock peripheral */
#define EXAMPLE_PERIPH_WE (LL_PERIPH_GPIO | LL_PERIPH_EFM | LL_PERIPH_FCG | \ #define EXAMPLE_PERIPH_WE (LL_PERIPH_GPIO | LL_PERIPH_EFM | LL_PERIPH_FCG | \
LL_PERIPH_PWC_CLK_RMU | LL_PERIPH_SRAM) LL_PERIPH_PWC_CLK_RMU | LL_PERIPH_SRAM | LL_PERIPH_LVD)
#define EXAMPLE_PERIPH_WP (LL_PERIPH_EFM | LL_PERIPH_FCG | LL_PERIPH_SRAM) #define EXAMPLE_PERIPH_WP (LL_PERIPH_EFM | LL_PERIPH_FCG | LL_PERIPH_SRAM)
#if defined(BSP_USING_USBD) || defined(BSP_USING_USBH) #if defined(BSP_USING_USBD) || defined(BSP_USING_USBH)

View File

@ -108,6 +108,7 @@ static void _sleep_enter_deep(void)
(void)PWC_STOP_Config(&sleep_deep_cfg.cfg); (void)PWC_STOP_Config(&sleep_deep_cfg.cfg);
#if defined(HC32F4A0) || defined(HC32F460) || defined(HC32F448)
if (PWC_PWRC2_DVS == (READ_REG8(CM_PWC->PWRC2) & PWC_PWRC2_DVS)) if (PWC_PWRC2_DVS == (READ_REG8(CM_PWC->PWRC2) & PWC_PWRC2_DVS))
{ {
CLR_REG8_BIT(CM_PWC->PWRC1, PWC_PWRC1_STPDAS); CLR_REG8_BIT(CM_PWC->PWRC1, PWC_PWRC1_STPDAS);
@ -116,6 +117,7 @@ static void _sleep_enter_deep(void)
{ {
SET_REG8_BIT(CM_PWC->PWRC1, PWC_PWRC1_STPDAS); SET_REG8_BIT(CM_PWC->PWRC1, PWC_PWRC1_STPDAS);
} }
#endif
PWC_STOP_Enter(sleep_deep_cfg.pwc_stop_type); PWC_STOP_Enter(sleep_deep_cfg.pwc_stop_type);
} }
@ -161,14 +163,20 @@ static void _run_switch_high_to_low(void)
struct pm_run_mode_config st_run_mode_cfg = PM_RUN_MODE_CFG; struct pm_run_mode_config st_run_mode_cfg = PM_RUN_MODE_CFG;
st_run_mode_cfg.sys_clk_cfg(PM_RUN_MODE_LOW_SPEED); st_run_mode_cfg.sys_clk_cfg(PM_RUN_MODE_LOW_SPEED);
#if defined(HC32F4A0) || defined(HC32F460) || defined(HC32F448)
PWC_HighSpeedToLowSpeed(); PWC_HighSpeedToLowSpeed();
#endif
} }
static void _run_switch_low_to_high(void) static void _run_switch_low_to_high(void)
{ {
struct pm_run_mode_config st_run_mode_cfg = PM_RUN_MODE_CFG; struct pm_run_mode_config st_run_mode_cfg = PM_RUN_MODE_CFG;
#if defined(HC32F4A0) || defined(HC32F460) || defined(HC32F448)
PWC_LowSpeedToHighSpeed(); PWC_LowSpeedToHighSpeed();
#endif
st_run_mode_cfg.sys_clk_cfg(PM_RUN_MODE_HIGH_SPEED); st_run_mode_cfg.sys_clk_cfg(PM_RUN_MODE_HIGH_SPEED);
} }

View File

@ -91,7 +91,7 @@ struct pm_sleep_mode_shutdown_config
******************************************************************************/ ******************************************************************************/
#if defined(HC32F4A0) #if defined(HC32F4A0)
#define PM_CHECK_EFM() ((EFM_GetStatus(EFM_FLAG_RDY) == SET) && (EFM_GetStatus(EFM_FLAG_RDY1) == SET)) #define PM_CHECK_EFM() ((EFM_GetStatus(EFM_FLAG_RDY) == SET) && (EFM_GetStatus(EFM_FLAG_RDY1) == SET))
#elif defined(HC32F460) || defined (HC32F448) #elif defined(HC32F460) || defined (HC32F448) || defined (HC32F472)
#define PM_CHECK_EFM() ((EFM_GetStatus(EFM_FLAG_RDY) == SET)) #define PM_CHECK_EFM() ((EFM_GetStatus(EFM_FLAG_RDY) == SET))
#endif #endif
#define PM_CHECK_XTAL() ((CM_CMU->XTALSTDCR & CLK_XTALSTD_ON) == 0) #define PM_CHECK_XTAL() ((CM_CMU->XTALSTDCR & CLK_XTALSTD_ON) == 0)

View File

@ -24,12 +24,14 @@
* PM_SLEEP_MODE_STANDBY | 121 * PM_SLEEP_MODE_STANDBY | 121
* PM_SLEEP_MODE_SHUTDOWN | 343 * PM_SLEEP_MODE_SHUTDOWN | 343
* *
* * 1
* 1K10 MCU进入休眠模式 * 1K10 MCU进入休眠模式
* 2K10MCU退出休眠模式 * 2K10MCU退出休眠模式
* 3MCU循环进入休眠模式(deepstandbyshutdownidle)退 * 3MCU循环进入休眠模式(deepstandbyshutdownidle)退
* MCU打印 "sleep:" + * MCU打印 "sleep:" +
* 退MCU打印 "wake from sleep:" + * 退MCU打印 "wake from sleep:" +
* 2
* 1 ->-> ,
*/ */
#include <rtthread.h> #include <rtthread.h>
@ -37,11 +39,8 @@
#include <board.h> #include <board.h>
#include <drivers/lptimer.h> #include <drivers/lptimer.h>
#if defined(BSP_USING_PM) #if defined(BSP_USING_PM)
#define EFM_ERASE_TIME_MAX_IN_MILLISECOND (20)
#if defined (HC32F4A0) #if defined (HC32F4A0)
#define PLL_SRC ((CM_CMU->PLLHCFGR & CMU_PLLHCFGR_PLLSRC) >> CMU_PLLHCFGR_PLLSRC_POS) #define PLL_SRC ((CM_CMU->PLLHCFGR & CMU_PLLHCFGR_PLLSRC) >> CMU_PLLHCFGR_PLLSRC_POS)
#define BSP_KEY_PORT (GPIO_PORT_A) /* Key10 */ #define BSP_KEY_PORT (GPIO_PORT_A) /* Key10 */
@ -101,10 +100,6 @@
#define BSP_KEY_EVT (EVT_SRC_PORT_EIRQ5) #define BSP_KEY_EVT (EVT_SRC_PORT_EIRQ5)
#define BSP_KEY_PWC_PD_WKUP_TRIG_WKUP (PWC_PD_WKUP_TRIG_WKUP1) #define BSP_KEY_PWC_PD_WKUP_TRIG_WKUP (PWC_PD_WKUP_TRIG_WKUP1)
#define BSP_KEY_PWC_PD_WKUP_WKUP (PWC_PD_WKUP_WKUP11) #define BSP_KEY_PWC_PD_WKUP_WKUP (PWC_PD_WKUP_WKUP11)
#define MCO_PORT (GPIO_PORT_A)
#define MCO_PIN (GPIO_PIN_08)
#define MCO_GPIO_FUNC (GPIO_FUNC_1)
#endif #endif
#define KEYCNT_BACKUP_ADDR (uint32_t *)(0x200F0010) #define KEYCNT_BACKUP_ADDR (uint32_t *)(0x200F0010)
@ -327,6 +322,7 @@ static void pm_cmd_handler(void *parameter)
} }
} }
#if defined(HC32F4A0) || defined(HC32F460) || defined(HC32F448)
static void pm_run_main(void *parameter) static void pm_run_main(void *parameter)
{ {
static rt_uint8_t run_index = 0; static rt_uint8_t run_index = 0;
@ -354,6 +350,7 @@ static void pm_run_main(void *parameter)
rt_thread_mdelay(3000); rt_thread_mdelay(3000);
} }
} }
#endif
static void _keycnt_cmd_init_after_power_on(void) static void _keycnt_cmd_init_after_power_on(void)
{ {
@ -440,6 +437,7 @@ int pm_sample_init(void)
rt_kprintf("create pm sample thread failed!\n"); rt_kprintf("create pm sample thread failed!\n");
} }
#if defined(HC32F4A0) || defined(HC32F460) || defined(HC32F448)
thread = rt_thread_create("pm_run_main", pm_run_main, RT_NULL, 1024, 25, 10); thread = rt_thread_create("pm_run_main", pm_run_main, RT_NULL, 1024, 25, 10);
if (thread != RT_NULL) if (thread != RT_NULL)
{ {
@ -449,6 +447,8 @@ int pm_sample_init(void)
{ {
rt_kprintf("create pm run thread failed!\n"); rt_kprintf("create pm run thread failed!\n");
} }
#endif
return RT_EOK; return RT_EOK;
} }
MSH_CMD_EXPORT(pm_sample_init, pm sample init); MSH_CMD_EXPORT(pm_sample_init, pm sample init);