diff --git a/bsp/gd32450z-eval/gd32_rom.icf b/bsp/gd32450z-eval/gd32_rom.icf
new file mode 100644
index 0000000000..d35cb36afd
--- /dev/null
+++ b/bsp/gd32450z-eval/gd32_rom.icf
@@ -0,0 +1,37 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__ = 0x082FFFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__ = 0x2002FFFF;
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x2000;
+define symbol __ICFEDIT_size_heap__ = 0x2000;
+/**** End of ICF editor section. ###ICF###*/
+
+export symbol __ICFEDIT_region_RAM_end__;
+
+define symbol __region_RAM1_start__ = 0x10000000;
+define symbol __region_RAM1_end__ = 0x1000FFFF;
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+define region RAM1_region = mem:[from __region_RAM1_start__ to __region_RAM1_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
+
+initialize by copy { readwrite };
+do not initialize { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region { readonly };
+place in RAM_region { readwrite,
+ block CSTACK, block HEAP };
+place in RAM1_region { section .sram };
\ No newline at end of file
diff --git a/bsp/gd32450z-eval/project.ewp b/bsp/gd32450z-eval/project.ewp
new file mode 100644
index 0000000000..c4f4eb5ace
--- /dev/null
+++ b/bsp/gd32450z-eval/project.ewp
@@ -0,0 +1,2323 @@
+
+
+ 3
+
+ Debug
+
+ ARM
+
+ 1
+
+ General
+ 3
+
+ 29
+ 1
+ 1
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ ICCARM
+ 2
+
+ 34
+ 1
+ 1
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ AARM
+ 2
+
+ 10
+ 1
+ 1
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ OBJCOPY
+ 0
+
+ 1
+ 1
+ 1
+
+
+
+
+
+
+
+
+ CUSTOM
+ 3
+
+
+
+ 0
+
+
+
+ BICOMP
+ 0
+
+
+
+ BUILDACTION
+ 1
+
+
+
+
+
+
+ ILINK
+ 0
+
+ 20
+ 1
+ 1
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ IARCHIVE
+ 0
+
+ 0
+ 1
+ 1
+
+
+
+
+
+
+ BILINK
+ 0
+
+
+
+
+ Release
+
+ ARM
+
+ 0
+
+ General
+ 3
+
+ 29
+ 1
+ 0
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ ICCARM
+ 2
+
+ 34
+ 1
+ 0
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ AARM
+ 2
+
+ 10
+ 1
+ 0
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ OBJCOPY
+ 0
+
+ 1
+ 1
+ 0
+
+
+
+
+
+
+
+
+ CUSTOM
+ 3
+
+
+
+ 0
+
+
+
+ BICOMP
+ 0
+
+
+
+ BUILDACTION
+ 1
+
+
+
+
+
+
+ ILINK
+ 0
+
+ 20
+ 1
+ 0
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ IARCHIVE
+ 0
+
+ 0
+ 1
+ 0
+
+
+
+
+
+
+ BILINK
+ 0
+
+
+
+
+ Applications
+
+ $PROJ_DIR$\applications\application.c
+
+
+ $PROJ_DIR$\applications\startup.c
+
+
+
+ CORTEX-M4
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\libcpu\arm\common\backtrace.c
+
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\libcpu\arm\cortex-m4\context_iar.S
+
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\libcpu\arm\cortex-m4\cpuport.c
+
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\libcpu\arm\common\div0.c
+
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\libcpu\arm\common\showmem.c
+
+
+
+ DeviceDrivers
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\components\drivers\src\completion.c
+
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\components\drivers\src\dataqueue.c
+
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\components\drivers\i2c\i2c-bit-ops.c
+
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\components\drivers\i2c\i2c_core.c
+
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\components\drivers\i2c\i2c_dev.c
+
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\components\drivers\src\pipe.c
+
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\components\drivers\src\portal.c
+
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\components\drivers\src\ringbuffer.c
+
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\components\drivers\serial\serial.c
+
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\components\drivers\spi\spi_core.c
+
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\components\drivers\spi\spi_dev.c
+
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\components\drivers\src\workqueue.c
+
+
+
+ Drivers
+
+ $PROJ_DIR$\drivers\board.c
+
+
+ $PROJ_DIR$\drivers\drv_usart.c
+
+ Debug
+
+
+
+
+ finsh
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\components\finsh\cmd.c
+
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\components\finsh\finsh_compiler.c
+
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\components\finsh\finsh_error.c
+
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\components\finsh\finsh_heap.c
+
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\components\finsh\finsh_init.c
+
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\components\finsh\finsh_node.c
+
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\components\finsh\finsh_ops.c
+
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\components\finsh\finsh_parser.c
+
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\components\finsh\finsh_token.c
+
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\components\finsh\finsh_var.c
+
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\components\finsh\finsh_vm.c
+
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\components\finsh\shell.c
+
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\components\finsh\symbol.c
+
+
+
+ GD32_Lib
+
+ $PROJ_DIR$\Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_adc.c
+
+
+ $PROJ_DIR$\Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_can.c
+
+
+ $PROJ_DIR$\Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_crc.c
+
+
+ $PROJ_DIR$\Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_ctc.c
+
+
+ $PROJ_DIR$\Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_dac.c
+
+
+ $PROJ_DIR$\Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_dbg.c
+
+
+ $PROJ_DIR$\Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_dci.c
+
+
+ $PROJ_DIR$\Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_dma.c
+
+
+ $PROJ_DIR$\Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_enet.c
+
+
+ $PROJ_DIR$\Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_exmc.c
+
+
+ $PROJ_DIR$\Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_exti.c
+
+
+ $PROJ_DIR$\Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_fmc.c
+
+
+ $PROJ_DIR$\Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_fwdgt.c
+
+
+ $PROJ_DIR$\Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_gpio.c
+
+
+ $PROJ_DIR$\Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_i2c.c
+
+
+ $PROJ_DIR$\Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_ipa.c
+
+
+ $PROJ_DIR$\Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_iref.c
+
+
+ $PROJ_DIR$\Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_misc.c
+
+
+ $PROJ_DIR$\Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_pmu.c
+
+
+ $PROJ_DIR$\Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_rcu.c
+
+
+ $PROJ_DIR$\Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_rtc.c
+
+
+ $PROJ_DIR$\Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_sdio.c
+
+
+ $PROJ_DIR$\Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_spi.c
+
+
+ $PROJ_DIR$\Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_syscfg.c
+
+
+ $PROJ_DIR$\Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_timer.c
+
+
+ $PROJ_DIR$\Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_tli.c
+
+
+ $PROJ_DIR$\Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_trng.c
+
+
+ $PROJ_DIR$\Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_usart.c
+
+
+ $PROJ_DIR$\Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_wwdgt.c
+
+
+ $PROJ_DIR$\Libraries\CMSIS\GD\GD32F4xx\Source\IAR\startup_gd32f4xx.s
+
+
+ $PROJ_DIR$\Libraries\CMSIS\GD\GD32F4xx\Source\system_gd32f4xx.c
+
+
+
+ Kernel
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\src\clock.c
+
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\src\components.c
+
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\src\device.c
+
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\src\idle.c
+
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\src\ipc.c
+
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\src\irq.c
+
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\src\kservice.c
+
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\src\mem.c
+
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\src\memheap.c
+
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\src\mempool.c
+
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\src\module.c
+
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\src\object.c
+
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\src\scheduler.c
+
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\src\thread.c
+
+
+ $PROJ_DIR$\..\..\..\git\rt-thread\src\timer.c
+
+
+
diff --git a/bsp/gd32450z-eval/project.uvproj b/bsp/gd32450z-eval/project.uvproj
new file mode 100644
index 0000000000..8705f13a78
--- /dev/null
+++ b/bsp/gd32450z-eval/project.uvproj
@@ -0,0 +1,986 @@
+
+
+ 1.1
+ ### uVision Project, (C) Keil Software
+
+
+ rt-thread_gd32f4xx
+ 0x4
+ ARM-ADS
+
+
+ GD32F450ZK
+ GigaDevice
+ IRAM(0x20000000-0x2002FFFF) IRAM2(0x10000000-0x1000FFFF) IROM(0x08000000-0x082FFFFF) CLOCK(16000000) CPUTYPE("Cortex-M4") FPU2
+
+ "Startup\GD\GD32F4xx\startup_gd32f4xx.s" ("GD32F4xx Startup Code")
+ UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0GD32F4xx_3MB -FS08000000 -FL0300000)
+ 0
+ gd32f4xx0.h
+
+
+
+
+
+
+
+
+
+ SFD\GD\GD32F4xx\GD32F4xx.SFR
+ 0
+ 0
+
+
+
+ GD\GD32F4xx\
+ GD\GD32F4xx\
+
+ 0
+ 0
+ 0
+ 0
+ 1
+
+ .\output\
+ rtthread-gd32f4xx
+ 1
+ 0
+ 1
+ 1
+ 1
+ .\build\
+ 1
+ 0
+ 0
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+
+ 0
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 3
+
+
+ 1
+
+
+ SARMCM3.DLL
+ -REMAP
+ DCM.DLL
+ -pCM3
+ SARMCM3.DLL
+
+ TCM.DLL
+ -pCM3
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 16
+
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 1
+
+
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 1
+ 0
+ 1
+ 0
+
+ 0
+ 12
+
+
+
+
+
+
+
+
+
+
+
+
+
+ BIN\CMSIS_AGDI.dll
+
+
+
+
+ 1
+ 0
+ 0
+ 1
+ 1
+ 4096
+
+ 1
+ BIN\UL2CM3.DLL
+ "" ()
+
+
+
+
+ 0
+
+
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ "Cortex-M4"
+
+ 0
+ 0
+ 0
+ 1
+ 1
+ 0
+ 0
+ 2
+ 1
+ 0
+ 8
+ 1
+ 0
+ 0
+ 3
+ 3
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x20000000
+ 0x30000
+
+
+ 1
+ 0x8000000
+ 0x300000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x8000000
+ 0x300000
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x20000000
+ 0x30000
+
+
+ 0
+ 0x10000000
+ 0x10000
+
+
+
+
+
+ 1
+ 1
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 2
+ 0
+ 0
+ 0
+ 0
+
+
+ GD32F4XX, USE_STDPERIPH_DRIVER
+
+ applications;.;drivers;Libraries\CMSIS\GD\GD32F4xx\Include;Libraries\CMSIS;Libraries\GD32F4xx_standard_peripheral\Include;..\..\..\git\rt-thread\include;..\..\..\git\rt-thread\libcpu\arm\cortex-m4;..\..\..\git\rt-thread\libcpu\arm\common;..\..\..\git\rt-thread\components\drivers\include;..\..\..\git\rt-thread\components\drivers\include;..\..\..\git\rt-thread\components\drivers\spi;..\..\..\git\rt-thread\components\drivers\include;..\..\..\git\rt-thread\components\drivers\include;..\..\..\git\rt-thread\components\finsh
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+
+
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0x08000000
+ 0x20000000
+
+
+
+
+ --keep *.o(RTMSymTab) --keep *.o(.rti_fn.*) --keep *.o(FSymTab) --keep *.o(VSymTab)
+
+
+
+
+
+
+
+ Applications
+
+
+ application.c
+ 1
+ applications\application.c
+
+
+
+
+ startup.c
+ 1
+ applications\startup.c
+
+
+
+
+ Drivers
+
+
+ board.c
+ 1
+ drivers\board.c
+
+
+
+
+ drv_usart.c
+ 1
+ drivers\drv_usart.c
+
+
+
+
+ GD32_Lib
+
+
+ gd32f4xx_adc.c
+ 1
+ Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_adc.c
+
+
+
+
+ gd32f4xx_can.c
+ 1
+ Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_can.c
+
+
+
+
+ gd32f4xx_crc.c
+ 1
+ Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_crc.c
+
+
+
+
+ gd32f4xx_ctc.c
+ 1
+ Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_ctc.c
+
+
+
+
+ gd32f4xx_dac.c
+ 1
+ Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_dac.c
+
+
+
+
+ gd32f4xx_dbg.c
+ 1
+ Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_dbg.c
+
+
+
+
+ gd32f4xx_dci.c
+ 1
+ Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_dci.c
+
+
+
+
+ gd32f4xx_dma.c
+ 1
+ Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_dma.c
+
+
+
+
+ gd32f4xx_enet.c
+ 1
+ Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_enet.c
+
+
+
+
+ gd32f4xx_exmc.c
+ 1
+ Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_exmc.c
+
+
+
+
+ gd32f4xx_exti.c
+ 1
+ Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_exti.c
+
+
+
+
+ gd32f4xx_fmc.c
+ 1
+ Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_fmc.c
+
+
+
+
+ gd32f4xx_fwdgt.c
+ 1
+ Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_fwdgt.c
+
+
+
+
+ gd32f4xx_gpio.c
+ 1
+ Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_gpio.c
+
+
+
+
+ gd32f4xx_i2c.c
+ 1
+ Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_i2c.c
+
+
+
+
+ gd32f4xx_ipa.c
+ 1
+ Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_ipa.c
+
+
+
+
+ gd32f4xx_iref.c
+ 1
+ Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_iref.c
+
+
+
+
+ gd32f4xx_misc.c
+ 1
+ Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_misc.c
+
+
+
+
+ gd32f4xx_pmu.c
+ 1
+ Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_pmu.c
+
+
+
+
+ gd32f4xx_rcu.c
+ 1
+ Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_rcu.c
+
+
+
+
+ gd32f4xx_rtc.c
+ 1
+ Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_rtc.c
+
+
+
+
+ gd32f4xx_sdio.c
+ 1
+ Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_sdio.c
+
+
+
+
+ gd32f4xx_spi.c
+ 1
+ Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_spi.c
+
+
+
+
+ gd32f4xx_syscfg.c
+ 1
+ Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_syscfg.c
+
+
+
+
+ gd32f4xx_timer.c
+ 1
+ Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_timer.c
+
+
+
+
+ gd32f4xx_tli.c
+ 1
+ Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_tli.c
+
+
+
+
+ gd32f4xx_trng.c
+ 1
+ Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_trng.c
+
+
+
+
+ gd32f4xx_usart.c
+ 1
+ Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_usart.c
+
+
+
+
+ gd32f4xx_wwdgt.c
+ 1
+ Libraries\GD32F4xx_standard_peripheral\Source\gd32f4xx_wwdgt.c
+
+
+
+
+ system_gd32f4xx.c
+ 1
+ Libraries\CMSIS\GD\GD32F4xx\Source\system_gd32f4xx.c
+
+
+
+
+ startup_gd32f4xx.s
+ 2
+ Libraries\CMSIS\GD\GD32F4xx\Source\ARM\startup_gd32f4xx.s
+
+
+
+
+ Kernel
+
+
+ clock.c
+ 1
+ ..\..\..\git\rt-thread\src\clock.c
+
+
+
+
+ components.c
+ 1
+ ..\..\..\git\rt-thread\src\components.c
+
+
+
+
+ device.c
+ 1
+ ..\..\..\git\rt-thread\src\device.c
+
+
+
+
+ idle.c
+ 1
+ ..\..\..\git\rt-thread\src\idle.c
+
+
+
+
+ ipc.c
+ 1
+ ..\..\..\git\rt-thread\src\ipc.c
+
+
+
+
+ irq.c
+ 1
+ ..\..\..\git\rt-thread\src\irq.c
+
+
+
+
+ kservice.c
+ 1
+ ..\..\..\git\rt-thread\src\kservice.c
+
+
+
+
+ mem.c
+ 1
+ ..\..\..\git\rt-thread\src\mem.c
+
+
+
+
+ memheap.c
+ 1
+ ..\..\..\git\rt-thread\src\memheap.c
+
+
+
+
+ mempool.c
+ 1
+ ..\..\..\git\rt-thread\src\mempool.c
+
+
+
+
+ module.c
+ 1
+ ..\..\..\git\rt-thread\src\module.c
+
+
+
+
+ object.c
+ 1
+ ..\..\..\git\rt-thread\src\object.c
+
+
+
+
+ scheduler.c
+ 1
+ ..\..\..\git\rt-thread\src\scheduler.c
+
+
+
+
+ thread.c
+ 1
+ ..\..\..\git\rt-thread\src\thread.c
+
+
+
+
+ timer.c
+ 1
+ ..\..\..\git\rt-thread\src\timer.c
+
+
+
+
+ CORTEX-M4
+
+
+ cpuport.c
+ 1
+ ..\..\..\git\rt-thread\libcpu\arm\cortex-m4\cpuport.c
+
+
+
+
+ context_rvds.S
+ 2
+ ..\..\..\git\rt-thread\libcpu\arm\cortex-m4\context_rvds.S
+
+
+
+
+ backtrace.c
+ 1
+ ..\..\..\git\rt-thread\libcpu\arm\common\backtrace.c
+
+
+
+
+ div0.c
+ 1
+ ..\..\..\git\rt-thread\libcpu\arm\common\div0.c
+
+
+
+
+ showmem.c
+ 1
+ ..\..\..\git\rt-thread\libcpu\arm\common\showmem.c
+
+
+
+
+ DeviceDrivers
+
+
+ i2c_core.c
+ 1
+ ..\..\..\git\rt-thread\components\drivers\i2c\i2c_core.c
+
+
+
+
+ i2c_dev.c
+ 1
+ ..\..\..\git\rt-thread\components\drivers\i2c\i2c_dev.c
+
+
+
+
+ i2c-bit-ops.c
+ 1
+ ..\..\..\git\rt-thread\components\drivers\i2c\i2c-bit-ops.c
+
+
+
+
+ serial.c
+ 1
+ ..\..\..\git\rt-thread\components\drivers\serial\serial.c
+
+
+
+
+ spi_core.c
+ 1
+ ..\..\..\git\rt-thread\components\drivers\spi\spi_core.c
+
+
+
+
+ spi_dev.c
+ 1
+ ..\..\..\git\rt-thread\components\drivers\spi\spi_dev.c
+
+
+
+
+ completion.c
+ 1
+ ..\..\..\git\rt-thread\components\drivers\src\completion.c
+
+
+
+
+ dataqueue.c
+ 1
+ ..\..\..\git\rt-thread\components\drivers\src\dataqueue.c
+
+
+
+
+ pipe.c
+ 1
+ ..\..\..\git\rt-thread\components\drivers\src\pipe.c
+
+
+
+
+ portal.c
+ 1
+ ..\..\..\git\rt-thread\components\drivers\src\portal.c
+
+
+
+
+ ringbuffer.c
+ 1
+ ..\..\..\git\rt-thread\components\drivers\src\ringbuffer.c
+
+
+
+
+ workqueue.c
+ 1
+ ..\..\..\git\rt-thread\components\drivers\src\workqueue.c
+
+
+
+
+ finsh
+
+
+ shell.c
+ 1
+ ..\..\..\git\rt-thread\components\finsh\shell.c
+
+
+
+
+ symbol.c
+ 1
+ ..\..\..\git\rt-thread\components\finsh\symbol.c
+
+
+
+
+ cmd.c
+ 1
+ ..\..\..\git\rt-thread\components\finsh\cmd.c
+
+
+
+
+ finsh_compiler.c
+ 1
+ ..\..\..\git\rt-thread\components\finsh\finsh_compiler.c
+
+
+
+
+ finsh_error.c
+ 1
+ ..\..\..\git\rt-thread\components\finsh\finsh_error.c
+
+
+
+
+ finsh_heap.c
+ 1
+ ..\..\..\git\rt-thread\components\finsh\finsh_heap.c
+
+
+
+
+ finsh_init.c
+ 1
+ ..\..\..\git\rt-thread\components\finsh\finsh_init.c
+
+
+
+
+ finsh_node.c
+ 1
+ ..\..\..\git\rt-thread\components\finsh\finsh_node.c
+
+
+
+
+ finsh_ops.c
+ 1
+ ..\..\..\git\rt-thread\components\finsh\finsh_ops.c
+
+
+
+
+ finsh_parser.c
+ 1
+ ..\..\..\git\rt-thread\components\finsh\finsh_parser.c
+
+
+
+
+ finsh_var.c
+ 1
+ ..\..\..\git\rt-thread\components\finsh\finsh_var.c
+
+
+
+
+ finsh_vm.c
+ 1
+ ..\..\..\git\rt-thread\components\finsh\finsh_vm.c
+
+
+
+
+ finsh_token.c
+ 1
+ ..\..\..\git\rt-thread\components\finsh\finsh_token.c
+
+
+
+
+
+
+
diff --git a/bsp/gd32450z-eval/template.ewp b/bsp/gd32450z-eval/template.ewp
new file mode 100644
index 0000000000..0aaf7642be
--- /dev/null
+++ b/bsp/gd32450z-eval/template.ewp
@@ -0,0 +1,1892 @@
+
+
+
+ 2
+
+ Debug
+
+ ARM
+
+ 1
+
+ General
+ 3
+
+ 22
+ 1
+ 1
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ ICCARM
+ 2
+
+ 31
+ 1
+ 1
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ AARM
+ 2
+
+ 9
+ 1
+ 1
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ OBJCOPY
+ 0
+
+ 1
+ 1
+ 1
+
+
+
+
+
+
+
+
+ CUSTOM
+ 3
+
+
+
+ 0
+
+
+
+ BICOMP
+ 0
+
+
+
+ BUILDACTION
+ 1
+
+
+
+
+
+
+ ILINK
+ 0
+
+ 16
+ 1
+ 1
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ IARCHIVE
+ 0
+
+ 0
+ 1
+ 1
+
+
+
+
+
+
+ BILINK
+ 0
+
+
+
+
+ Release
+
+ ARM
+
+ 0
+
+ General
+ 3
+
+ 22
+ 1
+ 0
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ ICCARM
+ 2
+
+ 31
+ 1
+ 0
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ AARM
+ 2
+
+ 9
+ 1
+ 0
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ OBJCOPY
+ 0
+
+ 1
+ 1
+ 0
+
+
+
+
+
+
+
+
+ CUSTOM
+ 3
+
+
+
+ 0
+
+
+
+ BICOMP
+ 0
+
+
+
+ BUILDACTION
+ 1
+
+
+
+
+
+
+ ILINK
+ 0
+
+ 16
+ 1
+ 0
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ IARCHIVE
+ 0
+
+ 0
+ 1
+ 0
+
+
+
+
+
+
+ BILINK
+ 0
+
+
+
+
+
+
diff --git a/bsp/gd32450z-eval/template.uvproj b/bsp/gd32450z-eval/template.uvproj
new file mode 100644
index 0000000000..f6553f987f
--- /dev/null
+++ b/bsp/gd32450z-eval/template.uvproj
@@ -0,0 +1,614 @@
+
+
+
+ 1.1
+
+ ### uVision Project, (C) Keil Software
+
+
+
+ rt-thread_gd32f4xx
+ 0x4
+ ARM-ADS
+
+
+ GD32F450ZK
+ GigaDevice
+ IRAM(0x20000000-0x2002FFFF) IRAM2(0x10000000-0x1000FFFF) IROM(0x08000000-0x082FFFFF) CLOCK(16000000) CPUTYPE("Cortex-M4") FPU2
+
+ "Startup\GD\GD32F4xx\startup_gd32f4xx.s" ("GD32F4xx Startup Code")
+ UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0GD32F4xx_3MB -FS08000000 -FL0300000)
+ 0
+ gd32f4xx0.h
+
+
+
+
+
+
+
+
+
+ SFD\GD\GD32F4xx\GD32F4xx.SFR
+ 0
+ 0
+
+
+
+ GD\GD32F4xx\
+ GD\GD32F4xx\
+
+ 0
+ 0
+ 0
+ 0
+ 1
+
+ .\output\
+ rtthread-gd32f4xx
+ 1
+ 0
+ 1
+ 1
+ 1
+ .\build\
+ 1
+ 0
+ 0
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+
+
+ 0
+ 0
+
+ 0
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 3
+
+
+ 1
+
+
+ SARMCM3.DLL
+ -REMAP
+ DCM.DLL
+ -pCM3
+ SARMCM3.DLL
+
+ TCM.DLL
+ -pCM3
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 16
+
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 1
+
+
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 1
+ 0
+ 1
+ 0
+
+ 0
+ 12
+
+
+
+
+
+
+
+
+
+
+
+
+
+ BIN\CMSIS_AGDI.dll
+
+
+
+
+ 1
+ 0
+ 0
+ 1
+ 1
+ 4096
+
+ 1
+ BIN\UL2CM3.DLL
+ "" ()
+
+
+
+
+ 0
+
+
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ "Cortex-M4"
+
+ 0
+ 0
+ 0
+ 1
+ 1
+ 0
+ 0
+ 2
+ 1
+ 0
+ 8
+ 1
+ 0
+ 0
+ 3
+ 3
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x20000000
+ 0x30000
+
+
+ 1
+ 0x8000000
+ 0x300000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x8000000
+ 0x300000
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x20000000
+ 0x30000
+
+
+ 0
+ 0x10000000
+ 0x10000
+
+
+
+
+
+ 1
+ 1
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 2
+ 0
+ 0
+ 0
+ 0
+
+
+
+
+ ..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Include;..\..\..\Library\Firmware\CMSIS\GD\GD32F4xx\Include;..\..\..\Library\Utilities;..\
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+
+
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0x08000000
+ 0x20000000
+
+
+
+
+
+
+
+
+
+
+
+
+ Application
+
+
+ main.c
+ 1
+ ..\main.c
+
+
+ gd32f4xx_it.c
+ 1
+ ..\gd32f4xx_it.c
+
+
+
+
+ CMSIS
+
+
+ system_gd32f4xx.c
+ 1
+ ..\..\..\Library\Firmware\CMSIS\GD\GD32F4xx\Source\system_gd32f4xx.c
+
+
+
+
+ GD32F4xx_Peripherals
+
+
+ gd32f4xx_adc.c
+ 1
+ ..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_adc.c
+
+
+ gd32f4xx_can.c
+ 1
+ ..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_can.c
+
+
+ gd32f4xx_crc.c
+ 1
+ ..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_crc.c
+
+
+ gd32f4xx_ctc.c
+ 1
+ ..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_ctc.c
+
+
+ gd32f4xx_dac.c
+ 1
+ ..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_dac.c
+
+
+ gd32f4xx_dbg.c
+ 1
+ ..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_dbg.c
+
+
+ gd32f4xx_dci.c
+ 1
+ ..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_dci.c
+
+
+ gd32f4xx_dma.c
+ 1
+ ..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_dma.c
+
+
+ gd32f4xx_enet.c
+ 1
+ ..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_enet.c
+
+
+ gd32f4xx_exmc.c
+ 1
+ ..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_exmc.c
+
+
+ gd32f4xx_exti.c
+ 1
+ ..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_exti.c
+
+
+ gd32f4xx_fmc.c
+ 1
+ ..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_fmc.c
+
+
+ gd32f4xx_fwdgt.c
+ 1
+ ..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_fwdgt.c
+
+
+ gd32f4xx_gpio.c
+ 1
+ ..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_gpio.c
+
+
+ gd32f4xx_i2c.c
+ 1
+ ..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_i2c.c
+
+
+ gd32f4xx_ipa.c
+ 1
+ ..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_ipa.c
+
+
+ gd32f4xx_iref.c
+ 1
+ ..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_iref.c
+
+
+ gd32f4xx_misc.c
+ 1
+ ..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_misc.c
+
+
+ gd32f4xx_pmu.c
+ 1
+ ..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_pmu.c
+
+
+ gd32f4xx_rcu.c
+ 1
+ ..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_rcu.c
+
+
+ gd32f4xx_rtc.c
+ 1
+ ..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_rtc.c
+
+
+ gd32f4xx_sdio.c
+ 1
+ ..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_sdio.c
+
+
+ gd32f4xx_spi.c
+ 1
+ ..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_spi.c
+
+
+ gd32f4xx_syscfg.c
+ 1
+ ..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_syscfg.c
+
+
+ gd32f4xx_timer.c
+ 1
+ ..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_timer.c
+
+
+ gd32f4xx_tli.c
+ 1
+ ..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_tli.c
+
+
+ gd32f4xx_trng.c
+ 1
+ ..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_trng.c
+
+
+ gd32f4xx_usart.c
+ 1
+ ..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_usart.c
+
+
+ gd32f4xx_wwdgt.c
+ 1
+ ..\..\..\Library\Firmware\GD32F4xx_standard_peripheral\Source\gd32f4xx_wwdgt.c
+
+
+
+
+ GD32F4xx_EVAL
+
+
+ gd32f450z_eval.c
+ 1
+ ..\..\..\Library\Utilities\gd32f450z_eval.c
+
+
+
+
+ Startup
+
+
+ startup_gd32f4xx.s
+ 2
+ ..\..\..\Library\Firmware\CMSIS\GD\GD32F4xx\Source\ARM\startup_gd32f4xx.s
+
+
+
+
+ Doc
+
+
+ readme.txt
+ 5
+ ..\readme.txt
+
+
+
+
+
+
+
+