[phy] fix the PHY_FULL_DUPLEX conflicts
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1990af6c96
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067315ff40
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@ -30,6 +30,11 @@
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#define MAX_ADDR_LEN 6
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#undef PHY_FULL_DUPLEX
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#define PHY_LINK (1 << 0)
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#define PHY_100M (1 << 1)
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#define PHY_FULL_DUPLEX (1 << 2)
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struct rt_stm32_eth
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{
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/* inherit from ethernet device */
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@ -401,12 +406,6 @@ void HAL_ETH_ErrorCallback(ETH_HandleTypeDef *heth)
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LOG_E("eth err");
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}
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enum {
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PHY_LINK = (1 << 0),
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PHY_100M = (1 << 1),
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PHY_FULL_DUPLEX = (1 << 2),
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};
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static void phy_linkchange()
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{
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static rt_uint8_t phy_speed = 0;
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@ -22,6 +22,15 @@
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#define LOG_TAG "drv.emac"
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#include <drv_log.h>
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#undef PHY_FULL_DUPLEX
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#undef PHY_HALF_DUPLEX
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#define PHY_LINK (1 << 0)
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#define PHY_10M (1 << 1)
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#define PHY_100M (1 << 2)
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#define PHY_1000M (1 << 3)
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#define PHY_FULL_DUPLEX (1 << 4)
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#define PHY_HALF_DUPLEX (1 << 5)
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#define MAX_ADDR_LEN 6
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rt_base_t level;
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@ -50,16 +50,6 @@ typedef struct
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uint32_t rdes3;
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} RxDmaDesc;
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enum {
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PHY_LINK = (1 << 0),
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PHY_10M = (1 << 1),
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PHY_100M = (1 << 2),
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PHY_1000M = (1 << 3),
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PHY_FULL_DUPLEX = (1 << 4),
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PHY_HALF_DUPLEX = (1 << 5)
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};
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#define RTL8211F_PHY_ADDR 1 /* PHY address */
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#define ETH_TXBUFNB 4 /* 4 Tx buffers of size ETH_TX_BUF_SIZE */
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@ -30,6 +30,15 @@ rt_base_t level;
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#define TX_DMA_ADD_BASE 0x2FFC7000
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#define RX_DMA_ADD_BASE 0x2FFC7100
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#undef PHY_FULL_DUPLEX
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#undef PHY_HALF_DUPLEX
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#define PHY_LINK (1 << 0)
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#define PHY_10M (1 << 1)
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#define PHY_100M (1 << 2)
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#define PHY_1000M (1 << 3)
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#define PHY_FULL_DUPLEX (1 << 4)
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#define PHY_HALF_DUPLEX (1 << 5)
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#if defined(__ICCARM__)
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/* transmit buffer */
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#pragma location = TX_ADD_BASE
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@ -42,15 +42,6 @@ typedef struct
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uint32_t rdes3;
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} RxDmaDesc;
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enum {
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PHY_LINK = (1 << 0),
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PHY_10M = (1 << 1),
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PHY_100M = (1 << 2),
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PHY_1000M = (1 << 3),
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PHY_FULL_DUPLEX = (1 << 4),
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PHY_HALF_DUPLEX = (1 << 5)
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};
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#define RTL8211E_PHY_ADDR 7 /* PHY address */
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#define ETH_TXBUFNB 4 /* 4 Tx buffers of size ETH_TX_BUF_SIZE */
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@ -19,52 +19,34 @@ extern "C"
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#endif
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/* Defines the PHY link speed. This is align with the speed for MAC. */
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enum phy_speed
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{
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PHY_SPEED_10M = 0U, /* PHY 10M speed. */
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PHY_SPEED_100M /* PHY 100M speed. */
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};
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#define PHY_SPEED_10M 0U /* PHY 10M speed. */
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#define PHY_SPEED_100M 1U /* PHY 100M speed. */
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/* Defines the PHY link duplex. */
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enum phy_duplex
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{
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PHY_HALF_DUPLEX = 0U, /* PHY half duplex. */
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PHY_FULL_DUPLEX /* PHY full duplex. */
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};
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#define PHY_HALF_DUPLEX 0U /* PHY half duplex. */
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#define PHY_FULL_DUPLEX 1U /* PHY full duplex. */
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/*! @brief Defines the PHY loopback mode. */
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enum phy_loop
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{
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PHY_LOCAL_LOOP = 0U, /* PHY local loopback. */
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PHY_REMOTE_LOOP /* PHY remote loopback. */
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};
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#define PHY_LOCAL_LOOP 0U /* PHY local loopback. */
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#define PHY_REMOTE_LOOP 1U /* PHY remote loopback. */
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#define PHY_STATUS_OK 0U
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#define PHY_STATUS_FAIL 1U
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#define PHY_STATUS_TIMEOUT 2U
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struct rt_phy_msg
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typedef struct rt_phy_msg
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{
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rt_uint32_t reg;
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rt_uint32_t value;
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};
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}rt_phy_msg_t;
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typedef struct rt_phy_msg rt_phy_msg_t;
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struct rt_phy_device
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typedef struct rt_phy_device
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{
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struct rt_device parent;
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struct rt_mdio_bus *bus;
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rt_uint32_t addr;
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struct rt_phy_ops *ops;
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};
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typedef struct rt_phy_device rt_phy_t;
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enum {
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PHY_STATUS_OK = 0,
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PHY_STATUS_FAIL,
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PHY_STATUS_TIMEOUT,
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};
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}rt_phy_t;
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typedef rt_int32_t rt_phy_status;
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@ -31,8 +31,6 @@ static rt_size_t phy_device_write(rt_device_t dev, rt_off_t pos, const void *buf
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return phy->bus->ops->write(phy->bus, phy->addr, msg->reg, &(msg->value), 4);
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}
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#ifdef RT_USING_DEVICE_OPS
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const static struct rt_device_ops phy_ops =
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{
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