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Merge pull request #5451 from mysterywolf/armcc

This commit is contained in:
guo 2022-01-04 18:46:03 +08:00 committed by GitHub
parent 09c089d511 9c67e061df
commit 05c30fde05
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
157 changed files with 219 additions and 223 deletions
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2
bsp/Vango_V85xx/drivers/board.h
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@ -21,7 +21,7 @@
#define V85XX_SRAM_SIZE 32 #define V85XX_SRAM_SIZE 32
#define V85XX_SRAM_END (0x20000000 + V85XX_SRAM_SIZE * 1024) #define V85XX_SRAM_END (0x20000000 + V85XX_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

4
bsp/acm32f0x0-nucleo/drivers/board.c
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@ -18,7 +18,7 @@
extern int rt_application_init(void); extern int rt_application_init(void);
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#elif __ICCARM__ #elif __ICCARM__
#pragma section="HEAP" #pragma section="HEAP"
@ -58,7 +58,7 @@ void rt_hw_board_init(void)
rt_console_set_device(RT_CONSOLE_DEVICE_NAME); rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
#ifdef RT_USING_HEAP #ifdef RT_USING_HEAP
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
rt_system_heap_init((void *)&Image$$RW_IRAM1$$ZI$$Limit, (void *)SOC_SRAM_END_ADDR); rt_system_heap_init((void *)&Image$$RW_IRAM1$$ZI$$Limit, (void *)SOC_SRAM_END_ADDR);
#elif __ICCARM__ #elif __ICCARM__
rt_system_heap_init(__segment_end("HEAP"), (void *)SOC_SRAM_END_ADDR); rt_system_heap_init(__segment_end("HEAP"), (void *)SOC_SRAM_END_ADDR);

4
bsp/acm32f4xx-nucleo/drivers/board.c
View File

@ -17,7 +17,7 @@
extern int rt_application_init(void); extern int rt_application_init(void);
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#elif __ICCARM__ #elif __ICCARM__
#pragma section="HEAP" #pragma section="HEAP"
@ -57,7 +57,7 @@ void rt_hw_board_init(void)
rt_console_set_device(RT_CONSOLE_DEVICE_NAME); rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
#ifdef RT_USING_HEAP #ifdef RT_USING_HEAP
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
rt_system_heap_init((void *)&Image$$RW_IRAM1$$ZI$$Limit, (void *)SOC_SRAM_END_ADDR); rt_system_heap_init((void *)&Image$$RW_IRAM1$$ZI$$Limit, (void *)SOC_SRAM_END_ADDR);
#elif __ICCARM__ #elif __ICCARM__
rt_system_heap_init(__segment_end("HEAP"), (void *)SOC_SRAM_END_ADDR); rt_system_heap_init(__segment_end("HEAP"), (void *)SOC_SRAM_END_ADDR);

2
bsp/apm32/apm32f103xe-minibroard/board/board.h
View File

@ -36,7 +36,7 @@ extern "C" {
#define APM32_SRAM_SIZE 128 #define APM32_SRAM_SIZE 128
#define APM32_SRAM_END (0x20000000 + APM32_SRAM_SIZE * 1024) #define APM32_SRAM_END (0x20000000 + APM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/at32/at32f403a-start/board/board.h
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@ -29,7 +29,7 @@ extern "C" {
#define AT32_SRAM_SIZE 96 #define AT32_SRAM_SIZE 96
#define AT32_SRAM_END (0x20000000 + AT32_SRAM_SIZE * 1024) #define AT32_SRAM_END (0x20000000 + AT32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/at32/at32f407-start/board/board.h
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@ -29,7 +29,7 @@ extern "C" {
#define AT32_SRAM_SIZE 96 #define AT32_SRAM_SIZE 96
#define AT32_SRAM_END (0x20000000 + AT32_SRAM_SIZE * 1024) #define AT32_SRAM_END (0x20000000 + AT32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/essemi/es32f0654/drivers/board.h
View File

@ -31,7 +31,7 @@
#define ES32F0_SRAM_SIZE 0x8000 #define ES32F0_SRAM_SIZE 0x8000
#define ES32F0_SRAM_END (0x20000000 + ES32F0_SRAM_SIZE) #define ES32F0_SRAM_END (0x20000000 + ES32F0_SRAM_SIZE)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/essemi/es32f365x/drivers/board.h
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@ -30,7 +30,7 @@
#define ES32F3_SRAM_SIZE 0x10000 #define ES32F3_SRAM_SIZE 0x10000
#define ES32F3_SRAM_END (0x20000000 + ES32F3_SRAM_SIZE) #define ES32F3_SRAM_END (0x20000000 + ES32F3_SRAM_SIZE)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/essemi/es32f369x/drivers/board.h
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@ -31,7 +31,7 @@
#define ES32F3_SRAM_SIZE 0x18000 #define ES32F3_SRAM_SIZE 0x18000
#define ES32F3_SRAM_END (0x20000000 + ES32F3_SRAM_SIZE) #define ES32F3_SRAM_END (0x20000000 + ES32F3_SRAM_SIZE)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/gd32e230k-start/drivers/board.h
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@ -25,7 +25,7 @@ extern char __ICFEDIT_region_RAM_end__;
#define GD32_SRAM_END (0x20000000 + GD32_SRAM_SIZE * 1024) #define GD32_SRAM_END (0x20000000 + GD32_SRAM_SIZE * 1024)
#endif #endif
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/hk32/hk32f030c8-mini/board/board.h
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@ -28,7 +28,7 @@ extern "C" {
#define HK32_SRAM_SIZE 10 #define HK32_SRAM_SIZE 10
#define HK32_SRAM_END (0x20000000 + HK32_SRAM_SIZE * 1024) #define HK32_SRAM_END (0x20000000 + HK32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/lpc55sxx/Libraries/template/lpc55s6xxxx/applications/main.c
View File

@ -20,7 +20,7 @@ int main(void)
{ {
#if defined(__CC_ARM) #if defined(__CC_ARM)
rt_kprintf("using armcc, version: %d\n", __ARMCC_VERSION); rt_kprintf("using armcc, version: %d\n", __ARMCC_VERSION);
#elif defined(__CLANG_ARM) #elif defined(__clang__)
rt_kprintf("using armclang, version: %d\n", __ARMCC_VERSION); rt_kprintf("using armclang, version: %d\n", __ARMCC_VERSION);
#elif defined(__ICCARM__) #elif defined(__ICCARM__)
rt_kprintf("using iccarm, version: %d\n", __VER__); rt_kprintf("using iccarm, version: %d\n", __VER__);

2
bsp/lpc55sxx/Libraries/template/lpc55s6xxxx/board/board.h
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@ -29,7 +29,7 @@
// <RDTConfigurator URL="http://www.rt-thread.com/eclipse"> // <RDTConfigurator URL="http://www.rt-thread.com/eclipse">
// </RDTConfigurator> // </RDTConfigurator>
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$ARM_LIB_HEAP$$ZI$$Base; extern int Image$$ARM_LIB_HEAP$$ZI$$Base;
#define HEAP_BEGIN ((void *)&Image$$ARM_LIB_HEAP$$ZI$$Base) #define HEAP_BEGIN ((void *)&Image$$ARM_LIB_HEAP$$ZI$$Base)
#elif defined(__ICCARM__) #elif defined(__ICCARM__)

2
bsp/lpc55sxx/lpc55s69_nxp_evk/applications/main.c
View File

@ -24,7 +24,7 @@ int main(void)
{ {
#if defined(__CC_ARM) #if defined(__CC_ARM)
rt_kprintf("using armcc, version: %d\n", __ARMCC_VERSION); rt_kprintf("using armcc, version: %d\n", __ARMCC_VERSION);
#elif defined(__CLANG_ARM) #elif defined(__clang__)
rt_kprintf("using armclang, version: %d\n", __ARMCC_VERSION); rt_kprintf("using armclang, version: %d\n", __ARMCC_VERSION);
#elif defined(__ICCARM__) #elif defined(__ICCARM__)
rt_kprintf("using iccarm, version: %d\n", __VER__); rt_kprintf("using iccarm, version: %d\n", __VER__);

2
bsp/lpc55sxx/lpc55s69_nxp_evk/board/board.h
View File

@ -29,7 +29,7 @@
// <RDTConfigurator URL="http://www.rt-thread.com/eclipse"> // <RDTConfigurator URL="http://www.rt-thread.com/eclipse">
// </RDTConfigurator> // </RDTConfigurator>
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$ARM_LIB_HEAP$$ZI$$Base; extern int Image$$ARM_LIB_HEAP$$ZI$$Base;
extern int Image$$ARM_LIB_STACK$$ZI$$Base; extern int Image$$ARM_LIB_STACK$$ZI$$Base;
#define HEAP_BEGIN ((void *)&Image$$ARM_LIB_HEAP$$ZI$$Base) #define HEAP_BEGIN ((void *)&Image$$ARM_LIB_HEAP$$ZI$$Base)

2
bsp/maxim/MAX32660_EVSYS/board/board.h
View File

@ -26,7 +26,7 @@
#define MCU_SRAM_START (0x20000000) #define MCU_SRAM_START (0x20000000)
#define MCU_SRAM_END (MCU_SRAM_START + MCU_SRAM_SIZE_KB * 1024) #define MCU_SRAM_END (MCU_SRAM_START + MCU_SRAM_SIZE_KB * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/mm32l07x/drivers/board.h
View File

@ -16,7 +16,7 @@
#define SRAM_SIZE 0x2000 #define SRAM_SIZE 0x2000
#define SRAM_END (SRAM_BASE + SRAM_SIZE) #define SRAM_END (SRAM_BASE + SRAM_SIZE)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/n32g452xx/n32g452xx-mini-system/board/board.h
View File

@ -28,7 +28,7 @@ extern "C" {
#define N32_SRAM_SIZE (80) #define N32_SRAM_SIZE (80)
#define N32_SRAM_END (0x20000000 + N32_SRAM_SIZE * 1024) #define N32_SRAM_END (0x20000000 + N32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/nrf5x/libraries/templates/nrfx/board/board.h
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@ -20,7 +20,7 @@
#define MCU_SRAM_SIZE MCU_SRAM_SIZE_KB*1024 #define MCU_SRAM_SIZE MCU_SRAM_SIZE_KB*1024
#define MCU_SRAM_END_ADDRESS (MCU_SRAM_START_ADDRESS + MCU_SRAM_SIZE) #define MCU_SRAM_END_ADDRESS (MCU_SRAM_START_ADDRESS + MCU_SRAM_SIZE)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/nrf5x/nrf51822/board/board.h
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@ -10,7 +10,7 @@
#define MCU_SRAM_SIZE MCU_SRAM_SIZE_KB*1024 #define MCU_SRAM_SIZE MCU_SRAM_SIZE_KB*1024
#define MCU_SRAM_END_ADDRESS (MCU_SRAM_START_ADDRESS + MCU_SRAM_SIZE) #define MCU_SRAM_END_ADDRESS (MCU_SRAM_START_ADDRESS + MCU_SRAM_SIZE)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/nrf5x/nrf52832/board/board.h
View File

@ -10,7 +10,7 @@
#define MCU_SRAM_SIZE MCU_SRAM_SIZE_KB*1024 #define MCU_SRAM_SIZE MCU_SRAM_SIZE_KB*1024
#define MCU_SRAM_END_ADDRESS (MCU_SRAM_START_ADDRESS + MCU_SRAM_SIZE) #define MCU_SRAM_END_ADDRESS (MCU_SRAM_START_ADDRESS + MCU_SRAM_SIZE)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/nrf5x/nrf52833/board/board.h
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@ -20,7 +20,7 @@
#define MCU_SRAM_SIZE MCU_SRAM_SIZE_KB*1024 #define MCU_SRAM_SIZE MCU_SRAM_SIZE_KB*1024
#define MCU_SRAM_END_ADDRESS (MCU_SRAM_START_ADDRESS + MCU_SRAM_SIZE) #define MCU_SRAM_END_ADDRESS (MCU_SRAM_START_ADDRESS + MCU_SRAM_SIZE)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/nrf5x/nrf52840/board/board.h
View File

@ -20,7 +20,7 @@
#define MCU_SRAM_SIZE MCU_SRAM_SIZE_KB*1024 #define MCU_SRAM_SIZE MCU_SRAM_SIZE_KB*1024
#define MCU_SRAM_END_ADDRESS (MCU_SRAM_START_ADDRESS + MCU_SRAM_SIZE) #define MCU_SRAM_END_ADDRESS (MCU_SRAM_START_ADDRESS + MCU_SRAM_SIZE)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/nuvoton/numaker-iot-m487/board/board.h
View File

@ -17,7 +17,7 @@
#define SRAM_SIZE (160) #define SRAM_SIZE (160)
#define SRAM_END (0x20000000 + SRAM_SIZE * 1024) #define SRAM_END (0x20000000 + SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/nuvoton/numaker-m032ki/board/board.h
View File

@ -17,7 +17,7 @@
#define SRAM_SIZE (96) #define SRAM_SIZE (96)
#define SRAM_END (0x20000000 + SRAM_SIZE * 1024) #define SRAM_END (0x20000000 + SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/nuvoton/numaker-m2354/board/board.h
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@ -17,7 +17,7 @@
#define SRAM_SIZE (256) #define SRAM_SIZE (256)
#define SRAM_END (0x20000000 + SRAM_SIZE * 1024) #define SRAM_END (0x20000000 + SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/nuvoton/numaker-pfm-m487/board/board.h
View File

@ -17,7 +17,7 @@
#define SRAM_SIZE (160) #define SRAM_SIZE (160)
#define SRAM_END (0x20000000 + SRAM_SIZE * 1024) #define SRAM_END (0x20000000 + SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

4
bsp/samd21/applications/startup.c
View File

@ -29,7 +29,7 @@ extern void finsh_system_init(void);
extern void finsh_set_device(const char* device); extern void finsh_set_device(const char* device);
#endif #endif
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#elif __ICCARM__ #elif __ICCARM__
#pragma section="HEAP" #pragma section="HEAP"
@ -72,7 +72,7 @@ void rtthread_startup(void)
rt_system_timer_init(); rt_system_timer_init();
#ifdef RT_USING_HEAP #ifdef RT_USING_HEAP
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)CHIP_SRAM_END); rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)CHIP_SRAM_END);
#elif __ICCARM__ #elif __ICCARM__
rt_system_heap_init(__segment_end("HEAP"), (void*)CHIP_SRAM_END); rt_system_heap_init(__segment_end("HEAP"), (void*)CHIP_SRAM_END);

2
bsp/stm32/libraries/templates/stm32f0xx/board/board.h
View File

@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE 32 #define STM32_SRAM_SIZE 32
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/libraries/templates/stm32f10x/board/board.h
View File

@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE 20 #define STM32_SRAM_SIZE 20
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/libraries/templates/stm32f2xx/board/board.h
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@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE 128 #define STM32_SRAM_SIZE 128
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/libraries/templates/stm32f3xx/board/board.h
View File

@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE 16 #define STM32_SRAM_SIZE 16
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/libraries/templates/stm32f4xx/board/board.h
View File

@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE 128 #define STM32_SRAM_SIZE 128
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/libraries/templates/stm32f7xx/board/board.h
View File

@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE (512) #define STM32_SRAM_SIZE (512)
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/libraries/templates/stm32h7xx/board/board.h
View File

@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE (512) #define STM32_SRAM_SIZE (512)
#define STM32_SRAM_END (0x24000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x24000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/libraries/templates/stm32l1xx/board/board.h
View File

@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE 16 #define STM32_SRAM_SIZE 16
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/libraries/templates/stm32l4xx/board/board.h
View File

@ -29,7 +29,7 @@ extern "C" {
#define STM32_SRAM1_START (0x20000000) #define STM32_SRAM1_START (0x20000000)
#define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024) #define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/libraries/templates/stm32l5xx/board/board.h
View File

@ -29,7 +29,7 @@ extern "C" {
#define STM32_SRAM1_START (0x20000000) #define STM32_SRAM1_START (0x20000000)
#define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024) #define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/libraries/templates/stm32mp1xx/board/board.h
View File

@ -29,7 +29,7 @@ extern "C" {
#define STM32_SRAM_SIZE (128) #define STM32_SRAM_SIZE (128)
#define STM32_SRAM_END ((uint32_t)0x10040000 + (STM32_SRAM_SIZE * 1024)) #define STM32_SRAM_END ((uint32_t)0x10040000 + (STM32_SRAM_SIZE * 1024))
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/libraries/templates/stm32wbxx/board/board.h
View File

@ -29,7 +29,7 @@ extern "C" {
#define STM32_SRAM1_START (0x20000000) #define STM32_SRAM1_START (0x20000000)
#define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024) #define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f072-st-nucleo/board/board.h
View File

@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE 16 #define STM32_SRAM_SIZE 16
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f091-st-nucleo/board/board.h
View File

@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE 32 #define STM32_SRAM_SIZE 32
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f103-atk-nano/board/board.h
View File

@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE 20 #define STM32_SRAM_SIZE 20
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f103-atk-warshipv3/board/board.h
View File

@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE 64 #define STM32_SRAM_SIZE 64
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f103-blue-pill/board/board.h
View File

@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE 20 #define STM32_SRAM_SIZE 20
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f103-dofly-M3S/board/board.h
View File

@ -29,7 +29,7 @@ extern "C" {
#define STM32_SRAM_SIZE 64 #define STM32_SRAM_SIZE 64
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f103-dofly-lyc8/board/board.h
View File

@ -23,7 +23,7 @@
#define STM32_SRAM_SIZE 20 #define STM32_SRAM_SIZE 20
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f103-fire-arbitrary/board/board.h
View File

@ -28,7 +28,7 @@ extern "C" {
#define STM32_FLASH_SIZE (512 * 1024) #define STM32_FLASH_SIZE (512 * 1024)
#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE)) #define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f103-gizwits-gokitv21/board/board.h
View File

@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE 20 #define STM32_SRAM_SIZE 20
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f103-hw100k-ibox/board/board.h
View File

@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE 64 #define STM32_SRAM_SIZE 64
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f103-onenet-nbiot/board/board.h
View File

@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE 64 #define STM32_SRAM_SIZE 64
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f103-yf-ufun/board/board.h
View File

@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE 48 #define STM32_SRAM_SIZE 48
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f107-uc-eval/board/board.h
View File

@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE 64 #define STM32_SRAM_SIZE 64
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

4
bsp/stm32/stm32f207-st-nucleo/board/board.c
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2018, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
@ -7,7 +7,7 @@
* Date Author Notes * Date Author Notes
* 2018-11-06 SummerGift first version * 2018-11-06 SummerGift first version
*/ */
#include "board.h" #include "board.h"
void SystemClock_Config(void) void SystemClock_Config(void)

4
bsp/stm32/stm32f207-st-nucleo/board/board.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2018, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE 128 #define STM32_SRAM_SIZE 128
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f302-st-nucleo/board/board.h
View File

@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE 16 #define STM32_SRAM_SIZE 16
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f401-st-nucleo/board/board.h
View File

@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE 96 #define STM32_SRAM_SIZE 96
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f405-smdz-breadfruit/board/board.h
View File

@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE (128) #define STM32_SRAM_SIZE (128)
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

4
bsp/stm32/stm32f407-armfly-v5/applications/main.c
View File

@ -1,10 +1,10 @@
/* /*
* Copyright (c) 2006-2018, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
* Change Logs: * Change Logs:
* Date Author Notes * Date Author Notes
* 2020-07-13 Dozingfiretruck first version * 2020-07-13 Dozingfiretruck first version
*/ */

10
bsp/stm32/stm32f407-armfly-v5/board/board.c
View File

@ -1,10 +1,10 @@
/* /*
* Copyright (c) 2006-2018, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
* Change Logs: * Change Logs:
* Date Author Notes * Date Author Notes
* 2020-07-13 Dozingfiretruck first version * 2020-07-13 Dozingfiretruck first version
*/ */
@ -16,11 +16,11 @@ void SystemClock_Config(void)
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
/** Configure the main internal regulator output voltage /** Configure the main internal regulator output voltage
*/ */
__HAL_RCC_PWR_CLK_ENABLE(); __HAL_RCC_PWR_CLK_ENABLE();
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
/** Initializes the CPU, AHB and APB busses clocks /** Initializes the CPU, AHB and APB busses clocks
*/ */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE
|RCC_OSCILLATORTYPE_LSE; |RCC_OSCILLATORTYPE_LSE;
@ -37,7 +37,7 @@ void SystemClock_Config(void)
{ {
Error_Handler(); Error_Handler();
} }
/** Initializes the CPU, AHB and APB busses clocks /** Initializes the CPU, AHB and APB busses clocks
*/ */
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;

6
bsp/stm32/stm32f407-armfly-v5/board/board.h
View File

@ -1,10 +1,10 @@
/* /*
* Copyright (c) 2006-2018, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
* Change Logs: * Change Logs:
* Date Author Notes * Date Author Notes
* 2020-07-13 Dozingfiretruck first version * 2020-07-13 Dozingfiretruck first version
*/ */
@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE 128 #define STM32_SRAM_SIZE 128
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

4
bsp/stm32/stm32f407-armfly-v5/board/ports/fal_cfg.h
View File

@ -1,10 +1,10 @@
/* /*
* Copyright (c) 2006-2018, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
* Change Logs: * Change Logs:
* Date Author Notes * Date Author Notes
* 2020-07-13 Dozingfiretruck first version * 2020-07-13 Dozingfiretruck first version
*/ */

4
bsp/stm32/stm32f407-armfly-v5/board/ports/sdcard_port.c
View File

@ -1,10 +1,10 @@
/* /*
* Copyright (c) 2006-2018, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
* Change Logs: * Change Logs:
* Date Author Notes * Date Author Notes
* 2020-07-13 Dozingfiretruck first version * 2020-07-13 Dozingfiretruck first version
*/ */

4
bsp/stm32/stm32f407-armfly-v5/board/ports/spi_flash_init.c
View File

@ -1,10 +1,10 @@
/* /*
* Copyright (c) 2006-2018, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
* Change Logs: * Change Logs:
* Date Author Notes * Date Author Notes
* 2020-07-13 Dozingfiretruck first version * 2020-07-13 Dozingfiretruck first version
*/ */

2
bsp/stm32/stm32f407-atk-explorer/applications/lvgl/lv_port_disp.c
View File

@ -26,7 +26,7 @@ static lv_disp_drv_t disp_drv;
lv_color_t buf_1[LCD_H * LCD_W]; lv_color_t buf_1[LCD_H * LCD_W];
#elif defined ( __CC_ARM ) /* MDK ARM Compiler */ #elif defined ( __CC_ARM ) /* MDK ARM Compiler */
__attribute__((at(0x68000000))) lv_color_t buf_1[LCD_H * LCD_W]; __attribute__((at(0x68000000))) lv_color_t buf_1[LCD_H * LCD_W];
#elif defined ( __CLANG_ARM ) /* MDK ARM Compiler v6 */ #elif defined ( __clang__ ) /* MDK ARM Compiler v6 */
__attribute__((section(".ARM.__at_0x68000000"))) lv_color_t buf_1[LCD_H * LCD_W]; __attribute__((section(".ARM.__at_0x68000000"))) lv_color_t buf_1[LCD_H * LCD_W];
#elif defined ( __GNUC__ ) /* GNU Compiler */ #elif defined ( __GNUC__ ) /* GNU Compiler */
lv_color_t buf_1[LCD_H * LCD_W] __attribute__((section(".MCUlcdgrambysram"))); lv_color_t buf_1[LCD_H * LCD_W] __attribute__((section(".MCUlcdgrambysram")));

2
bsp/stm32/stm32f407-atk-explorer/board/board.h
View File

@ -27,7 +27,7 @@ extern "C" {
#define STM32_FLASH_SIZE (1024 * 1024) #define STM32_FLASH_SIZE (1024 * 1024)
#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE)) #define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f407-robomaster-c/board/board.h
View File

@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE 128 #define STM32_SRAM_SIZE 128
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f407-st-discovery/board/board.h
View File

@ -23,7 +23,7 @@ extern "C" {
#define STM32_SRAM_SIZE (128) #define STM32_SRAM_SIZE (128)
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f410-st-nucleo/board/board.h
View File

@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE 32 #define STM32_SRAM_SIZE 32
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f411-atk-nano/board/board.h
View File

@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE 128 #define STM32_SRAM_SIZE 128
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f411-st-nucleo/board/board.h
View File

@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE 128 #define STM32_SRAM_SIZE 128
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f411-weact-MiniF4/board/board.h
View File

@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE 128 #define STM32_SRAM_SIZE 128
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f412-st-nucleo/board/board.h
View File

@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE 256 #define STM32_SRAM_SIZE 256
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f413-st-nucleo/board/board.h
View File

@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE 320 #define STM32_SRAM_SIZE 320
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f427-robomaster-a/board/board.h
View File

@ -29,7 +29,7 @@ extern "C" {
#define STM32_SRAM1_START (0x20000000) #define STM32_SRAM1_START (0x20000000)
#define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024) #define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f429-armfly-v6/board/board.h
View File

@ -27,7 +27,7 @@ extern "C" {
#define STM32_FLASH_SIZE (2 * 1024 * 1024) #define STM32_FLASH_SIZE (2 * 1024 * 1024)
#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE)) #define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f429-atk-apollo/board/board.h
View File

@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE (192) #define STM32_SRAM_SIZE (192)
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f429-fire-challenger/board/board.h
View File

@ -27,7 +27,7 @@ extern "C" {
#define STM32_FLASH_SIZE (1024 * 1024) #define STM32_FLASH_SIZE (1024 * 1024)
#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE)) #define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f429-st-disco/board/board.h
View File

@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE (256 - 64) #define STM32_SRAM_SIZE (256 - 64)
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f446-st-nucleo/board/board.h
View File

@ -24,7 +24,7 @@
#define STM32_SRAM_SIZE 128 #define STM32_SRAM_SIZE 128
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f469-st-disco/board/board.h
View File

@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE (384 - 64) #define STM32_SRAM_SIZE (384 - 64)
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f746-st-disco/board/board.h
View File

@ -23,7 +23,7 @@
#define STM32_SRAM_SIZE (320) #define STM32_SRAM_SIZE (320)
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f746-st-nucleo/board/board.h
View File

@ -23,7 +23,7 @@
#define STM32_SRAM_SIZE (256) #define STM32_SRAM_SIZE (256)
#define STM32_SRAM_END (0x20010000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20010000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f767-atk-apollo/board/board.h
View File

@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE (512) #define STM32_SRAM_SIZE (512)
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f767-fire-challenger-v1/board/board.h
View File

@ -27,7 +27,7 @@ extern "C" {
#define STM32_FLASH_SIZE (1024 * 1024) #define STM32_FLASH_SIZE (1024 * 1024)
#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE)) #define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f767-st-nucleo/board/board.h
View File

@ -24,7 +24,7 @@
#define STM32_SRAM_SIZE (512) #define STM32_SRAM_SIZE (512)
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f769-st-disco/board/board.h
View File

@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE (512) #define STM32_SRAM_SIZE (512)
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32g070-st-nucleo/board/board.h
View File

@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE 36 #define STM32_SRAM_SIZE 36
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32g071-st-nucleo/board/board.h
View File

@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE 36 #define STM32_SRAM_SIZE 36
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32g431-st-nucleo/board/board.h
View File

@ -24,7 +24,7 @@
#define STM32_SRAM_SIZE 32 #define STM32_SRAM_SIZE 32
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32g474-st-nucleo/board/board.h
View File

@ -24,7 +24,7 @@
#define STM32_SRAM_SIZE 32 #define STM32_SRAM_SIZE 32
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32h743-armfly-V7/board/board.h
View File

@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE (512) #define STM32_SRAM_SIZE (512)
#define STM32_SRAM_END (0x24000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x24000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32h743-atk-apollo/board/board.h
View File

@ -31,7 +31,7 @@ extern "C" {
#define STM32_SRAM_SIZE (512) #define STM32_SRAM_SIZE (512)
#define STM32_SRAM_END (0x24000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x24000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32h743-openmv-h7plus/board/board.h
View File

@ -29,7 +29,7 @@ extern "C" {
#define STM32_SRAM1_START (0x20000000) #define STM32_SRAM1_START (0x20000000)
#define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024) #define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32h743-st-nucleo/board/board.h
View File

@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE (512) #define STM32_SRAM_SIZE (512)
#define STM32_SRAM_END (0x24000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x24000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32h747-st-discovery/board/board.h
View File

@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE (128) #define STM32_SRAM_SIZE (128)
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32h750-armfly-h7-tool/board/board.h
View File

@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE (128) #define STM32_SRAM_SIZE (128)
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32h750-artpi-h750/applications/main.c
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2018, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/stm32h750-artpi-h750/board/board.h
View File

@ -77,7 +77,7 @@ extern "C" {
#define STM32_SRAM1_START RAM_START #define STM32_SRAM1_START RAM_START
#define STM32_SRAM1_END RAM_END #define STM32_SRAM1_END RAM_END
#if defined(__CC_ARM) || defined(__CLANG_ARM) #if defined(__ARMCC_VERSION)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32h750-artpi-h750/board/port/drv_eth.c
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2018, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

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