From 05bf7e61f69512b1ab4c1010a471bb4277ce77b5 Mon Sep 17 00:00:00 2001 From: WUSY1991 <1191297340@qq.com> Date: Fri, 10 Sep 2021 19:41:22 +0800 Subject: [PATCH] add yichip/yc3121-pos bsp --- bsp/yichip/yc3121-pos/.config | 582 + bsp/yichip/yc3121-pos/.gitignore | 44 + bsp/yichip/yc3121-pos/.ignore_format.yml | 25 + bsp/yichip/yc3121-pos/Kconfig | 27 + bsp/yichip/yc3121-pos/Libraries/SConscript | 17 + .../yc3121-pos/Libraries/core/board_config.h | 275 + bsp/yichip/yc3121-pos/Libraries/core/misc.c | 102 + bsp/yichip/yc3121-pos/Libraries/core/misc.h | 93 + .../yc3121-pos/Libraries/core/rom_api.h | 42 + bsp/yichip/yc3121-pos/Libraries/core/system.c | 254 + bsp/yichip/yc3121-pos/Libraries/core/system.h | 43 + bsp/yichip/yc3121-pos/Libraries/core/type.h | 67 + bsp/yichip/yc3121-pos/Libraries/core/yc3121.h | 666 + bsp/yichip/yc3121-pos/Libraries/sdk/yc_dma.c | 72 + bsp/yichip/yc3121-pos/Libraries/sdk/yc_dma.h | 91 + bsp/yichip/yc3121-pos/Libraries/sdk/yc_gpio.c | 211 + bsp/yichip/yc3121-pos/Libraries/sdk/yc_gpio.h | 299 + .../yc3121-pos/Libraries/sdk/yc_systick.c | 72 + .../yc3121-pos/Libraries/sdk/yc_systick.h | 64 + bsp/yichip/yc3121-pos/Libraries/sdk/yc_uart.c | 429 + bsp/yichip/yc3121-pos/Libraries/sdk/yc_uart.h | 304 + bsp/yichip/yc3121-pos/Libraries/sdk/yc_wdt.c | 54 + bsp/yichip/yc3121-pos/Libraries/sdk/yc_wdt.h | 74 + .../Libraries/startup/flash_start.s | 396 + .../Libraries/startup/flash_start_gcc.s | 318 + .../Libraries/startup/flash_start_iar.s | 311 + .../yc3121-pos/Libraries/startup/startup.s | 175 + bsp/yichip/yc3121-pos/README.md | 36 + bsp/yichip/yc3121-pos/SConscript | 11 + bsp/yichip/yc3121-pos/SConstruct | 40 + bsp/yichip/yc3121-pos/applications/SConscript | 9 + bsp/yichip/yc3121-pos/applications/main.c | 31 + bsp/yichip/yc3121-pos/drivers/Kconfig | 22 + bsp/yichip/yc3121-pos/drivers/SConscript | 25 + bsp/yichip/yc3121-pos/drivers/board.c | 57 + bsp/yichip/yc3121-pos/drivers/board.h | 44 + bsp/yichip/yc3121-pos/drivers/drv_gpio.c | 199 + bsp/yichip/yc3121-pos/drivers/drv_gpio.h | 16 + bsp/yichip/yc3121-pos/drivers/drv_uart.c | 194 + bsp/yichip/yc3121-pos/drivers/drv_uart.h | 16 + .../drivers/linker_scripts/link.icf | 32 + .../drivers/linker_scripts/link.lds | 161 + .../drivers/linker_scripts/link.sct | 32 + bsp/yichip/yc3121-pos/figures/YC3121-pos.jpg | Bin 0 -> 245850 bytes bsp/yichip/yc3121-pos/project.ewd | 2834 +++ bsp/yichip/yc3121-pos/project.ewp | 2223 +++ bsp/yichip/yc3121-pos/project.eww | 10 + bsp/yichip/yc3121-pos/project.uvoptx | 793 + bsp/yichip/yc3121-pos/project.uvprojx | 661 + bsp/yichip/yc3121-pos/rtconfig.h | 178 + bsp/yichip/yc3121-pos/rtconfig.py | 152 + bsp/yichip/yc3121-pos/rtthread_asm.txt | 14979 ++++++++++++++++ bsp/yichip/yc3121-pos/template.ewp | 2032 +++ bsp/yichip/yc3121-pos/template.eww | 10 + bsp/yichip/yc3121-pos/template.uvopt | 184 + bsp/yichip/yc3121-pos/template.uvoptx | 177 + bsp/yichip/yc3121-pos/template.uvprojx | 389 + 57 files changed, 30654 insertions(+) create mode 100644 bsp/yichip/yc3121-pos/.config create mode 100644 bsp/yichip/yc3121-pos/.gitignore create mode 100644 bsp/yichip/yc3121-pos/.ignore_format.yml create mode 100644 bsp/yichip/yc3121-pos/Kconfig create mode 100644 bsp/yichip/yc3121-pos/Libraries/SConscript create mode 100644 bsp/yichip/yc3121-pos/Libraries/core/board_config.h create mode 100644 bsp/yichip/yc3121-pos/Libraries/core/misc.c create mode 100644 bsp/yichip/yc3121-pos/Libraries/core/misc.h create mode 100644 bsp/yichip/yc3121-pos/Libraries/core/rom_api.h create mode 100644 bsp/yichip/yc3121-pos/Libraries/core/system.c create mode 100644 bsp/yichip/yc3121-pos/Libraries/core/system.h create mode 100644 bsp/yichip/yc3121-pos/Libraries/core/type.h create mode 100644 bsp/yichip/yc3121-pos/Libraries/core/yc3121.h create mode 100644 bsp/yichip/yc3121-pos/Libraries/sdk/yc_dma.c create mode 100644 bsp/yichip/yc3121-pos/Libraries/sdk/yc_dma.h create mode 100644 bsp/yichip/yc3121-pos/Libraries/sdk/yc_gpio.c create mode 100644 bsp/yichip/yc3121-pos/Libraries/sdk/yc_gpio.h create mode 100644 bsp/yichip/yc3121-pos/Libraries/sdk/yc_systick.c create mode 100644 bsp/yichip/yc3121-pos/Libraries/sdk/yc_systick.h create mode 100644 bsp/yichip/yc3121-pos/Libraries/sdk/yc_uart.c create mode 100644 bsp/yichip/yc3121-pos/Libraries/sdk/yc_uart.h create mode 100644 bsp/yichip/yc3121-pos/Libraries/sdk/yc_wdt.c create mode 100644 bsp/yichip/yc3121-pos/Libraries/sdk/yc_wdt.h create mode 100644 bsp/yichip/yc3121-pos/Libraries/startup/flash_start.s create mode 100644 bsp/yichip/yc3121-pos/Libraries/startup/flash_start_gcc.s create mode 100644 bsp/yichip/yc3121-pos/Libraries/startup/flash_start_iar.s create mode 100644 bsp/yichip/yc3121-pos/Libraries/startup/startup.s create mode 100644 bsp/yichip/yc3121-pos/README.md create mode 100644 bsp/yichip/yc3121-pos/SConscript create mode 100644 bsp/yichip/yc3121-pos/SConstruct create mode 100644 bsp/yichip/yc3121-pos/applications/SConscript create mode 100644 bsp/yichip/yc3121-pos/applications/main.c create mode 100644 bsp/yichip/yc3121-pos/drivers/Kconfig create mode 100644 bsp/yichip/yc3121-pos/drivers/SConscript create mode 100644 bsp/yichip/yc3121-pos/drivers/board.c create mode 100644 bsp/yichip/yc3121-pos/drivers/board.h create mode 100644 bsp/yichip/yc3121-pos/drivers/drv_gpio.c create mode 100644 bsp/yichip/yc3121-pos/drivers/drv_gpio.h create mode 100644 bsp/yichip/yc3121-pos/drivers/drv_uart.c create mode 100644 bsp/yichip/yc3121-pos/drivers/drv_uart.h create mode 100644 bsp/yichip/yc3121-pos/drivers/linker_scripts/link.icf create mode 100644 bsp/yichip/yc3121-pos/drivers/linker_scripts/link.lds create mode 100644 bsp/yichip/yc3121-pos/drivers/linker_scripts/link.sct create mode 100644 bsp/yichip/yc3121-pos/figures/YC3121-pos.jpg create mode 100644 bsp/yichip/yc3121-pos/project.ewd create mode 100644 bsp/yichip/yc3121-pos/project.ewp create mode 100644 bsp/yichip/yc3121-pos/project.eww create mode 100644 bsp/yichip/yc3121-pos/project.uvoptx create mode 100644 bsp/yichip/yc3121-pos/project.uvprojx create mode 100644 bsp/yichip/yc3121-pos/rtconfig.h create mode 100644 bsp/yichip/yc3121-pos/rtconfig.py create mode 100644 bsp/yichip/yc3121-pos/rtthread_asm.txt create mode 100644 bsp/yichip/yc3121-pos/template.ewp create mode 100644 bsp/yichip/yc3121-pos/template.eww create mode 100644 bsp/yichip/yc3121-pos/template.uvopt create mode 100644 bsp/yichip/yc3121-pos/template.uvoptx create mode 100644 bsp/yichip/yc3121-pos/template.uvprojx diff --git a/bsp/yichip/yc3121-pos/.config b/bsp/yichip/yc3121-pos/.config new file mode 100644 index 0000000000..eca18829fa --- /dev/null +++ b/bsp/yichip/yc3121-pos/.config @@ -0,0 +1,582 @@ +# +# Automatically generated file; DO NOT EDIT. +# RT-Thread Configuration +# + +# +# RT-Thread Kernel +# +CONFIG_RT_NAME_MAX=8 +# CONFIG_RT_USING_ARCH_DATA_TYPE is not set +# CONFIG_RT_USING_SMP is not set +CONFIG_RT_ALIGN_SIZE=4 +# CONFIG_RT_THREAD_PRIORITY_8 is not set +CONFIG_RT_THREAD_PRIORITY_32=y +# CONFIG_RT_THREAD_PRIORITY_256 is not set +CONFIG_RT_THREAD_PRIORITY_MAX=32 +CONFIG_RT_TICK_PER_SECOND=100 +CONFIG_RT_USING_OVERFLOW_CHECK=y +CONFIG_RT_USING_HOOK=y +CONFIG_RT_USING_IDLE_HOOK=y +CONFIG_RT_IDLE_HOOK_LIST_SIZE=4 +CONFIG_IDLE_THREAD_STACK_SIZE=256 +# CONFIG_RT_USING_TIMER_SOFT is not set + +# +# kservice optimization +# +# CONFIG_RT_KSERVICE_USING_STDLIB is not set +# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set +# CONFIG_RT_USING_ASM_MEMCPY is not set +CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y +# CONFIG_RT_DEBUG_INIT_CONFIG is not set +# CONFIG_RT_DEBUG_THREAD_CONFIG is not set +# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set +# CONFIG_RT_DEBUG_IPC_CONFIG is not set +# CONFIG_RT_DEBUG_TIMER_CONFIG is not set +# CONFIG_RT_DEBUG_IRQ_CONFIG is not set +# CONFIG_RT_DEBUG_MEM_CONFIG is not set +# CONFIG_RT_DEBUG_SLAB_CONFIG is not set +# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set +# CONFIG_RT_DEBUG_MODULE_CONFIG is not set + +# +# Inter-Thread communication +# +CONFIG_RT_USING_SEMAPHORE=y +CONFIG_RT_USING_MUTEX=y +CONFIG_RT_USING_EVENT=y +CONFIG_RT_USING_MAILBOX=y +CONFIG_RT_USING_MESSAGEQUEUE=y +# CONFIG_RT_USING_SIGNALS is not set + +# +# Memory Management +# +CONFIG_RT_USING_MEMPOOL=y +CONFIG_RT_USING_MEMHEAP=y +# CONFIG_RT_USING_NOHEAP is not set +CONFIG_RT_USING_SMALL_MEM=y +# CONFIG_RT_USING_SLAB is not set +# CONFIG_RT_USING_MEMHEAP_AS_HEAP is not set +# CONFIG_RT_USING_USERHEAP is not set +# CONFIG_RT_USING_MEMTRACE is not set +CONFIG_RT_USING_HEAP=y + +# +# Kernel Device Object +# +CONFIG_RT_USING_DEVICE=y +# CONFIG_RT_USING_DEVICE_OPS is not set +# CONFIG_RT_USING_INTERRUPT_INFO is not set +CONFIG_RT_USING_CONSOLE=y +CONFIG_RT_CONSOLEBUF_SIZE=128 +CONFIG_RT_CONSOLE_DEVICE_NAME="uart0" +# CONFIG_RT_PRINTF_LONGLONG is not set +CONFIG_RT_VER_NUM=0x40004 +# CONFIG_RT_USING_CPU_FFS is not set +# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set + +# +# RT-Thread Components +# +CONFIG_RT_USING_COMPONENTS_INIT=y +CONFIG_RT_USING_USER_MAIN=y +CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048 +CONFIG_RT_MAIN_THREAD_PRIORITY=10 + +# +# C++ features +# +# CONFIG_RT_USING_CPLUSPLUS is not set + +# +# Command shell +# +CONFIG_RT_USING_FINSH=y +CONFIG_RT_USING_MSH=y +CONFIG_FINSH_USING_MSH=y +CONFIG_FINSH_THREAD_NAME="tshell" +CONFIG_FINSH_THREAD_PRIORITY=20 +CONFIG_FINSH_THREAD_STACK_SIZE=4096 +CONFIG_FINSH_USING_HISTORY=y +CONFIG_FINSH_HISTORY_LINES=5 +CONFIG_FINSH_USING_SYMTAB=y +CONFIG_FINSH_CMD_SIZE=80 +CONFIG_MSH_USING_BUILT_IN_COMMANDS=y +CONFIG_FINSH_USING_DESCRIPTION=y +# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set +# CONFIG_FINSH_USING_AUTH is not set +CONFIG_FINSH_ARG_MAX=10 + +# +# Device virtual file system +# +# CONFIG_RT_USING_DFS is not set + +# +# Device Drivers +# +CONFIG_RT_USING_DEVICE_IPC=y +CONFIG_RT_PIPE_BUFSZ=512 +# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set +CONFIG_RT_USING_SERIAL=y +CONFIG_RT_USING_SERIAL_V1=y +# CONFIG_RT_USING_SERIAL_V2 is not set +# CONFIG_RT_SERIAL_USING_DMA is not set +CONFIG_RT_SERIAL_RB_BUFSZ=64 +# CONFIG_RT_USING_CAN is not set +# CONFIG_RT_USING_HWTIMER is not set +# CONFIG_RT_USING_CPUTIME is not set +# CONFIG_RT_USING_I2C is not set +# CONFIG_RT_USING_PHY is not set +CONFIG_RT_USING_PIN=y +# CONFIG_RT_USING_ADC is not set +# CONFIG_RT_USING_DAC is not set +# CONFIG_RT_USING_PWM is not set +# CONFIG_RT_USING_MTD_NOR is not set +# CONFIG_RT_USING_MTD_NAND is not set +# CONFIG_RT_USING_PM is not set +# CONFIG_RT_USING_RTC is not set +# CONFIG_RT_USING_SDIO is not set +# CONFIG_RT_USING_SPI is not set +# CONFIG_RT_USING_WDT is not set +# CONFIG_RT_USING_AUDIO is not set +# CONFIG_RT_USING_SENSOR is not set +# CONFIG_RT_USING_TOUCH is not set +# CONFIG_RT_USING_HWCRYPTO is not set +# CONFIG_RT_USING_PULSE_ENCODER is not set +# CONFIG_RT_USING_INPUT_CAPTURE is not set +# CONFIG_RT_USING_WIFI is not set + +# +# Using USB +# +# CONFIG_RT_USING_USB_HOST is not set +# CONFIG_RT_USING_USB_DEVICE is not set + +# +# POSIX layer and C standard library +# +# CONFIG_RT_USING_LIBC is not set +# CONFIG_RT_USING_PTHREADS is not set +CONFIG_RT_LIBC_USING_TIME=y +CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 + +# +# Network +# + +# +# Socket abstraction layer +# +# CONFIG_RT_USING_SAL is not set + +# +# Network interface device +# +# CONFIG_RT_USING_NETDEV is not set + +# +# light weight TCP/IP stack +# +# CONFIG_RT_USING_LWIP is not set + +# +# AT commands +# +# CONFIG_RT_USING_AT is not set + +# +# VBUS(Virtual Software BUS) +# +# CONFIG_RT_USING_VBUS is not set + +# +# Utilities +# +# CONFIG_RT_USING_RYM is not set +# CONFIG_RT_USING_ULOG is not set +# CONFIG_RT_USING_UTEST is not set +# CONFIG_RT_USING_RT_LINK is not set + +# +# RT-Thread Utestcases +# +# CONFIG_RT_USING_UTESTCASES is not set + +# +# RT-Thread online packages +# + +# +# IoT - internet of things +# +# CONFIG_PKG_USING_LORAWAN_DRIVER is not set +# CONFIG_PKG_USING_PAHOMQTT is not set +# CONFIG_PKG_USING_UMQTT is not set +# CONFIG_PKG_USING_WEBCLIENT is not set +# CONFIG_PKG_USING_WEBNET is not set +# CONFIG_PKG_USING_MONGOOSE is not set +# CONFIG_PKG_USING_MYMQTT is not set +# CONFIG_PKG_USING_KAWAII_MQTT is not set +# CONFIG_PKG_USING_BC28_MQTT is not set +# CONFIG_PKG_USING_WEBTERMINAL is not set +# CONFIG_PKG_USING_CJSON is not set +# CONFIG_PKG_USING_JSMN is not set +# CONFIG_PKG_USING_LIBMODBUS is not set +# CONFIG_PKG_USING_FREEMODBUS is not set +# CONFIG_PKG_USING_LJSON is not set +# CONFIG_PKG_USING_EZXML is not set +# CONFIG_PKG_USING_NANOPB is not set + +# +# Wi-Fi +# + +# +# Marvell WiFi +# +# CONFIG_PKG_USING_WLANMARVELL is not set + +# +# Wiced WiFi +# +# CONFIG_PKG_USING_WLAN_WICED is not set +# CONFIG_PKG_USING_RW007 is not set +# CONFIG_PKG_USING_COAP is not set +# CONFIG_PKG_USING_NOPOLL is not set +# CONFIG_PKG_USING_NETUTILS is not set +# CONFIG_PKG_USING_CMUX is not set +# CONFIG_PKG_USING_PPP_DEVICE is not set +# CONFIG_PKG_USING_AT_DEVICE is not set +# CONFIG_PKG_USING_ATSRV_SOCKET is not set +# CONFIG_PKG_USING_WIZNET is not set +# CONFIG_PKG_USING_ZB_COORDINATOR is not set + +# +# IoT Cloud +# +# CONFIG_PKG_USING_ONENET is not set +# CONFIG_PKG_USING_GAGENT_CLOUD is not set +# CONFIG_PKG_USING_ALI_IOTKIT is not set +# CONFIG_PKG_USING_AZURE is not set +# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set +# CONFIG_PKG_USING_JIOT-C-SDK is not set +# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set +# CONFIG_PKG_USING_JOYLINK is not set +# CONFIG_PKG_USING_NIMBLE is not set +# CONFIG_PKG_USING_OTA_DOWNLOADER is not set +# CONFIG_PKG_USING_IPMSG is not set +# CONFIG_PKG_USING_LSSDP is not set +# CONFIG_PKG_USING_AIRKISS_OPEN is not set +# CONFIG_PKG_USING_LIBRWS is not set +# CONFIG_PKG_USING_TCPSERVER is not set +# CONFIG_PKG_USING_PROTOBUF_C is not set +# CONFIG_PKG_USING_DLT645 is not set +# CONFIG_PKG_USING_QXWZ is not set +# CONFIG_PKG_USING_SMTP_CLIENT is not set +# CONFIG_PKG_USING_ABUP_FOTA is not set +# CONFIG_PKG_USING_LIBCURL2RTT is not set +# CONFIG_PKG_USING_CAPNP is not set +# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set +# CONFIG_PKG_USING_AGILE_TELNET is not set +# CONFIG_PKG_USING_NMEALIB is not set +# CONFIG_PKG_USING_AGILE_JSMN is not set +# CONFIG_PKG_USING_PDULIB is not set +# CONFIG_PKG_USING_BTSTACK is not set +# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set +# CONFIG_PKG_USING_WAYZ_IOTKIT is not set +# CONFIG_PKG_USING_MAVLINK is not set +# CONFIG_PKG_USING_RAPIDJSON is not set +# CONFIG_PKG_USING_BSAL is not set +# CONFIG_PKG_USING_AGILE_MODBUS is not set +# CONFIG_PKG_USING_AGILE_FTP is not set +# CONFIG_PKG_USING_EMBEDDEDPROTO is not set +# CONFIG_PKG_USING_RT_LINK_HW is not set + +# +# security packages +# +# CONFIG_PKG_USING_MBEDTLS is not set +# CONFIG_PKG_USING_libsodium is not set +# CONFIG_PKG_USING_TINYCRYPT is not set +# CONFIG_PKG_USING_TFM is not set +# CONFIG_PKG_USING_YD_CRYPTO is not set + +# +# language packages +# +# CONFIG_PKG_USING_LUA is not set +# CONFIG_PKG_USING_JERRYSCRIPT is not set +# CONFIG_PKG_USING_MICROPYTHON is not set +# CONFIG_PKG_USING_PIKASCRIPT is not set + +# +# multimedia packages +# +# CONFIG_PKG_USING_OPENMV is not set +# CONFIG_PKG_USING_MUPDF is not set +# CONFIG_PKG_USING_STEMWIN is not set +# CONFIG_PKG_USING_WAVPLAYER is not set +# CONFIG_PKG_USING_TJPGD is not set +# CONFIG_PKG_USING_PDFGEN is not set +# CONFIG_PKG_USING_HELIX is not set +# CONFIG_PKG_USING_AZUREGUIX is not set +# CONFIG_PKG_USING_TOUCHGFX2RTT is not set +# CONFIG_PKG_USING_NUEMWIN is not set +# CONFIG_PKG_USING_MP3PLAYER is not set +# CONFIG_PKG_USING_TINYJPEG is not set + +# +# tools packages +# +# CONFIG_PKG_USING_CMBACKTRACE is not set +# CONFIG_PKG_USING_EASYFLASH is not set +# CONFIG_PKG_USING_EASYLOGGER is not set +# CONFIG_PKG_USING_SYSTEMVIEW is not set +# CONFIG_PKG_USING_SEGGER_RTT is not set +# CONFIG_PKG_USING_RDB is not set +# CONFIG_PKG_USING_QRCODE is not set +# CONFIG_PKG_USING_ULOG_EASYFLASH is not set +# CONFIG_PKG_USING_ULOG_FILE is not set +# CONFIG_PKG_USING_LOGMGR is not set +# CONFIG_PKG_USING_ADBD is not set +# CONFIG_PKG_USING_COREMARK is not set +# CONFIG_PKG_USING_DHRYSTONE is not set +# CONFIG_PKG_USING_MEMORYPERF is not set +# CONFIG_PKG_USING_NR_MICRO_SHELL is not set +# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set +# CONFIG_PKG_USING_LUNAR_CALENDAR is not set +# CONFIG_PKG_USING_BS8116A is not set +# CONFIG_PKG_USING_GPS_RMC is not set +# CONFIG_PKG_USING_URLENCODE is not set +# CONFIG_PKG_USING_UMCN is not set +# CONFIG_PKG_USING_LWRB2RTT is not set +# CONFIG_PKG_USING_CPU_USAGE is not set +# CONFIG_PKG_USING_GBK2UTF8 is not set +# CONFIG_PKG_USING_VCONSOLE is not set +# CONFIG_PKG_USING_KDB is not set +# CONFIG_PKG_USING_WAMR is not set +# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set +# CONFIG_PKG_USING_LWLOG is not set +# CONFIG_PKG_USING_ANV_TRACE is not set +# CONFIG_PKG_USING_ANV_MEMLEAK is not set +# CONFIG_PKG_USING_ANV_TESTSUIT is not set +# CONFIG_PKG_USING_ANV_BENCH is not set +# CONFIG_PKG_USING_DEVMEM is not set +# CONFIG_PKG_USING_REGEX is not set +# CONFIG_PKG_USING_MEM_SANDBOX is not set +# CONFIG_PKG_USING_SOLAR_TERMS is not set +# CONFIG_PKG_USING_GAN_ZHI is not set + +# +# system packages +# + +# +# acceleration: Assembly language or algorithmic acceleration packages +# +# CONFIG_PKG_USING_RT_MEMCPY_CM is not set +# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set +# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set +# CONFIG_PKG_USING_QFPLIB_M3 is not set + +# +# Micrium: Micrium software products porting for RT-Thread +# +# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set +# CONFIG_PKG_USING_UCOSII_WRAPPER is not set +# CONFIG_PKG_USING_UC_CRC is not set +# CONFIG_PKG_USING_UC_CLK is not set +# CONFIG_PKG_USING_UC_COMMON is not set +# CONFIG_PKG_USING_UC_MODBUS is not set +# CONFIG_PKG_USING_GUIENGINE is not set +# CONFIG_PKG_USING_CAIRO is not set +# CONFIG_PKG_USING_PIXMAN is not set +# CONFIG_PKG_USING_PARTITION is not set +# CONFIG_PKG_USING_FAL is not set +# CONFIG_PKG_USING_FLASHDB is not set +# CONFIG_PKG_USING_SQLITE is not set +# CONFIG_PKG_USING_RTI is not set +# CONFIG_PKG_USING_LITTLEVGL2RTT is not set +# CONFIG_PKG_USING_CMSIS is not set +# CONFIG_PKG_USING_DFS_YAFFS is not set +# CONFIG_PKG_USING_LITTLEFS is not set +# CONFIG_PKG_USING_DFS_JFFS2 is not set +# CONFIG_PKG_USING_DFS_UFFS is not set +# CONFIG_PKG_USING_LWEXT4 is not set +# CONFIG_PKG_USING_THREAD_POOL is not set +# CONFIG_PKG_USING_ROBOTS is not set +# CONFIG_PKG_USING_EV is not set +# CONFIG_PKG_USING_SYSWATCH is not set +# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set +# CONFIG_PKG_USING_PLCCORE is not set +# CONFIG_PKG_USING_RAMDISK is not set +# CONFIG_PKG_USING_MININI is not set +# CONFIG_PKG_USING_QBOOT is not set +# CONFIG_PKG_USING_PPOOL is not set +# CONFIG_PKG_USING_OPENAMP is not set +# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set +# CONFIG_PKG_USING_LPM is not set +# CONFIG_PKG_USING_TLSF is not set +# CONFIG_PKG_USING_EVENT_RECORDER is not set +# CONFIG_PKG_USING_ARM_2D is not set +# CONFIG_PKG_USING_WCWIDTH is not set +# CONFIG_PKG_USING_MCUBOOT is not set + +# +# peripheral libraries and drivers +# +# CONFIG_PKG_USING_SENSORS_DRIVERS is not set +# CONFIG_PKG_USING_REALTEK_AMEBA is not set +# CONFIG_PKG_USING_SHT2X is not set +# CONFIG_PKG_USING_SHT3X is not set +# CONFIG_PKG_USING_AS7341 is not set +# CONFIG_PKG_USING_STM32_SDIO is not set +# CONFIG_PKG_USING_ICM20608 is not set +# CONFIG_PKG_USING_U8G2 is not set +# CONFIG_PKG_USING_BUTTON is not set +# CONFIG_PKG_USING_PCF8574 is not set +# CONFIG_PKG_USING_SX12XX is not set +# CONFIG_PKG_USING_SIGNAL_LED is not set +# CONFIG_PKG_USING_LEDBLINK is not set +# CONFIG_PKG_USING_LITTLED is not set +# CONFIG_PKG_USING_LKDGUI is not set +# CONFIG_PKG_USING_NRF5X_SDK is not set +# CONFIG_PKG_USING_NRFX is not set +# CONFIG_PKG_USING_WM_LIBRARIES is not set +# CONFIG_PKG_USING_KENDRYTE_SDK is not set +# CONFIG_PKG_USING_INFRARED is not set +# CONFIG_PKG_USING_AGILE_BUTTON is not set +# CONFIG_PKG_USING_AGILE_LED is not set +# CONFIG_PKG_USING_AT24CXX is not set +# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set +# CONFIG_PKG_USING_AD7746 is not set +# CONFIG_PKG_USING_PCA9685 is not set +# CONFIG_PKG_USING_I2C_TOOLS is not set +# CONFIG_PKG_USING_NRF24L01 is not set +# CONFIG_PKG_USING_TOUCH_DRIVERS is not set +# CONFIG_PKG_USING_MAX17048 is not set +# CONFIG_PKG_USING_RPLIDAR is not set +# CONFIG_PKG_USING_AS608 is not set +# CONFIG_PKG_USING_RC522 is not set +# CONFIG_PKG_USING_WS2812B is not set +# CONFIG_PKG_USING_EMBARC_BSP is not set +# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set +# CONFIG_PKG_USING_MULTI_RTIMER is not set +# CONFIG_PKG_USING_MAX7219 is not set +# CONFIG_PKG_USING_BEEP is not set +# CONFIG_PKG_USING_EASYBLINK is not set +# CONFIG_PKG_USING_PMS_SERIES is not set +# CONFIG_PKG_USING_CAN_YMODEM is not set +# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set +# CONFIG_PKG_USING_QLED is not set +# CONFIG_PKG_USING_PAJ7620 is not set +# CONFIG_PKG_USING_AGILE_CONSOLE is not set +# CONFIG_PKG_USING_LD3320 is not set +# CONFIG_PKG_USING_WK2124 is not set +# CONFIG_PKG_USING_LY68L6400 is not set +# CONFIG_PKG_USING_DM9051 is not set +# CONFIG_PKG_USING_SSD1306 is not set +# CONFIG_PKG_USING_QKEY is not set +# CONFIG_PKG_USING_RS485 is not set +# CONFIG_PKG_USING_NES is not set +# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set +# CONFIG_PKG_USING_VDEVICE is not set +# CONFIG_PKG_USING_SGM706 is not set +# CONFIG_PKG_USING_STM32WB55_SDK is not set +# CONFIG_PKG_USING_RDA58XX is not set +# CONFIG_PKG_USING_LIBNFC is not set +# CONFIG_PKG_USING_MFOC is not set +# CONFIG_PKG_USING_TMC51XX is not set +# CONFIG_PKG_USING_TCA9534 is not set +# CONFIG_PKG_USING_KOBUKI is not set +# CONFIG_PKG_USING_ROSSERIAL is not set +# CONFIG_PKG_USING_MICRO_ROS is not set +# CONFIG_PKG_USING_MCP23008 is not set +# CONFIG_PKG_USING_BLUETRUM_SDK is not set + +# +# AI packages +# +# CONFIG_PKG_USING_LIBANN is not set +# CONFIG_PKG_USING_NNOM is not set +# CONFIG_PKG_USING_ONNX_BACKEND is not set +# CONFIG_PKG_USING_ONNX_PARSER is not set +# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set +# CONFIG_PKG_USING_ELAPACK is not set +# CONFIG_PKG_USING_ULAPACK is not set +# CONFIG_PKG_USING_QUEST is not set +# CONFIG_PKG_USING_NAXOS is not set + +# +# miscellaneous packages +# + +# +# samples: kernel and components samples +# +# CONFIG_PKG_USING_KERNEL_SAMPLES is not set +# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set +# CONFIG_PKG_USING_NETWORK_SAMPLES is not set +# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set + +# +# entertainment: terminal games and other interesting software packages +# +# CONFIG_PKG_USING_CMATRIX is not set +# CONFIG_PKG_USING_SL is not set +# CONFIG_PKG_USING_CAL is not set +# CONFIG_PKG_USING_ACLOCK is not set +# CONFIG_PKG_USING_THREES is not set +# CONFIG_PKG_USING_2048 is not set +# CONFIG_PKG_USING_SNAKE is not set +# CONFIG_PKG_USING_TETRIS is not set +# CONFIG_PKG_USING_DONUT is not set +# CONFIG_PKG_USING_LIBCSV is not set +# CONFIG_PKG_USING_OPTPARSE is not set +# CONFIG_PKG_USING_FASTLZ is not set +# CONFIG_PKG_USING_MINILZO is not set +# CONFIG_PKG_USING_QUICKLZ is not set +# CONFIG_PKG_USING_LZMA is not set +# CONFIG_PKG_USING_MULTIBUTTON is not set +# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set +# CONFIG_PKG_USING_CANFESTIVAL is not set +# CONFIG_PKG_USING_ZLIB is not set +# CONFIG_PKG_USING_MINIZIP is not set +# CONFIG_PKG_USING_DSTR is not set +# CONFIG_PKG_USING_TINYFRAME is not set +# CONFIG_PKG_USING_KENDRYTE_DEMO is not set +# CONFIG_PKG_USING_DIGITALCTRL is not set +# CONFIG_PKG_USING_UPACKER is not set +# CONFIG_PKG_USING_UPARAM is not set +# CONFIG_PKG_USING_HELLO is not set +# CONFIG_PKG_USING_VI is not set +# CONFIG_PKG_USING_KI is not set +# CONFIG_PKG_USING_ARMv7M_DWT is not set +# CONFIG_PKG_USING_VT100 is not set +# CONFIG_PKG_USING_UKAL is not set +# CONFIG_PKG_USING_CRCLIB is not set +# CONFIG_PKG_USING_LWGPS is not set +# CONFIG_PKG_USING_STATE_MACHINE is not set +# CONFIG_PKG_USING_MCURSES is not set +# CONFIG_PKG_USING_COWSAY is not set +# CONFIG_PKG_USING_TERMBOX is not set +CONFIG_SOC_SWM320VET7=y + +# +# Hardware Drivers Config +# + +# +# On-chip Peripheral Drivers +# +CONFIG_BSP_USING_GPIO=y + +# +# UART Drivers +# +CONFIG_BSP_USING_UART0=y +# CONFIG_BSP_USING_UART1 is not set diff --git a/bsp/yichip/yc3121-pos/.gitignore b/bsp/yichip/yc3121-pos/.gitignore new file mode 100644 index 0000000000..4a42abf20f --- /dev/null +++ b/bsp/yichip/yc3121-pos/.gitignore @@ -0,0 +1,44 @@ +./.vscode/* +./build/* +*.pyc +*.map +*.dblite +*.elf +*.bin +*.hex +*.axf +*.exe +*.pdb +*.idb +*.ilk +*.old +build +Debug +documentation/html +packages/ +*~ +*.o +*.obj +*.out +*.bak +*.dep +*.lib +*.i +*.d +.DS_Stor* +.config 3 +.config 4 +.config 5 +Midea-X1 +*.uimg +GPATH +GRTAGS +GTAGS +.vscode +JLinkLog.txt +JLinkSettings.ini +DebugConfig/ +RTE/ +settings/ +*.uvguix* +cconfig.h diff --git a/bsp/yichip/yc3121-pos/.ignore_format.yml b/bsp/yichip/yc3121-pos/.ignore_format.yml new file mode 100644 index 0000000000..b7cc004bc7 --- /dev/null +++ b/bsp/yichip/yc3121-pos/.ignore_format.yml @@ -0,0 +1,25 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +file_path: +- Libraries/core/board_config.h +- Libraries/core/misc.c +- Libraries/core/misc.h +- Libraries/core/rom_api.h +- Libraries/core/system.c +- Libraries/core/system.h +- Libraries/core/type.h +- Libraries/core/yc3121.h +- Libraries/sdk/yc_dma.c +- Libraries/sdk/yc_dma.h +- Libraries/sdk/yc_gpio.c +- Libraries/sdk/yc_gpio.h +- Libraries/sdk/yc_systick.c +- Libraries/sdk/yc_uart.c +- Libraries/sdk/yc_uart.h + +dir_path: +- Libraries/core +- Libraries/sdk +- Libraries/startup diff --git a/bsp/yichip/yc3121-pos/Kconfig b/bsp/yichip/yc3121-pos/Kconfig new file mode 100644 index 0000000000..59dcef1b29 --- /dev/null +++ b/bsp/yichip/yc3121-pos/Kconfig @@ -0,0 +1,27 @@ +mainmenu "RT-Thread Configuration" + +config BSP_DIR + string + option env="BSP_ROOT" + default "." + +config RTT_DIR + string + option env="RTT_ROOT" + default "../.." + +config PKGS_DIR + string + option env="PKGS_ROOT" + default "packages" + +source "$RTT_DIR/Kconfig" +source "$PKGS_DIR/Kconfig" + +config SOC_SWM320VET7 + bool + select RT_USING_COMPONENTS_INIT + select RT_USING_USER_MAIN + default y + +source "drivers/Kconfig" diff --git a/bsp/yichip/yc3121-pos/Libraries/SConscript b/bsp/yichip/yc3121-pos/Libraries/SConscript new file mode 100644 index 0000000000..4e245383ba --- /dev/null +++ b/bsp/yichip/yc3121-pos/Libraries/SConscript @@ -0,0 +1,17 @@ +from building import * +import rtconfig +cwd = GetCurrentDir() +src = Glob('sdk/*.c') +CPPPATH = [cwd + '/sdk', cwd + '/core', cwd] + +src += Glob('core/*.c') + +if rtconfig.CROSS_TOOL == 'gcc': + src += ['startup/flash_start_gcc.s'] +elif rtconfig.CROSS_TOOL == 'keil': + src += ['startup/startup.s', 'startup/flash_start.s'] +elif rtconfig.CROSS_TOOL == 'iar': + src += ['startup/flash_start_iar.s'] +group = DefineGroup('Libraries', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/bsp/yichip/yc3121-pos/Libraries/core/board_config.h b/bsp/yichip/yc3121-pos/Libraries/core/board_config.h new file mode 100644 index 0000000000..306d8891ba --- /dev/null +++ b/bsp/yichip/yc3121-pos/Libraries/core/board_config.h @@ -0,0 +1,275 @@ +/* +File Name : board_config.h +Author : Yichip +Version : V1.0 +Date : 2020/07/17 +Description : board I/O config file. +*/ + +#ifndef __BOARD_CONFIG_H__ +#define __BOARD_CONFIG_H__ + +#include "yc3121.h" +#include "yc_gpio.h" +#include "yc_exti.h" +#include "yc_spi.h" + +//开发板选择 +#define MPOS_BOARD_V2_1 0 +#define EPOS_BOARD_V1_0 1 +#define BOARD_VER EPOS_BOARD_V1_0 + +//ADC管脚配置 +#define ADC_IO_PORT GPIOC +#define ADC2_IO_PIN GPIO_Pin_7 +#define ADC3_IO_PIN GPIO_Pin_8 + +//外部中断管脚配置 +#define EXTI_PORT EXTI_Line0 +#define EXTI_PIN EXTI_PinSource14 + +#if (BOARD_VER == MPOS_BOARD_V2_1) +//DEBUG串口配置 +#define UARTBAUD 921600 +#define UART0_TX_PORT GPIOA +#define UART0_TX_PIN GPIO_Pin_1 +#define UART0_RX_PORT GPIOA +#define UART0_RX_PIN GPIO_Pin_0 + +//串口1配置 +#define UART1_TX_PORT GPIOA +#define UART1_TX_PIN GPIO_Pin_14 +#define UART1_RX_PORT GPIOA +#define UART1_RX_PIN GPIO_Pin_15 + +//BEEP驱动IO +#define BEEP_PWM 0 +#define BEEP_PORT GPIOA +#define BEEP_PIN GPIO_Pin_11 + +//IC卡在位检测IO +#define DET_PORT GPIOC +#define DET_PIN GPIO_Pin_12 + +//NFC IO +#define NFC_SPI SPI1 +#define NFC_12M_CLK_PORT GPIOA +#define NFC_12M_CLK_PIN GPIO_Pin_3 + +#define NFC_RST_PORT GPIOA +#define NFC_RST_PIN GPIO_Pin_4 + +#define NFC_SPI_MISO_PORT GPIOB +#define NFC_SPI_MISO_PIN GPIO_Pin_2 + +#define NFC_SPI_MOSI_PORT GPIOB +#define NFC_SPI_MOSI_PIN GPIO_Pin_1 + +#define NFC_SPI_SCL_PORT GPIOB +#define NFC_SPI_SCL_PIN GPIO_Pin_0 + +#define NFC_SPI_CS_PORT GPIOB +#define NFC_SPI_CS_PIN GPIO_Pin_6 + +//EEPROM写保护控制IO +#define IIC_WP2_PORT GPIOB +#define IIC_WP2_PIN GPIO_Pin_0 +#define IIC_WP128_PORT GPIOC +#define IIC_WP128_PIN GPIO_Pin_10 + +//IIC驱动IO +#define IIC_SDA_PORT GPIOB +#define IIC_SDA_PIN GPIO_Pin_2 +#define IIC_SCL_PORT GPIOA +#define IIC_SCL_PIN GPIO_Pin_11 + +//KEYBOARD配置 +#define GPIO_GROUP_Line_1 GPIOC +#define Line_1 GPIO_Pin_7 + +#define GPIO_GROUP_Line_2 GPIOC +#define Line_2 GPIO_Pin_9 + +#define GPIO_GROUP_Line_3 GPIOC +#define Line_3 GPIO_Pin_8 + +#define GPIO_GROUP_Line_4 GPIOC +#define Line_4 GPIO_Pin_10 + +#define GPIO_GROUP_Line_5 GPIOC +#define Line_5 GPIO_Pin_11 + +//LCD屏幕驱动配置 +#define LCD_SPI SPI0 +#define LCDSDA_PIN GPIO_Pin_1 +#define LCDSDA_PORT GPIOB +#define LCDSCL_PIN GPIO_Pin_0 +#define LCDSCL_PORT GPIOB +#define LCDCS_PIN GPIO_Pin_6 +#define LCDCS_PORT GPIOC +#define LCDRST_PIN GPIO_Pin_5 +#define LCDRST_PORT GPIOA +#define LCDA0_PIN GPIO_Pin_10 +#define LCDA0_PORT GPIOA +#define LCDBL_PIN GPIO_Pin_2 +#define LCDBL_PORT GPIOA + +#elif (BOARD_VER == EPOS_BOARD_V1_0) +//DEBUG串口配置 +#define UARTBAUD 921600 +#define UART0_TX_PORT GPIOA +#define UART0_TX_PIN GPIO_Pin_1 +#define UART0_RX_PORT GPIOA +#define UART0_RX_PIN GPIO_Pin_0 + +//串口1配置 +#define UART1_TX_PORT GPIOA +#define UART1_TX_PIN GPIO_Pin_14 +#define UART1_RX_PORT GPIOA +#define UART1_RX_PIN GPIO_Pin_15 + +//BEEP驱动IO +#define BEEP_PWM 0 +#define BEEP_PORT GPIOC +#define BEEP_PIN GPIO_Pin_1 + +//IC卡在位检测IO +#define DET_PORT GPIOA +#define DET_PIN GPIO_Pin_4 + +//NFC IO +#define NFC_SPI SPI1 +#define NFC_12M_CLK_PORT GPIOC +#define NFC_12M_CLK_PIN GPIO_Pin_10 + +#define NFC_RST_PORT GPIOC +#define NFC_RST_PIN GPIO_Pin_5 + +#define NFC_TVDD_PORT GPIOC +#define NFC_TVDD_PIN GPIO_Pin_4 + +#define NFC_SPI_MISO_PORT GPIOC +#define NFC_SPI_MISO_PIN GPIO_Pin_6 + +#define NFC_SPI_MOSI_PORT GPIOC +#define NFC_SPI_MOSI_PIN GPIO_Pin_7 + +#define NFC_SPI_SCL_PORT GPIOC +#define NFC_SPI_SCL_PIN GPIO_Pin_8 + +#define NFC_SPI_CS_PORT GPIOC +#define NFC_SPI_CS_PIN GPIO_Pin_9 + +//IIC驱动IO + +//KEYBOARD配置 +#define KEY_PORT_1 GPIOA +#define KEY_PIN_1 GPIO_Pin_9 + +#define KEY_PORT_2 GPIOA +#define KEY_PIN_2 GPIO_Pin_15 + +#define KEY_PORT_3 GPIOA +#define KEY_PIN_3 GPIO_Pin_14 + +#define KEY_PORT_4 GPIOA +#define KEY_PIN_4 GPIO_Pin_8 + +#define KEY_PORT_5 GPIOA +#define KEY_PIN_5 GPIO_Pin_7 + +#define KEY_PORT_6 GPIOA +#define KEY_PIN_6 GPIO_Pin_6 + +//TFT屏幕驱动配置 +#define ST7789VTFTSPI SPI1 +#define ST7789_TFT_SDA_PIN GPIO_Pin_7 +#define ST7789_TFT_SDA_PORT GPIOC + +#define ST7789_TFT_A0_PIN GPIO_Pin_10 +#define ST7789_TFT_A0_PORT GPIOA + +#define ST7789_TFT_SCL_PIN GPIO_Pin_8 +#define ST7789_TFT_SCL_PORT GPIOC + +#define ST7789_TFT_RST_PIN GPIO_Pin_11 +#define ST7789_TFT_RST_PORT GPIOA + +#define ST7789_TFT_CS_PIN GPIO_Pin_5 +#define ST7789_TFT_CS_PORT GPIOA + +#define ST7789_TFT_BL_PIN GPIO_Pin_12 +#define ST7789_TFT_BL_PORT GPIOA +#define ST7789_TFT_BL_HIGH_LIGHT 1 + +/*QRdecode tft */ +//tft camera io +#define QR_CAMERA_FREQ 24 +#define QR_CAMERA_SDA 28 +#define QR_CAMERA_SCL 29 +#define QR_CAMERA_RST 32 +#define QR_CAMERA_PD 31//power down +#define QR_CAMERA_MCLK 35 +#define QR_CAMERA_PCLK 34 +#define QR_CAMERA_DATA 30 +#define QR_CAMERA_CS 42 + +//tft io +#define QR_TFT_RST (11) /*rst pin*/ +#define QR_TFT_CS ( 5) /*cs pin*/ +#define QR_TFT_CLK (40) /*clk pin*/ +#define QR_TFT_MOSI (39) /*mosi pin*/ +#define QR_TFT_A0 (10) /*a0 pin*/ +#define QR_TFT_BL (12 | (1 << 7)) /*bl pin*/ +#define QR_TFT_START_COLUMN ( (320 - 236) / 2 ) /*display center*/ + +//key io +#define QR_KEY_T_MATRIX ( 0) /*key mode :0: T matrix key,1:matrix key*/ +#define QR_KEY_LINE_NUM ( 6) /*Value range 0~10*/ +#define QR_KEY_COL_NUM ( 0) /*Value range (T matrix key: 0)*/ +#define QR_KEY_CANCEL_POSTION ( (5 << 4) | 6 ) /*Exit key*/ +#define QR_KEY_LINE_1 ( 9) /*GPIO pin*/ +#define QR_KEY_LINE_2 (15) /*GPIO pin*/ +#define QR_KEY_LINE_3 (14) /*GPIO pin*/ +#define QR_KEY_LINE_4 ( 8) /*GPIO pin*/ +#define QR_KEY_LINE_5 ( 7) /*GPIO pin*/ +#define QR_KEY_LINE_6 ( 6) /*GPIO pin*/ + +/*QRdecode lcd */ +//lcd io +#define QR_LCD_RST (14) +#define QR_LCD_CS (15) +#define QR_LCD_CLK (10) +#define QR_LCD_MOSI ( 3) +#define QR_LCD_A0 (11) +#define QR_LCD_BL (39 | (1 << 7)) +#define QR_LCD_SPI_BOUDSPEED (0xFF) +#define QR_LCD_BLANK_LINE_NUM ( 0) /*Value range 0~7*/ +#define QR_LCD_COLUMN_NUM (64) /*Value range 0~7*/ +#define QR_LCD_START_COLUMN ((128 - 64)/2) + +//lcd camera io + +#define QR_LCD_CAMERA_FREQ (24) +#define QR_LCD_CAMERA_SDA (17) +#define QR_LCD_CAMERA_SCL (16) +#define QR_LCD_CAMERA_RST (41) +#define QR_LCD_CAMERA_PD ( 5)//power down +#define QR_LCD_CAMERA_MCLK (40) +#define QR_LCD_CAMERA_PCLK (38) +#define QR_LCD_CAMERA_DATA ( 2) +#define QR_LCD_CAMERA_CS (42) + +/*touch*/ +#define TP_Y_HIGH_PORT GPIOA +#define TP_Y_HIGH_IO_PIN GPIO_Pin_4 +#define TP_Y_LOW_PORT GPIOC +#define TP_Y_LOW_IO_PIN GPIO_Pin_12 +#define TP_X_HIGH_PORT GPIOA +#define TP_X_HIGH_IO_PIN GPIO_Pin_13 +#define TP_X_LOW_PORT GPIOC +#define TP_X_LOW_IO_PIN GPIO_Pin_11 + +#endif + +#endif diff --git a/bsp/yichip/yc3121-pos/Libraries/core/misc.c b/bsp/yichip/yc3121-pos/Libraries/core/misc.c new file mode 100644 index 0000000000..24837c1c3b --- /dev/null +++ b/bsp/yichip/yc3121-pos/Libraries/core/misc.c @@ -0,0 +1,102 @@ +/* +File Name : board_config.h +Author : Yichip +Version : V1.0 +Date : 2020/07/17 +Description : misc file. +*/ + +#include "misc.h" + +/* following defines should be used for structure members */ +#define __IM volatile const /*! Defines 'read only' structure member permissions */ +#define __OM volatile /*! Defines 'write only' structure member permissions */ +#define __IOM volatile /*! Defines 'read / write' structure member permissions */ + +/* Memory mapping of Cortex-M0 Hardware */ +#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ +#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ +#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ + +typedef struct +{ + __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ + __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ + uint32_t RESERVED0; + __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ + __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ + __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ + uint32_t RESERVED1; + __IOM uint32_t SHP[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */ + __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ +} SCB_Type; + +/** + \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). + */ +typedef struct +{ + __IOM uint32_t ISER[1U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ + uint32_t RESERVED0[31U]; + __IOM uint32_t ICER[1U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ + uint32_t RSERVED1[31U]; + __IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ + uint32_t RESERVED2[31U]; + __IOM uint32_t ICPR[1U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ + uint32_t RESERVED3[31U]; + uint32_t RESERVED4[64U]; + __IOM uint32_t IP[8U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */ +} NVIC_Type; + +#define SCB ((SCB_Type *)SCB_BASE) /*!< SCB configuration struct */ +#define NVIC ((NVIC_Type *)NVIC_BASE) /*!< NVIC configuration struct */ + +/* The following MACROS handle generation of the register offset and byte masks */ +#define _BIT_SHIFT(IRQn) (((((uint32_t)(int32_t)(IRQn))) & 0x03UL) * 8UL) +#define _SHP_IDX(IRQn) ((((((uint32_t)(int32_t)(IRQn)) & 0x0FUL) - 8UL) >> 2UL)) +#define _IP_IDX(IRQn) ((((uint32_t)(int32_t)(IRQn)) >> 2UL)) + +/* ----------------Configuration of the Cortex-M0 Processor and Core Peripherals---------------- */ +#define __CM0_REV 0x0000 /*!< Cortex-M0 Core Revision */ +#define __MPU_PRESENT 0 /*!< MPU present or not */ +#define __NVIC_PRIO_BITS 2 /*!< Number of Bits used for Priority Levels */ +#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */ +/* End of group Configuration_of_CMSIS */ + +uint32_t NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) < 0) + { + SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } + else + { + NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } + return SUCCESS; +} + +#define SBC_ICSR_PENDSV_IRQ 28 +void trigger_PendSV(void) +{ + SCB->ICSR |= (1 << SBC_ICSR_PENDSV_IRQ); +} + +void NVIC_EnableIRQ(IRQn_Type IRQnx) +{ + enable_intr((int)IRQnx); +} + +void NVIC_DisableIRQ(IRQn_Type IRQnx) +{ + disable_intr((int)IRQnx); +} + +void soft_reset(void) +{ + SYSCTRL_RST_EN |= 0x01; + SYSCTRL_RESET = 0x55; + while (1); +} diff --git a/bsp/yichip/yc3121-pos/Libraries/core/misc.h b/bsp/yichip/yc3121-pos/Libraries/core/misc.h new file mode 100644 index 0000000000..519fc2c94b --- /dev/null +++ b/bsp/yichip/yc3121-pos/Libraries/core/misc.h @@ -0,0 +1,93 @@ +/* +File Name : board_config.h +Author : Yichip +Version : V1.0 +Date : 2020/07/17 +Description : misc file. +*/ + +#ifndef __MISC_H +#define __MISC_H +#include "yc3121.h" + +#ifdef __cplusplus +extern "C" { +#endif + +typedef enum +{ + SVCall_IRQn = -5, //SVC_IRQHandler + PendSV_IRQn = -2, //PENDSV_IRQHandler + SysTick_IRQn = -1, //SYSTICK_IRQHandler + USB_IRQn = 0, + IIC_IRQn = 1, + QSPI_IRQn = 2, + SPI0_IRQn = 3, + SPI1_IRQn = 4, + UART0_IRQn = 5, + UART1_IRQn = 6, + MEMCP_IRQn = 7,//DMA MEM_TO_MEM + RSA_IRQn = 8, + SCI0_IRQn = 9, + SCI1_IRQn = 10, + BT_IRQn = 11, + GPIO_IRQn = 12, + TIM0_IRQn = 13, + TIM1_IRQn = 14, + TIM2_IRQn = 15, + TIM3_IRQn = 16, + TIM4_IRQn = 17, + TIM5_IRQn = 18, + TIM6_IRQn = 19, + TIM7_IRQn = 20, + TIM8_IRQn = 21, + SM4_IRQn = 22, + SEC_IRQn = 23, + MSR_IRQn = 24, + TRNG_IRQn = 25, + WDT_IRQn = 26 +} IRQn_Type; + +/** + * @brief Enable External Interrupt + * @param IRQnx IRQn External interrupt number. Value cannot be negative. + * @retval none + */ +void NVIC_EnableIRQ(IRQn_Type IRQnx); + +/** + * @brief Disable External Interrupt + * @param IRQnx IRQn External interrupt number. Value cannot be negative. + * @retval none + */ +void NVIC_DisableIRQ(IRQn_Type IRQnx); + +/** + * @brief Set Interrupt Priority + * @param IRQn Interrupt number. + * @retval SUCCESS or ERROR + */ +uint32_t NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority); + + +/** + * @brief trigger PendSV Interrupt + * @param none + * @retval none + */ +void trigger_PendSV(void); + +/** + * @brief System Reset + * @param none + * @retval none + */ +void soft_reset(void); + + +#ifdef __cplusplus +} +#endif + +#endif /* __MISC_H */ + diff --git a/bsp/yichip/yc3121-pos/Libraries/core/rom_api.h b/bsp/yichip/yc3121-pos/Libraries/core/rom_api.h new file mode 100644 index 0000000000..bd57d6056d --- /dev/null +++ b/bsp/yichip/yc3121-pos/Libraries/core/rom_api.h @@ -0,0 +1,42 @@ +/* +File Name : rom_api.h +Author : Yichip +Version : V1.0 +Date : 2020/02/11 +Description : rom fun information. +*/ + +#ifndef __ROM_API_H__ +#define __ROM_API_H__ + +/* TIMER */ +#define FUNC_DELAY_US_ADDR (0x4238 + 1) +#define FUNC_DELAY_MS_ADDR (0x425c + 1) + +/* OTP */ +#define FUNC_INIT_OTP_ADDR (0x442c + 1) +#define FUNC_DEINIT_OTP_ADDR (0x4480 + 1) +#define FUNC_READ_OTP_ADDR (0x449c + 1) +#define FUNC_WRITE_OTP_ADDR (0x4594 + 1) +#define FUNC_READ_CHIPID_ADDR (0x45d8 + 1) +#define FUNC_READ_CHIPLF_ADDR (0x45e6 + 1) + +/* LPM */ +#define FUNC_LPM_READ_ADDR (0x4c80 + 1) +#define FUNC_LPM_WRITE_ADDR (0x4c9c + 1) +#define FUNC_LPM_BT_WRITE_ADDR (0x4cb0 + 1) +#define FUNC_LPM_BT_READ_ADDR (0x4d24 + 1) +#define FUNC_LPM_SLEEP_ADDR (0x4d68 + 1) +#define FUNC_SETLPMVAL_ADDR (0x4280 + 1) + +/* QSPI */ +#define FUNC_ENC_WRITE_FLASH_ADDR (0x51f0 + 1) +#define FUNC_QSPI_FLASH_SECTORERASE_ADDR (0x48b4 + 1) +#define FUNC_QSPI_FLASH_BLOCKERASE_ADDR (0x48c0 + 1) +#define FUNC_QSPI_FLASH_WRITE_ADDR (0x47f4 + 1) +#define FUNC_QSPI_FLASH_READ_ADDR (0x48f6 + 1) +#define FUNC_FLASH_BLANK_CHECK (0x513c + 1) +#define FUNC_PREFETCH (0x4404 + 1) +#define FUNC_READ_FLASH_ID (0x4960 + 1) + +#endif diff --git a/bsp/yichip/yc3121-pos/Libraries/core/system.c b/bsp/yichip/yc3121-pos/Libraries/core/system.c new file mode 100644 index 0000000000..99b3f8b928 --- /dev/null +++ b/bsp/yichip/yc3121-pos/Libraries/core/system.c @@ -0,0 +1,254 @@ +/* +File Name : system.c +Author : Yichip +Version : V1.0 +Date : 2019/12/4 +Description : none. +*/ + +#include +#include "system.h" + +//***************************************************************************** +// +//! A simple MyPrintf function supporting \%c, \%d, \%p, \%s, \%u,\%x, and \%X. +//! +//! \param format is the format string. +//! \param ... are the optional arguments, which depend on the contents of the +//! \return None. +// +//***************************************************************************** + +static const int8_t *const g_pcHex1 = "0123456789abcdef"; +static const int8_t *const g_pcHex2 = "0123456789ABCDEF"; + + +void printfsend(UART_TypeDef UARTx, uint8_t *buf, int len) +{ + uint8_t printbuf[256]; + for (int i = 0; i < len; i++) + { + printbuf[i] = buf[i]; + } + + UART_SendBuf(UARTx, printbuf, len); +} + +void MyPrintf(char *format, ...) +{ + uint32_t ulIdx, ulValue, ulPos, ulCount, ulBase, ulNeg; + int8_t *pcStr, pcBuf[16], cFill; + char HexFormat; + va_list vaArgP; + + va_start(vaArgP, format); + + while (*format) + { + // Find the first non-% character, or the end of the string. + for (ulIdx = 0; (format[ulIdx] != '%') && (format[ulIdx] != '\0'); ulIdx++) + { + } + + // Write this portion of the string. + if (ulIdx > 0) + { + printfsend(UART0, (uint8_t *)format, ulIdx); + } + + format += ulIdx; + + if (*format == '%') + { + format++; + + // Set the digit count to zero, and the fill character to space + // (i.e. to the defaults). + ulCount = 0; + cFill = ' '; + + again: + switch (*format++) + { + case '0': + case '1': + case '2': + case '3': + case '4': + case '5': + case '6': + case '7': + case '8': + case '9': + { + if ((format[-1] == '0') && (ulCount == 0)) + { + cFill = '0'; + } + + ulCount *= 10; + ulCount += format[-1] - '0'; + + goto again; + } + + case 'c': + { + ulValue = va_arg(vaArgP, unsigned long); + printfsend(UART0, (uint8_t *)&ulValue, 1); + break; + } + + case 'd': + { + ulValue = va_arg(vaArgP, unsigned long); + ulPos = 0; + + if ((long)ulValue < 0) + { + ulValue = -(long)ulValue; + ulNeg = 1; + } + else + { + ulNeg = 0; + } + + ulBase = 10; + goto convert; + } + + case 's': + { + pcStr = (int8_t *)va_arg(vaArgP, char *); + + for (ulIdx = 0; pcStr[ulIdx] != '\0'; ulIdx++) + { + } + + printfsend(UART0, (uint8_t *)pcStr, ulIdx); + + if (ulCount > ulIdx) + { + ulCount -= ulIdx; + while (ulCount--) + { + printfsend(UART0, (uint8_t *)" ", 1); + } + } + break; + } + + case 'u': + { + ulValue = va_arg(vaArgP, unsigned long); + ulPos = 0; + ulBase = 10; + ulNeg = 0; + goto convert; + } + + case 'X': + { + ulValue = va_arg(vaArgP, unsigned long); + ulPos = 0; + ulBase = 16; + ulNeg = 0; + HexFormat = 'X'; + goto convert; + } + + case 'x': + + case 'p': + { + ulValue = va_arg(vaArgP, unsigned long); + ulPos = 0; + ulBase = 16; + ulNeg = 0; + HexFormat = 'x'; + + convert: + for (ulIdx = 1; + (((ulIdx * ulBase) <= ulValue) && + (((ulIdx * ulBase) / ulBase) == ulIdx)); + ulIdx *= ulBase, ulCount--) + { + } + + if (ulNeg) + { + ulCount--; + } + + if (ulNeg && (cFill == '0')) + { + pcBuf[ulPos++] = '-'; + ulNeg = 0; + } + + if ((ulCount > 1) && (ulCount < 16)) + { + for (ulCount--; ulCount; ulCount--) + { + pcBuf[ulPos++] = cFill; + } + } + + if (ulNeg) + { + pcBuf[ulPos++] = '-'; + } + + for (; ulIdx; ulIdx /= ulBase) + { + if (HexFormat == 'x') + pcBuf[ulPos++] = g_pcHex1[(ulValue / ulIdx) % ulBase]; //x + else + pcBuf[ulPos++] = g_pcHex2[(ulValue / ulIdx) % ulBase]; //X + } + + printfsend(UART0, (uint8_t *)pcBuf, ulPos); + break; + } + + case '%': + { + printfsend(UART0, (uint8_t *)format - 1, 1); + break; + } + + default: + { + printfsend(UART0, (uint8_t *)"ERROR", 5); + break; + } + } //switch + } //if + } //while + va_end(vaArgP); +} + +void printv(uint8_t *buf, uint32_t len, uint8_t *s) +{ + uint32_t i = 0; + uint32_t n = 0; + MyPrintf("\r\n %s:", s); + for (i = 0; i < len; i++) + { + if (i % 16 == 0) + { + MyPrintf("\r\n%08x:", n); + n += 16; + } + MyPrintf("%02x ", buf[i]); + } +} + +void _assert_handler(const char *file, int line, const char *func) +{ +#if defined(SDK_DEBUG) + MyPrintf("Assert trigger at file: %s line:%d func: %s\n ", file, line, func); +#endif + while (1); +} diff --git a/bsp/yichip/yc3121-pos/Libraries/core/system.h b/bsp/yichip/yc3121-pos/Libraries/core/system.h new file mode 100644 index 0000000000..b7bd069a98 --- /dev/null +++ b/bsp/yichip/yc3121-pos/Libraries/core/system.h @@ -0,0 +1,43 @@ +/* +File Name : system.h +Author : Yichip +Version : V1.0 +Date : 2018/05/22 +Description : none. +*/ + +#ifndef __SYSTEM_H__ +#define __SYSTEM_H__ + + +#include +#include "yc_uart.h" + +//#define SDK_DEBUG //Debug switch + +#define BIT_SET(a,b) ((a) |= (1<<(b))) +#define BIT_CLEAR(a,b) ((a) &= ~(1<<(b))) +#define BIT_FLIP(a,b) ((a) ^= (1<<(b))) //bit Negation +#define BIT_GET(a,b) (((a) & (1<<(b)))>>(b)) + +/** + * @brief Print format string to serial port 0.You need to initialize the serial port 0 before you use MyPrintf. + * + * @param format : format string + * @param ...: format parameter + */ +void MyPrintf(char *format, ...); + +void _assert_handler(const char *file, int line, const char *func); + +void printv(uint8_t *buf, uint32_t len, uint8_t *s); + +#define _ASSERT(x) \ +if (!(x)) \ +{ \ + _assert_handler(__FILE__,__LINE__,__FUNCTION__);\ +} + + +#endif /*__SYSTEM_H__*/ + diff --git a/bsp/yichip/yc3121-pos/Libraries/core/type.h b/bsp/yichip/yc3121-pos/Libraries/core/type.h new file mode 100644 index 0000000000..112f0374e6 --- /dev/null +++ b/bsp/yichip/yc3121-pos/Libraries/core/type.h @@ -0,0 +1,67 @@ +/* +File Name : type.h +Author : Yichip +Version : V1.0 +Date : 2018/05/25 +Description : Data type definition. +*/ + +#ifndef __TYPE_H__ +#define __TYPE_H__ + +#if defined (__CC_ARM) || defined ( __ICCARM__ ) +typedef unsigned char uint8_t; +typedef unsigned short uint16_t; +typedef unsigned int uint32_t; +typedef unsigned long long uint64_t; +typedef unsigned char byte; +typedef unsigned short word; + +typedef signed char int8_t; +typedef signed short int16_t; +typedef signed int int32_t; +typedef signed long long int64_t; +#else +#include "stdio.h" +typedef unsigned char byte; +typedef unsigned short word; +#endif + +/** + * @brief __NOINLINE definition + */ +#if defined ( __CC_ARM ) || defined ( __GNUC__ ) +/* ARM & GNUCompiler + ---------------- +*/ +#define __NOINLINE noinline + +#elif defined ( __ICCARM__ ) +/* ICCARM Compiler + --------------- +*/ +#define __NOINLINE _Pragma("optimize = no_inline") + +#endif + +#ifndef Boolean +typedef enum {FALSE = 0, TRUE =1} Boolean; +#define IS_BOOLEAN(bool) ((bool == FALSE) || (bool == TRUE)) +#endif + +#ifndef FunctionalState +typedef enum {DISABLE = 0, ENABLE =1} FunctionalState; +#define IS_FUNCTIONAL_STATE(state) ((state== DISABLE) || (state == ENABLE)) +#endif + +#ifndef FunctionalState +typedef enum {ERROR = 0, SUCCESS = 1} ErrorStatus; +#define IS_ERROR_STATE(status) ((status== ERROR) || (status == SUCCESS)) +#endif + +#ifndef FlagStatus +typedef enum {RESET = 0, SET = !RESET} FlagStatus, ITStatus; +#endif + +#endif /*__TYPE_H__*/ + diff --git a/bsp/yichip/yc3121-pos/Libraries/core/yc3121.h b/bsp/yichip/yc3121-pos/Libraries/core/yc3121.h new file mode 100644 index 0000000000..0e06007591 --- /dev/null +++ b/bsp/yichip/yc3121-pos/Libraries/core/yc3121.h @@ -0,0 +1,666 @@ +/* +File Name : yc3121.h +Author : Yichip +Version : V1.0 +Date : 2018/03/27 +Description : Register and hardware information. +*/ + +#ifndef __YC3121_H__ +#define __YC3121_H__ + +#include "type.h" +#include "system.h" +#include +#include "rom_api.h" + +#define NO_BT 0 +#define EXIST_BT 1 +#define NO_XTAL 2 + +#define VERSIONS EXIST_BT + +#define M0_FPGA 1 +#define POS_FPGA 2 +#define POS_CHIP 3 + +#define HARDWAER POS_CHIP + +#if (HARDWAER == M0_FPGA) + #define CPU_MHZ (24*1000000) +#elif (HARDWAER == POS_CHIP) + #define CRYSTAL_CLK (192*1000000) + #define CPU_MHZ ((CRYSTAL_CLK)/((SYSCTRL_HCLK_CON&0x0f)+2)) +#endif + +#define noinline __attribute__((noinline)) + +#define IPC_HOLD_BT *(volatile byte*)0xC4FEF +#define IPC_RX_START_ADDR (volatile byte*)0xc4ff0 +#define IPC_RX_END_ADDR (volatile byte*)0xc4ff2 +#define IPC_RX_READ_PTR (volatile byte*)0xc4ff4 +#define IPC_RX_WRITE_PTR (volatile byte*)0xc4ff6 +#define IPC_TX_START_ADDR (volatile byte*)0xc4ff8 +#define IPC_TX_END_ADDR (volatile byte*)0xc4ffa +#define IPC_TX_READ_PTR (volatile byte*)0xc4ffc +#define IPC_TX_WRITE_PTR (volatile byte*)0xc4ffe + +#define BT_REV *(volatile byte*)0xc8000 +#define BT_STEP *(volatile byte*)0xc8001 +#define BT_PC *(volatile word*)0xc800e +#define BT_RESET *(volatile byte*)0xc8010 +#define BT_UCODE_HI *(volatile byte*)0xc8022 +#define BT_UCODE_CTRL *(volatile byte*)0xc8023 +#define BT_UCODE_LO *(volatile byte*)0xc8024 +#define BT_UCODE_DATA *(volatile byte*)0xc8025 +#define BT_RHALFSLOT_LOW *(volatile byte*)0xc8040 +#define BT_CONTRU *(volatile byte*)0xc812c +#define BT_CONTWU *(volatile byte*)0xc812e +#define BT_CONFIG *(volatile byte*)0xc8043 +#define BT_CLKPLL_EN *(volatile byte*)0xc8905 +#define BT_CHGPUMP_EN *(volatile byte*)0xc8973 +#define WAKEUP_BT *(volatile byte*)0xF853C + +#define BT_INIT_FLAG 7 +#define WAKEUP_BT_FLAG 2 + +//register base address + +#define WDT_BASEADDR 0xf0000 +#define SCI7816_BASEADDR 0xf0400 + +#define TIMER_BASEADDR 0xf0c00 +#define SM4_BASEADDR 0xf5200 +#define RSA_BASEADDR 0xf5800 +#define USB_BASEADDR 0xf6000 +#define DES_BASEADDR 0xf8000 +#define CRC_BASEADDR 0xf8200 +#define AES_BASEADDR 0xf8300 +#define LPM_BASEADDR 0xf8400 +#define SYSCTRL_BASEADDR 0xf8500 +#define SECURE_BASEADDR 0xf8540 +#define CLKGEN_BASEADDR 0xf8560 +#define MPU_BASEADDR 0xf8580 +#define SHA_BASEADDR 0xf8600 +#define GPIO_BASEADDR 0xf8700 +#define DMA_BASEADDR 0xf8800 +#define QSPI_BASEADDR DMA_BASEADDR +#define ISO7811_BASEADDR 0xf8f00 + +#define WD_CONFIG *(volatile int*)(WDT_BASEADDR + 0x00) +#define WD_STATUS *(volatile int*)(WDT_BASEADDR + 0x04) +#define WD_KICK *(volatile int*)(WDT_BASEADDR + 0x08) +#define WD_CLEAR *(volatile int*)(WDT_BASEADDR + 0x0c) + +#define SCI7816_MODE *(volatile int*)(SCI7816_BASEADDR + 0x00) +#define SCI7816_CTRL *(volatile int*)(SCI7816_BASEADDR + 0x08) +#define SCI7816_STAT *(volatile int*)(SCI7816_BASEADDR + 0x0c) +#define SCI7816_INT *(volatile int*)(SCI7816_BASEADDR + 0x10) +#define SCI7816_DATA *(volatile int*)(SCI7816_BASEADDR + 0x20) +#define SCI7816_ETU *(volatile int*)(SCI7816_BASEADDR + 0x28) +#define SCI7816_BGT *(volatile int*)(SCI7816_BASEADDR + 0x2c) +#define SCI7816_CWT *(volatile int*)(SCI7816_BASEADDR + 0x30) +#define SCI7816_EDC *(volatile int*)(SCI7816_BASEADDR + 0x34) + +#define PWM_TOTAL 9 + +#define TIM_PCNT(x) *(volatile int*)(TIMER_BASEADDR + x*8) +#define TIM_NCNT(x) *(volatile int*)(TIMER_BASEADDR + 4 + x*8) +#define TIM_CTRL *(volatile int*)(TIMER_BASEADDR + PWM_TOTAL*8) +#define TIM_CTRL1 *(volatile int*)(TIMER_BASEADDR + PWM_TOTAL*8 + 4) +#define TIM_CNT(x) *(volatile int*)(TIMER_BASEADDR + PWM_TOTAL*8 + (PWM_TOTAL*4 + 31)/32*4 + x*4) + +#define SHA_DATA(x) *(volatile int*)(SHA_BASEADDR + 0x00 + x*4) +#define SHA_BDATA(x) *(volatile uint8_t*)(SHA_BASEADDR + 0x00 + x) +#define SHA_RESULT(x) *(volatile int*)(SHA_BASEADDR + 0x80 + x*4) +#define SHA_CTRL *(volatile int*)(SHA_BASEADDR + 0xc0) + +#define SYSCTRL_PRIV_CTRL *(volatile int*)(SYSCTRL_BASEADDR + 0x0) +#define SYSCTRL_STATUS *(volatile int*)(SYSCTRL_BASEADDR + 0x4) +#define OTP_ADDR *(volatile short*)(SYSCTRL_BASEADDR + 0x8) +#define OTP_CTRL *(volatile short*)(SYSCTRL_BASEADDR + 0xa) +#define OTP_RDATA *(volatile byte*)(SYSCTRL_BASEADDR + 0xc) +#define OTP_STATUS *(volatile int*)(SYSCTRL_BASEADDR + 0xc) + +#define SYSCTRL_LPM_RDATA *(volatile int*)(SYSCTRL_BASEADDR + 0x10) +#define SYSCTRL_LPM_SCB *(volatile int*)(SYSCTRL_BASEADDR + 0x14) +#define SYSCTRL_HWCTRL(x) *(volatile uint8_t*)(SYSCTRL_BASEADDR + 0x18 + x) +#define SYSCTRL_RNG_CTRL *(volatile int*)(SYSCTRL_BASEADDR + 0x28) +#define SYSCTRL_RNG_DATAB(x) *(volatile uint8_t*)(SYSCTRL_BASEADDR + 0x2c+x) + +#define SYSCTRL_RNG_DATA(x) *(volatile int*)(SYSCTRL_BASEADDR + 0x2c+x*4) + +#define SYSCTRL_ROM_SWITCH *(volatile uint8_t*)(SYSCTRL_BASEADDR + 0x3c) +#define SYSCTRL_LPM_STATUS *(volatile byte *)(SYSCTRL_BASEADDR + 0x3d) +#define SYSCTRL_OTPN_ADDR *(volatile uint8_t*)(SYSCTRL_BASEADDR + 0x3e) +#define SYSCTRL_OTPU_ADDR *(volatile uint8_t*)(SYSCTRL_BASEADDR + 0x3f) + +#define SECURE_CTRL *(volatile int*)(SECURE_BASEADDR + 0x0) +#define SECURE_STATUS *(volatile int*)(SECURE_BASEADDR + 0x4) +#define SECURE_MEDCON *(volatile int*)(SECURE_BASEADDR + 0x8) +#define SECURE_RAMKEY *(volatile int*)(SECURE_BASEADDR + 0xc) + +#define SYSCTRL_HCLK_CON *(volatile int*)(CLKGEN_BASEADDR + 0x00) +#define SYSCTRL_RSACLK *(volatile int*)(CLKGEN_BASEADDR + 0x08) +#define SYSCTRL_CLK_CLS *(volatile int*)(CLKGEN_BASEADDR + 0x0c) +#define SYSCTRL_RST_EN *(volatile int*)(CLKGEN_BASEADDR + 0x14) +#define SYSCTRL_RST_TYPE *(volatile int*)(CLKGEN_BASEADDR + 0x18) +#define SYSCTRL_RESET *(volatile int*)(CLKGEN_BASEADDR + 0x1c) + +#define MPUCTRL_ID *(volatile int*)(MPU_BASEADDR + 0x00) +#define MPUCTRL_CTRL *(volatile int*)(MPU_BASEADDR + 0x04) +#define MPUCTRL_FSR *(volatile int*)(MPU_BASEADDR + 0x0c) +#define MPUCTRL_FAR *(volatile int*)(MPU_BASEADDR + 0x10) + +#define MPUCTRL_PROTECTION *(volatile int*)(MPU_BASEADDR + 0x14) +#define MPUCTRL_USER_START *(volatile int*)(MPU_BASEADDR + 0x18) +#define MPUCTRL_REGION_BASE(x) *(volatile int*)(MPU_BASEADDR + 0x40 + x*4) +#define MPUCTRL_REGION_LIMIT(x) *(volatile int*)(MPU_BASEADDR + 0x60 + x*4) + +#define LPM_CTRL (volatile int*)(LPM_BASEADDR + 0x00) +#define LPM_SENSOR (volatile int*)(LPM_BASEADDR + 0x04) +#define LPM_WKUP_TIMER (volatile int*)(LPM_BASEADDR + 0x08) +#define LPM_SECMAX (volatile int*)(LPM_BASEADDR+0x0c) +#define LPM_GPIO_WKUP (volatile int*)(LPM_BASEADDR + 0x10) +#define LPM_GPIO_WKHI (volatile int*)(LPM_BASEADDR + 0x14) +#define LPM_SLEEP (volatile int*)(LPM_BASEADDR + 0x20) +#define LPM_CLR_INTR (volatile int*)(LPM_BASEADDR + 0x24) +#define LPM_STATUS (volatile int*)(LPM_BASEADDR + 0x78) +#define LPM_RTC_CNT (volatile int*)(LPM_BASEADDR + 0x7c) +#define LPM_KEY(x) (volatile int*)(LPM_BASEADDR + 0x80 + x*4) + +#define GPIO_GROUP_NUM 3 +#define GPIO_PIN_NUM 16 + +#define GPIO_CONFIG(x) *((volatile uint8_t*)(GPIO_BASEADDR + x)) +#define GPIO_INTR_EN(groupx) *((volatile uint16_t*)(GPIO_BASEADDR+GPIO_GROUP_NUM*GPIO_PIN_NUM) + groupx) +#define GPIO_TRIG_MODE(groupx) *((volatile uint16_t*)(GPIO_BASEADDR+(GPIO_GROUP_NUM*GPIO_PIN_NUM) +GPIO_GROUP_NUM*2) +groupx) +#define GPIO_IN(groupx) *((volatile uint16_t*)(GPIO_BASEADDR+(GPIO_GROUP_NUM*GPIO_PIN_NUM) +GPIO_GROUP_NUM*4)+groupx) + +#define DMA_SRC_ADDR(x) *(volatile int*)(DMA_BASEADDR + 0x00 + x*0x100) +#define DMA_DEST_ADDR(x) *(volatile int*)(DMA_BASEADDR + 0x04 + x*0x100) +#define DMA_LEN(x) *(volatile int*)(DMA_BASEADDR + 0x08 + x*0x100) +#define DMA_CONFIG(x) *(volatile uint8_t*)(DMA_BASEADDR + 0x0c + x*0x100) +#define DMA_START(x) *(volatile uint8_t*)(DMA_BASEADDR + 0x0f + x*0x100) +#define DMA_STATUS(x) *(volatile int*)(DMA_BASEADDR + 0x10 + x*0x100) +#define DMA_RPTR(x) *(volatile int*)(DMA_BASEADDR + 0x14 + x*0x100) +#define DMA_WPTR(x) *(volatile int*)(DMA_BASEADDR + 0x18 + x*0x100) + +#define QSPI_CTRL *(volatile int*)(QSPI_BASEADDR + 0x1c) +#define QAES_ADDRKEY *(volatile int*)(QSPI_BASEADDR + 0x20) +#define QAES_CTRL *(volatile int*)(QSPI_BASEADDR + 0x24) +#define QAES_RAND(x) *(volatile int*)(QSPI_BASEADDR + 0x28 + x*4) +#define QAES_KEY(x) *(volatile int*)(QSPI_BASEADDR + 0x30 + x*4) +#define QAES_DATA(x) *(volatile int*)(QSPI_BASEADDR + 0x40 + x*4) +#define QAES_KEYB(x) *(volatile byte*)(QSPI_BASEADDR + 0x30 + x) +#define SPID0_CTRL *(volatile int*)0xf891c +#define SPID1_CTRL *(volatile int*)0xf8a1c +#define UART0_CTRL *(volatile int*)0xf8b1c +#define UART0_INTR *(volatile int*)0xf8b20 +#define UART0_RDATA *(volatile byte*)0xf8b24 +#define UART0_STATUS *(volatile int*)0xf8b28 +#define UART1_CTRL *(volatile int*)0xf8c1c +#define UART1_INTR *(volatile int*)0xf8c20 +#define UART1_RDATA *(volatile byte*)0xf8c24 +#define UART1_STATUS *(volatile int*)0xf8c28 +#define IICD_DELAY *(volatile int*)0xf8d1c +#define IICD_CTRL *(volatile int*)0xf8d20 + +#define USB_CONFIG *(volatile byte*)USB_BASEADDR +#define USB_INT_MASK(x) *(volatile byte*)(USB_BASEADDR + 1 + x) +#define USB_ADDR *(volatile byte*)(USB_BASEADDR + 4) +#define USB_TRG *(volatile byte*)(USB_BASEADDR + 0x10) +#define USB_STALL *(volatile byte*)(USB_BASEADDR + 0x11) +#define USB_CLEAR *(volatile byte*)(USB_BASEADDR + 0x12) +#define USB_EP(x) *(volatile byte*)(USB_BASEADDR + 0x18 + x) +#define USB_EP_LEN(x) *(volatile byte*)(USB_BASEADDR + 0x20 + x) +#define USB_STATUS *(volatile byte*)(USB_BASEADDR + 0x26) +#define USB_FIFO_EMPTY *(volatile byte*)(USB_BASEADDR + 0x27) +#define USB_FIFO_FULL *(volatile byte*)(USB_BASEADDR + 0x28) + + +#define AES_CNTRL_REG *((volatile uint32_t *)(AES_BASEADDR)) +#define AES_DATA_REG0 ((volatile uint32_t *)(AES_BASEADDR+0x10)) +#define AES_DATA_REG1 ((volatile uint32_t *)(AES_BASEADDR+0x14)) +#define AES_DATA_REG2 ((volatile uint32_t *)(AES_BASEADDR+0x18)) +#define AES_DATA_REG3 ((volatile uint32_t *)(AES_BASEADDR+0x1C)) +#define AES_KEY_REG0 ((volatile uint32_t *)(AES_BASEADDR+0x20)) +#define AES_KEY_REG1 ((volatile uint32_t *)(AES_BASEADDR+0x24)) +#define AES_KEY_REG2 ((volatile uint32_t *)(AES_BASEADDR+0x28)) +#define AES_KEY_REG3 ((volatile uint32_t *)(AES_BASEADDR+0x2C)) +#define AES_KEY_REG4 ((volatile uint32_t *)(AES_BASEADDR+0x30)) +#define AES_KEY_REG5 ((volatile uint32_t *)(AES_BASEADDR+0x34)) +#define AES_KEY_REG6 ((volatile uint32_t *)(AES_BASEADDR+0x38)) +#define AES_KEY_REG7 ((volatile uint32_t *)(AES_BASEADDR+0x3C)) +#define AES_RAND_REG0 ((volatile uint32_t *)(AES_BASEADDR+0x40)) +#define AES_RAND_REG1 ((volatile uint32_t *)(AES_BASEADDR+0x44)) +#define AES_FKEY_REG0 ((volatile uint32_t *)(AES_BASEADDR+0x50)) + +#define AES_DATAB(x) *(volatile byte*)(AES_BASEADDR + 0x10 + (x)) +#define AES_KEYB(x) *(volatile byte*)(AES_BASEADDR + 0x20 + (x)) + +#define DESCNTRL_REG *((volatile uint32_t *)(DES_BASEADDR+0x00)) +#define DESRAND_REG ((volatile uint32_t *)(DES_BASEADDR+0x0c)) +#define DESFAKE_KEY ((volatile uint32_t *)(DES_BASEADDR+0x10)) +#define DESIV_REG ((volatile uint32_t *)(DES_BASEADDR+0x18)) +#define DESDATA_REG ((volatile uint32_t *)(DES_BASEADDR+0x20)) +#define DESKEY1_REG ((volatile uint32_t *)(DES_BASEADDR+0x28)) +#define DESKEY2_REG ((volatile uint32_t *)(DES_BASEADDR+0x30)) +#define DESKEY3_REG ((volatile uint32_t *)(DES_BASEADDR+0x38)) +#define DES_KEYB(x) *(volatile byte *)(DES_BASEADDR+0x28 + x) +#define DES_DATAB(x) *(volatile byte *)(DES_BASEADDR+0x20 + x) + +#define SM4_REG0 (*(volatile uint32_t *)(SM4_BASEADDR + 0x0)) +#define SM4_REG1 (*(volatile uint32_t *)(SM4_BASEADDR + 0x4)) +#define SM4_IER (*(volatile uint32_t *)(SM4_BASEADDR + 0x8)) +#define SM4_MR (*(volatile uint32_t *)(SM4_BASEADDR + 0xc)) +#define SM4_KEY0 ((volatile uint32_t *)(SM4_BASEADDR + 0x10)) +#define SM4_KEY1 ((volatile uint32_t *)(SM4_BASEADDR + 0x14)) +#define SM4_KEY2 ((volatile uint32_t *)(SM4_BASEADDR + 0x18)) +#define SM4_KEY3 ((volatile uint32_t *)(SM4_BASEADDR + 0x1c)) +#define SM4_IV0 ((volatile uint32_t *)(SM4_BASEADDR + 0x20)) +#define SM4_IV1 ((volatile uint32_t *)(SM4_BASEADDR + 0x24)) +#define SM4_IV2 ((volatile uint32_t *)(SM4_BASEADDR + 0x28)) +#define SM4_IV3 ((volatile uint32_t *)(SM4_BASEADDR + 0x2c)) +#define SM4_DATA0 ((volatile uint32_t *)(SM4_BASEADDR + 0x30)) +#define SM4_DATA1 ((volatile uint32_t *)(SM4_BASEADDR + 0x34)) +#define SM4_DATA2 ((volatile uint32_t *)(SM4_BASEADDR + 0x38)) +#define SM4_DATA3 ((volatile uint32_t *)(SM4_BASEADDR + 0x3c)) + + +#define RECR (*((volatile uint32_t *)(RSA_BASEADDR+0x00))) +#define RESR (*((volatile uint32_t *)(RSA_BASEADDR+0x04))) +#define REFR (*((volatile uint32_t *)(RSA_BASEADDR+0x08))) +#define RESCR (*((volatile uint32_t *)(RSA_BASEADDR+0x0c))) +#define REDQR (*((volatile uint32_t *)(RSA_BASEADDR+0x10))) +#define REINT (*((volatile uint32_t *)(RSA_BASEADDR+0x14))) +#define RECFR (*((volatile uint32_t *)(RSA_BASEADDR+0x18))) +#define REBKR ((volatile uint32_t *)(RSA_BASEADDR+0x1c)) +#define REDRR (*((volatile uint32_t *)(RSA_BASEADDR+0x24))) +#define REDAR ((volatile uint32_t *)(RSA_BASEADDR+0x100)) +#define REDAR1 ((volatile uint32_t *)(RSA_BASEADDR+0x120)) +#define REDAR2 ((volatile uint32_t *)(RSA_BASEADDR+0x140)) +#define REDAR3 ((volatile uint32_t *)(RSA_BASEADDR+0x160)) +#define REDXR ((volatile uint32_t *)(RSA_BASEADDR+0x200)) +#define REDXR1 ((volatile uint32_t *)(RSA_BASEADDR+0x220)) +#define REDXR2 ((volatile uint32_t *)(RSA_BASEADDR+0x240)) +#define REDXR3 ((volatile uint32_t *)(RSA_BASEADDR+0x260)) +#define REDYR ((volatile uint32_t *)(RSA_BASEADDR+0x280)) +#define REDYR1 ((volatile uint32_t *)(RSA_BASEADDR+0x2a0)) +#define REDYR2 ((volatile uint32_t *)(RSA_BASEADDR+0x2c0)) +#define REDYR3 ((volatile uint32_t *)(RSA_BASEADDR+0x2e0)) +#define REDBR ((volatile uint32_t *)(RSA_BASEADDR+0x300)) +#define REDBR1 ((volatile uint32_t *)(RSA_BASEADDR+0x320)) +#define REDBR2 ((volatile uint32_t *)(RSA_BASEADDR+0x340)) +#define REDBR3 ((volatile uint32_t *)(RSA_BASEADDR+0x360)) +#define REDBRH ((volatile uint32_t *)(RSA_BASEADDR+0x380)) +#define REDCR ((volatile uint32_t *)(RSA_BASEADDR+0x500)) +#define REDCR1 ((volatile uint32_t *)(RSA_BASEADDR+0x520)) +#define REDCR2 ((volatile uint32_t *)(RSA_BASEADDR+0x540)) +#define REDCR3 ((volatile uint32_t *)(RSA_BASEADDR+0x560)) +#define REDCRH ((volatile uint32_t *)(RSA_BASEADDR+0x580)) +#define REDUR ((volatile uint32_t *)(RSA_BASEADDR+0x600)) +#define REDVR ((volatile uint32_t *)(RSA_BASEADDR+0x680)) +#define REDVR2 ((volatile uint32_t *)(RSA_BASEADDR+0x6c0)) +#define REDPR ((volatile uint32_t *)(RSA_BASEADDR+0x700)) +#define REDPR1 ((volatile uint32_t *)(RSA_BASEADDR+0x720)) +#define REDPR2 ((volatile uint32_t *)(RSA_BASEADDR+0x740)) +#define REDPR3 ((volatile uint32_t *)(RSA_BASEADDR+0x760)) +#define REDPRH ((volatile uint32_t *)(RSA_BASEADDR+0x780)) + +#define ISO7811_BASE_ADDR_T1 *((volatile uint32_t *)(ISO7811_BASEADDR+0x00)) +#define ISO7811_BASE_ADDR_T2 *((volatile uint32_t *)(ISO7811_BASEADDR+0x04)) +#define ISO7811_BASE_ADDR_T3 *((volatile uint32_t *)(ISO7811_BASEADDR+0x08)) +#define ISO7811_CTRL *((volatile uint32_t *)(ISO7811_BASEADDR+0x0C)) + +#define ISO7811_T1_PEAK_VALUE_CFG *((volatile uint32_t *)(ISO7811_BASEADDR+0x10)) +#define ISO7811_T1_PEAK_WIDTH_CFG *((volatile uint32_t *)(ISO7811_BASEADDR+0x14)) +#define ISO7811_T1_PULSE_WIDTH_CFG *((volatile uint32_t *)(ISO7811_BASEADDR+0x18)) +#define ISO7811_T1_AGC_CFG *((volatile uint32_t *)(ISO7811_BASEADDR+0x1c)) + +#define ISO7811_T2_PEAK_VALUE_CFG *((volatile uint32_t *)(ISO7811_BASEADDR+0x20)) +#define ISO7811_T2_PEAK_WIDTH_CFG *((volatile uint32_t *)(ISO7811_BASEADDR+0x24)) +#define ISO7811_T2_PULSE_WIDTH_CFG *((volatile uint32_t *)(ISO7811_BASEADDR+0x28)) +#define ISO7811_T2_AGC_CFG *((volatile uint32_t *)(ISO7811_BASEADDR+0x2c)) + +#define ISO7811_T3_PEAK_VALUE_CFG *((volatile uint32_t *)(ISO7811_BASEADDR+0x30)) +#define ISO7811_T3_PEAK_WIDTH_CFG *((volatile uint32_t *)(ISO7811_BASEADDR+0x34)) +#define ISO7811_T3_PULSE_WIDTH_CFG *((volatile uint32_t *)(ISO7811_BASEADDR+0x38)) +#define ISO7811_T3_AGC_CFG *((volatile uint32_t *)(ISO7811_BASEADDR+0x3c)) + +#define ISO7811_STATUS *((volatile uint32_t *)(ISO7811_BASEADDR+0x40)) +#define ISO7811_CHAR_NUM *((volatile uint32_t *)(ISO7811_BASEADDR+0x44)) +#define ISO7811_INTERFER_CHAR_NUM *((volatile uint32_t *)(ISO7811_BASEADDR+0x48)) +#define ISO7811_DC_EST *((volatile uint32_t *)(ISO7811_BASEADDR+0x4c)) +#define ISO7811_INTF_PEAK *((volatile uint32_t *)(ISO7811_BASEADDR+0x50)) +#define ISO7811_AGC_PEAK_VAL *((volatile uint32_t *)(ISO7811_BASEADDR +0x54)) + +#define SYST_CSR *(volatile int*)0xE000E010 +#define SYST_RVR *(volatile int*)0xE000E014 +#define SYST_CVR *(volatile int*)0xE000E018 + +#define TRACE_FIFO *(volatile int*)0xe0002020 +#define NVIC_ISER *(volatile int*)0xe000e100 +#define NVIC_ICER *(volatile int*)0xe000e180 +#define NVIC_ISPR *(volatile int*)0xe000e200 +#define NVIC_ICPR *(volatile int*)0xe000e280 + +#define CRC_RESULT_REG *(volatile uint32_t *)(CRC_BASEADDR+0X04) +#define CRC_MASK_REG *(volatile uint32_t *)(CRC_BASEADDR+0X08) +#define CRC_DATAB_REG *(volatile byte *)(CRC_BASEADDR+0X80) +#define CRC_DATAS_REG *(volatile short int *)(CRC_BASEADDR+0X80) +#define CRC_DATA_REG *(volatile int *)(CRC_BASEADDR+0X80) + +#define ADC_CTRL0 *(volatile uint8_t*)0xC8970 +#define ADC_CTRL1 *(volatile uint8_t*)0xC8971 +#define ADC_CTRL2 *(volatile uint8_t*)0xC8972 +#define ADC_CTRL3 *(volatile uint8_t*)0xC8973 +#define ADC_ENBLE *(volatile uint8_t*)0xC8906 +#define ADC_RDATA *(volatile uint16_t*)0xf850e + +/* SysTick registers */ +/* SysTick control & status */ +#define SYSTICK_CSR ((volatile unsigned int *)0xE000E010) +/* SysTick Reload value */ +#define SYSTICK_RVR ((volatile unsigned int *)0xE000E014) +/* SysTick Current value */ +#define SYSTICK_CVR ((volatile unsigned int *)0xE000E018) +/* SysTick CSR register bits */ +#define SYSTICK_CSR_COUNTFLAG 16 +#define SYSTICK_CSR_CLKSOURCE 2 +#define SYSTICK_CSR_TICKINT 1 +#define SYSTICK_CSR_ENABLE 0 + +//================ bit definitions ==================== +#define OTBIT_DIN 1<<0 +#define OTBIT_DLE 1<<1 +#define OTBIT_CEB 1<<2 +#define OTBIT_RSTB 1<<3 +#define OTBIT_CLE 1<<4 +#define OTBIT_PGMEN 1<<5 +#define OTBIT_PGMVFY 1<<6 +#define OTBIT_READEN 1<<7 +#define OTBIT_VPPEN 1<<8 +#define OTBIT_WEB 1<<9 + +#define AES_CNTRL_REG_START 0x1 + +#define AES_CNTRL_KEY_SEL_128 0X00 +#define AES_CNTRL_KEY_SEL_192 0X08 +#define AES_CNTRL_KEY_SEL_256 0X10 + +#define AES_CNTRL_ENC 0X00 +#define AES_CNTRL_DEC 0X02 + +#define AES_CNTRL_ENABLE_RAND 0X20 + +#define DMACH_QSPI 0 +#define DMACH_SPID0 1 +#define DMACH_SPID1 2 +#define DMACH_UART0 3 +#define DMACH_UART1 4 +#define DMACH_IICD 5 +#define DMACH_MEMCP 6 + +#define DMA_START_BIT 7 +#define DMA_CLR_INTR_BIT 6 +#define DMA_RESET_BIT 5 + +//==DES== +#define DESCNTRL_REG_START 0x1 +#define DESCNTRL_REG_ENCRYPT 0x2 +#define DESCNTRL_REG_KEY_SEL 0xc +#define DESCNTRL_REG_DES_MODE 0x10 +#define DESCNTRL_REG_OP_MODE 0x60 +#define DESCNTRL_REG_RAND_EN 0x80 + +#define DESCNTRL_REG_ENCRYPT_ENC 0X00 +#define DESCNTRL_REG_ENCRYPT_DEC 0X02 + +#define DESCNTRL_REG_KEY_SEL_DES1 0x00 +#define DESCNTRL_REG_KEY_SEL_DES2 0x04 +#define DESCNTRL_REG_KEY_SEL_DES3 0x08 + +#define DESCNTRL_REG_KEY_SEL_TDES2 0x00 +#define DESCNTRL_REG_KEY_SEL_TDES3 0x04 + +#define DESCNTRL_REG_DES_MODE_DES 0X00 +#define DESCNTRL_REG_DES_MODE_TDES 0X10 + +#define DESCNTRL_REG_OP_MODE_ECB 0x00 +#define DESCNTRL_REG_OP_MODE_CBC 0x20 +//==DES==END== + +//==RSA== +//sfr bit +// RECR register +#define RECR_start 0x01 +#define RECR_idle_run 0x02 +#define RECR_bus_crypt_en 0x04 +// RESR register +#define RESR_error_flag 0x01 +#define RESR_opdata_error 0x02 +//REINT register +#define REINT_rsa_int 0x01 +//==RSA==END== + +#define CLKCLS_INT 1 +#define CLKCLS_SHA 2 +#define CLKCLS_CRC 3 +#define CLKCLS_TIM 4 +#define CLKCLS_WDT 5 +#define CLKCLS_USB 6 +#define CLKCLS_SPI 7 +#define CLKCLS_DES 8 +#define CLKCLS_RSA 9 +#define CLKCLS_AES 10 +#define CLKCLS_GPIO 11 +#define CLKCLS_7816 12 +#define CLKCLS_BT 13 +#define CLKCLS_SM4 14 +#define CLKCLS_UART 15 +#define CLKCLS_7811 16 +#define CLKCLS_ADC7811 17 +#define CLKCLS_CP 18 + +#define INTR_USB 0 +#define INTR_IIC 1 +#define INTR_QSPI 2 +#define INTR_SPI0 3 +#define INTR_SPI1 4 +#define INTR_UART0 5 +#define INTR_UART1 6 +#define INTR_MEMCP 7 +#define INTR_RSA 8 +#define INTR_SCI0 9 +#define INTR_SCI1 10 +#define INTR_BT 11 +#define INTR_GPIO 12 +#define INTR_TMR0 13 +#define INTR_TMR1 14 +#define INTR_TMR2 15 +#define INTR_TMR3 16 +#define INTR_TMR4 17 +#define INTR_TMR5 18 +#define INTR_TMR6 19 +#define INTR_TMR7 20 +#define INTR_TMR8 21 +#define INTR_SM4 22 +#define INTR_SEC 23 +#define INTR_ISO7811 24 +#define INTR_TRNG 25 +#define INTR_WDT 26 + +#define SCICFG_TMODE 0 +#define SCICFG_BIT_ORDER 1 +#define SCICFG_PAD_TYPE 2 +#define SCICFG_ETU_SEL 3 +#define SCICFG_RETRY 5 +#define SCICFG_RETRY_EN 8 +#define SCICFG_IO_EN 9 +#define SCICFG_BGTEN 10 +#define SCICFG_CWTEN 11 +#define SCICFG_MCLK_SEL 12 +#define SCICFG_MASTER 15 +#define SCICFG_EDCEN 16 + +#define KCFG_COL 3 +#define KCFG_MDDBC 8 +#define KCFG_MUDBC 12 +#define KCFG_UDBC 16 +#define KCFG_CYLE 20 + +#define SM4_CNTRL_ECB 0X00 +#define SM4_CNTRL_CBC 0X02 +#define SM4_CNTRL_ENC 0X01 +#define SM4_CNTRL_DEC 0X00 + +/* =============== qspi flash command =================== */ +#define W25X_WRITE_ENABLE 0x06 +#define W25X_WRITE_DISABLE 0x04 +#define W25X_READ_STATUS1 0x05 +#define W25X_READ_STATUS2 0x35 +#define W25X_WRITE_STATUS 0x01 +#define W25X_READ_DATA 0x03 +#define W25X_FASTREAD_DATA 0x0B +#define W25X_FASTREAD_DUAL1 0x3B +#define W25X_FASTREAD_DUAL2 0xBB + +#define W25X_FASTREAD_QUAD1 0x6B +#define W25X_FASTREAD_QUAD2 0xEB +#define W25X_FASTREAD_QUAD3 0xE7 + +#define W25X_PAGE_PROGRAM 0x02 +#define W25X_SECTOR_ERASE 0x20 +#define W25X_BLOCK_ERASE32K 0x52 +#define W25X_BLOCK_ERASE64K 0xD8 +#define W25X_CHIP_ERASE 0xC7 +#define W25X_POWER_DOWN 0xB9 +#define W25X_RELEASE_POWERDOWN 0xAB +#define W25X_DEVICEID 0xAB +#define W25X_MANUFACT_DEVICEID 0x90 +#define W25X_JEDEC_DEVICEID 0x9F + +#define QSPICFG_XIPEN 1 << 12 +#define QSPICFG_DECEN 1 << 13 +#define QSPICFG_DUAL_MODE 1 << 0 +#define QSPICFG_QUAD_MODE 2 << 0 +#define QSPICFG_MBYTE 1 << 2 +#define QSPICFG_MBYTE_CONT 1 << 3 +#define QSPICFG_RETRY 3 << 24 + +#define QCSFT_DUMMY 8 +#define QCSFT_CMD 16 + +#define QSPICFG_MODE_3B QSPICFG_DUAL_MODE | W25X_FASTREAD_DUAL1 << QCSFT_CMD | 8 << QCSFT_DUMMY +#define QSPICFG_MODE_6B QSPICFG_QUAD_MODE | W25X_FASTREAD_QUAD1 << QCSFT_CMD | 8 << QCSFT_DUMMY +#define QSPICFG_MODE_BB QSPICFG_DUAL_MODE | QSPICFG_MBYTE | 0x60 | W25X_FASTREAD_DUAL2 << QCSFT_CMD +#define QSPICFG_MODE_EB QSPICFG_QUAD_MODE | QSPICFG_MBYTE | 0x60 | W25X_FASTREAD_QUAD2 << QCSFT_CMD | 4 << QCSFT_DUMMY +#define QSPICFG_MODE_E7 QSPICFG_QUAD_MODE | QSPICFG_MBYTE | 0x60 | W25X_FASTREAD_QUAD3 << QCSFT_CMD | 2 << QCSFT_DUMMY + +#define LPMCFG_BUCK_EN 1 << 25 +#define LPMCFG_TIMER_EN 1 << 28 +#define LPMCFG_KRST_EN 1 << 29 +#define LPMCFG_SENSOR_DUR 1 << 30 + +#define LPMSEN_SENSOR_DLY 5 +#define LPMSEN_SENSOR_LOCK 7 +#define LPMSEN_SHIELD_IO_EN 8 +#define LPMSEN_SHIELD_IO_TYPE 12 +#define LPMSEN_SHIELD_IO_PU 16 +#define LPMSEN_SHIELD_INTERVAL 24 +#define LPMSEN_SHIELD_ENABLE 27 +#define LPMSEN_SHIELD_PU_DLY 28 +#define LPMSEN_SHIELD_A_DLY 30 +#define LPMCFG_SENSOR_LOCK 31 + +//gpio ctrl bit define +#define GPCFG_INPUT 0 +#define GPCFG_QSPI_NCS 2 +#define GPCFG_QSPI_SCK 3 +#define GPCFG_QSPI_IO0 4 +#define GPCFG_QSPI_IO1 5 +#define GPCFG_QSPI_IO2 6 +#define GPCFG_QSPI_IO3 7 +#define GPCFG_UART0_TXD 8 +#define GPCFG_UART0_RXD 9 +#define GPCFG_UART0_RTS 10 +#define GPCFG_UART0_CTS 11 +#define GPCFG_UART1_TXD 12 +#define GPCFG_UART1_RXD 13 +#define GPCFG_UART1_RTS 14 +#define GPCFG_UART1_CTS 15 +#define GPCFG_PWM_OUT0 16 +#define GPCFG_PWM_OUT1 17 +#define GPCFG_PWM_OUT2 18 +#define GPCFG_PWM_OUT3 19 +#define GPCFG_PWM_OUT4 20 +#define GPCFG_PWM_OUT5 21 +#define GPCFG_PWM_OUT6 22 +#define GPCFG_PWM_OUT7 23 +#define GPCFG_SPID0_NCS 24 +#define GPCFG_SPID0_SCK 25 +#define GPCFG_SPID0_MOSI 26 +#define GPCFG_SPID0_SDIO 27 +#define GPCFG_SPID0_MISO 28 +#define GPCFG_SPID0_NCSIN 29 +#define GPCFG_SPID0_SCKIN 30 +#define GPCFG_PWM_OUT8 31 + +#define GPCFG_SPID1_NCS 48 +#define GPCFG_SPID1_SCK 49 +#define GPCFG_SPID1_MOSI 50 +#define GPCFG_SPID1_SDIO 51 +#define GPCFG_SPID1_MISO 52 +#define GPCFG_SPID1_NCSIN 53 +#define GPCFG_SPID1_SCKIN 54 +#define GPCFG_NFC_CLK_OUT 55 +#define GPCFG_SCI7816_IO 56 + +#define GPCFG_ICE 57 +#define GPCFG_IIC_SCL 58 +#define GPCFG_IIC_SDA 59 +#define GPCFG_JTAG_SWCLK 60 +#define GPCFG_JTAG_SWDAT 61 +#define GPCFG_OUTPUT_LOW 62 +#define GPCFG_OUTPUT_HIGH 63 +#define GPCFG_PU 64 +#define GPCFG_PD 128 +#define GPCFG_ANALOG 192 + +#define TIM_CTRL_ENABLE ((uint32_t)0) +#define TIM_CTRL_START_LEVEL ((uint32_t)1) +#define TIM_CTRL_MODE ((uint32_t)2) +#define TIM_CTRL_AUTO_RELOAD ((uint32_t)3) + +/* =============== macros =================== */ +#define PREFETCH_LINE(addr) *(volatile int*)addr = 0 +#define GETWORD(p) ((uint16_t)((*(volatile uint8_t *)((uint32_t)p)) |((((uint16_t)(*(volatile uint8_t *)((uint32_t)(p+1))))<<8) & 0xff00))) +static inline void enable_clock(int id) +{ + SYSCTRL_CLK_CLS &= ~(1 << id); +} +static inline void disable_clock(int id) +{ + SYSCTRL_CLK_CLS |= 1 << id; +} +static inline void enable_intr(int intid) +{ + NVIC_ISER |= 1 << intid; +} +static inline void disable_intr(int intid) +{ + NVIC_ICER = 1 << intid; +} + +extern void delay(int);//delay(x)=delay(x*110+450ns) +extern void invalidate_icache(int addr, int len); + +//#define SCY_FALSE seesim1() + +/*********************************************/ +#define SYSCTRL_PCLK_CON *(volatile int*)0xf7208 +#define SYSCTRL_POWERMODE *(volatile int*)0xf7218 + +//#define debug +#endif /* __YC3121_H__ */ diff --git a/bsp/yichip/yc3121-pos/Libraries/sdk/yc_dma.c b/bsp/yichip/yc3121-pos/Libraries/sdk/yc_dma.c new file mode 100644 index 0000000000..8b7f355076 --- /dev/null +++ b/bsp/yichip/yc3121-pos/Libraries/sdk/yc_dma.c @@ -0,0 +1,72 @@ +/* +File Name : yc_dma.c +Author : Yichip +Version : V1.0 +Date : 2018/03/27 +Description : DMA Mem_TO_Mem Mode encapsulation. + If enable DMA interrupt ,enter interrupt after sending data by default,and just one DMA IT Mode. +*/ + +#include "yc_dma.h" + +#define DMA_Channel DMACH_MEMCP +#define DMA_CLEAR_IT_BIT_Pos 6 +#define DMA_ENTERIT_BIT_Pos 1 +#define DMA_DATA_COMPLETE_BIT_Pos 0 + +void DMA_Init(DMA_InitTypeDef *DMA_InitStruct) +{ + DMA_SRC_ADDR(DMACH_MEMCP) = DMA_InitStruct->DMA_MemorySourceAddr; + DMA_DEST_ADDR(DMACH_MEMCP) = DMA_InitStruct->DMA_MemoryDestAddr; + DMA_LEN(DMACH_MEMCP) = (DMA_InitStruct->DMA_BlockSize << 16) | DMA_InitStruct->DMA_BlockSize; +} + +void DMA_ChannelCmd(FunctionalState NewState) +{ + if (NewState != DISABLE) + { + DMA_START(DMACH_MEMCP) |= (DMA_ENABLE); + } + else + { + DMA_START(DMACH_MEMCP) &= ~(DMA_ENABLE); + } +} + +void DMA_SetSRCAddress(uint32_t Address) +{ + DMA_SRC_ADDR(DMACH_MEMCP) = Address; +} + +void DMA_SetDSRAddress(uint32_t Address) +{ + DMA_DEST_ADDR(DMACH_MEMCP) = Address; +} + +FunctionalState DMA_IsChannelEnabled(void) +{ + if (1 == (DMA_START(DMACH_MEMCP) & DMA_ENABLE)) + { + return ENABLE; + } + else + { + return DISABLE; + } +} + +FlagStatus DMA_GetFlagStatus(void) +{ + return (FlagStatus)((DMA_STATUS(DMACH_MEMCP) & (1 << DMA_DATA_COMPLETE_BIT_Pos))); +} + +void DMA_ClearITPendingBit(void) +{ + DMA_START(DMACH_MEMCP) |= (1 << DMA_CLEAR_IT_BIT_Pos); +} + +void DMA_ITConfig(FunctionalState NewState) +{ + DMA_CONFIG(DMACH_MEMCP) &= ~(1 << DMA_ENTERIT_BIT_Pos); + DMA_CONFIG(DMACH_MEMCP) |= (NewState << DMA_ENTERIT_BIT_Pos); +} diff --git a/bsp/yichip/yc3121-pos/Libraries/sdk/yc_dma.h b/bsp/yichip/yc3121-pos/Libraries/sdk/yc_dma.h new file mode 100644 index 0000000000..deac52a157 --- /dev/null +++ b/bsp/yichip/yc3121-pos/Libraries/sdk/yc_dma.h @@ -0,0 +1,91 @@ +/* +File Name : yc_dma.h +Author : Yichip +Version : V1.0 +Date : 2018/03/27 +Description : DMA Mem_TO_Mem Mode encapsulation. + If enable DMA interrupt ,enter interrupt after sending data by default,and just one DMA IT Mode. +*/ + +#ifndef __YC_DMA_H_ +#define __YC_DMA_H_ + +#include "yc3121.h" +#define DMACH_QSPI 0 + +#define DMA_ENABLE_BIT_Pos 7 +#define DMA_ENABLE ((uint8_t)1 << DMA_ENABLE_BIT_Pos) + +#define DMA_IT_BIT_Pos 1 +#define DMA_IT_ENABLE ((uint32_t)1 << DMA_IT_BIT_Pos) +/*Peripheral DMA Channel*/ + +typedef struct +{ + uint32_t DMA_MemorySourceAddr; /*!< Specifies the memory Source address for Channel Mem_to_Mem. */ + + uint32_t DMA_MemoryDestAddr; /*!GPIO_Pin)); + _ASSERT(IS_GPIO_MODE(GPIO_InitStruct->GPIO_Mode)); + + int i; + + switch (GPIO_InitStruct->GPIO_Mode) + { + case GPIO_Mode_IN_FLOATING: + for (i = 0; i < GPIO_PIN_NUM; i++) + { + if (GPIO_InitStruct->GPIO_Pin & 1 << i) + GPIO_CONFIG(GPIOx * GPIO_PIN_NUM + i) = 0x00; + } + break; + + case GPIO_Mode_IPU: + for (i = 0; i < GPIO_PIN_NUM; i++) + { + if (GPIO_InitStruct->GPIO_Pin & 1 << i) + GPIO_CONFIG(GPIOx * GPIO_PIN_NUM + i) = 0x40; + } + break; + + case GPIO_Mode_IPD: + for (i = 0; i < GPIO_PIN_NUM; i++) + { + if (GPIO_InitStruct->GPIO_Pin & 1 << i) + GPIO_CONFIG(GPIOx * GPIO_PIN_NUM + i) = 0x80; + } + break; + + case GPIO_Mode_AIN: + for (i = 0; i < GPIO_PIN_NUM; i++) + { + if (GPIO_InitStruct->GPIO_Pin & 1 << i) + GPIO_CONFIG(GPIOx * GPIO_PIN_NUM + i) = 0xC0; + } + break; + + case GPIO_Mode_Out_PP: + for (i = 0; i < GPIO_PIN_NUM; i++) + { + if (GPIO_InitStruct->GPIO_Pin & 1 << i) + GPIO_CONFIG(GPIOx * GPIO_PIN_NUM + i) = 0x3E; + } + break; + + default: + break; + } +} + +void GPIO_PullUpCmd(GPIO_TypeDef GPIOx, uint16_t GPIO_Pin, FunctionalState NewState) +{ + _ASSERT(ISGPIOGROUP(GPIOx)); + _ASSERT(IS_GET_GPIO_PIN(GPIO_Pin)); + + int i; + + for (i = 0; i < GPIO_PIN_NUM; i++) + { + if (GPIO_Pin & 1 << i) + { + if (NewState == ENABLE) + { + GPIO_CONFIG(GPIOx * GPIO_PIN_NUM + i) |= 1 << 6; + } + else if (NewState == DISABLE) + { + GPIO_CONFIG(GPIOx * GPIO_PIN_NUM + i) &= ~(1 << 6); + } + } + } +} + +uint16_t GPIO_ReadInputData(GPIO_TypeDef GPIOx) +{ + _ASSERT(ISGPIOGROUP(GPIOx)); + + return GPIO_IN(GPIOx); +} + +uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef GPIOx, uint16_t GPIO_Pin) +{ + _ASSERT(ISGPIOGROUP(GPIOx)); + _ASSERT(IS_GET_GPIO_PIN(GPIO_Pin)); + + if (GPIO_IN(GPIOx) & GPIO_Pin) + { + return (uint8_t)0x01; + } + else + { + return (uint8_t)0x00; + } +} + +uint16_t GPIO_ReadOutputData(GPIO_TypeDef GPIOx) +{ + _ASSERT(ISGPIOGROUP(GPIOx)); + + return GPIO_IN(GPIOx); +} + +uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef GPIOx, uint16_t GPIO_Pin) +{ + _ASSERT(ISGPIOGROUP(GPIOx)); + _ASSERT(IS_GET_GPIO_PIN(GPIO_Pin)); + + if (GPIO_IN(GPIOx) & GPIO_Pin) + { + return (uint8_t)0x01; + } + else + { + return (uint8_t)0x00; + } +} + +void GPIO_ResetBits(GPIO_TypeDef GPIOx, uint16_t GPIO_Pin) +{ + _ASSERT(ISGPIOGROUP(GPIOx)); + _ASSERT(IS_GET_GPIO_PIN(GPIO_Pin)); + + int i; + uint8_t Temp; + + for (i = 0; i < GPIO_PIN_NUM; i++) + { + if (GPIO_Pin & 1 << i) + { + Temp = GPIO_CONFIG(GPIOx * GPIO_PIN_NUM + i); + Temp |= 0x3F; //00111111 + Temp &= 0xFE; //11111110 + GPIO_CONFIG(GPIOx * GPIO_PIN_NUM + i) = Temp; + } + } +} + +void GPIO_SetBits(GPIO_TypeDef GPIOx, uint16_t GPIO_Pin) +{ + _ASSERT(ISGPIOGROUP(GPIOx)); + _ASSERT(IS_GET_GPIO_PIN(GPIO_Pin)); + + int i; + + for (i = 0; i < GPIO_PIN_NUM; i++) + { + if (GPIO_Pin & 1 << i) + GPIO_CONFIG(GPIOx * GPIO_PIN_NUM + i) |= 0x3F; //00111111 + } +} + +void GPIO_StructInit(GPIO_InitTypeDef *GPIO_InitStruct) +{ + GPIO_InitStruct->GPIO_Pin = GPIO_Pin_All; + GPIO_InitStruct->GPIO_Mode = GPIO_Mode_IN_FLOATING; +} + +void GPIO_Write(GPIO_TypeDef GPIOx, uint16_t value) +{ + _ASSERT(ISGPIOGROUP(GPIOx)); + + int i; + + for (i = 0; i < GPIO_PIN_NUM; i++) + { + if (BIT_GET(value, i)) + GPIO_SetBits(GPIOx, 1 << i); + else + GPIO_ResetBits(GPIOx, 1 << i); + } +} + +void GPIO_WriteBit(GPIO_TypeDef GPIOx, uint16_t GPIO_Pin, BitAction BitVal) +{ + _ASSERT(ISGPIOGROUP(GPIOx)); + _ASSERT(IS_GET_GPIO_PIN(GPIO_Pin)); + + if (BitVal == Bit_SET) + GPIO_SetBits(GPIOx, GPIO_Pin); + else if (BitVal == Bit_RESET) + GPIO_ResetBits(GPIOx, GPIO_Pin); +} diff --git a/bsp/yichip/yc3121-pos/Libraries/sdk/yc_gpio.h b/bsp/yichip/yc3121-pos/Libraries/sdk/yc_gpio.h new file mode 100644 index 0000000000..92f6ff9723 --- /dev/null +++ b/bsp/yichip/yc3121-pos/Libraries/sdk/yc_gpio.h @@ -0,0 +1,299 @@ +/* +File Name : yc_gpio.c +Author : Yichip +Version : V1.0 +Date : 2019/12/03 +Description : gpio encapsulation. +*/ + +#ifndef __YC_GPIO_H__ +#define __YC_GPIO_H__ + +#include "yc3121.h" + +/** + * @brief Configuration Mode enumeration + */ +typedef enum +{ + GPIO_Mode_IN_FLOATING = 0x01, + GPIO_Mode_IPU = 0x02, + GPIO_Mode_IPD = 0x03, + GPIO_Mode_AIN = 0x04, + GPIO_Mode_Out_PP = 0x05 /*!< analog signal mode */ +} GPIO_ModeTypeDef; + +#define IS_GPIO_MODE(mode) (((mode) == GPIO_Mode_IN_FLOATING) || \ + ((mode) == GPIO_Mode_IPU) || \ + ((mode) == GPIO_Mode_IPD) || \ + ((mode) == GPIO_Mode_Out_PP) || \ + ((mode) == GPIO_Mode_AIN)) + +/** + * @brief Bit_SET and Bit_RESET enumeration + */ +typedef enum +{ + Bit_RESET = 0, + Bit_SET +} BitAction; + +/** + * @brief gpio output enumeration + */ +typedef enum +{ + OutputLow = 0, + OutputHigh = 1 +} GPIO_OutputTypeDef; + +#define IS_GPIO_WAKE_MODE(MODE) (((MODE) == GPIO_WakeMode_Now) || \ + ((MODE) == GPIO_WakeMode_AfterGlitch)) + +/** + * @brief GPIO function enumeration + */ +typedef enum +{ + INPUT = GPCFG_INPUT, + QSPI_NCS = GPCFG_QSPI_NCS, + QSPI_SCK = GPCFG_QSPI_SCK, + QSPI_IO0 = GPCFG_QSPI_IO0, + QSPI_IO1 = GPCFG_QSPI_IO1, + QSPI_IO2 = GPCFG_QSPI_IO2, + QSPI_IO3 = GPCFG_QSPI_IO3, + UART0_TXD = GPCFG_UART0_TXD, + UART0_RXD = GPCFG_UART0_RXD, + UART0_RTS = GPCFG_UART0_RTS, + UART0_CTS = GPCFG_UART0_CTS, + UART1_TXD = GPCFG_UART1_TXD, + UART1_RXD = GPCFG_UART1_RXD, + UART1_RTS = GPCFG_UART1_RTS, + UART1_CTS = GPCFG_UART1_CTS, + PWM_OUT0 = GPCFG_PWM_OUT0, + PWM_OUT1 = GPCFG_PWM_OUT1, + PWM_OUT2 = GPCFG_PWM_OUT2, + PWM_OUT3 = GPCFG_PWM_OUT3, + PWM_OUT4 = GPCFG_PWM_OUT4, + PWM_OUT5 = GPCFG_PWM_OUT5, + PWM_OUT6 = GPCFG_PWM_OUT6, + PWM_OUT7 = GPCFG_PWM_OUT7, + PWM_OUT8 = GPCFG_PWM_OUT8, + SPID0_NCS = GPCFG_SPID0_NCS, + SPID0_SCK = GPCFG_SPID0_SCK, + SPID0_MOSI = GPCFG_SPID0_MOSI, + SPID0_SDIO = GPCFG_SPID0_SDIO, + SPID0_MISO = GPCFG_SPID0_MISO, + SPID0_NCSIN = GPCFG_SPID0_NCSIN, + SPID0_SCKIN = GPCFG_SPID0_SCKIN, + SPID1_NCS = GPCFG_SPID1_NCS, + SPID1_SCK = GPCFG_SPID1_SCK, + SPID1_MOSI = GPCFG_SPID1_MOSI, + SPID1_SDIO = GPCFG_SPID1_SDIO, + SPID1_MISO = GPCFG_SPID1_MISO, + SPID1_NCSIN = GPCFG_SPID1_NCSIN, + SPID1_SCKIN = GPCFG_SPID1_SCKIN, + NFC_CLK_OUT = GPCFG_NFC_CLK_OUT, + SCI7816_IO = GPCFG_SCI7816_IO, + IIC_SCL = GPCFG_IIC_SCL, + IIC_SDA = GPCFG_IIC_SDA, + JTAG_SWCLK = GPCFG_JTAG_SWCLK, + JTAG_SWDAT = GPCFG_JTAG_SWDAT, + OUTPUT_LOW = GPCFG_OUTPUT_LOW, + OUTPUT_HIGH = GPCFG_OUTPUT_HIGH, + PULL_UP = GPCFG_PU, + PULL_DOWN = GPCFG_PD, + ANALOG = GPCFG_ANALOG +} GPIO_FunTypeDef; + +#define GPIO_Pin_0 ((uint16_t)0x0001) /*!< Pin 0 selected */ +#define GPIO_Pin_1 ((uint16_t)0x0002) /*!< Pin 1 selected */ +#define GPIO_Pin_2 ((uint16_t)0x0004) /*!< Pin 2 selected */ +#define GPIO_Pin_3 ((uint16_t)0x0008) /*!< Pin 3 selected */ +#define GPIO_Pin_4 ((uint16_t)0x0010) /*!< Pin 4 selected */ +#define GPIO_Pin_5 ((uint16_t)0x0020) /*!< Pin 5 selected */ +#define GPIO_Pin_6 ((uint16_t)0x0040) /*!< Pin 6 selected */ +#define GPIO_Pin_7 ((uint16_t)0x0080) /*!< Pin 7 selected */ +#define GPIO_Pin_8 ((uint16_t)0x0100) /*!< Pin 8 selected */ +#define GPIO_Pin_9 ((uint16_t)0x0200) /*!< Pin 9 selected */ +#define GPIO_Pin_10 ((uint16_t)0x0400) /*!< Pin 10 selected */ +#define GPIO_Pin_11 ((uint16_t)0x0800) /*!< Pin 11 selected */ +#define GPIO_Pin_12 ((uint16_t)0x1000) /*!< Pin 12 selected */ +#define GPIO_Pin_13 ((uint16_t)0x2000) /*!< Pin 13 selected */ +#define GPIO_Pin_14 ((uint16_t)0x4000) /*!< Pin 14 selected */ +#define GPIO_Pin_15 ((uint16_t)0x8000) /*!< Pin 15 selected */ +#define GPIO_Pin_All ((uint16_t)0xffff) /*!< Pin All selected */ + +#define IS_GPIO_PIN(PIN) (((((PIN) & ~(uint16_t)0xFFFF)) == 0x00) && ((PIN) != (uint16_t)0x00)) + +#define IS_GET_GPIO_PIN(PIN) (((PIN) == GPIO_Pin_0) || \ + ((PIN) == GPIO_Pin_1) || \ + ((PIN) == GPIO_Pin_2) || \ + ((PIN) == GPIO_Pin_3) || \ + ((PIN) == GPIO_Pin_4) || \ + ((PIN) == GPIO_Pin_5) || \ + ((PIN) == GPIO_Pin_6) || \ + ((PIN) == GPIO_Pin_7) || \ + ((PIN) == GPIO_Pin_8) || \ + ((PIN) == GPIO_Pin_9) || \ + ((PIN) == GPIO_Pin_10) || \ + ((PIN) == GPIO_Pin_11) || \ + ((PIN) == GPIO_Pin_12) || \ + ((PIN) == GPIO_Pin_13) || \ + ((PIN) == GPIO_Pin_14) || \ + ((PIN) == GPIO_Pin_15)) + +/** + * @brief GPIO group enumeration + */ +typedef enum +{ + GPIOA = 0, + GPIOB, + GPIOC +} GPIO_TypeDef; + +#define ISGPIOGROUP(groupx) (groupx < GPIO_GROUP_NUM) + +/** + * @brief GPIO Init structure definition + */ +typedef struct +{ + uint16_t GPIO_Pin; + GPIO_ModeTypeDef GPIO_Mode; +} GPIO_InitTypeDef; + +/** + * @brief config gpio function(Only one can be configured at a time) + * + * @param GPIOx: where x can be (GPIOA...GPIOF) to select the GPIO group. + * + * @param GPIO_Pin: select the pin to read.(GPIO_Pin_0...GPIO_Pin_15)(Only one can be configured at a time) + * + * @param function:gpio function + * + * @retval none + */ +void GPIO_Config(GPIO_TypeDef GPIOx, uint16_t GPIO_Pin, GPIO_FunTypeDef function); + +/** + * @brief gpio mode Init + * + * @param GPIOx: where x can be (GPIOA...GPIOF) to select the GPIO group. + * + * @param GPIO_InitStruct:GPIO_InitStruct + * + * @retval none + */ +void GPIO_Init(GPIO_TypeDef GPIOx, GPIO_InitTypeDef *GPIO_InitStruct); + +/** + * @brief + * + * @param GPIOx: where x can be (GPIOA...GPIOF) to select the GPIO group. + * + * @param GPIO_Pin: select the pin to read.(GPIO_Pin_0...GPIO_Pin_7) + * + * @param NewState: new state of the port pin Pull Up.(ENABLE or DISABLE) + * + * @retval + */ +void GPIO_PullUpCmd(GPIO_TypeDef GPIOx, uint16_t GPIO_Pin, FunctionalState NewState); + +/** + * @brief Reads the GPIO input data(status) for byte. + * + * @param GPIOx: where x can be (GPIOA...GPIOF) to select the GPIO group. + * + * @retval GPIO input data(status). + */ +uint16_t GPIO_ReadInputData(GPIO_TypeDef GPIOx); + +/** + * @brief Reads the GPIO input data(status) for bit. + * + * @param GPIOx: where x can be (GPIOA...GPIOF) to select the GPIO group. + * + * @param GPIO_Pin: select the pin to read.(GPIO_Pin_0...GPIO_Pin_15) + * + * @retval The input status + */ +uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef GPIOx, uint16_t GPIO_Pin); + +/** + * @brief Reads the GPIO output data(status) for byte. + * + * @param GPIOx: where x can be (GPIOA...GPIOF) to select the GPIO group. + * + * @retval GPIO output data(status). + */ +uint16_t GPIO_ReadOutputData(GPIO_TypeDef GPIOx); + +/** + * @brief Reads the GPIO output data(status) for bit. + * + * @param GPIOx: where x can be (GPIOA...GPIOF) to select the GPIO group. + * + * @param GPIO_Pin: select the pin to read.(GPIO_Pin_0...GPIO_Pin_15) + * + * @retval The output status + */ +uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef GPIOx, uint16_t GPIO_Pin); + +/** + * @brief Clears the selected pin(only output mode) + * + * @param GPIOx: where x can be (GPIOA...GPIOF) to select the GPIO group. + * + * @param GPIO_Pin: select the pin to read.(GPIO_Pin_0...GPIO_Pin_15) + * + * @retval None + */ +void GPIO_ResetBits(GPIO_TypeDef GPIOx, uint16_t GPIO_Pin); + +/** + * @brief sets the selected pin(only output mode) + * + * @param GPIOx: where x can be (GPIOA...GPIOF) to select the GPIO group. + * + * @param GPIO_Pin: select the pin to read.(GPIO_Pin_0...GPIO_Pin_15) + * + * @retval None + */ +void GPIO_SetBits(GPIO_TypeDef GPIOx, uint16_t GPIO_Pin); + +/** + * @brief init GPIO_InitStruct to default value. + * @param GPIO_InitStruct : pointer to a GPIO_InitTypeDef structure which will be initialized. + * @retval None + */ +void GPIO_StructInit(GPIO_InitTypeDef *GPIO_InitStruct); + +/** + * @brief Writes data to the GPIO group port(only output mode) + * + * @param GPIOx: where x can be (GPIOA...GPIOF) to select the GPIO group. + * + * @param value: specifies the value to be written to the port output data register. + * + * @retval None + */ +void GPIO_Write(GPIO_TypeDef GPIOx, uint16_t value); + +/** + * @brief Sets or clears the selected data port bit(only output mode) + * + * @param GPIOx: where x can be (GPIOA...GPIOF) to select the GPIO group. + * + * @param GPIO_Pin: select the pin to read.(GPIO_Pin_0...GPIO_Pin_7) + * + * @param BitVal: specifies the value to be written to the selected bit. + * This parameter can be one of the BitAction enum values: + * @arg Bit_RESET: to clear the port pin + * @arg Bit_SET: to set the port pin + * @retval None + */ +void GPIO_WriteBit(GPIO_TypeDef GPIOx, uint16_t GPIO_Pin, BitAction BitVal); + +#endif /* __YC_GPIO_H__ */ diff --git a/bsp/yichip/yc3121-pos/Libraries/sdk/yc_systick.c b/bsp/yichip/yc3121-pos/Libraries/sdk/yc_systick.c new file mode 100644 index 0000000000..17172b7432 --- /dev/null +++ b/bsp/yichip/yc3121-pos/Libraries/sdk/yc_systick.c @@ -0,0 +1,72 @@ +/* +File Name : yc_systick.c +Author : Yichip +Version : V1.0 +Date : 2018/03/27 +Description : systick encapsulation. +*/ + +#include "yc_systick.h" + +tick SystickCount; + +void Systick_Dealy_Ms(uint32_t MS) +{ + uint32_t ReloadValue; + + ReloadValue = MS * 9600; + + *SYSTICK_CSR &= ~(((uint32_t)1) << SYSTICK_CSR_ENABLE); + *SYSTICK_RVR = ReloadValue; //Set the reload value + *SYSTICK_CVR = 0; //clear the current value + *SYSTICK_CSR |= ((SYSTICK_SYSCLOCK << SYSTICK_CSR_CLKSOURCE) | (1 << SYSTICK_CSR_ENABLE)); + + while (!(*SYSTICK_CVR == 0)); + *SYSTICK_RVR = 0; +} + +uint32_t SysTick_Config(uint32_t ReloadValue) +{ + ReloadValue -= 1; + if (!IS_RELOAD_VALUE(ReloadValue)) + return 1; + + *SYSTICK_CSR &= ~(((uint32_t)1) << SYSTICK_CSR_ENABLE); + + *SYSTICK_RVR = ReloadValue; //Set the reload value + *SYSTICK_CVR = 0; //clear the current value + SystickCount = 0; // Reset the overflow counter + *SYSTICK_CSR |= + ((SYSTICK_SYSCLOCK << SYSTICK_CSR_CLKSOURCE) | + (1 << SYSTICK_CSR_ENABLE) | + (1 << SYSTICK_CSR_TICKINT)); + return 0; +} + +tick SysTick_GetTick() +{ + return SystickCount; +} + +Boolean SysTick_IsTimeOut(tick start_tick, int interval) +{ + start_tick = SysTick_GetTick() - start_tick; + if (start_tick < 0) + start_tick += TICK_MAX_VALUE; + if (((start_tick * (*SYSTICK_RVR)) / (CPU_MHZ / 1000)) >= interval) + { + return TRUE; + } + else + { + return FALSE; + } +} + +uint32_t SysTick_GetRelativeTime(tick start_tick) +{ + start_tick = SysTick_GetTick() - start_tick; + if (start_tick < 0) + start_tick += TICK_MAX_VALUE; + return ((start_tick * (*SYSTICK_RVR)) / (CPU_MHZ / 1000)); +} diff --git a/bsp/yichip/yc3121-pos/Libraries/sdk/yc_systick.h b/bsp/yichip/yc3121-pos/Libraries/sdk/yc_systick.h new file mode 100644 index 0000000000..874056c2e3 --- /dev/null +++ b/bsp/yichip/yc3121-pos/Libraries/sdk/yc_systick.h @@ -0,0 +1,64 @@ +/* +File Name : yc_systick.h +Author : Yichip +Version : V1.0 +Date : 2018/03/27 +Description : systick encapsulation. +*/ + +#ifndef __YC_SYSTICK_H__ +#define __YC_SYSTICK_H__ +#include "..\core\yc3121.h" + +#define SYSTICK_SYSCLOCK 1 +#define SYSTICK_HALF_SYSCLOCK 0 + +#define IS_RELOAD_VALUE(x) (x>0&&x<=0xffffff) + +typedef int32_t tick; +#define TICK_MAX_VALUE (int32_t)0x7FFFFFFF + + +void Systick_Dealy_Ms(uint32_t MS); + +/** + * @brief Initialize systick and start systick + * + * @param ReloadValue : the systick reload value + * + * @retval 0:succeed 1:error + */ +uint32_t SysTick_Config(uint32_t ReloadValue); + + +/** + * @brief get the current value of SystickCount(SystickCount plus one for every overflow interrupt) + * + * @param none + * + * @retval current value of SystickCount + */ +tick SysTick_GetTick(void); + +/** + * @brief Determine whether the timeout that millisecond. + * + * @param start_tick:start tick + * + * @param interval:time interval(ms) + * + * @retval TRUE is timeout ,FALSE is not timeout + */ +Boolean SysTick_IsTimeOut(tick start_tick,int interval); + + +/** + * @brief get relative time . + * + * @param start_tick:start tick(start time) + * + * @retval the relative time(millisecond) + */ +uint32_t SysTick_GetRelativeTime(tick start_tick); + +#endif /* __YC_SYSTICK_H__ */ diff --git a/bsp/yichip/yc3121-pos/Libraries/sdk/yc_uart.c b/bsp/yichip/yc3121-pos/Libraries/sdk/yc_uart.c new file mode 100644 index 0000000000..1c26605e9a --- /dev/null +++ b/bsp/yichip/yc3121-pos/Libraries/sdk/yc_uart.c @@ -0,0 +1,429 @@ +/* +File Name : yc_uart.c +Author : Yichip +Version : V1.0 +Date : 2019/12/4 +Description : UART encapsulation. +*/ +#include "yc_uart.h" + +#define uart_DMA_buf_len 1024 +uint8_t uart0_DMA_buf[uart_DMA_buf_len] = {0}; +uint8_t uart1_DMA_buf[uart_DMA_buf_len] = {0}; + +#define RX_ENABLE_BIT 0 +#define RX_ENABLE (1 << RX_ENABLE_BIT) + +#define UART_DMA_ENABLE_BIT 31 +#define UART_DMA_ENABLE (1 << UART_DMA_ENABLE_BIT) + +#define TX_INTR_ENABLE_BIT 31 +#define TX_INTR_ENABLE ((uint32_t)1 << TX_INTR_ENABLE_BIT) + +#define Set_RxITNum_Mask 0xff00 +#define Statu_RxNum_Mask (uint32_t)0xffff0000 + +void UART_AutoFlowCtrlCmd(UART_TypeDef UARTx, FunctionalState NewState) +{ + _ASSERT(IS_UART(UARTx)); + + if (NewState == ENABLE) + { + switch (UARTx) + { + case UART0: + UART0_CTRL |= FlowCtrl_Enable; + break; + case UART1: + UART1_CTRL |= FlowCtrl_Enable; + break; + } + } + else + { + switch (UARTx) + { + case UART0: + UART0_CTRL &= (~FlowCtrl_Enable); + break; + case UART1: + UART1_CTRL &= (~FlowCtrl_Enable); + break; + } + } + return; +} + +void UART_ClearIT(UART_TypeDef UARTx) +{ + uint8_t ITType = UART_GetITIdentity(UARTx); + UART_ITConfig(UARTx, ITType, DISABLE); +} + +void UART_DeInit(UART_TypeDef UARTx) +{ + _ASSERT(IS_UART(UARTx)); + + switch (UARTx) + { + case UART0: + UART0_CTRL = 0; + break; + case UART1: + UART1_CTRL = 0; + break; + } +} + +void UART_DMASendBuf(UART_TypeDef UARTx, uint8_t *buf, int len) +{ + _ASSERT(IS_UART(UARTx)); + _ASSERT(NULL != buf); + _ASSERT((len < 0xffff)); + + if (UARTx == UART0) + { + DMA_SRC_ADDR(DMACH_UART0) = (int)buf; + DMA_LEN(DMACH_UART0) = (DMA_LEN(DMACH_UART0) & 0xffff) | len << 16; + DMA_START(DMACH_UART0) = (1 << DMA_START_BIT); + } + else + { + DMA_SRC_ADDR(DMACH_UART1) = (int)buf; + DMA_LEN(DMACH_UART1) = (DMA_LEN(DMACH_UART1) & 0xffff) | len << 16; + DMA_START(DMACH_UART1) = (1 << DMA_START_BIT); + } +} + +uint8_t UART_GetITIdentity(UART_TypeDef UARTx) +{ + uint8_t IT_Mode = 0; + switch (UARTx) + { + case UART0: + { + if (((UART0_CTRL & Set_RxITNum_Mask) > 0) && ((UART0_STATUS >> 16) > 0)) + { + IT_Mode = UART_IT_RX; + } + else + { + if ((UART0_CTRL & (uint32_t)TX_INTR_ENABLE)) + { + IT_Mode = UART_IT_TX; + } + else + { + IT_Mode = FALSE; + } + } + } + break; + + case UART1: + { + if (((UART1_CTRL & Set_RxITNum_Mask) > 0) && ((UART1_STATUS >> 16) > 0)) + { + IT_Mode = UART_IT_RX; + } + else + { + if (UART1_CTRL & TX_INTR_ENABLE) + { + IT_Mode = UART_IT_TX; + } + else + { + IT_Mode = FALSE; + } + } + } + break; + } + return IT_Mode; +} + +void UART_Init(UART_TypeDef UARTx, UART_InitTypeDef *UART_InitStruct) +{ +#define RESET_BAUD (1 << 7) +#define AUTO_BAUD (0 << 7) + uint32_t reg_value = 0; + uint32_t temp_baudrate = 0; + + _ASSERT(IS_UART(UARTx)); + _ASSERT(IS_MODE(UART_InitStruct->Mode)); + _ASSERT(IS_BAUDRATE(UART_InitStruct->BaudRate)); + _ASSERT(IS_PARITY(UART_InitStruct->Parity)); + _ASSERT(IS_FlowCtrl(UART_InitStruct->FlowCtrl)); + _ASSERT(IS_USART_STOPBITS(UART_InitStruct->StopBits)); + + temp_baudrate = ((48000000 / UART_InitStruct->BaudRate) << 16); + + reg_value = RX_ENABLE | + UART_InitStruct->Parity | + UART_InitStruct->DataBits | + UART_InitStruct->StopBits | + UART_InitStruct->FlowCtrl | + UART_InitStruct->Mode | + RESET_BAUD | + temp_baudrate; + + if (UARTx == UART0) + { + UART0_CTRL = 0; + DMA_DEST_ADDR(DMACH_UART0) = (int)uart0_DMA_buf; + DMA_LEN(DMACH_UART0) = uart_DMA_buf_len; + DMA_CONFIG(DMACH_UART0) = 1; + DMA_START(DMACH_UART0) |= (1 << (DMA_RESET_BIT)); + DMA_START(DMACH_UART0) &= ~(1 << (DMA_RESET_BIT)); + UART0_CTRL = 0; + UART0_CTRL = reg_value; + } + else + { + UART1_CTRL = 0; + DMA_DEST_ADDR(DMACH_UART1) = (int)uart1_DMA_buf; + DMA_LEN(DMACH_UART1) = uart_DMA_buf_len; + DMA_CONFIG(DMACH_UART1) = 1; + DMA_START(DMACH_UART1) |= (1 << (DMA_RESET_BIT)); + DMA_START(DMACH_UART1) &= ~(1 << (DMA_RESET_BIT)); + UART1_CTRL = 0; + UART1_CTRL = reg_value; + } + return; +} + +Boolean UART_IsRXFIFOFull(UART_TypeDef UARTx) +{ +#define BITRXFULL 1 + _ASSERT(IS_UART(UARTx)); + + if (UART0 == UARTx) + { + return (Boolean)(UART0_STATUS & (1 << BITRXFULL)); + } + else + { + return (Boolean)(UART1_STATUS & (1 << BITRXFULL)); + } +} + +Boolean UART_IsRXFIFONotEmpty(UART_TypeDef UARTx) +{ +#define BITRXEMPTY 0 + _ASSERT(IS_UART(UARTx)); + + if (UART0 == UARTx) + { + return (Boolean)((UART0_STATUS >> 16) ? 1 : 0); + } + else + { + return (Boolean)((UART1_STATUS >> 16) ? 1 : 0); + } +} + +Boolean UART_IsUARTBusy(UART_TypeDef UARTx) +{ + _ASSERT(IS_UART(UARTx)); + + if (UART0 == UARTx) + { + return (Boolean)(!(DMA_STATUS(DMACH_UART0) & 1)); + } + else + { + return (Boolean)(!(DMA_STATUS(DMACH_UART1) & 1)); + } +} + +void UART_ITConfig(UART_TypeDef UARTx, uint32_t UART_IT, FunctionalState NewState) +{ + _ASSERT(IS_UART(UARTx)); + _ASSERT(IS_UART_IT(UART_IT)); + + switch (UARTx) + { + case UART0: + { + if (UART_IT == UART_IT_RX) + { + if (NewState) + { + UART0_CTRL |= ((ENABLE << 8)); + } + else + { + UART0_CTRL &= ~Set_RxITNum_Mask; + } + } + else if (UART_IT == UART_IT_TX) + { + UART0_CTRL &= (~TX_INTR_ENABLE); + UART0_CTRL |= (NewState << TX_INTR_ENABLE_BIT); + } + } + break; + + case UART1: + { + if (UART_IT == UART_IT_RX) + { + if (NewState) + { + UART1_CTRL |= ((ENABLE << 8)); + } + else + { + UART1_CTRL &= ~Set_RxITNum_Mask; + } + } + else if (UART_IT == UART_IT_TX) + { + UART1_CTRL &= (uint32_t)~TX_INTR_ENABLE; + UART1_CTRL |= (NewState << TX_INTR_ENABLE_BIT); + } + } + break; + } +} + +uint8_t UART_ReceiveData(UART_TypeDef UARTx) +{ + _ASSERT(IS_UART(UARTx)); + + if (UART0 == UARTx) + { + return UART0_RDATA; + } + else + { + return UART1_RDATA; + } +} + +int UART_RecvBuf(UART_TypeDef UARTx, uint8_t *buf, int len) +{ + uint32_t length = 0; + volatile int *pstatus = NULL; + volatile unsigned char *pdata = NULL; + _ASSERT(IS_UART(UARTx)); + _ASSERT(NULL != buf); + + if (UART0 == UARTx) + { + pstatus = &UART0_STATUS; + pdata = &UART0_RDATA; + } + else + { + pstatus = &UART1_STATUS; + pdata = &UART1_RDATA; + } + + while ((*pstatus >> 16) > 0) + { + if (length < len) + { + buf[length++] = *pdata; + } + else + { + break; + } + } + + return length; +} + +void UART_SendBuf(UART_TypeDef UARTx, uint8_t *buf, int len) +{ + _ASSERT(IS_UART(UARTx)); + _ASSERT(NULL != buf); + _ASSERT((len < 0xffff)); + + if (UARTx == UART0) + { + DMA_SRC_ADDR(DMACH_UART0) = (int)buf; + DMA_LEN(DMACH_UART0) = (DMA_LEN(DMACH_UART0) & 0xffff) | len << 16; + DMA_START(DMACH_UART0) = (1 << DMA_START_BIT); + while ((!(DMA_STATUS(DMACH_UART0) & 1))); + } + else + { + DMA_SRC_ADDR(DMACH_UART1) = (int)buf; + DMA_LEN(DMACH_UART1) = (DMA_LEN(DMACH_UART1) & 0xffff) | len << 16; + DMA_START(DMACH_UART1) = (1 << DMA_START_BIT); + while ((!(DMA_STATUS(DMACH_UART1) & 1))); + } +} + +void UART_SendData(UART_TypeDef UARTx, uint8_t Data) +{ + uint8_t buf[1] = {Data}; + + if (UARTx == UART0) + { + DMA_SRC_ADDR(DMACH_UART0) = (int)buf; + DMA_LEN(DMACH_UART0) = (DMA_LEN(DMACH_UART0) & 0xffff) | 1 << 16; + DMA_START(DMACH_UART0) = (1 << DMA_START_BIT); + while (!(DMA_STATUS(DMACH_UART0) & 1)); + } + else + { + DMA_SRC_ADDR(DMACH_UART1) = (int)buf; + DMA_LEN(DMACH_UART1) = (DMA_LEN(DMACH_UART1) & 0xffff) | 1 << 16; + DMA_START(DMACH_UART1) = (1 << DMA_START_BIT); + while (!(DMA_STATUS(DMACH_UART1) & 1)); + } +} + +void UART_SetITTimeout(UART_TypeDef UARTx, uint16_t timeout) +{ + if (UART0 == UARTx) + { + UART0_INTR = timeout; + } + else + { + UART1_INTR = timeout; + } +} + +void UART_SetRxITNum(UART_TypeDef UARTx, uint8_t Bcnt) +{ + _ASSERT(IS_UART(UARTx)); + + if (UART0 == UARTx) + { + UART0_CTRL = (UART0_CTRL & 0xffff00ff) | ((Bcnt & 0xff) << 8); + } + else + { + UART1_CTRL = (UART1_CTRL & 0xffff00ff) | ((Bcnt & 0xff) << 8); + } +} + +void UART_StructInit(UART_InitTypeDef *UART_InitStruct) +{ + UART_InitStruct->BaudRate = 9600; + UART_InitStruct->DataBits = Databits_8b; + UART_InitStruct->FlowCtrl = FlowCtrl_None; + UART_InitStruct->Mode = Mode_duplex; + UART_InitStruct->StopBits = StopBits_1; + UART_InitStruct->Parity = 0; +} + +uint16_t UART_ReceiveDataLen(UART_TypeDef UARTx) +{ + _ASSERT(IS_UART(UARTx)); + + if (UART0 == UARTx) + { + return (uint16_t)(UART0_STATUS >> 16); + } + else + { + return (uint16_t)(UART1_STATUS >> 16); + } +} diff --git a/bsp/yichip/yc3121-pos/Libraries/sdk/yc_uart.h b/bsp/yichip/yc3121-pos/Libraries/sdk/yc_uart.h new file mode 100644 index 0000000000..22cf4b9d34 --- /dev/null +++ b/bsp/yichip/yc3121-pos/Libraries/sdk/yc_uart.h @@ -0,0 +1,304 @@ +/* +File Name : yc_uart.h +Author : Yichip +Version : V1.0 +Date : 2019/12/4 +Description : UART encapsulation. +*/ +#ifndef __YC_UART_H__ +#define __YC_UART_H__ + +#include "yc3121.h" + +/** @def time of UART receive data time out intterrupt. real time = regvalue*48 + * @{ + */ +#define TIME_IT_TIMEOUT (uint16_t)0x01 + +/** @defgroup USART_Mode + * @{ + */ +#define Mode_Single_Line (1<<6) +#define Mode_duplex (0<<6) +#define IS_MODE(MODE) (((MODE) == Mode_Single_Line) ||\ + ((MODE) == Mode_duplex)) +/** + * @} + */ + +/** @ + * @defgroup USART_DataBits + */ +#define Databits_8b (0<<2) +#define Databits_9b (1<<2) + +#define IS_USART_WORD_LENGTH(LENGTH) (((LENGTH) == Databits_8b) || \ + ((LENGTH) == Databits_9b)) +/** + * @} + */ + +/** @defgroup USART_Stop_Bits + * @{ + */ +#define StopBits_1 (0<<3) +#define StopBits_2 (1<<3) +#define IS_USART_STOPBITS(STOPBITS) (((STOPBITS) == StopBits_1) || \ + ((STOPBITS) == StopBits_2) ) +/** + * @} + */ + +/** @defgroup USART_Hardware_Flow_Control + * @{ + */ +#define FlowCtrl_None (0<<4) +#define FlowCtrl_Enable (1<<4) + +#define IS_FlowCtrl(CONTROL) (((CONTROL) == FlowCtrl_None) || \ + ((CONTROL) == FlowCtrl_Enable)) +/** + * @} + */ + +/** @defgroup UART_Interrupt_Type_definition + * @{ + */ +#define UART_IT_TX 0x01 +#define UART_IT_RX 0x02 +#define IS_UART_IT(x) (x == UART_IT_TX)||(x == UART_IT_RX) +/** + * @} + */ + +/** @defgroup USART_Parity +* @{ +*/ +#define Parity_None (0<<1) +#define Parity_Even (0<<1) +#define Parity_Odd (1<<1) +#define IS_PARITY(PARITY) (((PARITY) == Parity_Even) ||\ + ((PARITY) == Parity_None) ||\ + ((PARITY) == Parity_Odd)) +/** + * @} + */ + +/** @defgroup USART_BaudRate +* @{ +*/ +#define IS_BAUDRATE(BAUDRATE) (((BAUDRATE) > 0x5B8) && ((BAUDRATE) < 0x0044AA21)) +/** + * @} + */ + +typedef struct +{ + uint8_t Mode; /*!< Specifies wether the Receive or Transmit mode is enabled or disabled. + This parameter can be a value of @ref USART_Mode */ + + uint32_t BaudRate; /*!< This member configures the USART communication baud rate. */ + + uint8_t DataBits; /*!< Specifies the number of data bits transmitted or received in a frame. + This parameter can be a value of @ref USART_DataBits */ + + uint8_t StopBits; /*!< Specifies the number of stop bits transmitted. + This parameter can be a value of @ref USART_Stop_Bits */ + + uint8_t Parity; /*!< Specifies the parity mode. + This parameter can be a value of @ref USART_Parity + @note When parity is enabled, the computed parity is inserted + at the MSB position of the transmitted data (9th bit when + the word length is set to 9 data bits; 8th bit when the + word length is set to 8 data bits). */ + + uint8_t FlowCtrl; /*!< Specifies wether the hardware flow control mode is enabled or disabled. + This parameter can be a value of @ref USART_Hardware_Flow_Control */ + + int RxBufLen; /*!< Specifies uart DMA Rx buff length */ + +} UART_InitTypeDef; + +/** @defgroup UART_TypeDef +* @{ +*/ +typedef enum +{ + UART0 = 0, + UART1, +} UART_TypeDef; + +#define IS_UART(UARTx) (UARTx == UART0 ||UARTx == UART1) +/** + * @} + */ + +/** + * @brief ENABLE or DISABLE UARTx auto flow control + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * UART0, UART1. + * @param NewState:ENABLE or DISABLE auto flow control + * @retval None + */ +void UART_AutoFlowCtrlCmd(UART_TypeDef UARTx, FunctionalState NewState); + +/** + * @brief Clear IT + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * UART0, UART1. + * @retval None + */ +void UART_ClearIT(UART_TypeDef UARTx); + +/** + * @brief DeInit UART + * @param UARTx: Select the UART peripheral. + * This parameter can be one of the following values: + * UART0, UART1. + * @retval None + */ +void UART_DeInit(UART_TypeDef UARTx); + +/** + * @brief Transmits datas via UART DMA . + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * UART0, UART1. + * @param buf: pointer to a buf that contains the data you want transmit. + * @param len: the buf length + * @retval None + */ +void UART_DMASendBuf(UART_TypeDef UARTx, uint8_t *buf, int len); + +/** + * @brief Get IT Identity + * @param UARTx: Select the UART peripheral. + * @retval IT Identity + */ +uint8_t UART_GetITIdentity(UART_TypeDef UARTx); + +/** + * @brief Initializes the USARTx peripheral according to the specified + * parameters in the USART_InitStruct . + * @param UARTx: Select the UART peripheral. + * This parameter can be one of the following values: + * UART0, UART1. + * @param USART_InitStruct: pointer to a USART_InitTypeDef structure + * that contains the configuration information for the specified USART + * peripheral. + * @retval None + */ +void UART_Init(UART_TypeDef UARTx, UART_InitTypeDef *UART_InitStruct); + +/** + * @brief Judge Rx fifo full is or not. + * @param UARTx: Select the UART peripheral. + * @retval TRUE:Rx fifo is full. + * FALSE:Rx fifo is not full + */ +Boolean UART_IsRXFIFOFull(UART_TypeDef UARTx); + +/** + * @brief Judge Rx fifo empty is or not. + * @param UARTx: Select the UART peripheral. + * @retval TRUE:Rx fifo is not empty. + * FALSE:Rx fifo is empty; + */ +Boolean UART_IsRXFIFONotEmpty(UART_TypeDef UARTx); + +/** + * @brief Judge UART is Busy or not + * @param UARTx: Select the UART peripheral. + * @retval None + */ +Boolean UART_IsUARTBusy(UART_TypeDef UARTx); + +/** + * @brief Config Interrupt trigger mode + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * UART0, UART1. + * @param UART_IT: Interrupt trigger mode ,this param will the following values, + * UART_IT_TX:interrupt trigger after send data completed. + * UART_IT_RX:interrupt trigger when received data. + * @param NewState: + * @retval None + */ +void UART_ITConfig(UART_TypeDef UARTx, uint32_t UART_IT, FunctionalState NewState); + +/** + * @brief Receive single data through the USARTx peripheral. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * UART0, UART1. + * @retval None + */ +uint8_t UART_ReceiveData(UART_TypeDef UARTx); + +/** + * @brief Receives datas through the UART DMA. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * UART0, UART1. + * @param buf: pointer to a buf that contains the data you want receive. + * @param len: the buf length + * @retval None + */ +int UART_RecvBuf(UART_TypeDef UARTx, uint8_t *buf, int len); + +/** + * @brief T ransmits datas via UART DMA,the function will return after datas is sent. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * UART0, UART1. + * @param buf: pointer to a buf that contains the data you want transmit. + * @param len: the buf length + * @retval None + */ +void UART_SendBuf(UART_TypeDef UARTx, uint8_t *buf, int len); + +/** + * @brief UART Send One Data + * @param UARTx: Select the UART peripheral. + * @retval None + */ +void UART_SendData(UART_TypeDef UARTx, uint8_t Data); + +/** + * @brief UART_SetITTimeout + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * UART0, UART1. + * timeout: 0x0000~0xffff + * @retval None + */ +void UART_SetITTimeout(UART_TypeDef UARTx, uint16_t timeout); + +/** + * @brief Set the number of uart receive data intterupt trigger + * @param UARTx: Select the UART peripheral. + * This parameter can be one of the following values: + * UART0, UART1. + * @param Bcnt: if the number of receive datas greater than Bcnt,interrupt trigger + * @retval None + */ +void UART_SetRxITNum(UART_TypeDef UARTx, uint8_t Bcnt); + +/** + * @brief Fills each USART_InitStruct member with its default value. + * @param USART_InitStruct: pointer to a USART_InitTypeDef structure + * which will be initialized. + * @retval None + */ +void UART_StructInit(UART_InitTypeDef *UART_InitStruct); + +/** + * @brief UART_ReceiveDataLen + * @param UARTx: UART0 or UART1 + * @retval Data len + */ +uint16_t UART_ReceiveDataLen(UART_TypeDef UARTx); + +#endif /*__YC_UART_H__*/ diff --git a/bsp/yichip/yc3121-pos/Libraries/sdk/yc_wdt.c b/bsp/yichip/yc3121-pos/Libraries/sdk/yc_wdt.c new file mode 100644 index 0000000000..8b4948b798 --- /dev/null +++ b/bsp/yichip/yc3121-pos/Libraries/sdk/yc_wdt.c @@ -0,0 +1,54 @@ +#include "yc_wdt.h" + +#define WDT_ENABLE_BIT_Mask 6 +#define WDT_MODE_BIT_Mask 5 +#define SYSCTRL_WDT_EN_BIT_Mask 1 + +/**************the value of feed dog************/ +#define COUNTER_RELOAD_KEY 0x5937 + +void WDT_SetReload(uint32_t Reload) +{ + uint32_t wdt_config = 0; + + _ASSERT(ISWDTRELOAD(Reload)); + + wdt_config = WD_CONFIG; + wdt_config &= 0xE0; + wdt_config |= Reload; + WD_CONFIG = wdt_config; +} + +void WDT_ReloadCounter(void) +{ + WD_KICK = COUNTER_RELOAD_KEY; +} + +void WDT_Enable(void) +{ + WD_CONFIG |= (1 << WDT_ENABLE_BIT_Mask); +} + +void WDT_ModeConfig(WDT_ModeTypeDef WDT_Mode) +{ + WD_CONFIG &= ~(1 << WDT_MODE_BIT_Mask); + WD_CONFIG |= (WDT_Mode << WDT_MODE_BIT_Mask); + if (WDT_CPUReset == WDT_Mode) + { + SYSCTRL_RST_EN |= (1 << 1); + } + else + { + SYSCTRL_RST_EN &= ~(1 << 1); + } +} + +ITStatus WDT_GetITStatus(void) +{ + return (ITStatus)(WD_KICK & 1); +} + +void WDT_ClearITPendingBit(void) +{ + WD_CLEAR = 1; +} diff --git a/bsp/yichip/yc3121-pos/Libraries/sdk/yc_wdt.h b/bsp/yichip/yc3121-pos/Libraries/sdk/yc_wdt.h new file mode 100644 index 0000000000..e9594d035e --- /dev/null +++ b/bsp/yichip/yc3121-pos/Libraries/sdk/yc_wdt.h @@ -0,0 +1,74 @@ +/** + ****************************************************************************** + * @file yc_wdt.h + * @author Yichip + * @version V1.0 + * @date 7-Dec-2019 + * @brief watchdog encapsulation. + * + ****************************************************************************** + */ + +#ifndef __YC_WDT_H__ +#define __YC_WDT_H__ + +#include "yc3121.h" + +/** + * @brief timer number Structure definition + */ +typedef enum +{ + WDT_CPUReset = 0, + WDT_Interrupt, +} WDT_ModeTypeDef; + +#define ISWDTRELOAD(load) (load>0&&load<=0x1f) + +/** + * @brief Set reload counter + * @param Reload: Reload counter equal to 2^reload. + * @retval none + */ +void WDT_SetReload(uint32_t Reload); + +/** + * @brief Set WDT mode + * @param WDT_Mode : Select the following values : + * WDT_CPUReset + * WDT_Interrupt. + * @retval none + * @description If Select WDT_CPUReset Mode,the bit for WDT RESET will be set;if + * Select WDT_Interrupt the bit for WDT RESET will + */ +void WDT_ModeConfig(WDT_ModeTypeDef WDT_Mode); + +/** + * @brief Get interrupt Status + * @param none + * @retval SET:interrupt ocuured. + */ +ITStatus WDT_GetITStatus(void); + +/** + * @brief Clear interrupt + * @param none + * @retval none + */ +void WDT_ClearITPendingBit(void); + +/** + * @brief Enable WDT + * @param none + * @retval none + */ +void WDT_Enable(void); + +/** + * @brief Feed the watchdog function + * @param none + * @retval none + */ +void WDT_ReloadCounter(void); + +#endif /*__YC_WDT_H__*/ diff --git a/bsp/yichip/yc3121-pos/Libraries/startup/flash_start.s b/bsp/yichip/yc3121-pos/Libraries/startup/flash_start.s new file mode 100644 index 0000000000..6c354c6f39 --- /dev/null +++ b/bsp/yichip/yc3121-pos/Libraries/startup/flash_start.s @@ -0,0 +1,396 @@ + AREA |.flash_start|, CODE, READONLY ,ALIGN=4 + +Reset_Handler PROC + EXPORT Reset_Handler + IMPORT __main + LDR R0, =__main + BX R0 + ENDP + + +hard_fault_handler PROC + EXPORT hard_fault_handler + IMPORT HardFault_Handler + ldr r0,=HardFault_Handler + bx r0 + nop + ENDP + +svc_handler PROC + EXPORT svc_handler + ldr r0,=SVC_IRQHandler + bx r0 + nop + ENDP + +pendsv_handler PROC + EXPORT pendsv_handler + IMPORT PendSV_Handler + ldr r0,=PendSV_Handler + bx r0 + nop + ENDP + +systick PROC + EXPORT systick + IMPORT SysTick_Handler + ldr r0,=SysTick_Handler + bx r0 + nop + ENDP + +irq0 PROC + EXPORT irq0 + movs r0,#4*0 + b isr + ENDP + +irq1 PROC + EXPORT irq1 + movs r0,#4*1 + b isr + ENDP + +irq2 PROC + EXPORT irq2 + movs r0,#4*2 + b isr + ENDP + +irq3 PROC + EXPORT irq3 + movs r0,#4*3 + b isr + ENDP + +irq4 PROC + EXPORT irq4 + movs r0,#4*4 + b isr + ENDP + +irq5 PROC + EXPORT irq5 + movs r0,#4*5 + b isr + ENDP + +irq6 PROC + EXPORT irq6 + movs r0,#4*6 + b isr + ENDP + +irq7 PROC + EXPORT irq7 + movs r0,#4*7 + b isr + ENDP + +irq8 PROC + EXPORT irq8 + movs r0,#4*8 + b isr + ENDP + +irq9 PROC + EXPORT irq9 + movs r0,#4*9 + b isr + ENDP + +irq10 PROC + EXPORT irq10 + movs r0,#4*10 + b isr + ENDP + +irq11 PROC + EXPORT irq11 + movs r0,#4*11 + b isr + ENDP + +irq12 PROC + EXPORT irq12 + movs r0,#4*12 + b isr + ENDP + +irq13 PROC + EXPORT irq13 + movs r0,#4*13 + b isr + ENDP + +irq14 PROC + EXPORT irq14 + movs r0,#4*14 + b isr + ENDP + +irq15 PROC + EXPORT irq15 + movs r0,#4*15 + b isr + ENDP + +irq16 PROC + EXPORT irq16 + movs r0,#4*16 + b isr + ENDP + +irq17 PROC + EXPORT irq17 + movs r0,#4*17 + b isr + ENDP + +irq18 PROC + EXPORT irq18 + movs r0,#4*18 + b isr + ENDP + +irq19 PROC + EXPORT irq19 + movs r0,#4*19 + b isr + ENDP + +irq20 PROC + EXPORT irq20 + movs r0,#4*20 + b isr + ENDP + +irq21 PROC + EXPORT irq21 + movs r0,#4*21 + b isr + ENDP + +irq22 PROC + EXPORT irq22 + movs r0,#4*22 + b isr + ENDP + +irq23 PROC + EXPORT irq23 + movs r0,#4*23 + b isr + ENDP + +irq24 PROC + EXPORT irq24 + movs r0,#4*24 + b isr + ENDP + +irq25 PROC + EXPORT irq25 + movs r0,#4*25 + b isr + ENDP + +irq26 PROC + EXPORT irq26 + movs r0,#4*26 + b isr + ENDP + +irq27 PROC + EXPORT irq27 + movs r0,#4*27 + b isr + ENDP + +irq28 PROC + EXPORT irq28 + movs r0,#4*28 + b isr + ENDP + +irq29 PROC + EXPORT irq29 + movs r0,#4*29 + b isr + ENDP + +irq30 PROC + EXPORT irq30 + movs r0,#4*30 + b isr + ENDP + +irq31 PROC + EXPORT irq31 + movs r0,#4*31 + b isr + ENDP + + +isr PROC + ldr r1,=isr_table + ldr r0,[r0, r1] + bx r0 + ENDP + + ALIGN +NMI_IRQHandler PROC + EXPORT NMI_IRQHandler [WEAK] + B . + ENDP + +HARD_FAULT_IRQHandler PROC + EXPORT HARD_FAULT_IRQHandler [WEAK] + B . + ENDP + +SVC_IRQHandler PROC + EXPORT SVC_IRQHandler [WEAK] + B . + ENDP + +PENDSV_IRQHandler PROC + EXPORT PENDSV_IRQHandler [WEAK] + B . + ENDP + +SYSTICK_IRQHandler PROC + EXPORT SYSTICK_IRQHandler [WEAK] + B . + ENDP + +EXTI0_IRQHandler PROC + EXPORT EXTI0_IRQHandler [WEAK] + B . + ENDP + +EXTI1_IRQHandler PROC + EXPORT EXTI1_IRQHandler [WEAK] + B . + ENDP + +EXTI2_IRQHandler PROC + EXPORT EXTI2_IRQHandler [WEAK] + B . + ENDP + +EXTI3_IRQHandler PROC + EXPORT EXTI3_IRQHandler [WEAK] + B . + ENDP + +EXTI4_IRQHandler PROC + EXPORT EXTI4_IRQHandler [WEAK] + B . + ENDP + +EXTI5_IRQHandler PROC + EXPORT EXTI5_IRQHandler [WEAK] + B . + ENDP + +Default_Handler PROC +; ToDo: Add here the export definition for the device specific external interrupts handler + EXPORT USB_IRQHandler [WEAK] + EXPORT IIC_IRQHandler [WEAK] + EXPORT QSPI_IRQHandler [WEAK] + EXPORT SPI0_IRQHandler [WEAK] + EXPORT SPI1_IRQHandler [WEAK] + EXPORT UART0_IRQHandler [WEAK] + EXPORT UART1_IRQHandler [WEAK] + EXPORT MEMCP_IRQHandler [WEAK] + EXPORT RSA_IRQHandler [WEAK] + EXPORT SCI0_IRQHandler [WEAK] + EXPORT SCI1_IRQHandler [WEAK] + EXPORT BT_IRQHandler [WEAK] + EXPORT GPIO_IRQHandler [WEAK] + EXPORT TIMER0_IRQHandler [WEAK] + EXPORT TIMER1_IRQHandler [WEAK] + EXPORT TIMER2_IRQHandler [WEAK] + EXPORT TIMER3_IRQHandler [WEAK] + EXPORT TIMER4_IRQHandler [WEAK] + EXPORT TIMER5_IRQHandler [WEAK] + EXPORT TIMER6_IRQHandler [WEAK] + EXPORT TIMER7_IRQHandler [WEAK] + EXPORT TIMER8_IRQHandler [WEAK] + EXPORT SM4_IRQHandler [WEAK] + EXPORT SEC_IRQHandler [WEAK] + EXPORT MSR_IRQHandler [WEAK] + EXPORT TRNG_IRQHandler [WEAK] + EXPORT WDT_IRQHandler [WEAK] + +; ToDo: Add here the names for the device specific external interrupts handler +USB_IRQHandler +IIC_IRQHandler +QSPI_IRQHandler +SPI0_IRQHandler +SPI1_IRQHandler +UART0_IRQHandler +UART1_IRQHandler +MEMCP_IRQHandler +RSA_IRQHandler +SCI0_IRQHandler +SCI1_IRQHandler +BT_IRQHandler +GPIO_IRQHandler +TIMER0_IRQHandler +TIMER1_IRQHandler +TIMER2_IRQHandler +TIMER3_IRQHandler +TIMER4_IRQHandler +TIMER5_IRQHandler +TIMER6_IRQHandler +TIMER7_IRQHandler +TIMER8_IRQHandler +SM4_IRQHandler +SEC_IRQHandler +MSR_IRQHandler +TRNG_IRQHandler +WDT_IRQHandler + B . + ENDP + + + + EXPORT isr_table +isr_table DCD USB_IRQHandler + DCD IIC_IRQHandler + DCD QSPI_IRQHandler + DCD SPI0_IRQHandler + DCD SPI1_IRQHandler + DCD UART0_IRQHandler + DCD UART1_IRQHandler + DCD MEMCP_IRQHandler + DCD RSA_IRQHandler + DCD SCI0_IRQHandler + DCD SCI1_IRQHandler + DCD BT_IRQHandler + DCD GPIO_IRQHandler + DCD TIMER0_IRQHandler + DCD TIMER1_IRQHandler + DCD TIMER2_IRQHandler + DCD TIMER3_IRQHandler + DCD TIMER4_IRQHandler + DCD TIMER5_IRQHandler + DCD TIMER6_IRQHandler + DCD TIMER7_IRQHandler + DCD TIMER8_IRQHandler + DCD SM4_IRQHandler + DCD SEC_IRQHandler + DCD MSR_IRQHandler + DCD TRNG_IRQHandler + DCD WDT_IRQHandler + END + + + + + + + + diff --git a/bsp/yichip/yc3121-pos/Libraries/startup/flash_start_gcc.s b/bsp/yichip/yc3121-pos/Libraries/startup/flash_start_gcc.s new file mode 100644 index 0000000000..02302d303f --- /dev/null +++ b/bsp/yichip/yc3121-pos/Libraries/startup/flash_start_gcc.s @@ -0,0 +1,318 @@ + .org 0x200 + .global Reset_Handler,hard_fault_handler,svc_handler,pendsv_handler,systick,irq0,irq1,irq2,irq3,irq4,irq5,irq6,irq7,irq8,irq9,irq10,irq11,irq12,irq13,irq14,irq15,irq16,irq17,irq18,irq19,irq20,irq21,irq22,irq23,irq24,irq25,irq26,irq27,irq28,irq29,irq30,irq31 + + .long + + +Reset_Handler: + ldr r0,=hardware_init + bx r0 + .thumb_func + +hard_fault_handler: + ldr r0,=HARD_FAULT_IRQHandler + bx r0 + nop + .thumb_func + +svc_handler: + ldr r0,=SVC_IRQHandler + bx r0 + nop + .thumb_func + +pendsv_handler: + ldr r0,=PENDSV_IRQHandler + bx r0 + nop + .thumb_func +systick: + ldr r0,=SYSTICK_IRQHandler + bx r0 + nop + .thumb_func +irq0: + mov r0,#4*0 + b isr + .thumb_func +irq1: + mov r0,#4*1 + b isr + .thumb_func +irq2: + mov r0,#4*2 + b isr + .thumb_func +irq3: + mov r0,#4*3 + b isr + .thumb_func +irq4: + mov r0,#4*4 + b isr + .thumb_func +irq5: + mov r0,#4*5 + b isr + .thumb_func +irq6: + mov r0,#4*6 + b isr + .thumb_func +irq7: + mov r0,#4*7 + b isr + .thumb_func +irq8: + mov r0,#4*8 + b isr + .thumb_func +irq9: + mov r0,#4*9 + b isr + .thumb_func +irq10: + mov r0,#4*10 + b isr + .thumb_func +irq11: + mov r0,#4*11 + b isr + .thumb_func +irq12: + mov r0,#4*12 + b isr + .thumb_func +irq13: + mov r0,#4*13 + b isr + .thumb_func +irq14: + mov r0,#4*14 + b isr + .thumb_func +irq15: + mov r0,#4*15 + b isr + .thumb_func +irq16: + mov r0,#4*16 + b isr + .thumb_func +irq17: + mov r0,#4*17 + b isr + .thumb_func +irq18: + mov r0,#4*18 + b isr + .thumb_func +irq19: + mov r0,#4*19 + b isr + .thumb_func +irq20: + mov r0,#4*20 + b isr + .thumb_func +irq21: + mov r0,#4*21 + b isr + .thumb_func +irq22: mov r0,#4*22 + b isr + .thumb_func +irq23: + mov r0,#4*23 + b isr + .thumb_func +irq24: + mov r0,#4*24 + b isr + .thumb_func +irq25: mov r0,#4*25 + b isr + .thumb_func +irq26: + mov r0,#4*26 + b isr + .thumb_func +irq27: + mov r0,#4*27 + b isr + .thumb_func +irq28: + mov r0,#4*28 + b isr + .thumb_func +irq29: + mov r0,#4*29 + b isr + .thumb_func +irq30: + mov r0,#4*30 + b isr + .thumb_func +irq31: + mov r0,#4*31 + b isr + .thumb_func + + + +isr: + ldr r1,=isr_table + ldr r0,[r0, r1] + bx r0 + + + + + .align 4 +isr_table: + .long USB_IRQHandler + .long IIC_IRQHandler + .long QSPI_IRQHandler + .long SPI0_IRQHandler + .long SPI1_IRQHandler + .long UART0_IRQHandler + .long UART1_IRQHandler + .long MEMCP_IRQHandler + .long RSA_IRQHandler + .long SCI0_IRQHandler + .long SCI1_IRQHandler + .long BT_IRQHandler + .long GPIO_IRQHandler + .long TIMER0_IRQHandler + .long TIMER1_IRQHandler + .long TIMER2_IRQHandler + .long TIMER3_IRQHandler + .long TIMER4_IRQHandler + .long TIMER5_IRQHandler + .long TIMER6_IRQHandler + .long TIMER7_IRQHandler + .long TIMER8_IRQHandler + .long SM4_IRQHandler + .long SEC_IRQHandler + .long MSR_IRQHandler + .long TRNG_IRQHandler + .long WDT_IRQHandler + + .thumb + .thumb_func +hardware_init: + ldr r1, =__exidx_start + ldr r2, =__data_start__ + ldr r3, =__data_end__ + + sub r3, r2 + ble .L_loop1_done + + .L_loop1: + sub r3, #4 + ldr r0, [r1,r3] + str r0, [r2,r3] + bgt .L_loop1 + + .L_loop1_done: + + + + /* Single BSS section scheme. + * + * The BSS section is specified by following symbols + * _sbss: start of the BSS section. + * _ebss: end of the BSS section. + * + * Both addresses must be aligned to 4 bytes boundary. + */ + ldr r1, =__bss_start__ + ldr r2, =__bss_end__ + + mov r0, #0 + + sub r2, r1 + ble .L_loop3_done + + .L_loop3: + sub r2, #4 + str r0, [r1, r2] + bgt .L_loop3 + .L_loop3_done: + ldr r0,=0x12345 + ldr r3,=0x1111 + bl main + + + .globl delay + .syntax unified +delay: + subs r0,#1 + bne delay + nop + bx lr + + + + + + + +.align 1 +.thumb_func +.weak Default_Handler +.type Default_Handler, %function + +Default_Handler: + b . + .size Default_Handler, . - Default_Handler + +/* Macro to define default handlers. Default handler + * will be weak symbol and just dead loops. They can be + * overwritten by other handlers */ + + .macro def_irq_handler handler_name + .weak \handler_name + .set \handler_name, Default_Handler + .endm + + def_irq_handler HARD_FAULT_IRQHandler + def_irq_handler SVC_IRQHandler + def_irq_handler PENDSV_IRQHandler + def_irq_handler SYSTICK_IRQHandler + def_irq_handler USB_IRQHandler + def_irq_handler IIC_IRQHandler + def_irq_handler QSPI_IRQHandler + def_irq_handler SPI0_IRQHandler + def_irq_handler SPI1_IRQHandler + def_irq_handler UART0_IRQHandler + def_irq_handler UART1_IRQHandler + def_irq_handler MEMCP_IRQHandler + def_irq_handler RSA_IRQHandler + def_irq_handler SCI0_IRQHandler + def_irq_handler SCI1_IRQHandler + def_irq_handler BT_IRQHandler + def_irq_handler GPIO_IRQHandler + def_irq_handler EXTI0_IRQHandler + def_irq_handler EXTI1_IRQHandler + def_irq_handler EXTI2_IRQHandler + def_irq_handler TIMER0_IRQHandler + def_irq_handler TIMER1_IRQHandler + def_irq_handler TIMER2_IRQHandler + def_irq_handler TIMER3_IRQHandler + def_irq_handler TIMER4_IRQHandler + def_irq_handler TIMER5_IRQHandler + def_irq_handler TIMER6_IRQHandler + def_irq_handler TIMER7_IRQHandler + def_irq_handler TIMER8_IRQHandler + def_irq_handler SM4_IRQHandler + def_irq_handler SEC_IRQHandler + def_irq_handler MSR_IRQHandler + def_irq_handler TRNG_IRQHandler + def_irq_handler WDT_IRQHandler + + + + + + diff --git a/bsp/yichip/yc3121-pos/Libraries/startup/flash_start_iar.s b/bsp/yichip/yc3121-pos/Libraries/startup/flash_start_iar.s new file mode 100644 index 0000000000..a1307cd43d --- /dev/null +++ b/bsp/yichip/yc3121-pos/Libraries/startup/flash_start_iar.s @@ -0,0 +1,311 @@ + MODULE ?cstartup + + EXTERN __iar_program_start + + SECTION CSTACK:DATA:NOROOT(3) + + PUBLIC start_flash + SECTION .intvec:CODE:REORDER(2) +start_flash + LDR R0, =hardware_init + BX R0 + + PUBLIC hard_fault_handler +hard_fault_handler + BL HARD_FAULT_IRQHandler + + PUBLIC svc_handler +svc_handler + BL SVC_IRQHandler + + PUBLIC pendsv_handler +pendsv_handler + BL PENDSV_IRQHandler + + PUBLIC systick +systick + BL SYSTICK_IRQHandler + + PUBLIC irq0 +irq0 + movs r0,#0 + b isr + + PUBLIC irq1 +irq1 + movs r0,#1 + b isr + + PUBLIC irq2 +irq2 + movs r0,#2 + b isr + + PUBLIC irq3 +irq3 + movs r0,#3 + b isr + + PUBLIC irq4 +irq4 + movs r0,#4 + b isr + + PUBLIC irq5 +irq5 + movs r0,#5 + b isr + + PUBLIC irq6 +irq6 + movs r0,#6 + b isr + + PUBLIC irq7 +irq7 + movs r0,#7 + b isr + + PUBLIC irq8 +irq8 + movs r0,#8 + b isr + + PUBLIC irq9 +irq9 + movs r0,#9 + b isr + + PUBLIC irq10 +irq10 + movs r0,#10 + b isr + + PUBLIC irq11 +irq11 + movs r0,#11 + b isr + + PUBLIC irq12 +irq12 + movs r0,#12 + b isr + + PUBLIC irq13 +irq13 + movs r0,#13 + b isr + + PUBLIC irq14 +irq14 + movs r0,#14 + b isr + + PUBLIC irq15 +irq15 + movs r0,#15 + b isr + + PUBLIC irq16 +irq16 + movs r0,#16 + b isr + + PUBLIC irq17 +irq17 + movs r0,#17 + b isr + + PUBLIC irq18 +irq18 + movs r0,#18 + b isr + + PUBLIC irq19 +irq19 + movs r0,#19 + b isr + + PUBLIC irq20 +irq20 + movs r0,#20 + b isr + + PUBLIC irq21 +irq21 + movs r0,#21 + b isr + + PUBLIC irq22 +irq22 + movs r0,#22 + b isr + + PUBLIC irq23 +irq23 + movs r0,#23 + b isr + + PUBLIC irq24 +irq24 + movs r0,#24 + b isr + + PUBLIC irq25 +irq25 + movs r0,#25 + b isr + + PUBLIC irq26 +irq26 + movs r0,#26 + b isr + + PUBLIC irq27 +irq27 + movs r0,#27 + b isr + + PUBLIC irq28 +irq28 + movs r0,#28 + b isr + + PUBLIC irq29 +irq29 + movs r0,#29 + b isr + + PUBLIC irq30 +irq30 + movs r0,#30 + b isr + + PUBLIC irq31 +irq31 + movs r0,#31 + b isr + + PUBLIC isr +isr + ldr r1,=__vector_table + ldr r0,[r0, r1] + bx r0 + + + PUBWEAK HARD_FAULT_IRQHandler + PUBWEAK SVC_IRQHandler + PUBWEAK PENDSV_IRQHandler + PUBWEAK SYSTICK_IRQHandler + PUBWEAK USB_IRQHandler + PUBWEAK IIC_IRQHandler + PUBWEAK QSPI_IRQHandler + PUBWEAK SPI0_IRQHandler + PUBWEAK SPI1_IRQHandler + PUBWEAK UART0_IRQHandler + PUBWEAK UART1_IRQHandler + PUBWEAK MEMCP_IRQHandler + PUBWEAK RSA_IRQHandler + PUBWEAK SCI0_IRQHandler + PUBWEAK SCI1_IRQHandler + PUBWEAK BT_IRQHandler + PUBWEAK GPIO_IRQHandler + PUBWEAK TIMER0_IRQHandler + PUBWEAK TIMER1_IRQHandler + PUBWEAK TIMER2_IRQHandler + PUBWEAK TIMER3_IRQHandler + PUBWEAK TIMER4_IRQHandler + PUBWEAK TIMER5_IRQHandler + PUBWEAK TIMER6_IRQHandler + PUBWEAK TIMER7_IRQHandler + PUBWEAK TIMER8_IRQHandler + PUBWEAK SM4_IRQHandler + PUBWEAK SEC_IRQHandler + PUBWEAK MSR_IRQHandler + PUBWEAK TRNG_IRQHandler + PUBWEAK WDT_IRQHandler + + +HARD_FAULT_IRQHandler +SVC_IRQHandler +PENDSV_IRQHandler +SYSTICK_IRQHandler + +USB_IRQHandler +IIC_IRQHandler +QSPI_IRQHandler +SPI0_IRQHandler +SPI1_IRQHandler +UART0_IRQHandler +UART1_IRQHandler +MEMCP_IRQHandler +RSA_IRQHandler +SCI0_IRQHandler +SCI1_IRQHandler +BT_IRQHandler +GPIO_IRQHandler +TIMER0_IRQHandler +TIMER1_IRQHandler +TIMER2_IRQHandler +TIMER3_IRQHandler +TIMER4_IRQHandler +TIMER5_IRQHandler +TIMER6_IRQHandler +TIMER7_IRQHandler +TIMER8_IRQHandler +SM4_IRQHandler +SEC_IRQHandler +MSR_IRQHandler +TRNG_IRQHandler +WDT_IRQHandler + B . + + PUBLIC delay +delay + subs r0,#1 + bne delay + nop + bx lr + + PUBLIC __vector_table + ALIGNROM 2 + data +__vector_table + DCD USB_IRQHandler + DCD IIC_IRQHandler + DCD QSPI_IRQHandler + DCD SPI0_IRQHandler + DCD SPI1_IRQHandler + DCD UART0_IRQHandler + DCD UART1_IRQHandler + DCD MEMCP_IRQHandler + DCD RSA_IRQHandler + DCD SCI0_IRQHandler + DCD SCI1_IRQHandler + DCD BT_IRQHandler + DCD GPIO_IRQHandler + DCD TIMER0_IRQHandler + DCD TIMER1_IRQHandler + DCD TIMER2_IRQHandler + DCD TIMER3_IRQHandler + DCD TIMER4_IRQHandler + DCD TIMER5_IRQHandler + DCD TIMER6_IRQHandler + DCD TIMER7_IRQHandler + DCD TIMER8_IRQHandler + DCD SM4_IRQHandler + DCD SEC_IRQHandler + DCD MSR_IRQHandler + DCD TRNG_IRQHandler + DCD WDT_IRQHandler + + + PUBLIC hardware_init + SECTION .intvec:CODE:REORDER(2) + CODE +hardware_init + LDR R0, =sfe(CSTACK) + mov sp, R0 + LDR R0, =__iar_program_start + BX R0 + END \ No newline at end of file diff --git a/bsp/yichip/yc3121-pos/Libraries/startup/startup.s b/bsp/yichip/yc3121-pos/Libraries/startup/startup.s new file mode 100644 index 0000000000..23aecc12b2 --- /dev/null +++ b/bsp/yichip/yc3121-pos/Libraries/startup/startup.s @@ -0,0 +1,175 @@ +Stack_Size EQU 0x0000100 + + AREA STACK, NOINIT, READWRITE, ALIGN=4 +Stack_Mem SPACE Stack_Size +__initial_sp EQU 0x30000 + + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x00000000 + AREA HEAP, NOINIT, READWRITE, ALIGN=4 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + + AREA RESET, DATA, READONLY + IMPORT systick + IMPORT irq0 + IMPORT irq1 + IMPORT irq2 + IMPORT irq3 + IMPORT irq4 + IMPORT irq5 + IMPORT irq6 + IMPORT irq7 + IMPORT irq8 + IMPORT irq9 + IMPORT irq10 + IMPORT irq11 + IMPORT irq12 + IMPORT irq13 + IMPORT irq14 + IMPORT irq15 + IMPORT irq16 + IMPORT irq17 + IMPORT irq18 + IMPORT irq19 + IMPORT irq20 + IMPORT irq21 + IMPORT irq22 + IMPORT irq23 + IMPORT irq24 + IMPORT irq25 + IMPORT irq26 + IMPORT irq27 + IMPORT irq28 + IMPORT irq29 + IMPORT irq30 + IMPORT irq31 + IMPORT hard_fault_handler + + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size +__Vectors DCD __initial_sp ; Top of Stack + DCD reset_handler ; Reset Handler + DCD nmi_handler ; NMI Handler + DCD hard_fault_handler ; Hard Fault Handler + DCD 0 ; + DCD 0 ; + DCD 0 ; + DCD 0 ; + DCD 0 ; + DCD 0 ; + DCD 0 ; + DCD 0 ; + DCD 0 ; + DCD 0 ; + DCD 0 ; + DCD systick ; + DCD irq0 ; + DCD irq1 ; + DCD irq2 ; + DCD irq3 ; + DCD irq4 ; + DCD irq5 ; + DCD irq6 ; + DCD irq7 ; + DCD irq8 ; + DCD irq9 ; + DCD irq10 ; + DCD irq11 ; + DCD irq12 ; + DCD irq13 ; + DCD irq14 ; + DCD irq15 ; + DCD irq16 ; + DCD irq17 ; + DCD irq18 ; + DCD irq19 ; + DCD irq20 ; + DCD irq21 ; + DCD irq22 ; + DCD irq23 ; + DCD irq24 ; + DCD irq25 ; + DCD irq26 ; + DCD irq27 ; + DCD irq28 ; + DCD irq29 ; + DCD irq30 ; + DCD irq31 ; +__Vectors_End + +__Vectors_Size EQU __Vectors_End - __Vectors + + AREA |.text|, CODE, READONLY ,ALIGN=4 + + + +; Reset Handler + +reset_handler PROC + EXPORT reset_handler [WEAK] + IMPORT Reset_Handler +; bl Reset_Handler +; movs r0,#0x3 + + LDR R0, =Reset_Handler + BX R0 + nop + ENDP + + + +delay PROC + EXPORT delay + subs r0,#1 + bne delay + nop + bx lr + ENDP + +nmi_handler PROC + EXPORT nmi_handler [WEAK] + b nmi_handler + ENDP + + ALIGN + + AREA |.INIT_STACK_HEAP|, CODE,READONLY,ALIGN=4 +; User Initial Stack & Heap + + IF :DEF:__MICROLIB + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + + ELSE + + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap + +__user_initial_stackheap PROC + LDR R0, = Heap_Mem + LDR R1, = __initial_sp + LDR R2, = (Heap_Mem + Heap_Size) + LDR R3, = Stack_Mem + BX LR + ENDP + + ALIGN + + ENDIF + + END \ No newline at end of file diff --git a/bsp/yichip/yc3121-pos/README.md b/bsp/yichip/yc3121-pos/README.md new file mode 100644 index 0000000000..490faa69a6 --- /dev/null +++ b/bsp/yichip/yc3121-pos/README.md @@ -0,0 +1,36 @@ +# YC3121-pos 板级支持包 说明 + +标签： YICHIP、Cortex-M0、YC3121、国产MCU + +--- + +## 1. 简介 + +本文档为 YC3121-pos 的 BSP(板级支持包) 说明。 + +通过阅读本文档，开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。 + +### 1.1 开发板介绍 + +YC3121-pos 开发板由易兆微提供，可满足基础测试及高端开发需求。 + +开发板外观如下图所示： + +YC3121-pos + +![YC3121-pos](figures/YC3121-pos.jpg "YC3121-pos") + +YC3121-pos 开发板板载资源如下： + +- MCU：YC3121 ARM 32-bit Cortex-M0，主频 96MHz，512KB FLASH ，64KB SRAM +- 常用外设 + - LED：4 个 + - 梯形矩阵键盘 + - 蜂鸣器 + - USB + - UART + - SPI LCD + - SPI NFC + - 7816 + - 7811 +- 调试接口：SWD diff --git a/bsp/yichip/yc3121-pos/SConscript b/bsp/yichip/yc3121-pos/SConscript new file mode 100644 index 0000000000..1b1c7506a4 --- /dev/null +++ b/bsp/yichip/yc3121-pos/SConscript @@ -0,0 +1,11 @@ +from building import * + +cwd = GetCurrentDir() + +objs = [] +list = os.listdir(cwd) +for d in list: + path = os.path.join(cwd, d) + if os.path.isfile(os.path.join(path, 'SConscript')): + objs = objs + SConscript(os.path.join(d, 'SConscript')) +Return('objs') diff --git a/bsp/yichip/yc3121-pos/SConstruct b/bsp/yichip/yc3121-pos/SConstruct new file mode 100644 index 0000000000..8418d596c0 --- /dev/null +++ b/bsp/yichip/yc3121-pos/SConstruct @@ -0,0 +1,40 @@ +import os +import sys +import rtconfig + +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') +else: + RTT_ROOT = os.path.normpath(os.getcwd() + '/../..') + +sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')] +try: + from building import * +except: + print('Cannot found RT-Thread root directory, please check RTT_ROOT') + print(RTT_ROOT) + exit(-1) + +TARGET = 'rtthread.' + rtconfig.TARGET_EXT + +DefaultEnvironment(tools=[]) +env = Environment(tools = ['mingw'], + AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS, + CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS, + AR = rtconfig.AR, ARFLAGS = '-rc', + LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS) +env.PrependENVPath('PATH', rtconfig.EXEC_PATH) + +if rtconfig.PLATFORM == 'iar': + env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES']) + env.Replace(ARFLAGS = ['']) + env.Replace(LINKCOM = env["LINKCOM"] + ' --map project.map') + +Export('RTT_ROOT') +Export('rtconfig') + +# prepare building environment +objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False) + +# make a building +DoBuilding(TARGET, objs) diff --git a/bsp/yichip/yc3121-pos/applications/SConscript b/bsp/yichip/yc3121-pos/applications/SConscript new file mode 100644 index 0000000000..6452d39145 --- /dev/null +++ b/bsp/yichip/yc3121-pos/applications/SConscript @@ -0,0 +1,9 @@ +from building import * + +cwd = GetCurrentDir() +CPPPATH = [cwd, str(Dir('#'))] +src = Glob('*.c') + +group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/bsp/yichip/yc3121-pos/applications/main.c b/bsp/yichip/yc3121-pos/applications/main.c new file mode 100644 index 0000000000..2ee0856d85 --- /dev/null +++ b/bsp/yichip/yc3121-pos/applications/main.c @@ -0,0 +1,31 @@ +/* + * Copyright (c) 2006-2021, YICHIP Technology Co.,Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-09-09 WSY first version + */ + +#include +#include +/* defined the LED pin: PA12 */ +#define LED_PIN 2 + +int main(void) +{ + int count = 1; + /* set LED4 pin mode to output */ + rt_pin_mode(LED_PIN, PIN_MODE_OUTPUT); + + while (count++) + { + rt_pin_write(LED_PIN, PIN_HIGH); + rt_thread_mdelay(500); + rt_pin_write(LED_PIN, PIN_LOW); + rt_thread_mdelay(500); + } + + return RT_EOK; +} diff --git a/bsp/yichip/yc3121-pos/drivers/Kconfig b/bsp/yichip/yc3121-pos/drivers/Kconfig new file mode 100644 index 0000000000..e0c1ca9902 --- /dev/null +++ b/bsp/yichip/yc3121-pos/drivers/Kconfig @@ -0,0 +1,22 @@ +menu "Hardware Drivers Config" + + menu "On-chip Peripheral Drivers" + config BSP_USING_GPIO + bool "Enable GPIO" + select RT_USING_PIN + default y + + menu "UART Drivers" + config BSP_USING_UART0 + bool "Enable UART0 PA2/3(R/T)" + select RT_USING_SERIAL + default y + + config BSP_USING_UART1 + bool "Enable UART1 PC2/3(R/T)" + select RT_USING_SERIAL + default n + endmenu + endmenu + +endmenu diff --git a/bsp/yichip/yc3121-pos/drivers/SConscript b/bsp/yichip/yc3121-pos/drivers/SConscript new file mode 100644 index 0000000000..df6a78e8a8 --- /dev/null +++ b/bsp/yichip/yc3121-pos/drivers/SConscript @@ -0,0 +1,25 @@ +# RT-Thread building script for component + +from building import * + +cwd = GetCurrentDir() + +# add the general drivers. +src = Split(""" +board.c +""") + +# add gpio driver code +if GetDepend(['BSP_USING_GPIO']): + src += ['drv_gpio.c'] + +# add serial driver code +if GetDepend('BSP_USING_UART0') or GetDepend('BSP_USING_UART1') or GetDepend('BSP_USING_UART2') or GetDepend('BSP_USING_UART3'): + src += ['drv_uart.c'] + + +CPPPATH = [cwd] + +group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/bsp/yichip/yc3121-pos/drivers/board.c b/bsp/yichip/yc3121-pos/drivers/board.c new file mode 100644 index 0000000000..361be18882 --- /dev/null +++ b/bsp/yichip/yc3121-pos/drivers/board.c @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2006-2021, YICHIP Technology Co.,Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-09-09 WSY first version + */ + +#include +#if defined(BSP_USING_EXT_SRAM) && defined(RT_USING_MEMHEAP_AS_HEAP) + static struct rt_memheap system_heap; +#endif +#define SystemCoreClock (48000000) + +static void bsp_clock_config(void) +{ + SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND); +} + +void SysTick_Handler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + rt_tick_increase(); + + /* leave interrupt */ + rt_interrupt_leave(); +} + +#ifdef RT_USING_SERIAL +extern int rt_hw_uart_init(void); +#endif + +void rt_hw_board_init() +{ + bsp_clock_config(); + +#if defined(RT_USING_HEAP) + rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END); +#endif + + /* UART driver initialization is open by default */ +#ifdef RT_USING_SERIAL + rt_hw_uart_init(); +#endif + +#ifdef RT_USING_CONSOLE + rt_console_set_device(RT_CONSOLE_DEVICE_NAME); +#endif + +#ifdef RT_USING_COMPONENTS_INIT + rt_components_board_init(); +#endif +} diff --git a/bsp/yichip/yc3121-pos/drivers/board.h b/bsp/yichip/yc3121-pos/drivers/board.h new file mode 100644 index 0000000000..573c6454a9 --- /dev/null +++ b/bsp/yichip/yc3121-pos/drivers/board.h @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2006-2021, YICHIP Technology Co.,Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-09-09 WSY first version + */ + +#ifndef BOARD_H__ +#define BOARD_H__ +#include +#include +#include "yc_gpio.h" +#include "yc_uart.h" +#include "yc_systick.h" +#include "misc.h" + +#define SRAM_BASE 0x20000 +#define SRAM_SIZE 0x10000 + +#ifdef BSP_USING_EXT_SRAM + #define EXT_SRAM_BASE SRAMM_BASE + #define EXT_SRAM_SIZE BSP_EXT_SRAM_SIZE + #define EXT_SRAM_BEGIN EXT_SRAM_BASE + #define EXT_SRAM_END (EXT_SRAM_BASE + EXT_SRAM_SIZE) +#endif + +#define SRAM_END (SRAM_BASE + SRAM_SIZE) +#if defined(__CC_ARM) || defined(__CLANG_ARM) + extern int Image$$RW_IRAM1$$ZI$$Limit; + #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) +#elif __ICCARM__ + #pragma section = "HEAP" + #define HEAP_BEGIN (__segment_end("HEAP")) +#else + extern int __bss_end; + #define HEAP_BEGIN ((void *)&__bss_end) +#endif +#define HEAP_END SRAM_END +#define HEAP_SIZE (HEAP_END - (rt_uint32_t)HEAP_BEGIN) +extern void rt_hw_board_init(void); +#endif diff --git a/bsp/yichip/yc3121-pos/drivers/drv_gpio.c b/bsp/yichip/yc3121-pos/drivers/drv_gpio.c new file mode 100644 index 0000000000..10ccaa548f --- /dev/null +++ b/bsp/yichip/yc3121-pos/drivers/drv_gpio.c @@ -0,0 +1,199 @@ +/* + * Copyright (c) 2006-2021, YICHIP Technology Co.,Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-09-09 WSY first version + */ + +#include +#include +#include +#include + +typedef void (*pin_callback_t)(void *args); +struct pin +{ + uint32_t package_index; + const char *name; + IRQn_Type irq; + rt_uint32_t irq_mode; + pin_callback_t callback; + void *callback_args; +}; +typedef struct pin pin_t; + +static void yc_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode) +{ + /* Configure GPIO_InitStructure */ + if (mode == PIN_MODE_OUTPUT) + { + /* output setting */ + GPIO_CONFIG(pin) = OUTPUT_LOW; + } + else if (mode == PIN_MODE_INPUT) + { + /* input setting: not pull. */ + GPIO_CONFIG(pin) = INPUT; + } + else if (mode == PIN_MODE_INPUT_PULLUP) + { + /* input setting: pull up. */ + GPIO_CONFIG(pin) = PULL_UP; + } + else if (mode == PIN_MODE_INPUT_PULLDOWN) + { + /* input setting: pull down. */ + GPIO_CONFIG(pin) = PULL_DOWN; + } + else if (mode == PIN_MODE_OUTPUT_OD) + { + /* output setting: od. */ + GPIO_CONFIG(pin) = PULL_UP; + } +} + +static void yc_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value) +{ + if (value) + { + GPIO_CONFIG(pin) = OUTPUT_HIGH; + } + else + { + GPIO_CONFIG(pin) = OUTPUT_LOW; + } +} + +static int yc_pin_read(rt_device_t dev, rt_base_t pin) +{ + return GPIO_IN(pin / 16) & (1 << (pin % 16)) ? 1 : 0; +} + +static rt_err_t yc_pin_attach_irq(struct rt_device *device, + rt_int32_t pin, + rt_uint32_t mode, + pin_callback_t cb, + void *args) +{ + pin_t *index; + rt_base_t level; + if (index == RT_NULL) + { + return RT_EINVAL; + } + level = rt_hw_interrupt_disable(); + index->callback = cb; + index->callback_args = args; + index->irq_mode = mode; + + rt_hw_interrupt_enable(level); + return RT_EOK; +} + +static rt_err_t yc_pin_detach_irq(struct rt_device *device, rt_int32_t pin) +{ + pin_t *index; + rt_base_t level; + if (index == RT_NULL) + { + return RT_EINVAL; + } + level = rt_hw_interrupt_disable(); + index->callback = 0; + index->callback_args = 0; + index->irq_mode = 0; + rt_hw_interrupt_enable(level); + return RT_EOK; +} + +static rt_err_t yc_pin_irq_enable(struct rt_device *device, + rt_base_t pin, + rt_uint32_t enabled) +{ + pin_t *index; + rt_base_t level = 0; + if (index == RT_NULL) + { + return RT_EINVAL; + } + if (enabled == PIN_IRQ_ENABLE) + { + switch (index->irq_mode) + { + case PIN_IRQ_MODE_RISING: + + break; + case PIN_IRQ_MODE_FALLING: + + break; + case PIN_IRQ_MODE_RISING_FALLING: + + break; + case PIN_IRQ_MODE_HIGH_LEVEL: + GPIO_CONFIG(pin) = PULL_DOWN; + GPIO_TRIG_MODE(pin/16) &= (1 << (pin % 16)); + break; + case PIN_IRQ_MODE_LOW_LEVEL: + GPIO_CONFIG(pin) = PULL_UP; + GPIO_TRIG_MODE(pin/16) |= (1 << (pin % 16)); + break; + default: + rt_hw_interrupt_enable(level); + return RT_EINVAL; + } + + level = rt_hw_interrupt_disable(); + NVIC_EnableIRQ(index->irq); + GPIO_INTR_EN(pin / 16) |= (1 << (pin % 16)); + rt_hw_interrupt_enable(level); + } + else if (enabled == PIN_IRQ_DISABLE) + { + NVIC_DisableIRQ(index->irq); + GPIO_INTR_EN(pin / 16) &= ~(1 << (pin % 16)); + } + else + { + return RT_ENOSYS; + } + return RT_EOK; +} + +const static struct rt_pin_ops yc3121_pin_ops = + { + yc_pin_mode, + yc_pin_write, + yc_pin_read, + yc_pin_attach_irq, + yc_pin_detach_irq, + yc_pin_irq_enable, + RT_NULL, +}; + +int rt_hw_pin_init(void) +{ + int result; + result = rt_device_pin_register("pin", &yc3121_pin_ops, RT_NULL); + return result; +} +INIT_BOARD_EXPORT(rt_hw_pin_init); + +void GPIOA_Handler(void) +{ + int i; + + /* enter interrupt */ + rt_interrupt_enter(); + + for (i = 0; i < 48; i++) + { + // if(GPIO_IN(pin / 16) & (1 << (pin % 16))) + + } + + /* leave interrupt */ + rt_interrupt_leave(); +} diff --git a/bsp/yichip/yc3121-pos/drivers/drv_gpio.h b/bsp/yichip/yc3121-pos/drivers/drv_gpio.h new file mode 100644 index 0000000000..2f0bd6ce66 --- /dev/null +++ b/bsp/yichip/yc3121-pos/drivers/drv_gpio.h @@ -0,0 +1,16 @@ +/* + * Copyright (c) 2006-2021, YICHIP Technology Co.,Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-09-09 WSY first version + */ + +#ifndef DRV_GPIO_H__ +#define DRV_GPIO_H__ + +int rt_hw_pin_init(void); + +#endif diff --git a/bsp/yichip/yc3121-pos/drivers/drv_uart.c b/bsp/yichip/yc3121-pos/drivers/drv_uart.c new file mode 100644 index 0000000000..195be621eb --- /dev/null +++ b/bsp/yichip/yc3121-pos/drivers/drv_uart.c @@ -0,0 +1,194 @@ +/* + * Copyright (c) 2006-2021, YICHIP Technology Co.,Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-09-09 WSY first version + */ + +#include +#include +#include + +struct yc3121_uart +{ + UART_TypeDef uart; + IRQn_Type irq; +}; + +static rt_err_t yc3121_uart_configure(struct rt_serial_device *serial, + struct serial_configure *cfg) +{ + struct yc3121_uart *uart; + UART_InitTypeDef UART_initStruct; + RT_ASSERT(serial != RT_NULL); + RT_ASSERT(cfg != RT_NULL); + uart = (struct yc3121_uart *)serial->parent.user_data; + NVIC_DisableIRQ(uart->irq); + UART_initStruct.BaudRate = cfg->baud_rate; + UART_initStruct.FlowCtrl = FlowCtrl_None ; + UART_initStruct.Mode = Mode_duplex; + + switch (cfg->data_bits) + { + case DATA_BITS_9: + UART_initStruct.DataBits = Databits_9b; + break; + default: + UART_initStruct.DataBits = Databits_8b; + break; + } + switch (cfg->stop_bits) + { + case STOP_BITS_2: + UART_initStruct.StopBits = StopBits_2; + break; + default: + UART_initStruct.StopBits = StopBits_1; + break; + } + switch (cfg->parity) + { + case PARITY_ODD: + UART_initStruct.Parity = Parity_Odd; + break; + case PARITY_EVEN: + UART_initStruct.Parity = Parity_Even; + break; + default: + UART_initStruct.Parity = Parity_None; + break; + } + UART_Init(uart->uart, &UART_initStruct); + return RT_EOK; +} + +static rt_err_t yc3121_uart_control(struct rt_serial_device *serial, + int cmd, void *arg) +{ + struct yc3121_uart *uart; + RT_ASSERT(serial != RT_NULL); + uart = (struct yc3121_uart *)serial->parent.user_data; + switch (cmd) + { + case RT_DEVICE_CTRL_CLR_INT: + /* disable rx irq */ + UART_SetRxITNum(uart->uart, 0); + NVIC_DisableIRQ(uart->irq); + break; + case RT_DEVICE_CTRL_SET_INT: + /* enable rx irq */ + UART_SetRxITNum(uart->uart, 1); + UART_ITConfig(uart->uart, UART_IT_RX, ENABLE); + NVIC_EnableIRQ(uart->irq); + break; + } + return RT_EOK; +} + +static int yc3121_uart_putc(struct rt_serial_device *serial, char c) +{ + struct yc3121_uart *uart; + RT_ASSERT(serial != RT_NULL); + uart = (struct yc3121_uart *)serial->parent.user_data; + while (UART_IsUARTBusy(uart->uart)); + UART_SendData(uart->uart, c); + return 1; +} + +static int yc3121_uart_getc(struct rt_serial_device *serial) +{ + int ch; + struct yc3121_uart *uart; + RT_ASSERT(serial != RT_NULL); + uart = (struct yc3121_uart *)serial->parent.user_data; + ch = -1; + if (UART_ReceiveDataLen(uart->uart) != 0) + { + ch = UART_ReceiveData(uart->uart); + } + return ch; +} + +static const struct rt_uart_ops yc3121_uart_ops = +{ + yc3121_uart_configure, + yc3121_uart_control, + yc3121_uart_putc, + yc3121_uart_getc, +}; + +#if defined(BSP_USING_UART0) +/* UART0 device driver structure */ +static struct yc3121_uart uart0; +static struct rt_serial_device serial0; +void UART0_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + /* UART in mode Receiver */ + if (UART_GetITIdentity(uart0.uart) == UART_IT_RX) + { + rt_hw_serial_isr(&serial0, RT_SERIAL_EVENT_RX_IND); + } + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif /* BSP_USING_UART0 */ + +#if defined(BSP_USING_UART1) +/* UART1 device driver structure */ +static struct yc3121_uart uart1; +static struct rt_serial_device serial1; +void UART1_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + /* UART in mode Receiver */ + if (UART_GetITIdentity(uart1.uart) == UART_IT_RX) + { + rt_hw_serial_isr(&serial1, RT_SERIAL_EVENT_RX_IND); + } + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif /* BSP_USING_UART1 */ + +int rt_hw_uart_init(void) +{ + struct yc3121_uart *uart; + struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT; +#ifdef BSP_USING_UART0 + + GPIO_CONFIG(1) = UART0_TXD; + GPIO_CONFIG(0) = UART0_RXD; + uart = &uart0; + uart->uart = UART0; + uart->irq = UART0_IRQn; + serial0.ops = &yc3121_uart_ops; + serial0.config = config; + /* register UART0 device */ + rt_hw_serial_register(&serial0, RT_CONSOLE_DEVICE_NAME, + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, + uart); +#endif /* BSP_USING_UART0 */ +#ifdef BSP_USING_UART1 + GPIO_CONFIG(1) = UART1_TXD; + GPIO_CONFIG(0) = UART1_RXD; + uart = &uart1; + uart->uart = UART1; + uart->irq = UART1_IRQn; + serial1.ops = &yc3121_uart_ops; + serial1.config = config; + /* register UART1 device */ + rt_hw_serial_register(&serial1, "uart1", + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, + uart); +#endif /* BSP_USING_UART1 */ + return 0; +} +INIT_BOARD_EXPORT(rt_hw_uart_init); diff --git a/bsp/yichip/yc3121-pos/drivers/drv_uart.h b/bsp/yichip/yc3121-pos/drivers/drv_uart.h new file mode 100644 index 0000000000..b4f84a1d93 --- /dev/null +++ b/bsp/yichip/yc3121-pos/drivers/drv_uart.h @@ -0,0 +1,16 @@ +/* + * Copyright (c) 2006-2021, YICHIP Technology Co.,Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-09-09 WSY first version + */ + +#ifndef DRV_UART_H__ +#define DRV_UART_H__ + +int rt_hw_uart_init(void); + +#endif diff --git a/bsp/yichip/yc3121-pos/drivers/linker_scripts/link.icf b/bsp/yichip/yc3121-pos/drivers/linker_scripts/link.icf new file mode 100644 index 0000000000..f58af36588 --- /dev/null +++ b/bsp/yichip/yc3121-pos/drivers/linker_scripts/link.icf @@ -0,0 +1,32 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ +/*-Specials-*/ +define symbol __ICFEDIT_intvec_start__ = 0x1000200; +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_ROM_start__ = 0x1000200; +define symbol __ICFEDIT_region_ROM_end__ = 0x1ffffff; +define symbol __ICFEDIT_region_RAM_start__ = 0x20000; +define symbol __ICFEDIT_region_RAM_end__ = 0x2FFFF; +/*-Sizes-*/ +define symbol __ICFEDIT_size_cstack__ = 0xF800; +define symbol __ICFEDIT_size_heap__ = 0x800; +/**** End of ICF editor section. ###ICF###*/ + + +define memory mem with size = 4G; +define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; +define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; + +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; +define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; + +initialize by copy { readwrite }; +//initialize by copy with packing = none { section __DLIB_PERTHREAD }; // Required in a multi-threaded application +do not initialize { section .noinit }; + +place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; + +place in ROM_region { readonly }; +place in RAM_region { readwrite, + block CSTACK, block HEAP }; \ No newline at end of file diff --git a/bsp/yichip/yc3121-pos/drivers/linker_scripts/link.lds b/bsp/yichip/yc3121-pos/drivers/linker_scripts/link.lds new file mode 100644 index 0000000000..177040fbd0 --- /dev/null +++ b/bsp/yichip/yc3121-pos/drivers/linker_scripts/link.lds @@ -0,0 +1,161 @@ +/* Linker script to configure memory regions. + * Need modifying for a specific board. + * FLASH.ORIGIN: starting address of flash + * FLASH.LENGTH: length of flash + * RAM.ORIGIN: starting address of RAM bank 0 + * RAM.LENGTH: length of RAM bank 0 + */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x1000000, LENGTH = 0x80000 /* 512K */ + RAM (rwx) : ORIGIN = 0x20000, LENGTH = 0x10000 /* 64K */ +} + +/* Linker script to place sections and symbol values. Should be used together + * with other linker script that defines memory regions FLASH and RAM. + * It references following symbols, which must be defined in code: + * Reset_Handler : Entry of reset handler + * + * It defines following symbols, which code can use without definition: + * __exidx_start + * __exidx_end + * __copy_table_start__ + * __copy_table_end__ + * __zero_table_start__ + * __zero_table_end__ + * __etext + * __data_start__ + * __preinit_array_start + * __preinit_array_end + * __init_array_start + * __init_array_end + * __fini_array_start + * __fini_array_end + * __data_end__ + * __bss_start__ + * __bss_end__ + * __end__ + * end + * __HeapLimit + * __StackLimit + * __StackTop + * __stack + */ +ENTRY(Reset_Handler) + +SECTIONS +{ + .text : + { + *flash_start*.o + *(.text*) + + KEEP(*(.init)) + KEEP(*(.fini)) + + /* .ctors */ + *crtbegin.o(.ctors) + *crtbegin?.o(.ctors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) + *(SORT(.ctors.*)) + *(.ctors) + + /* .dtors */ + *crtbegin.o(.dtors) + *crtbegin?.o(.dtors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) + *(SORT(.dtors.*)) + *(.dtors) + + *(.rodata*) + + KEEP(*(.eh_frame*)) + } > FLASH + + + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > FLASH + + + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > FLASH + + . = ALIGN(4); + __exidx_start = .; + + __etext = .; + + .data : AT (__etext) + { + __data_start__ = .; + *(vtable) + *(.data*) + + . = ALIGN(4); + /* preinit data */ + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP(*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + + . = ALIGN(4); + /* init data */ + PROVIDE_HIDDEN (__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE_HIDDEN (__init_array_end = .); + + + . = ALIGN(4); + /* finit data */ + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP(*(SORT(.fini_array.*))) + KEEP(*(.fini_array)) + PROVIDE_HIDDEN (__fini_array_end = .); + + KEEP(*(.jcr*)) + . = ALIGN(4); + /* All data end */ + __data_end__ = .; + + } > RAM + + .bss : + { + . = ALIGN(4); + __bss_start__ = .; + *(.bss*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; + } > RAM + + .heap (COPY): + { + __end__ = .; + PROVIDE(end = .); + *(.heap*) + __HeapLimit = .; + } > RAM + + /* .stack_dummy section doesn't contains any symbols. It is only + * used for linker to calculate size of stack sections, and assign + * values to stack symbols later */ + .stack_dummy (COPY): + { + *(.stack*) + } > RAM + + /* Set stack top to end of RAM, and stack limit move down by + * size of stack_dummy section */ + __StackTop = ORIGIN(RAM) + LENGTH(RAM); + __StackLimit = __StackTop - SIZEOF(.stack_dummy); + PROVIDE(__stack = __StackTop); + + /* Check if data + heap + stack exceeds RAM limit */ + ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") +} \ No newline at end of file diff --git a/bsp/yichip/yc3121-pos/drivers/linker_scripts/link.sct b/bsp/yichip/yc3121-pos/drivers/linker_scripts/link.sct new file mode 100644 index 0000000000..71ad394af9 --- /dev/null +++ b/bsp/yichip/yc3121-pos/drivers/linker_scripts/link.sct @@ -0,0 +1,32 @@ +; ************************************************************* +; *** Scatter-Loading Description File generated by uVision *** +; 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    ### uVision Project, (C) Keil Software
    + + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + rt-thread + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\build\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 7 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 4 + + + + + + + + + + + Segger\JL2CM3.dll + + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000) + + + 0 + JL2CM3 + -U788594195 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(0BB11477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8004 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO31 -FD20000 -FCA000 -FN0 + + + + + 0 + + + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + Applications + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + applications\main.c + main.c + 0 + 0 + + + + + CPU + 0 + 0 + 0 + 0 + + 2 + 2 + 1 + 0 + 0 + 0 + ..\..\..\libcpu\arm\common\showmem.c + showmem.c + 0 + 0 + + + 2 + 3 + 1 + 0 + 0 + 0 + ..\..\..\libcpu\arm\common\div0.c + div0.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\..\..\libcpu\arm\common\backtrace.c + backtrace.c + 0 + 0 + + + 2 + 5 + 1 + 0 + 0 + 0 + ..\..\..\libcpu\arm\cortex-m0\cpuport.c + cpuport.c + 0 + 0 + + + 2 + 6 + 2 + 0 + 0 + 0 + ..\..\..\libcpu\arm\cortex-m0\context_rvds.S + context_rvds.S + 0 + 0 + + + + + DeviceDrivers + 0 + 0 + 0 + 0 + + 3 + 7 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\misc\pin.c + pin.c + 0 + 0 + + + 3 + 8 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\serial\serial.c + serial.c + 0 + 0 + + + 3 + 9 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\src\ringblk_buf.c + ringblk_buf.c + 0 + 0 + + + 3 + 10 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\src\completion.c + completion.c + 0 + 0 + + + 3 + 11 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\src\workqueue.c + workqueue.c + 0 + 0 + + + 3 + 12 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\src\dataqueue.c + dataqueue.c + 0 + 0 + + + 3 + 13 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\src\ringbuffer.c + ringbuffer.c + 0 + 0 + + + 3 + 14 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\src\waitqueue.c + waitqueue.c + 0 + 0 + + + 3 + 15 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\src\pipe.c + pipe.c + 0 + 0 + + + + + Drivers + 1 + 0 + 0 + 0 + + 4 + 16 + 1 + 0 + 0 + 0 + drivers\drv_gpio.c + drv_gpio.c + 0 + 0 + + + 4 + 17 + 1 + 0 + 0 + 0 + drivers\drv_uart.c + drv_uart.c + 0 + 0 + + + 4 + 18 + 1 + 0 + 0 + 0 + drivers\board.c + board.c + 0 + 0 + + + + + Finsh + 1 + 0 + 0 + 0 + + 5 + 19 + 1 + 0 + 0 + 0 + ..\..\..\components\finsh\shell.c + shell.c + 0 + 0 + + + 5 + 20 + 1 + 0 + 0 + 0 + ..\..\..\components\finsh\msh.c + msh.c + 0 + 0 + + + 5 + 21 + 1 + 0 + 0 + 0 + ..\..\..\components\finsh\cmd.c + cmd.c + 0 + 0 + + + + + Kernel + 0 + 0 + 0 + 0 + + 6 + 22 + 1 + 0 + 0 + 0 + ..\..\..\src\components.c + components.c + 0 + 0 + + + 6 + 23 + 1 + 0 + 0 + 0 + ..\..\..\src\scheduler.c + scheduler.c + 0 + 0 + + + 6 + 24 + 1 + 0 + 0 + 0 + ..\..\..\src\idle.c + idle.c + 0 + 0 + + + 6 + 25 + 1 + 0 + 0 + 0 + ..\..\..\src\clock.c + clock.c + 0 + 0 + + + 6 + 26 + 1 + 0 + 0 + 0 + ..\..\..\src\device.c + device.c + 0 + 0 + + + 6 + 27 + 1 + 0 + 0 + 0 + ..\..\..\src\mempool.c + mempool.c + 0 + 0 + + + 6 + 28 + 1 + 0 + 0 + 0 + ..\..\..\src\kservice.c + kservice.c + 0 + 0 + + + 6 + 29 + 1 + 0 + 0 + 0 + ..\..\..\src\ipc.c + ipc.c + 0 + 0 + + + 6 + 30 + 1 + 0 + 0 + 0 + ..\..\..\src\timer.c + timer.c + 0 + 0 + + + 6 + 31 + 1 + 0 + 0 + 0 + ..\..\..\src\object.c + object.c + 0 + 0 + + + 6 + 32 + 1 + 0 + 0 + 0 + ..\..\..\src\memheap.c + memheap.c + 0 + 0 + + + 6 + 33 + 1 + 0 + 0 + 0 + ..\..\..\src\irq.c + irq.c + 0 + 0 + + + 6 + 34 + 1 + 0 + 0 + 0 + ..\..\..\src\thread.c + thread.c + 0 + 0 + + + 6 + 35 + 1 + 0 + 0 + 0 + ..\..\..\src\mem.c + mem.c + 0 + 0 + + + + + libc + 0 + 0 + 0 + 0 + + 7 + 36 + 1 + 0 + 0 + 0 + ..\..\..\components\libc\compilers\common\time.c + time.c + 0 + 0 + + + + + Libraries + 1 + 0 + 0 + 0 + + 8 + 37 + 1 + 0 + 0 + 0 + Libraries\sdk\yc_wdt.c + yc_wdt.c + 0 + 0 + + + 8 + 38 + 1 + 0 + 0 + 0 + Libraries\sdk\yc_uart.c + yc_uart.c + 0 + 0 + + + 8 + 39 + 1 + 0 + 0 + 0 + Libraries\sdk\yc_dma.c + yc_dma.c + 0 + 0 + + + 8 + 40 + 2 + 0 + 0 + 0 + Libraries\startup\flash_start.s + flash_start.s + 0 + 0 + + + 8 + 41 + 1 + 0 + 0 + 0 + Libraries\core\system.c + system.c + 0 + 0 + + + 8 + 42 + 1 + 0 + 0 + 0 + Libraries\sdk\yc_gpio.c + yc_gpio.c + 0 + 0 + + + 8 + 43 + 1 + 0 + 0 + 0 + Libraries\core\misc.c + misc.c + 0 + 0 + + + 8 + 44 + 2 + 0 + 0 + 0 + Libraries\startup\startup.s + startup.s + 0 + 0 + + + 8 + 45 + 1 + 0 + 0 + 0 + Libraries\sdk\yc_systick.c + yc_systick.c + 0 + 0 + + + 8 + 46 + 1 + 0 + 0 + 0 + Libraries\core\bt_code_boot.c + bt_code_boot.c + 0 + 0 + + + + diff --git a/bsp/yichip/yc3121-pos/project.uvprojx b/bsp/yichip/yc3121-pos/project.uvprojx new file mode 100644 index 0000000000..81b455d47b --- /dev/null +++ b/bsp/yichip/yc3121-pos/project.uvprojx @@ -0,0 +1,661 @@ + + + + 2.1 + +
    ### uVision Project, (C) Keil Software
    + + + + rt-thread + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + ARMCM0 + ARM + ARM.CMSIS.5.3.0 + http://www.keil.com/pack/ + IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000) + 0 + $$Device:ARMCM0$Device\ARM\ARMCM0\Include\ARMCM0.h + + + + + + + + + + $$Device:ARMCM0$Device\ARM\SVD\ARMCM0.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\build\keil\Obj\ + rtthread + 1 + 0 + 1 + 1 + 1 + .\build\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 1 + 0 + fromelf.exe --text -a -c --output=@L_asm.txt "!L" + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + + DARMCM1.DLL + -pCM0 + SARMCM3.DLL + + TARMCM1.DLL + -pCM0 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4100 + + 0 + Segger\JL2CM3.dll + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M0" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 8 + 0 + 1 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + __RTTHREAD__, __CLK_TCK=RT_TICK_PER_SECOND + + applications;.;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m0;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;drivers;..\..\..\components\finsh;.;..\..\..\include;..\..\..\components\libc\compilers\common;..\..\..\components\libc\compilers\common\none-gcc;Libraries\sdk;Libraries\core;Libraries;..\..\..\examples\utest\testcases\kernel + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + .\drivers\linker_scripts\link.sct + + + + + + + + + + + Applications + + + main.c + 1 + applications\main.c + + + + + CPU + + + showmem.c + 1 + ..\..\..\libcpu\arm\common\showmem.c + + + div0.c + 1 + ..\..\..\libcpu\arm\common\div0.c + + + backtrace.c + 1 + ..\..\..\libcpu\arm\common\backtrace.c + + + cpuport.c + 1 + ..\..\..\libcpu\arm\cortex-m0\cpuport.c + + + context_rvds.S + 2 + ..\..\..\libcpu\arm\cortex-m0\context_rvds.S + + + + + DeviceDrivers + + + pin.c + 1 + ..\..\..\components\drivers\misc\pin.c + + + serial.c + 1 + ..\..\..\components\drivers\serial\serial.c + + + ringblk_buf.c + 1 + ..\..\..\components\drivers\src\ringblk_buf.c + + + completion.c + 1 + ..\..\..\components\drivers\src\completion.c + + + workqueue.c + 1 + ..\..\..\components\drivers\src\workqueue.c + + + dataqueue.c + 1 + ..\..\..\components\drivers\src\dataqueue.c + + + ringbuffer.c + 1 + ..\..\..\components\drivers\src\ringbuffer.c + + + waitqueue.c + 1 + ..\..\..\components\drivers\src\waitqueue.c + + + pipe.c + 1 + ..\..\..\components\drivers\src\pipe.c + + + + + Drivers + + + drv_gpio.c + 1 + drivers\drv_gpio.c + + + drv_uart.c + 1 + drivers\drv_uart.c + + + board.c + 1 + drivers\board.c + + + + + Finsh + + + shell.c + 1 + ..\..\..\components\finsh\shell.c + + + msh.c + 1 + ..\..\..\components\finsh\msh.c + + + cmd.c + 1 + ..\..\..\components\finsh\cmd.c + + + + + Kernel + + + components.c + 1 + ..\..\..\src\components.c + + + scheduler.c + 1 + ..\..\..\src\scheduler.c + + + idle.c + 1 + ..\..\..\src\idle.c + + + clock.c + 1 + ..\..\..\src\clock.c + + + device.c + 1 + ..\..\..\src\device.c + + + mempool.c + 1 + ..\..\..\src\mempool.c + + + kservice.c + 1 + ..\..\..\src\kservice.c + + + ipc.c + 1 + ..\..\..\src\ipc.c + + + timer.c + 1 + ..\..\..\src\timer.c + + + object.c + 1 + ..\..\..\src\object.c + + + memheap.c + 1 + ..\..\..\src\memheap.c + + + irq.c + 1 + ..\..\..\src\irq.c + + + thread.c + 1 + ..\..\..\src\thread.c + + + mem.c + 1 + ..\..\..\src\mem.c + + + + + libc + + + time.c + 1 + ..\..\..\components\libc\compilers\common\time.c + + + + + Libraries + + + yc_wdt.c + 1 + Libraries\sdk\yc_wdt.c + + + yc_uart.c + 1 + Libraries\sdk\yc_uart.c + + + yc_dma.c + 1 + Libraries\sdk\yc_dma.c + + + flash_start.s + 2 + Libraries\startup\flash_start.s + + + system.c + 1 + Libraries\core\system.c + + + yc_gpio.c + 1 + Libraries\sdk\yc_gpio.c + + + misc.c + 1 + Libraries\core\misc.c + + + startup.s + 2 + Libraries\startup\startup.s + + + yc_systick.c + 1 + Libraries\sdk\yc_systick.c + + + bt_code_boot.c + 1 + Libraries\core\bt_code_boot.c + + + + + + + + + + + + + +     diff --git a/bsp/yichip/yc3121-pos/rtconfig.h b/bsp/yichip/yc3121-pos/rtconfig.h new file mode 100644 index 0000000000..d163fef848 --- /dev/null +++ b/bsp/yichip/yc3121-pos/rtconfig.h @@ -0,0 +1,178 @@ +#ifndef RT_CONFIG_H__ +#define RT_CONFIG_H__ + +/* Automatically generated file; DO NOT EDIT. */ +/* RT-Thread Configuration */ + +/* RT-Thread Kernel */ + +#define RT_NAME_MAX 8 +#define RT_ALIGN_SIZE 4 +#define RT_THREAD_PRIORITY_32 +#define RT_THREAD_PRIORITY_MAX 32 +#define RT_TICK_PER_SECOND 100 +#define RT_USING_OVERFLOW_CHECK +#define RT_USING_HOOK +#define RT_USING_IDLE_HOOK +#define RT_IDLE_HOOK_LIST_SIZE 4 +#define IDLE_THREAD_STACK_SIZE 256 + +/* kservice optimization */ + +#define RT_DEBUG +#define RT_DEBUG_COLOR + +/* Inter-Thread communication */ + +#define RT_USING_SEMAPHORE +#define RT_USING_MUTEX +#define RT_USING_EVENT +#define RT_USING_MAILBOX +#define RT_USING_MESSAGEQUEUE + +/* Memory Management */ + +#define RT_USING_MEMPOOL +#define RT_USING_MEMHEAP +#define RT_USING_SMALL_MEM +#define RT_USING_HEAP + +/* Kernel Device Object */ + +#define RT_USING_DEVICE +#define RT_USING_CONSOLE +#define RT_CONSOLEBUF_SIZE 128 +#define RT_CONSOLE_DEVICE_NAME "uart0" +#define RT_VER_NUM 0x40004 + +/* RT-Thread Components */ + +#define RT_USING_COMPONENTS_INIT +#define RT_USING_USER_MAIN +#define RT_MAIN_THREAD_STACK_SIZE 2048 +#define RT_MAIN_THREAD_PRIORITY 10 + +/* C++ features */ + + +/* Command shell */ + +#define RT_USING_FINSH +#define RT_USING_MSH +#define FINSH_USING_MSH +#define FINSH_THREAD_NAME "tshell" +#define FINSH_THREAD_PRIORITY 20 +#define FINSH_THREAD_STACK_SIZE 4096 +#define FINSH_USING_HISTORY +#define FINSH_HISTORY_LINES 5 +#define FINSH_USING_SYMTAB +#define FINSH_CMD_SIZE 80 +#define MSH_USING_BUILT_IN_COMMANDS +#define FINSH_USING_DESCRIPTION +#define FINSH_ARG_MAX 10 + +/* Device virtual file system */ + + +/* Device Drivers */ + +#define RT_USING_DEVICE_IPC +#define RT_PIPE_BUFSZ 512 +#define RT_USING_SERIAL +#define RT_USING_SERIAL_V1 +#define RT_SERIAL_RB_BUFSZ 64 +#define RT_USING_PIN + +/* Using USB */ + + +/* POSIX layer and C standard library */ + +#define RT_LIBC_USING_TIME +#define RT_LIBC_DEFAULT_TIMEZONE 8 + +/* Network */ + +/* Socket abstraction layer */ + + +/* Network interface device */ + + +/* light weight TCP/IP stack */ + + +/* AT commands */ + + +/* VBUS(Virtual Software BUS) */ + + +/* Utilities */ + + +/* RT-Thread Utestcases */ + + +/* RT-Thread online packages */ + +/* IoT - internet of things */ + + +/* Wi-Fi */ + +/* Marvell WiFi */ + + +/* Wiced WiFi */ + + +/* IoT Cloud */ + + +/* security packages */ + + +/* language packages */ + + +/* multimedia packages */ + + +/* tools packages */ + + +/* system packages */ + +/* acceleration: Assembly language or algorithmic acceleration packages */ + + +/* Micrium: Micrium software products porting for RT-Thread */ + + +/* peripheral libraries and drivers */ + + +/* AI packages */ + + +/* miscellaneous packages */ + +/* samples: kernel and components samples */ + + +/* entertainment: terminal games and other interesting software packages */ + +#define SOC_SWM320VET7 + +/* Hardware Drivers Config */ + +/* On-chip Peripheral Drivers */ + +#define BSP_USING_GPIO + +/* UART Drivers */ + +#define BSP_USING_UART0 + +#endif diff --git a/bsp/yichip/yc3121-pos/rtconfig.py b/bsp/yichip/yc3121-pos/rtconfig.py new file mode 100644 index 0000000000..f07430c42e --- /dev/null +++ b/bsp/yichip/yc3121-pos/rtconfig.py @@ -0,0 +1,152 @@ +# BSP Note: For TI EK-TM4C1294XL Tiva C Series Connected LancuhPad (REV D) + +import os +import sys +# toolchains options +ARCH='arm' +CPU='cortex-m0' +CROSS_TOOL='gcc' + +# device options +BSP_LIBRARY_TYPE = None + +if os.getenv('RTT_CC'): + CROSS_TOOL = os.getenv('RTT_CC') +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') + + +# cross_tool provides the cross compiler +# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR +if CROSS_TOOL == 'gcc': + PLATFORM = 'gcc' + EXEC_PATH = 'C:\gcc-arm-none-eabi-7-2018-q2-update-win32' +elif CROSS_TOOL == 'keil': + PLATFORM = 'armcc' + EXEC_PATH = 'C:/Keil_v5' +elif CROSS_TOOL == 'iar': + PLATFORM = 'iar' + EXEC_PATH = 'C:/Program Files (x86)/IAR Systems/Embedded Workbench 7.2' + +if os.getenv('RTT_EXEC_PATH'): + EXEC_PATH = os.getenv('RTT_EXEC_PATH') + +BUILD = 'debug' + +if PLATFORM == 'gcc': + # toolchains + PREFIX = 'arm-none-eabi-' + CC = PREFIX + 'gcc' + CXX = PREFIX + 'g++' + AS = PREFIX + 'gcc' + AR = PREFIX + 'ar' + LINK = PREFIX + 'gcc' + TARGET_EXT = 'elf' + SIZE = PREFIX + 'size' + OBJDUMP = PREFIX + 'objdump' + OBJCPY = PREFIX + 'objcopy' + + DEVICE = ' -mcpu=cortex-m0 -mthumb -ffunction-sections -fdata-sections' + CFLAGS = DEVICE + ' -Dgcc' + AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb ' + LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rt-thread.map,-cref,-u,Reset_Handler -T drivers/linker_scripts/link.lds' + + CPATH = '' + LPATH = '' + + if BUILD == 'debug': + CFLAGS += ' -O0 -gdwarf-2 -g' + AFLAGS += ' -gdwarf-2' + else: + CFLAGS += ' -O2' + + CXXFLAGS = CFLAGS + + POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n' + +elif PLATFORM == 'armcc': + # toolchains + CC = 'armcc' + AS = 'armasm' + AR = 'armar' + LINK = 'armlink' + TARGET_EXT = 'axf' + + DEVICE = ' --cpu Cortex-M0 ' + CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99' + AFLAGS = DEVICE + ' --apcs=interwork ' + LFLAGS = DEVICE + ' --scatter "drivers\linker_scripts\link.sct" --info sizes --info totals --info unused --info veneers --list rt-thread.map --strict' + CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include' + LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib' + + CFLAGS += ' -D__MICROLIB ' + AFLAGS += ' --pd "__MICROLIB SETA 1" ' + LFLAGS += ' --library_type=microlib ' + EXEC_PATH += '/ARM/ARMCC/bin/' + + if BUILD == 'debug': + CFLAGS += ' -g -O0' + AFLAGS += ' -g' + else: + CFLAGS += ' -O2' + + CXXFLAGS = CFLAGS + CFLAGS += ' -std=c99' + + POST_ACTION = 'fromelf.exe --text -a -c --output=@L_asm.txt "!L" \nfromelf -z $TARGET' + +elif PLATFORM == 'iar': + # toolchains + CC = 'iccarm' + CXX = 'iccarm' + AS = 'iasmarm' + AR = 'iarchive' + LINK = 'ilinkarm' + TARGET_EXT = 'out' + + DEVICE = '-Dewarm' + + CFLAGS = DEVICE + CFLAGS += ' --diag_suppress Pa050' + CFLAGS += ' --no_cse' + CFLAGS += ' --no_unroll' + CFLAGS += ' --no_inline' + CFLAGS += ' --no_code_motion' + CFLAGS += ' --no_tbaa' + CFLAGS += ' --no_clustering' + CFLAGS += ' --no_scheduling' + CFLAGS += ' --endian=little' + CFLAGS += ' --cpu=Cortex-M0' + CFLAGS += ' -e' + CFLAGS += ' --fpu=None' + CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"' + CFLAGS += ' --silent' + + AFLAGS = DEVICE + AFLAGS += ' -s+' + AFLAGS += ' -w+' + AFLAGS += ' -r' + AFLAGS += ' --cpu Cortex-M0' + AFLAGS += ' --fpu None' + AFLAGS += ' -S' + + if BUILD == 'debug': + CFLAGS += ' --debug' + CFLAGS += ' -On' + else: + CFLAGS += ' -Oh' + + LFLAGS = ' --config "drivers/linker_scripts/link.icf"' + LFLAGS += ' --entry __iar_program_start' + + CXXFLAGS = CFLAGS + + EXEC_PATH = EXEC_PATH + '/arm/bin/' + POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT, dist_dir): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT, dist_dir) diff --git a/bsp/yichip/yc3121-pos/rtthread_asm.txt b/bsp/yichip/yc3121-pos/rtthread_asm.txt new file mode 100644 index 0000000000..88b0881675 --- /dev/null +++ b/bsp/yichip/yc3121-pos/rtthread_asm.txt @@ -0,0 +1,14979 @@ + +======================================================================== + +** ELF Header Information + + File Name: .\build\keil\Obj\rtthread.axf + + Machine class: ELFCLASS32 (32-bit) + Data encoding: ELFDATA2LSB (Little endian) + Header version: EV_CURRENT (Current version) + Operating System ABI: none + ABI Version: 0 + File Type: ET_EXEC (Executable) (2) + Machine: EM_ARM (ARM) + + Image Entry point: 0x01000401 + Flags: EF_ARM_HASENTRY + EF_ARM_ABI_FLOAT_SOFT (0x05000202) + + ARM ELF revision: 5 (ABI version 2) + + Conforms to Soft float procedure-call standard + + Built with + Component: ARM Compiler 5.06 update 6 (build 750) Tool: armasm [4d35ec] + Component: ARM Compiler 5.06 update 6 (build 750) Tool: armlink [4d35ed] + + Header size: 52 bytes (0x34) + Program header entry size: 32 bytes (0x20) + Section header entry size: 40 bytes (0x28) + + Program header entries: 3 + Section header entries: 19 + + Program header offset: 384436 (0x0005ddb4) + Section header offset: 384532 (0x0005de14) + + Section header string table index: 18 + +======================================================================== + +** Program header #0 (PT_LOAD) [PF_R] + Size : 192 bytes + Virtual address: 0x00000000 (Alignment 4) + + +==================================== + +** Program header #1 (PT_LOAD) [PF_X + PF_R] + Size : 372 bytes + Virtual address: 0x01000200 (Alignment 16) + + +==================================== + +** Program header #2 (PT_LOAD) [PF_X + PF_W + PF_R + PF_ARM_ENTRY] + Size : 36628 bytes (32872 bytes in file) + Virtual address: 0x01000400 (Alignment 16) + + +======================================================================== + +** Section #1 'ER_IROM1' (SHT_PROGBITS) [SHF_ALLOC] + Size : 192 bytes (alignment 4) + Address: 0x00000000 + + +** Section #2 'ER_IROM3' (SHT_PROGBITS) [SHF_ALLOC + SHF_EXECINSTR] + Size : 320 bytes (alignment 16) + Address: 0x01000200 + + $t + .flash_start + Reset_Handler + 0x01000200: 4849 IH LDR r0,[pc,#292] ; [0x1000328] = 0x1000401 + 0x01000202: 4700 .G BX r0 + hard_fault_handler + 0x01000204: 4849 IH LDR r0,[pc,#292] ; [0x100032c] = 0x100056d + 0x01000206: 4700 .G BX r0 + 0x01000208: bf00 .. NOP + svc_handler + 0x0100020a: 4849 IH LDR r0,[pc,#292] ; [0x1000330] = 0x10002a9 + 0x0100020c: 4700 .G BX r0 + 0x0100020e: bf00 .. NOP + pendsv_handler + 0x01000210: 4848 HH LDR r0,[pc,#288] ; [0x1000334] = 0x10004eb + 0x01000212: 4700 .G BX r0 + 0x01000214: bf00 .. NOP + systick + 0x01000216: 4848 HH LDR r0,[pc,#288] ; [0x1000338] = 0x1000b09 + 0x01000218: 4700 .G BX r0 + 0x0100021a: bf00 .. NOP + irq0 + 0x0100021c: 2000 . MOVS r0,#0 + 0x0100021e: e03d =. B isr ; 0x100029c + irq1 + 0x01000220: 2004 . MOVS r0,#4 + 0x01000222: e03b ;. B isr ; 0x100029c + irq2 + 0x01000224: 2008 . MOVS r0,#8 + 0x01000226: e039 9. B isr ; 0x100029c + irq3 + 0x01000228: 200c . MOVS r0,#0xc + 0x0100022a: e037 7. B isr ; 0x100029c + irq4 + 0x0100022c: 2010 . MOVS r0,#0x10 + 0x0100022e: e035 5. B isr ; 0x100029c + irq5 + 0x01000230: 2014 . MOVS r0,#0x14 + 0x01000232: e033 3. B isr ; 0x100029c + irq6 + 0x01000234: 2018 . MOVS r0,#0x18 + 0x01000236: e031 1. B isr ; 0x100029c + irq7 + 0x01000238: 201c . MOVS r0,#0x1c + 0x0100023a: e02f /. B isr ; 0x100029c + irq8 + 0x0100023c: 2020 MOVS r0,#0x20 + 0x0100023e: e02d -. B isr ; 0x100029c + irq9 + 0x01000240: 2024 $ MOVS r0,#0x24 + 0x01000242: e02b +. B isr ; 0x100029c + irq10 + 0x01000244: 2028 ( MOVS r0,#0x28 + 0x01000246: e029 ). B isr ; 0x100029c + irq11 + 0x01000248: 202c , MOVS r0,#0x2c + 0x0100024a: e027 '. B isr ; 0x100029c + irq12 + 0x0100024c: 2030 0 MOVS r0,#0x30 + 0x0100024e: e025 %. B isr ; 0x100029c + irq13 + 0x01000250: 2034 4 MOVS r0,#0x34 + 0x01000252: e023 #. B isr ; 0x100029c + irq14 + 0x01000254: 2038 8 MOVS r0,#0x38 + 0x01000256: e021 !. B isr ; 0x100029c + irq15 + 0x01000258: 203c < MOVS r0,#0x3c + 0x0100025a: e01f .. B isr ; 0x100029c + irq16 + 0x0100025c: 2040 @ MOVS r0,#0x40 + 0x0100025e: e01d .. B isr ; 0x100029c + irq17 + 0x01000260: 2044 D MOVS r0,#0x44 + 0x01000262: e01b .. B isr ; 0x100029c + irq18 + 0x01000264: 2048 H MOVS r0,#0x48 + 0x01000266: e019 .. B isr ; 0x100029c + irq19 + 0x01000268: 204c L MOVS r0,#0x4c + 0x0100026a: e017 .. B isr ; 0x100029c + irq20 + 0x0100026c: 2050 P MOVS r0,#0x50 + 0x0100026e: e015 .. B isr ; 0x100029c + irq21 + 0x01000270: 2054 T MOVS r0,#0x54 + 0x01000272: e013 .. B isr ; 0x100029c + irq22 + 0x01000274: 2058 X MOVS r0,#0x58 + 0x01000276: e011 .. B isr ; 0x100029c + irq23 + 0x01000278: 205c \ MOVS r0,#0x5c + 0x0100027a: e00f .. B isr ; 0x100029c + irq24 + 0x0100027c: 2060 ` MOVS r0,#0x60 + 0x0100027e: e00d .. B isr ; 0x100029c + irq25 + 0x01000280: 2064 d MOVS r0,#0x64 + 0x01000282: e00b .. B isr ; 0x100029c + irq26 + 0x01000284: 2068 h MOVS r0,#0x68 + 0x01000286: e009 .. B isr ; 0x100029c + irq27 + 0x01000288: 206c l MOVS r0,#0x6c + 0x0100028a: e007 .. B isr ; 0x100029c + irq28 + 0x0100028c: 2070 p MOVS r0,#0x70 + 0x0100028e: e005 .. B isr ; 0x100029c + irq29 + 0x01000290: 2074 t MOVS r0,#0x74 + 0x01000292: e003 .. B isr ; 0x100029c + irq30 + 0x01000294: 2078 x MOVS r0,#0x78 + 0x01000296: e001 .. B isr ; 0x100029c + irq31 + 0x01000298: 207c | MOVS r0,#0x7c + 0x0100029a: 46c0 .F MOV r8,r8 + isr + 0x0100029c: 4927 'I LDR r1,[pc,#156] ; [0x100033c] = 0x10002bc + 0x0100029e: 5840 @X LDR r0,[r0,r1] + 0x010002a0: 4700 .G BX r0 + $d + 0x010002a2: 0000 .. DCW 0 + $t + NMI_IRQHandler + 0x010002a4: e7fe .. B NMI_IRQHandler ; 0x10002a4 + HARD_FAULT_IRQHandler + 0x010002a6: e7fe .. B HARD_FAULT_IRQHandler ; 0x10002a6 + SVC_IRQHandler + 0x010002a8: e7fe .. B SVC_IRQHandler ; 0x10002a8 + PENDSV_IRQHandler + 0x010002aa: e7fe .. B PENDSV_IRQHandler ; 0x10002aa + SYSTICK_IRQHandler + 0x010002ac: e7fe .. B SYSTICK_IRQHandler ; 0x10002ac + EXTI0_IRQHandler + 0x010002ae: e7fe .. B EXTI0_IRQHandler ; 0x10002ae + EXTI1_IRQHandler + 0x010002b0: e7fe .. B EXTI1_IRQHandler ; 0x10002b0 + EXTI2_IRQHandler + 0x010002b2: e7fe .. B EXTI2_IRQHandler ; 0x10002b2 + EXTI3_IRQHandler + 0x010002b4: e7fe .. B EXTI3_IRQHandler ; 0x10002b4 + EXTI4_IRQHandler + 0x010002b6: e7fe .. B EXTI4_IRQHandler ; 0x10002b6 + EXTI5_IRQHandler + 0x010002b8: e7fe .. B EXTI5_IRQHandler ; 0x10002b8 + BT_IRQHandler + GPIO_IRQHandler + IIC_IRQHandler + MEMCP_IRQHandler + MSR_IRQHandler + QSPI_IRQHandler + RSA_IRQHandler + SCI0_IRQHandler + SCI1_IRQHandler + SEC_IRQHandler + SM4_IRQHandler + SPI0_IRQHandler + SPI1_IRQHandler + TIMER0_IRQHandler + TIMER1_IRQHandler + TIMER2_IRQHandler + TIMER3_IRQHandler + TIMER4_IRQHandler + TIMER5_IRQHandler + TIMER6_IRQHandler + TIMER7_IRQHandler + TIMER8_IRQHandler + TRNG_IRQHandler + UART1_IRQHandler + USB_IRQHandler + WDT_IRQHandler + 0x010002ba: e7fe .. B BT_IRQHandler ; 0x10002ba + $d + isr_table + 0x010002bc: 010002bb .... DCD 16777915 + 0x010002c0: 010002bb .... DCD 16777915 + 0x010002c4: 010002bb .... DCD 16777915 + 0x010002c8: 010002bb .... DCD 16777915 + 0x010002cc: 010002bb .... DCD 16777915 + 0x010002d0: 01000b19 .... DCD 16780057 + 0x010002d4: 010002bb .... DCD 16777915 + 0x010002d8: 010002bb .... DCD 16777915 + 0x010002dc: 010002bb .... DCD 16777915 + 0x010002e0: 010002bb .... DCD 16777915 + 0x010002e4: 010002bb .... DCD 16777915 + 0x010002e8: 010002bb .... DCD 16777915 + 0x010002ec: 010002bb .... DCD 16777915 + 0x010002f0: 010002bb .... DCD 16777915 + 0x010002f4: 010002bb .... DCD 16777915 + 0x010002f8: 010002bb .... DCD 16777915 + 0x010002fc: 010002bb .... DCD 16777915 + 0x01000300: 010002bb .... DCD 16777915 + 0x01000304: 010002bb .... DCD 16777915 + 0x01000308: 010002bb .... DCD 16777915 + 0x0100030c: 010002bb .... DCD 16777915 + 0x01000310: 010002bb .... DCD 16777915 + 0x01000314: 010002bb .... DCD 16777915 + 0x01000318: 010002bb .... DCD 16777915 + 0x0100031c: 010002bb .... DCD 16777915 + 0x01000320: 010002bb .... DCD 16777915 + 0x01000324: 010002bb .... DCD 16777915 + 0x01000328: 01000401 .... DCD 16778241 + 0x0100032c: 0100056d m... DCD 16778605 + 0x01000330: 010002a9 .... DCD 16777897 + 0x01000334: 010004eb .... DCD 16778475 + 0x01000338: 01000b09 .... DCD 16780041 + 0x0100033c: 010002bc .... DCD 16777916 + +** Section #3 'ER_IROM3_1' (SHT_PROGBITS) [SHF_ALLOC + SHF_EXECINSTR] + Size : 52 bytes (alignment 16) + Address: 0x01000340 + + $t + .INIT_STACK_HEAP + __user_initial_stackheap + 0x01000340: 4802 .H LDR r0,[pc,#8] ; [0x100034c] = 0x20e10 + 0x01000342: 4903 .I LDR r1,[pc,#12] ; [0x1000350] = 0x30000 + 0x01000344: 4a01 .J LDR r2,[pc,#4] ; [0x100034c] = 0x20e10 + 0x01000346: 4b03 .K LDR r3,[pc,#12] ; [0x1000354] = 0x20e10 + 0x01000348: 4770 pG BX lr + $d + 0x0100034a: 0000 .. DCW 0 + 0x0100034c: 00020e10 .... DCD 134672 + 0x01000350: 00030000 .... DCD 196608 + 0x01000354: 00020e10 .... DCD 134672 + 0x01000358: 00000000 .... DCD 0 + 0x0100035c: 00000000 .... DCD 0 + $t + .text + reset_handler + 0x01000360: 4803 .H LDR r0,[pc,#12] ; [0x1000370] = 0x1000201 + 0x01000362: 4700 .G BX r0 + 0x01000364: bf00 .. NOP + delay + 0x01000366: 3801 .8 SUBS r0,#1 + 0x01000368: d1fd .. BNE delay ; 0x1000366 + 0x0100036a: bf00 .. NOP + 0x0100036c: 4770 pG BX lr + nmi_handler + 0x0100036e: e7fe .. B nmi_handler ; 0x100036e + $d + 0x01000370: 01000201 .... DCD 16777729 + +** Section #4 'ER_IROM4' (SHT_PROGBITS) [SHF_ALLOC + SHF_EXECINSTR] + Size : 32772 bytes (alignment 4) + Address: 0x01000400 + + $t + !!!main + __main + 0x01000400: f000f802 .... BL __scatterload ; 0x1000408 + 0x01000404: f000f830 ..0. BL __rt_entry ; 0x1000468 + !!!scatter + __scatterload + __scatterload_rt2 + __scatterload_rt2_thumb_only + 0x01000408: a00c .. ADR r0,{pc}+0x34 ; 0x100043c + 0x0100040a: c830 0. LDM r0!,{r4,r5} + 0x0100040c: 3808 .8 SUBS r0,r0,#8 + 0x0100040e: 1824 $. ADDS r4,r4,r0 + 0x01000410: 182d -. ADDS r5,r5,r0 + 0x01000412: 46a2 .F MOV r10,r4 + 0x01000414: 1e67 g. SUBS r7,r4,#1 + 0x01000416: 46ab .F MOV r11,r5 + __scatterload_null + 0x01000418: 4654 TF MOV r4,r10 + 0x0100041a: 465d ]F MOV r5,r11 + 0x0100041c: 42ac .B CMP r4,r5 + 0x0100041e: d101 .. BNE 0x1000424 ; __scatterload_null + 12 + 0x01000420: f000f822 ..". BL __rt_entry ; 0x1000468 + 0x01000424: 467e ~F MOV r6,pc + 0x01000426: 3e0f .> SUBS r6,r6,#0xf + 0x01000428: cc0f .. LDM r4!,{r0-r3} + 0x0100042a: 46b6 .F MOV lr,r6 + 0x0100042c: 2601 .& MOVS r6,#1 + 0x0100042e: 4233 3B TST r3,r6 + 0x01000430: d000 .. BEQ 0x1000434 ; __scatterload_null + 28 + 0x01000432: 1afb .. SUBS r3,r7,r3 + 0x01000434: 46a2 .F MOV r10,r4 + 0x01000436: 46ab .F MOV r11,r5 + 0x01000438: 4333 3C ORRS r3,r3,r6 + 0x0100043a: 4718 .G BX r3 + $d + 0x0100043c: 00007fa8 .... DCD 32680 + 0x01000440: 00007fc8 .... DCD 32712 + $t + !!handler_zi + __scatterload_zeroinit + 0x01000444: 2300 .# MOVS r3,#0 + 0x01000446: 2400 .$ MOVS r4,#0 + 0x01000448: 2500 .% MOVS r5,#0 + 0x0100044a: 2600 .& MOVS r6,#0 + 0x0100044c: 3a10 .: SUBS r2,r2,#0x10 + 0x0100044e: d301 .. BCC 0x1000454 ; __scatterload_zeroinit + 16 + 0x01000450: c178 x. STM r1!,{r3-r6} + 0x01000452: d8fb .. BHI 0x100044c ; __scatterload_zeroinit + 8 + 0x01000454: 0752 R. LSLS r2,r2,#29 + 0x01000456: d300 .. BCC 0x100045a ; __scatterload_zeroinit + 22 + 0x01000458: c130 0. STM r1!,{r4,r5} + 0x0100045a: d500 .. BPL 0x100045e ; __scatterload_zeroinit + 26 + 0x0100045c: 600b .` STR r3,[r1,#0] + 0x0100045e: 4770 pG BX lr + .ARM.Collect$$libinit$$00000000 + __rt_lib_init + 0x01000460: b51f .. PUSH {r0-r4,lr} + .ARM.Collect$$libinit$$00000002 + .ARM.Collect$$libinit$$00000004 + .ARM.Collect$$libinit$$0000000A + .ARM.Collect$$libinit$$0000000C + .ARM.Collect$$libinit$$0000000E + .ARM.Collect$$libinit$$00000011 + .ARM.Collect$$libinit$$00000013 + .ARM.Collect$$libinit$$00000015 + .ARM.Collect$$libinit$$00000017 + .ARM.Collect$$libinit$$00000019 + .ARM.Collect$$libinit$$0000001B + .ARM.Collect$$libinit$$0000001D + .ARM.Collect$$libinit$$0000001F + .ARM.Collect$$libinit$$00000021 + .ARM.Collect$$libinit$$00000023 + .ARM.Collect$$libinit$$00000025 + .ARM.Collect$$libinit$$0000002C + .ARM.Collect$$libinit$$0000002E + .ARM.Collect$$libinit$$00000030 + .ARM.Collect$$libinit$$00000032 + .ARM.Collect$$libinit$$00000033 + __rt_lib_init_alloca_1 + __rt_lib_init_argv_1 + __rt_lib_init_atexit_1 + __rt_lib_init_clock_1 + __rt_lib_init_cpp_1 + __rt_lib_init_exceptions_1 + __rt_lib_init_fp_1 + __rt_lib_init_fp_trap_1 + __rt_lib_init_getenv_1 + __rt_lib_init_heap_1 + __rt_lib_init_lc_collate_1 + __rt_lib_init_lc_ctype_1 + __rt_lib_init_lc_monetary_1 + __rt_lib_init_lc_numeric_1 + __rt_lib_init_lc_time_1 + __rt_lib_init_preinit_1 + __rt_lib_init_rand_1 + __rt_lib_init_return + __rt_lib_init_signal_1 + __rt_lib_init_stdio_1 + __rt_lib_init_user_alloc_1 + 0x01000462: bd1f .. POP {r0-r4,pc} + .ARM.Collect$$libshutdown$$00000000 + __rt_lib_shutdown + 0x01000464: b510 .. PUSH {r4,lr} + .ARM.Collect$$libshutdown$$00000002 + .ARM.Collect$$libshutdown$$00000004 + .ARM.Collect$$libshutdown$$00000007 + .ARM.Collect$$libshutdown$$0000000A + .ARM.Collect$$libshutdown$$0000000C + .ARM.Collect$$libshutdown$$0000000F + .ARM.Collect$$libshutdown$$00000010 + __rt_lib_shutdown_cpp_1 + __rt_lib_shutdown_fp_trap_1 + __rt_lib_shutdown_heap_1 + __rt_lib_shutdown_return + __rt_lib_shutdown_signal_1 + __rt_lib_shutdown_stdio_1 + __rt_lib_shutdown_user_alloc_1 + 0x01000466: bd10 .. POP {r4,pc} + .ARM.Collect$$rtentry$$00000000 + .ARM.Collect$$rtentry$$00000002 + .ARM.Collect$$rtentry$$00000004 + __rt_entry + __rt_entry_presh_1 + __rt_entry_sh + 0x01000468: f000fab0 .... BL __user_setup_stackheap ; 0x10009cc + 0x0100046c: 4611 .F MOV r1,r2 + .ARM.Collect$$rtentry$$00000009 + .ARM.Collect$$rtentry$$0000000A + __rt_entry_li + __rt_entry_postsh_1 + 0x0100046e: f7fffff7 .... BL __rt_lib_init ; 0x1000460 + .ARM.Collect$$rtentry$$0000000C + .ARM.Collect$$rtentry$$0000000D + __rt_entry_main + __rt_entry_postli_1 + 0x01000472: f000fb09 .... BL main ; 0x1000a88 + 0x01000476: f000fac8 .... BL exit ; 0x1000a0a + .ARM.Collect$$rtexit$$00000000 + __rt_exit + 0x0100047a: b403 .. PUSH {r0,r1} + .ARM.Collect$$rtexit$$00000002 + .ARM.Collect$$rtexit$$00000003 + __rt_exit_ls + __rt_exit_prels_1 + 0x0100047c: f7fffff2 .... BL __rt_lib_shutdown ; 0x1000464 + .ARM.Collect$$rtexit$$00000004 + __rt_exit_exit + 0x01000480: bc03 .. POP {r0,r1} + 0x01000482: f000facf .... BL _sys_exit ; 0x1000a24 + 0x01000486: 0000 .. MOVS r0,r0 + .emb_text + __aeabi_memcpy4 + __aeabi_memcpy8 + 0x01000488: b570 p. PUSH {r4-r6,lr} + 0x0100048a: 4605 .F MOV r5,r0 + 0x0100048c: 460c .F MOV r4,r1 + 0x0100048e: 4616 .F MOV r6,r2 + 0x01000490: e002 .. B 0x1000498 ; __aeabi_memcpy4 + 16 + 0x01000492: cc0f .. LDM r4!,{r0-r3} + 0x01000494: c50f .. STM r5!,{r0-r3} + 0x01000496: 3e10 .> SUBS r6,r6,#0x10 + 0x01000498: 2e10 .. CMP r6,#0x10 + 0x0100049a: d2fa .. BCS 0x1000492 ; __aeabi_memcpy4 + 10 + 0x0100049c: 2e08 .. CMP r6,#8 + 0x0100049e: d302 .. BCC 0x10004a6 ; __aeabi_memcpy4 + 30 + 0x010004a0: cc03 .. LDM r4!,{r0,r1} + 0x010004a2: c503 .. STM r5!,{r0,r1} + 0x010004a4: 3e08 .> SUBS r6,r6,#8 + 0x010004a6: 2e04 .. CMP r6,#4 + 0x010004a8: d307 .. BCC 0x10004ba ; __aeabi_memcpy4 + 50 + 0x010004aa: cc01 .. LDM r4!,{r0} + 0x010004ac: c501 .. STM r5!,{r0} + 0x010004ae: 1f36 6. SUBS r6,r6,#4 + 0x010004b0: e003 .. B 0x10004ba ; __aeabi_memcpy4 + 50 + 0x010004b2: 7821 !x LDRB r1,[r4,#0] + 0x010004b4: 7029 )p STRB r1,[r5,#0] + 0x010004b6: 1c64 d. ADDS r4,r4,#1 + 0x010004b8: 1c6d m. ADDS r5,r5,#1 + 0x010004ba: 1e76 v. SUBS r6,r6,#1 + 0x010004bc: d2f9 .. BCS 0x10004b2 ; __aeabi_memcpy4 + 42 + 0x010004be: bd70 p. POP {r4-r6,pc} + .text + rt_hw_interrupt_disable + 0x010004c0: f3ef8010 .... MRS r0,PRIMASK + 0x010004c4: b672 r. CPSID i + 0x010004c6: 4770 pG BX lr + rt_hw_interrupt_enable + 0x010004c8: f3808810 .... MSR PRIMASK,r0 + 0x010004cc: 4770 pG BX lr + rt_hw_context_switch + rt_hw_context_switch_interrupt + 0x010004ce: 4a2a *J LDR r2,[pc,#168] ; [0x1000578] = 0x20008 + 0x010004d0: 6813 .h LDR r3,[r2,#0] + 0x010004d2: 2b01 .+ CMP r3,#1 + 0x010004d4: d003 .. BEQ 0x10004de ; rt_hw_context_switch + 16 + 0x010004d6: 2301 .# MOVS r3,#1 + 0x010004d8: 6013 .` STR r3,[r2,#0] + 0x010004da: 4a28 (J LDR r2,[pc,#160] ; [0x100057c] = 0x20000 + 0x010004dc: 6010 .` STR r0,[r2,#0] + 0x010004de: 4a28 (J LDR r2,[pc,#160] ; [0x1000580] = 0x20004 + 0x010004e0: 6011 .` STR r1,[r2,#0] + 0x010004e2: 4828 (H LDR r0,[pc,#160] ; [0x1000584] = 0xe000ed04 + 0x010004e4: 4928 (I LDR r1,[pc,#160] ; [0x1000588] = 0x10000000 + 0x010004e6: 6001 .` STR r1,[r0,#0] + 0x010004e8: 4770 pG BX lr + PendSV_Handler + 0x010004ea: f3ef8210 .... MRS r2,PRIMASK + 0x010004ee: b672 r. CPSID i + 0x010004f0: 4821 !H LDR r0,[pc,#132] ; [0x1000578] = 0x20008 + 0x010004f2: 6801 .h LDR r1,[r0,#0] + 0x010004f4: 2900 .) CMP r1,#0 + 0x010004f6: d01d .. BEQ 0x1000534 ; PendSV_Handler + 74 + 0x010004f8: 2100 .! MOVS r1,#0 + 0x010004fa: 6001 .` STR r1,[r0,#0] + 0x010004fc: 481f .H LDR r0,[pc,#124] ; [0x100057c] = 0x20000 + 0x010004fe: 6801 .h LDR r1,[r0,#0] + 0x01000500: 2900 .) CMP r1,#0 + 0x01000502: d00a .. BEQ 0x100051a ; PendSV_Handler + 48 + 0x01000504: f3ef8109 .... MRS r1,PSP + 0x01000508: 3920 9 SUBS r1,r1,#0x20 + 0x0100050a: 6800 .h LDR r0,[r0,#0] + 0x0100050c: 6001 .` STR r1,[r0,#0] + 0x0100050e: c1f0 .. STM r1!,{r4-r7} + 0x01000510: 4644 DF MOV r4,r8 + 0x01000512: 464d MF MOV r5,r9 + 0x01000514: 4656 VF MOV r6,r10 + 0x01000516: 465f _F MOV r7,r11 + 0x01000518: c1f0 .. STM r1!,{r4-r7} + 0x0100051a: 4919 .I LDR r1,[pc,#100] ; [0x1000580] = 0x20004 + 0x0100051c: 6809 .h LDR r1,[r1,#0] + 0x0100051e: 6809 .h LDR r1,[r1,#0] + 0x01000520: c9f0 .. LDM r1!,{r4-r7} + 0x01000522: b4f0 .. PUSH {r4-r7} + 0x01000524: c9f0 .. LDM r1!,{r4-r7} + 0x01000526: 46a0 .F MOV r8,r4 + 0x01000528: 46a9 .F MOV r9,r5 + 0x0100052a: 46b2 .F MOV r10,r6 + 0x0100052c: 46bb .F MOV r11,r7 + 0x0100052e: bcf0 .. POP {r4-r7} + 0x01000530: f3818809 .... MSR PSP,r1 + 0x01000534: f3828810 .... MSR PRIMASK,r2 + 0x01000538: 2004 . MOVS r0,#4 + 0x0100053a: 4240 @B RSBS r0,r0,#0 + 0x0100053c: 4700 .G BX r0 + rt_hw_context_switch_to + 0x0100053e: 4910 .I LDR r1,[pc,#64] ; [0x1000580] = 0x20004 + 0x01000540: 6008 .` STR r0,[r1,#0] + 0x01000542: 490e .I LDR r1,[pc,#56] ; [0x100057c] = 0x20000 + 0x01000544: 2000 . MOVS r0,#0 + 0x01000546: 6008 .` STR r0,[r1,#0] + 0x01000548: 490b .I LDR r1,[pc,#44] ; [0x1000578] = 0x20008 + 0x0100054a: 2001 . MOVS r0,#1 + 0x0100054c: 6008 .` STR r0,[r1,#0] + 0x0100054e: 480f .H LDR r0,[pc,#60] ; [0x100058c] = 0xe000ed20 + 0x01000550: 490f .I LDR r1,[pc,#60] ; [0x1000590] = 0xffff0000 + 0x01000552: 6802 .h LDR r2,[r0,#0] + 0x01000554: 4311 .C ORRS r1,r1,r2 + 0x01000556: 6001 .` STR r1,[r0,#0] + 0x01000558: 480a .H LDR r0,[pc,#40] ; [0x1000584] = 0xe000ed04 + 0x0100055a: 490b .I LDR r1,[pc,#44] ; [0x1000588] = 0x10000000 + 0x0100055c: 6001 .` STR r1,[r0,#0] + 0x0100055e: 480d .H LDR r0,[pc,#52] ; [0x1000594] = 0xe000ed08 + 0x01000560: 6800 .h LDR r0,[r0,#0] + 0x01000562: 6800 .h LDR r0,[r0,#0] + 0x01000564: f3808808 .... MSR MSP,r0 + 0x01000568: b662 b. CPSIE i + rt_hw_interrupt_thread_switch + 0x0100056a: 4770 pG BX lr + HardFault_Handler + 0x0100056c: f3ef8009 .... MRS r0,PSP + 0x01000570: b500 .. PUSH {lr} + 0x01000572: f003fdd1 .... BL rt_hw_hard_fault_exception ; 0x1004118 + 0x01000576: bd00 .. POP {pc} + $d + 0x01000578: 00020008 .... DCD 131080 + 0x0100057c: 00020000 .... DCD 131072 + 0x01000580: 00020004 .... DCD 131076 + 0x01000584: e000ed04 .... DCD 3758157060 + 0x01000588: 10000000 .... DCD 268435456 + 0x0100058c: e000ed20 ... DCD 3758157088 + 0x01000590: ffff0000 .... DCD 4294901760 + 0x01000594: e000ed08 .... DCD 3758157064 + $t + .text + memcmp + 0x01000598: 4603 .F MOV r3,r0 + 0x0100059a: b510 .. PUSH {r4,lr} + 0x0100059c: 430b .C ORRS r3,r3,r1 + 0x0100059e: 079b .. LSLS r3,r3,#30 + 0x010005a0: d10f .. BNE 0x10005c2 ; memcmp + 42 + 0x010005a2: 2a04 .* CMP r2,#4 + 0x010005a4: d30d .. BCC 0x10005c2 ; memcmp + 42 + 0x010005a6: c808 .. LDM r0!,{r3} + 0x010005a8: c910 .. LDM r1!,{r4} + 0x010005aa: 1f12 .. SUBS r2,r2,#4 + 0x010005ac: 42a3 .B CMP r3,r4 + 0x010005ae: d0f8 .. BEQ 0x10005a2 ; memcmp + 10 + 0x010005b0: ba18 .. REV r0,r3 + 0x010005b2: ba21 !. REV r1,r4 + 0x010005b4: 4288 .B CMP r0,r1 + 0x010005b6: d901 .. BLS 0x10005bc ; memcmp + 36 + 0x010005b8: 2001 . MOVS r0,#1 + 0x010005ba: bd10 .. POP {r4,pc} + 0x010005bc: 2000 . MOVS r0,#0 + 0x010005be: 43c0 .C MVNS r0,r0 + 0x010005c0: bd10 .. POP {r4,pc} + 0x010005c2: 2a00 .* CMP r2,#0 + 0x010005c4: d003 .. BEQ 0x10005ce ; memcmp + 54 + 0x010005c6: 07d3 .. LSLS r3,r2,#31 + 0x010005c8: d003 .. BEQ 0x10005d2 ; memcmp + 58 + 0x010005ca: 1c52 R. ADDS r2,r2,#1 + 0x010005cc: e007 .. B 0x10005de ; memcmp + 70 + 0x010005ce: 2000 . MOVS r0,#0 + 0x010005d0: bd10 .. POP {r4,pc} + 0x010005d2: 7803 .x LDRB r3,[r0,#0] + 0x010005d4: 780c .x LDRB r4,[r1,#0] + 0x010005d6: 1c40 @. ADDS r0,r0,#1 + 0x010005d8: 1c49 I. ADDS r1,r1,#1 + 0x010005da: 1b1b .. SUBS r3,r3,r4 + 0x010005dc: d107 .. BNE 0x10005ee ; memcmp + 86 + 0x010005de: 7803 .x LDRB r3,[r0,#0] + 0x010005e0: 780c .x LDRB r4,[r1,#0] + 0x010005e2: 1c40 @. ADDS r0,r0,#1 + 0x010005e4: 1c49 I. ADDS r1,r1,#1 + 0x010005e6: 1b1b .. SUBS r3,r3,r4 + 0x010005e8: d101 .. BNE 0x10005ee ; memcmp + 86 + 0x010005ea: 1e92 .. SUBS r2,r2,#2 + 0x010005ec: d1f1 .. BNE 0x10005d2 ; memcmp + 58 + 0x010005ee: 4618 .F MOV r0,r3 + 0x010005f0: bd10 .. POP {r4,pc} + 0x010005f2: 0000 .. MOVS r0,r0 + .text + strcpy + 0x010005f4: 4603 .F MOV r3,r0 + 0x010005f6: b570 p. PUSH {r4-r6,lr} + 0x010005f8: 4602 .F MOV r2,r0 + 0x010005fa: 430b .C ORRS r3,r3,r1 + 0x010005fc: 079b .. LSLS r3,r3,#30 + 0x010005fe: d10f .. BNE 0x1000620 ; strcpy + 44 + 0x01000600: 4c0e .L LDR r4,[pc,#56] ; [0x100063c] = 0x1010101 + 0x01000602: 01e6 .. LSLS r6,r4,#7 + 0x01000604: e000 .. B 0x1000608 ; strcpy + 20 + 0x01000606: c208 .. STM r2!,{r3} + 0x01000608: c908 .. LDM r1!,{r3} + 0x0100060a: 1b1d .. SUBS r5,r3,r4 + 0x0100060c: 439d .C BICS r5,r5,r3 + 0x0100060e: 4235 5B TST r5,r6 + 0x01000610: d0f9 .. BEQ 0x1000606 ; strcpy + 18 + 0x01000612: b2d9 .. UXTB r1,r3 + 0x01000614: 7011 .p STRB r1,[r2,#0] + 0x01000616: 1c52 R. ADDS r2,r2,#1 + 0x01000618: 2900 .) CMP r1,#0 + 0x0100061a: d00d .. BEQ 0x1000638 ; strcpy + 68 + 0x0100061c: 0a1b .. LSRS r3,r3,#8 + 0x0100061e: e7f8 .. B 0x1000612 ; strcpy + 30 + 0x01000620: 780b .x LDRB r3,[r1,#0] + 0x01000622: 1c49 I. ADDS r1,r1,#1 + 0x01000624: 7013 .p STRB r3,[r2,#0] + 0x01000626: 1c52 R. ADDS r2,r2,#1 + 0x01000628: 2b00 .+ CMP r3,#0 + 0x0100062a: d005 .. BEQ 0x1000638 ; strcpy + 68 + 0x0100062c: 780b .x LDRB r3,[r1,#0] + 0x0100062e: 1c49 I. ADDS r1,r1,#1 + 0x01000630: 7013 .p STRB r3,[r2,#0] + 0x01000632: 1c52 R. ADDS r2,r2,#1 + 0x01000634: 2b00 .+ CMP r3,#0 + 0x01000636: d1f3 .. BNE 0x1000620 ; strcpy + 44 + 0x01000638: bd70 p. POP {r4-r6,pc} + $d + 0x0100063a: 0000 .. DCW 0 + 0x0100063c: 01010101 .... DCD 16843009 + $t + .text + strlen + 0x01000640: b530 0. PUSH {r4,r5,lr} + 0x01000642: 1c44 D. ADDS r4,r0,#1 + 0x01000644: e003 .. B 0x100064e ; strlen + 14 + 0x01000646: 7801 .x LDRB r1,[r0,#0] + 0x01000648: 1c40 @. ADDS r0,r0,#1 + 0x0100064a: 2900 .) CMP r1,#0 + 0x0100064c: d00d .. BEQ 0x100066a ; strlen + 42 + 0x0100064e: 0781 .. LSLS r1,r0,#30 + 0x01000650: d1f9 .. BNE 0x1000646 ; strlen + 6 + 0x01000652: 4b0b .K LDR r3,[pc,#44] ; [0x1000680] = 0x1010101 + 0x01000654: 01dd .. LSLS r5,r3,#7 + 0x01000656: c804 .. LDM r0!,{r2} + 0x01000658: 1ad1 .. SUBS r1,r2,r3 + 0x0100065a: 4391 .C BICS r1,r1,r2 + 0x0100065c: 4029 )@ ANDS r1,r1,r5 + 0x0100065e: d0fa .. BEQ 0x1000656 ; strlen + 22 + 0x01000660: 1b00 .. SUBS r0,r0,r4 + 0x01000662: 060a .. LSLS r2,r1,#24 + 0x01000664: d003 .. BEQ 0x100066e ; strlen + 46 + 0x01000666: 1ec0 .. SUBS r0,r0,#3 + 0x01000668: bd30 0. POP {r4,r5,pc} + 0x0100066a: 1b00 .. SUBS r0,r0,r4 + 0x0100066c: bd30 0. POP {r4,r5,pc} + 0x0100066e: 040a .. LSLS r2,r1,#16 + 0x01000670: d001 .. BEQ 0x1000676 ; strlen + 54 + 0x01000672: 1e80 .. SUBS r0,r0,#2 + 0x01000674: bd30 0. POP {r4,r5,pc} + 0x01000676: 0209 .. LSLS r1,r1,#8 + 0x01000678: d0fc .. BEQ 0x1000674 ; strlen + 52 + 0x0100067a: 1e40 @. SUBS r0,r0,#1 + 0x0100067c: bd30 0. POP {r4,r5,pc} + $d + 0x0100067e: 0000 .. DCW 0 + 0x01000680: 01010101 .... DCD 16843009 + $t + .text + strncmp + 0x01000684: 4603 .F MOV r3,r0 + 0x01000686: b5f0 .. PUSH {r4-r7,lr} + 0x01000688: 430b .C ORRS r3,r3,r1 + 0x0100068a: 079b .. LSLS r3,r3,#30 + 0x0100068c: d12d -. BNE 0x10006ea ; strncmp + 102 + 0x0100068e: 4d24 $M LDR r5,[pc,#144] ; [0x1000720] = 0x1010101 + 0x01000690: 01ef .. LSLS r7,r5,#7 + 0x01000692: 2a04 .* CMP r2,#4 + 0x01000694: d329 ). BCC 0x10006ea ; strncmp + 102 + 0x01000696: c808 .. LDM r0!,{r3} + 0x01000698: c910 .. LDM r1!,{r4} + 0x0100069a: 1b5e ^. SUBS r6,r3,r5 + 0x0100069c: 439e .C BICS r6,r6,r3 + 0x0100069e: 1f12 .. SUBS r2,r2,#4 + 0x010006a0: 403e >@ ANDS r6,r6,r7 + 0x010006a2: d017 .. BEQ 0x10006d4 ; strncmp + 80 + 0x010006a4: b2d8 .. UXTB r0,r3 + 0x010006a6: b2e1 .. UXTB r1,r4 + 0x010006a8: 1a40 @. SUBS r0,r0,r1 + 0x010006aa: 0631 1. LSLS r1,r6,#24 + 0x010006ac: 4301 .C ORRS r1,r1,r0 + 0x010006ae: d110 .. BNE 0x10006d2 ; strncmp + 78 + 0x010006b0: b298 .. UXTH r0,r3 + 0x010006b2: b2a1 .. UXTH r1,r4 + 0x010006b4: 1a40 @. SUBS r0,r0,r1 + 0x010006b6: 0431 1. LSLS r1,r6,#16 + 0x010006b8: 4301 .C ORRS r1,r1,r0 + 0x010006ba: d10a .. BNE 0x10006d2 ; strncmp + 78 + 0x010006bc: 0218 .. LSLS r0,r3,#8 + 0x010006be: 0221 !. LSLS r1,r4,#8 + 0x010006c0: 0a00 .. LSRS r0,r0,#8 + 0x010006c2: 0a09 .. LSRS r1,r1,#8 + 0x010006c4: 1a40 @. SUBS r0,r0,r1 + 0x010006c6: 0231 1. LSLS r1,r6,#8 + 0x010006c8: 4301 .C ORRS r1,r1,r0 + 0x010006ca: d102 .. BNE 0x10006d2 ; strncmp + 78 + 0x010006cc: 0e18 .. LSRS r0,r3,#24 + 0x010006ce: 0e21 !. LSRS r1,r4,#24 + 0x010006d0: 1a40 @. SUBS r0,r0,r1 + 0x010006d2: bdf0 .. POP {r4-r7,pc} + 0x010006d4: 42a3 .B CMP r3,r4 + 0x010006d6: d0dc .. BEQ 0x1000692 ; strncmp + 14 + 0x010006d8: ba18 .. REV r0,r3 + 0x010006da: ba21 !. REV r1,r4 + 0x010006dc: 4288 .B CMP r0,r1 + 0x010006de: d901 .. BLS 0x10006e4 ; strncmp + 96 + 0x010006e0: 2001 . MOVS r0,#1 + 0x010006e2: bdf0 .. POP {r4-r7,pc} + 0x010006e4: 2000 . MOVS r0,#0 + 0x010006e6: 43c0 .C MVNS r0,r0 + 0x010006e8: bdf0 .. POP {r4-r7,pc} + 0x010006ea: 2a00 .* CMP r2,#0 + 0x010006ec: d101 .. BNE 0x10006f2 ; strncmp + 110 + 0x010006ee: 2000 . MOVS r0,#0 + 0x010006f0: bdf0 .. POP {r4-r7,pc} + 0x010006f2: 7803 .x LDRB r3,[r0,#0] + 0x010006f4: 780c .x LDRB r4,[r1,#0] + 0x010006f6: 1c40 @. ADDS r0,r0,#1 + 0x010006f8: 1c49 I. ADDS r1,r1,#1 + 0x010006fa: 2b00 .+ CMP r3,#0 + 0x010006fc: d00d .. BEQ 0x100071a ; strncmp + 150 + 0x010006fe: 42a3 .B CMP r3,r4 + 0x01000700: d10b .. BNE 0x100071a ; strncmp + 150 + 0x01000702: 1e52 R. SUBS r2,r2,#1 + 0x01000704: d009 .. BEQ 0x100071a ; strncmp + 150 + 0x01000706: 7803 .x LDRB r3,[r0,#0] + 0x01000708: 780c .x LDRB r4,[r1,#0] + 0x0100070a: 1c40 @. ADDS r0,r0,#1 + 0x0100070c: 1c49 I. ADDS r1,r1,#1 + 0x0100070e: 2b00 .+ CMP r3,#0 + 0x01000710: d003 .. BEQ 0x100071a ; strncmp + 150 + 0x01000712: 42a3 .B CMP r3,r4 + 0x01000714: d101 .. BNE 0x100071a ; strncmp + 150 + 0x01000716: 1e52 R. SUBS r2,r2,#1 + 0x01000718: d1eb .. BNE 0x10006f2 ; strncmp + 110 + 0x0100071a: 1b18 .. SUBS r0,r3,r4 + 0x0100071c: bdf0 .. POP {r4-r7,pc} + $d + 0x0100071e: 0000 .. DCW 0 + 0x01000720: 01010101 .... DCD 16843009 + $t + .text + strcat + 0x01000724: 1e42 B. SUBS r2,r0,#1 + 0x01000726: 7853 Sx LDRB r3,[r2,#1] + 0x01000728: 1c52 R. ADDS r2,r2,#1 + 0x0100072a: 2b00 .+ CMP r3,#0 + 0x0100072c: d1fb .. BNE 0x1000726 ; strcat + 2 + 0x0100072e: 780b .x LDRB r3,[r1,#0] + 0x01000730: 1c49 I. ADDS r1,r1,#1 + 0x01000732: 7013 .p STRB r3,[r2,#0] + 0x01000734: 1c52 R. ADDS r2,r2,#1 + 0x01000736: 2b00 .+ CMP r3,#0 + 0x01000738: d1f9 .. BNE 0x100072e ; strcat + 10 + 0x0100073a: 4770 pG BX lr + .text + __aeabi_memcpy + __rt_memcpy + 0x0100073c: b5f8 .. PUSH {r3-r7,lr} + 0x0100073e: 2a04 .* CMP r2,#4 + 0x01000740: d32c ,. BCC 0x100079c ; __aeabi_memcpy + 96 + 0x01000742: 0783 .. LSLS r3,r0,#30 + 0x01000744: d012 .. BEQ 0x100076c ; __aeabi_memcpy + 48 + 0x01000746: 780b .x LDRB r3,[r1,#0] + 0x01000748: 1c49 I. ADDS r1,r1,#1 + 0x0100074a: 7003 .p STRB r3,[r0,#0] + 0x0100074c: 1c40 @. ADDS r0,r0,#1 + 0x0100074e: 1e52 R. SUBS r2,r2,#1 + 0x01000750: 0783 .. LSLS r3,r0,#30 + 0x01000752: d00b .. BEQ 0x100076c ; __aeabi_memcpy + 48 + 0x01000754: 780b .x LDRB r3,[r1,#0] + 0x01000756: 1c49 I. ADDS r1,r1,#1 + 0x01000758: 7003 .p STRB r3,[r0,#0] + 0x0100075a: 1c40 @. ADDS r0,r0,#1 + 0x0100075c: 1e52 R. SUBS r2,r2,#1 + 0x0100075e: 0783 .. LSLS r3,r0,#30 + 0x01000760: d004 .. BEQ 0x100076c ; __aeabi_memcpy + 48 + 0x01000762: 780b .x LDRB r3,[r1,#0] + 0x01000764: 1c49 I. ADDS r1,r1,#1 + 0x01000766: 7003 .p STRB r3,[r0,#0] + 0x01000768: 1c40 @. ADDS r0,r0,#1 + 0x0100076a: 1e52 R. SUBS r2,r2,#1 + 0x0100076c: 078b .. LSLS r3,r1,#30 + 0x0100076e: 0f9b .. LSRS r3,r3,#30 + 0x01000770: d005 .. BEQ 0x100077e ; __aeabi_memcpy + 66 + 0x01000772: 1ac9 .. SUBS r1,r1,r3 + 0x01000774: 00df .. LSLS r7,r3,#3 + 0x01000776: 2320 # MOVS r3,#0x20 + 0x01000778: 1bde .. SUBS r6,r3,r7 + 0x0100077a: c908 .. LDM r1!,{r3} + 0x0100077c: e00a .. B 0x1000794 ; __aeabi_memcpy + 88 + 0x0100077e: f7fffe83 .... BL __aeabi_memcpy4 ; 0x1000488 + 0x01000782: bdf8 .. POP {r3-r7,pc} + 0x01000784: 461d .F MOV r5,r3 + 0x01000786: c908 .. LDM r1!,{r3} + 0x01000788: 40fd .@ LSRS r5,r5,r7 + 0x0100078a: 461c .F MOV r4,r3 + 0x0100078c: 40b4 .@ LSLS r4,r4,r6 + 0x0100078e: 432c ,C ORRS r4,r4,r5 + 0x01000790: c010 .. STM r0!,{r4} + 0x01000792: 1f12 .. SUBS r2,r2,#4 + 0x01000794: 2a04 .* CMP r2,#4 + 0x01000796: d2f5 .. BCS 0x1000784 ; __aeabi_memcpy + 72 + 0x01000798: 08f3 .. LSRS r3,r6,#3 + 0x0100079a: 1ac9 .. SUBS r1,r1,r3 + 0x0100079c: 1e52 R. SUBS r2,r2,#1 + 0x0100079e: d4f0 .. BMI 0x1000782 ; __aeabi_memcpy + 70 + 0x010007a0: 780b .x LDRB r3,[r1,#0] + 0x010007a2: 1c49 I. ADDS r1,r1,#1 + 0x010007a4: 7003 .p STRB r3,[r0,#0] + 0x010007a6: 1c40 @. ADDS r0,r0,#1 + 0x010007a8: 1e52 R. SUBS r2,r2,#1 + 0x010007aa: d4ea .. BMI 0x1000782 ; __aeabi_memcpy + 70 + 0x010007ac: 780b .x LDRB r3,[r1,#0] + 0x010007ae: 1c49 I. ADDS r1,r1,#1 + 0x010007b0: 7003 .p STRB r3,[r0,#0] + 0x010007b2: 1c40 @. ADDS r0,r0,#1 + 0x010007b4: 2a01 .* CMP r2,#1 + 0x010007b6: d4e4 .. BMI 0x1000782 ; __aeabi_memcpy + 70 + 0x010007b8: 7809 .x LDRB r1,[r1,#0] + 0x010007ba: 7001 .p STRB r1,[r0,#0] + 0x010007bc: bdf8 .. POP {r3-r7,pc} + .text + _memset_w + 0x010007be: e001 .. B 0x10007c4 ; _memset_w + 6 + 0x010007c0: c004 .. STM r0!,{r2} + 0x010007c2: 1f09 .. SUBS r1,r1,#4 + 0x010007c4: 2904 .) CMP r1,#4 + 0x010007c6: d2fb .. BCS 0x10007c0 ; _memset_w + 2 + 0x010007c8: 078b .. LSLS r3,r1,#30 + 0x010007ca: d501 .. BPL 0x10007d0 ; _memset_w + 18 + 0x010007cc: 8002 .. STRH r2,[r0,#0] + 0x010007ce: 1c80 .. ADDS r0,r0,#2 + 0x010007d0: 07c9 .. LSLS r1,r1,#31 + 0x010007d2: d000 .. BEQ 0x10007d6 ; _memset_w + 24 + 0x010007d4: 7002 .p STRB r2,[r0,#0] + 0x010007d6: 4770 pG BX lr + _memset + 0x010007d8: 2900 .) CMP r1,#0 + 0x010007da: d00b .. BEQ 0x10007f4 ; _memset + 28 + 0x010007dc: 07c3 .. LSLS r3,r0,#31 + 0x010007de: d002 .. BEQ 0x10007e6 ; _memset + 14 + 0x010007e0: 7002 .p STRB r2,[r0,#0] + 0x010007e2: 1c40 @. ADDS r0,r0,#1 + 0x010007e4: 1e49 I. SUBS r1,r1,#1 + 0x010007e6: 2902 .) CMP r1,#2 + 0x010007e8: d304 .. BCC 0x10007f4 ; _memset + 28 + 0x010007ea: 0783 .. LSLS r3,r0,#30 + 0x010007ec: d502 .. BPL 0x10007f4 ; _memset + 28 + 0x010007ee: 8002 .. STRH r2,[r0,#0] + 0x010007f0: 1c80 .. ADDS r0,r0,#2 + 0x010007f2: 1e89 .. SUBS r1,r1,#2 + 0x010007f4: e7e3 .. B _memset_w ; 0x10007be + __aeabi_memclr + __rt_memclr + 0x010007f6: 2200 ." MOVS r2,#0 + 0x010007f8: e7ee .. B _memset ; 0x10007d8 + __aeabi_memclr4 + __aeabi_memclr8 + __rt_memclr_w + 0x010007fa: 2200 ." MOVS r2,#0 + 0x010007fc: e7df .. B _memset_w ; 0x10007be + 0x010007fe: 0000 .. MOVS r0,r0 + .text + strncpy + 0x01000800: b5f8 .. PUSH {r3-r7,lr} + 0x01000802: 4607 .F MOV r7,r0 + 0x01000804: 460b .F MOV r3,r1 + 0x01000806: 4639 9F MOV r1,r7 + 0x01000808: 4319 .C ORRS r1,r1,r3 + 0x0100080a: 0789 .. LSLS r1,r1,#30 + 0x0100080c: d113 .. BNE 0x1000836 ; strncpy + 54 + 0x0100080e: 4c16 .L LDR r4,[pc,#88] ; [0x1000868] = 0x1010101 + 0x01000810: 01e6 .. LSLS r6,r4,#7 + 0x01000812: 2a04 .* CMP r2,#4 + 0x01000814: d30f .. BCC 0x1000836 ; strncpy + 54 + 0x01000816: cb02 .. LDM r3!,{r1} + 0x01000818: 1b0d .. SUBS r5,r1,r4 + 0x0100081a: 438d .C BICS r5,r5,r1 + 0x0100081c: 4235 5B TST r5,r6 + 0x0100081e: d102 .. BNE 0x1000826 ; strncpy + 38 + 0x01000820: c002 .. STM r0!,{r1} + 0x01000822: 1f12 .. SUBS r2,r2,#4 + 0x01000824: e7f5 .. B 0x1000812 ; strncpy + 18 + 0x01000826: b2cb .. UXTB r3,r1 + 0x01000828: 7003 .p STRB r3,[r0,#0] + 0x0100082a: 1c40 @. ADDS r0,r0,#1 + 0x0100082c: 1e52 R. SUBS r2,r2,#1 + 0x0100082e: 2b00 .+ CMP r3,#0 + 0x01000830: d013 .. BEQ 0x100085a ; strncpy + 90 + 0x01000832: 0a09 .. LSRS r1,r1,#8 + 0x01000834: e7f7 .. B 0x1000826 ; strncpy + 38 + 0x01000836: 2a00 .* CMP r2,#0 + 0x01000838: d014 .. BEQ 0x1000864 ; strncpy + 100 + 0x0100083a: 7819 .x LDRB r1,[r3,#0] + 0x0100083c: 1e52 R. SUBS r2,r2,#1 + 0x0100083e: 1c5b [. ADDS r3,r3,#1 + 0x01000840: 7001 .p STRB r1,[r0,#0] + 0x01000842: 1c40 @. ADDS r0,r0,#1 + 0x01000844: 2900 .) CMP r1,#0 + 0x01000846: d008 .. BEQ 0x100085a ; strncpy + 90 + 0x01000848: 2a00 .* CMP r2,#0 + 0x0100084a: d00b .. BEQ 0x1000864 ; strncpy + 100 + 0x0100084c: 7819 .x LDRB r1,[r3,#0] + 0x0100084e: 1e52 R. SUBS r2,r2,#1 + 0x01000850: 1c5b [. ADDS r3,r3,#1 + 0x01000852: 7001 .p STRB r1,[r0,#0] + 0x01000854: 1c40 @. ADDS r0,r0,#1 + 0x01000856: 2900 .) CMP r1,#0 + 0x01000858: d1ed .. BNE 0x1000836 ; strncpy + 54 + 0x0100085a: 2a00 .* CMP r2,#0 + 0x0100085c: d002 .. BEQ 0x1000864 ; strncpy + 100 + 0x0100085e: 4611 .F MOV r1,r2 + 0x01000860: f7ffffc9 .... BL __aeabi_memclr ; 0x10007f6 + 0x01000864: 4638 8F MOV r0,r7 + 0x01000866: bdf8 .. POP {r3-r7,pc} + $d + 0x01000868: 01010101 .... DCD 16843009 + $t + .text + __aeabi_uidiv + __aeabi_uidivmod + 0x0100086c: 2200 ." MOVS r2,#0 + 0x0100086e: 0903 .. LSRS r3,r0,#4 + 0x01000870: 428b .B CMP r3,r1 + 0x01000872: d32c ,. BCC 0x10008ce ; __aeabi_idiv + 78 + 0x01000874: 0a03 .. LSRS r3,r0,#8 + 0x01000876: 428b .B CMP r3,r1 + 0x01000878: d311 .. BCC 0x100089e ; __aeabi_idiv + 30 + 0x0100087a: 2300 .# MOVS r3,#0 + 0x0100087c: 469c .F MOV r12,r3 + 0x0100087e: e04e N. B 0x100091e ; __aeabi_idiv + 158 + __aeabi_idiv + __aeabi_idivmod + 0x01000880: 4603 .F MOV r3,r0 + 0x01000882: 430b .C ORRS r3,r3,r1 + 0x01000884: d43c <. BMI 0x1000900 ; __aeabi_idiv + 128 + 0x01000886: 2200 ." MOVS r2,#0 + 0x01000888: 0843 C. LSRS r3,r0,#1 + 0x0100088a: 428b .B CMP r3,r1 + 0x0100088c: d331 1. BCC 0x10008f2 ; __aeabi_idiv + 114 + 0x0100088e: 0903 .. LSRS r3,r0,#4 + 0x01000890: 428b .B CMP r3,r1 + 0x01000892: d31c .. BCC 0x10008ce ; __aeabi_idiv + 78 + 0x01000894: 0a03 .. LSRS r3,r0,#8 + 0x01000896: 428b .B CMP r3,r1 + 0x01000898: d301 .. BCC 0x100089e ; __aeabi_idiv + 30 + 0x0100089a: 4694 .F MOV r12,r2 + 0x0100089c: e03f ?. B 0x100091e ; __aeabi_idiv + 158 + 0x0100089e: 09c3 .. LSRS r3,r0,#7 + 0x010008a0: 428b .B CMP r3,r1 + 0x010008a2: d301 .. BCC 0x10008a8 ; __aeabi_idiv + 40 + 0x010008a4: 01cb .. LSLS r3,r1,#7 + 0x010008a6: 1ac0 .. SUBS r0,r0,r3 + 0x010008a8: 4152 RA ADCS r2,r2,r2 + 0x010008aa: 0983 .. LSRS r3,r0,#6 + 0x010008ac: 428b .B CMP r3,r1 + 0x010008ae: d301 .. BCC 0x10008b4 ; __aeabi_idiv + 52 + 0x010008b0: 018b .. LSLS r3,r1,#6 + 0x010008b2: 1ac0 .. SUBS r0,r0,r3 + 0x010008b4: 4152 RA ADCS r2,r2,r2 + 0x010008b6: 0943 C. LSRS r3,r0,#5 + 0x010008b8: 428b .B CMP r3,r1 + 0x010008ba: d301 .. BCC 0x10008c0 ; __aeabi_idiv + 64 + 0x010008bc: 014b K. LSLS r3,r1,#5 + 0x010008be: 1ac0 .. SUBS r0,r0,r3 + 0x010008c0: 4152 RA ADCS r2,r2,r2 + 0x010008c2: 0903 .. LSRS r3,r0,#4 + 0x010008c4: 428b .B CMP r3,r1 + 0x010008c6: d301 .. BCC 0x10008cc ; __aeabi_idiv + 76 + 0x010008c8: 010b .. LSLS r3,r1,#4 + 0x010008ca: 1ac0 .. SUBS r0,r0,r3 + 0x010008cc: 4152 RA ADCS r2,r2,r2 + 0x010008ce: 08c3 .. LSRS r3,r0,#3 + 0x010008d0: 428b .B CMP r3,r1 + 0x010008d2: d301 .. BCC 0x10008d8 ; __aeabi_idiv + 88 + 0x010008d4: 00cb .. LSLS r3,r1,#3 + 0x010008d6: 1ac0 .. SUBS r0,r0,r3 + 0x010008d8: 4152 RA ADCS r2,r2,r2 + 0x010008da: 0883 .. LSRS r3,r0,#2 + 0x010008dc: 428b .B CMP r3,r1 + 0x010008de: d301 .. BCC 0x10008e4 ; __aeabi_idiv + 100 + 0x010008e0: 008b .. LSLS r3,r1,#2 + 0x010008e2: 1ac0 .. SUBS r0,r0,r3 + 0x010008e4: 4152 RA ADCS r2,r2,r2 + 0x010008e6: 0843 C. LSRS r3,r0,#1 + 0x010008e8: 428b .B CMP r3,r1 + 0x010008ea: d301 .. BCC 0x10008f0 ; __aeabi_idiv + 112 + 0x010008ec: 004b K. LSLS r3,r1,#1 + 0x010008ee: 1ac0 .. SUBS r0,r0,r3 + 0x010008f0: 4152 RA ADCS r2,r2,r2 + 0x010008f2: 1a41 A. SUBS r1,r0,r1 + 0x010008f4: d200 .. BCS 0x10008f8 ; __aeabi_idiv + 120 + 0x010008f6: 4601 .F MOV r1,r0 + 0x010008f8: 4152 RA ADCS r2,r2,r2 + 0x010008fa: 4610 .F MOV r0,r2 + 0x010008fc: 4770 pG BX lr + 0x010008fe: e05d ]. B 0x10009bc ; __aeabi_idiv + 316 + 0x01000900: 0fca .. LSRS r2,r1,#31 + 0x01000902: d000 .. BEQ 0x1000906 ; __aeabi_idiv + 134 + 0x01000904: 4249 IB RSBS r1,r1,#0 + 0x01000906: 1003 .. ASRS r3,r0,#32 + 0x01000908: d300 .. BCC 0x100090c ; __aeabi_idiv + 140 + 0x0100090a: 4240 @B RSBS r0,r0,#0 + 0x0100090c: 4053 S@ EORS r3,r3,r2 + 0x0100090e: 2200 ." MOVS r2,#0 + 0x01000910: 469c .F MOV r12,r3 + 0x01000912: 0903 .. LSRS r3,r0,#4 + 0x01000914: 428b .B CMP r3,r1 + 0x01000916: d32d -. BCC 0x1000974 ; __aeabi_idiv + 244 + 0x01000918: 0a03 .. LSRS r3,r0,#8 + 0x0100091a: 428b .B CMP r3,r1 + 0x0100091c: d312 .. BCC 0x1000944 ; __aeabi_idiv + 196 + 0x0100091e: 22fc ." MOVS r2,#0xfc + 0x01000920: 0189 .. LSLS r1,r1,#6 + 0x01000922: ba12 .. REV r2,r2 + 0x01000924: 0a03 .. LSRS r3,r0,#8 + 0x01000926: 428b .B CMP r3,r1 + 0x01000928: d30c .. BCC 0x1000944 ; __aeabi_idiv + 196 + 0x0100092a: 0189 .. LSLS r1,r1,#6 + 0x0100092c: 1192 .. ASRS r2,r2,#6 + 0x0100092e: 428b .B CMP r3,r1 + 0x01000930: d308 .. BCC 0x1000944 ; __aeabi_idiv + 196 + 0x01000932: 0189 .. LSLS r1,r1,#6 + 0x01000934: 1192 .. ASRS r2,r2,#6 + 0x01000936: 428b .B CMP r3,r1 + 0x01000938: d304 .. BCC 0x1000944 ; __aeabi_idiv + 196 + 0x0100093a: 0189 .. LSLS r1,r1,#6 + 0x0100093c: d03a :. BEQ 0x10009b4 ; __aeabi_idiv + 308 + 0x0100093e: 1192 .. ASRS r2,r2,#6 + 0x01000940: e000 .. B 0x1000944 ; __aeabi_idiv + 196 + 0x01000942: 0989 .. LSRS r1,r1,#6 + 0x01000944: 09c3 .. LSRS r3,r0,#7 + 0x01000946: 428b .B CMP r3,r1 + 0x01000948: d301 .. BCC 0x100094e ; __aeabi_idiv + 206 + 0x0100094a: 01cb .. LSLS r3,r1,#7 + 0x0100094c: 1ac0 .. SUBS r0,r0,r3 + 0x0100094e: 4152 RA ADCS r2,r2,r2 + 0x01000950: 0983 .. LSRS r3,r0,#6 + 0x01000952: 428b .B CMP r3,r1 + 0x01000954: d301 .. BCC 0x100095a ; __aeabi_idiv + 218 + 0x01000956: 018b .. LSLS r3,r1,#6 + 0x01000958: 1ac0 .. SUBS r0,r0,r3 + 0x0100095a: 4152 RA ADCS r2,r2,r2 + 0x0100095c: 0943 C. LSRS r3,r0,#5 + 0x0100095e: 428b .B CMP r3,r1 + 0x01000960: d301 .. BCC 0x1000966 ; __aeabi_idiv + 230 + 0x01000962: 014b K. LSLS r3,r1,#5 + 0x01000964: 1ac0 .. SUBS r0,r0,r3 + 0x01000966: 4152 RA ADCS r2,r2,r2 + 0x01000968: 0903 .. LSRS r3,r0,#4 + 0x0100096a: 428b .B CMP r3,r1 + 0x0100096c: d301 .. BCC 0x1000972 ; __aeabi_idiv + 242 + 0x0100096e: 010b .. LSLS r3,r1,#4 + 0x01000970: 1ac0 .. SUBS r0,r0,r3 + 0x01000972: 4152 RA ADCS r2,r2,r2 + 0x01000974: 08c3 .. LSRS r3,r0,#3 + 0x01000976: 428b .B CMP r3,r1 + 0x01000978: d301 .. BCC 0x100097e ; __aeabi_idiv + 254 + 0x0100097a: 00cb .. LSLS r3,r1,#3 + 0x0100097c: 1ac0 .. SUBS r0,r0,r3 + 0x0100097e: 4152 RA ADCS r2,r2,r2 + 0x01000980: 0883 .. LSRS r3,r0,#2 + 0x01000982: 428b .B CMP r3,r1 + 0x01000984: d301 .. BCC 0x100098a ; __aeabi_idiv + 266 + 0x01000986: 008b .. LSLS r3,r1,#2 + 0x01000988: 1ac0 .. SUBS r0,r0,r3 + 0x0100098a: 4152 RA ADCS r2,r2,r2 + 0x0100098c: d2d9 .. BCS 0x1000942 ; __aeabi_idiv + 194 + 0x0100098e: 0843 C. LSRS r3,r0,#1 + 0x01000990: 428b .B CMP r3,r1 + 0x01000992: d301 .. BCC 0x1000998 ; __aeabi_idiv + 280 + 0x01000994: 004b K. LSLS r3,r1,#1 + 0x01000996: 1ac0 .. SUBS r0,r0,r3 + 0x01000998: 4152 RA ADCS r2,r2,r2 + 0x0100099a: 1a41 A. SUBS r1,r0,r1 + 0x0100099c: d200 .. BCS 0x10009a0 ; __aeabi_idiv + 288 + 0x0100099e: 4601 .F MOV r1,r0 + 0x010009a0: 4663 cF MOV r3,r12 + 0x010009a2: 4152 RA ADCS r2,r2,r2 + 0x010009a4: 105b [. ASRS r3,r3,#1 + 0x010009a6: 4610 .F MOV r0,r2 + 0x010009a8: d301 .. BCC 0x10009ae ; __aeabi_idiv + 302 + 0x010009aa: 4240 @B RSBS r0,r0,#0 + 0x010009ac: 2b00 .+ CMP r3,#0 + 0x010009ae: d500 .. BPL 0x10009b2 ; __aeabi_idiv + 306 + 0x010009b0: 4249 IB RSBS r1,r1,#0 + 0x010009b2: 4770 pG BX lr + 0x010009b4: 4663 cF MOV r3,r12 + 0x010009b6: 105b [. ASRS r3,r3,#1 + 0x010009b8: d300 .. BCC 0x10009bc ; __aeabi_idiv + 316 + 0x010009ba: 4240 @B RSBS r0,r0,#0 + 0x010009bc: b501 .. PUSH {r0,lr} + 0x010009be: 2000 . MOVS r0,#0 + 0x010009c0: 46c0 .F MOV r8,r8 + 0x010009c2: 46c0 .F MOV r8,r8 + 0x010009c4: bd02 .. POP {r1,pc} + .text + __use_two_region_memory + 0x010009c6: 4770 pG BX lr + __rt_heap_escrow$2region + 0x010009c8: 4770 pG BX lr + __rt_heap_expand$2region + 0x010009ca: 4770 pG BX lr + .text + __user_setup_stackheap + 0x010009cc: 4675 uF MOV r5,lr + 0x010009ce: f000f825 ..%. BL __user_libspace ; 0x1000a1c + 0x010009d2: 46ae .F MOV lr,r5 + 0x010009d4: 0005 .. MOVS r5,r0 + 0x010009d6: 4669 iF MOV r1,sp + 0x010009d8: 4653 SF MOV r3,r10 + 0x010009da: 08c0 .. LSRS r0,r0,#3 + 0x010009dc: 00c0 .. LSLS r0,r0,#3 + 0x010009de: 4685 .F MOV sp,r0 + 0x010009e0: b018 .. ADD sp,sp,#0x60 + 0x010009e2: b520 . PUSH {r5,lr} + 0x010009e4: f7fffcac .... BL __user_initial_stackheap ; 0x1000340 + 0x010009e8: bc60 `. POP {r5,r6} + 0x010009ea: 2700 .' MOVS r7,#0 + 0x010009ec: 0849 I. LSRS r1,r1,#1 + 0x010009ee: 46b6 .F MOV lr,r6 + 0x010009f0: 2600 .& MOVS r6,#0 + 0x010009f2: c5c0 .. STM r5!,{r6,r7} + 0x010009f4: c5c0 .. STM r5!,{r6,r7} + 0x010009f6: c5c0 .. STM r5!,{r6,r7} + 0x010009f8: c5c0 .. STM r5!,{r6,r7} + 0x010009fa: c5c0 .. STM r5!,{r6,r7} + 0x010009fc: c5c0 .. STM r5!,{r6,r7} + 0x010009fe: c5c0 .. STM r5!,{r6,r7} + 0x01000a00: c5c0 .. STM r5!,{r6,r7} + 0x01000a02: 3d40 @= SUBS r5,r5,#0x40 + 0x01000a04: 0049 I. LSLS r1,r1,#1 + 0x01000a06: 468d .F MOV sp,r1 + 0x01000a08: 4770 pG BX lr + .text + exit + 0x01000a0a: b510 .. PUSH {r4,lr} + 0x01000a0c: 4604 .F MOV r4,r0 + 0x01000a0e: 46c0 .F MOV r8,r8 + 0x01000a10: 46c0 .F MOV r8,r8 + 0x01000a12: 4620 F MOV r0,r4 + 0x01000a14: f7fffd31 ..1. BL __rt_exit ; 0x100047a + 0x01000a18: bd10 .. POP {r4,pc} + 0x01000a1a: 0000 .. MOVS r0,r0 + .text + __user_libspace + __user_perproc_libspace + __user_perthread_libspace + 0x01000a1c: 4800 .H LDR r0,[pc,#0] ; [0x1000a20] = 0x20da4 + 0x01000a1e: 4770 pG BX lr + $d + 0x01000a20: 00020da4 .... DCD 134564 + $t + .text + _sys_exit + 0x01000a24: 4901 .I LDR r1,[pc,#4] ; [0x1000a2c] = 0x20026 + 0x01000a26: 2018 . MOVS r0,#0x18 + 0x01000a28: beab .. BKPT #0xab + 0x01000a2a: e7fe .. B 0x1000a2a ; _sys_exit + 6 + $d + 0x01000a2c: 00020026 &... DCD 131110 + $t + .text + __I$use$semihosting + __use_no_semihosting_swi + 0x01000a30: 4770 pG BX lr + .text + .text + __decompress + __decompress1 + __semihosting_library_function + 0x01000a32: b570 p. PUSH {r4-r6,lr} + 0x01000a34: 188c .. ADDS r4,r1,r2 + 0x01000a36: 7805 .x LDRB r5,[r0,#0] + 0x01000a38: 1c40 @. ADDS r0,r0,#1 + 0x01000a3a: 076b k. LSLS r3,r5,#29 + 0x01000a3c: 0f5b [. LSRS r3,r3,#29 + 0x01000a3e: d101 .. BNE 0x1000a44 ; __decompress + 18 + 0x01000a40: 7803 .x LDRB r3,[r0,#0] + 0x01000a42: 1c40 @. ADDS r0,r0,#1 + 0x01000a44: 112a *. ASRS r2,r5,#4 + 0x01000a46: d106 .. BNE 0x1000a56 ; __decompress + 36 + 0x01000a48: 7802 .x LDRB r2,[r0,#0] + 0x01000a4a: 1c40 @. ADDS r0,r0,#1 + 0x01000a4c: e003 .. B 0x1000a56 ; __decompress + 36 + 0x01000a4e: 7806 .x LDRB r6,[r0,#0] + 0x01000a50: 1c40 @. ADDS r0,r0,#1 + 0x01000a52: 700e .p STRB r6,[r1,#0] + 0x01000a54: 1c49 I. ADDS r1,r1,#1 + 0x01000a56: 1e5b [. SUBS r3,r3,#1 + 0x01000a58: d1f9 .. BNE 0x1000a4e ; __decompress + 28 + 0x01000a5a: 072b +. LSLS r3,r5,#28 + 0x01000a5c: d405 .. BMI 0x1000a6a ; __decompress + 56 + 0x01000a5e: 2300 .# MOVS r3,#0 + 0x01000a60: 1e52 R. SUBS r2,r2,#1 + 0x01000a62: d40d .. BMI 0x1000a80 ; __decompress + 78 + 0x01000a64: 700b .p STRB r3,[r1,#0] + 0x01000a66: 1c49 I. ADDS r1,r1,#1 + 0x01000a68: e7fa .. B 0x1000a60 ; __decompress + 46 + 0x01000a6a: 7803 .x LDRB r3,[r0,#0] + 0x01000a6c: 1c40 @. ADDS r0,r0,#1 + 0x01000a6e: 1acb .. SUBS r3,r1,r3 + 0x01000a70: 1c92 .. ADDS r2,r2,#2 + 0x01000a72: e003 .. B 0x1000a7c ; __decompress + 74 + 0x01000a74: 781d .x LDRB r5,[r3,#0] + 0x01000a76: 700d .p STRB r5,[r1,#0] + 0x01000a78: 1c49 I. ADDS r1,r1,#1 + 0x01000a7a: 1c5b [. ADDS r3,r3,#1 + 0x01000a7c: 1e52 R. SUBS r2,r2,#1 + 0x01000a7e: d5f9 .. BPL 0x1000a74 ; __decompress + 66 + 0x01000a80: 42a1 .B CMP r1,r4 + 0x01000a82: d3d8 .. BCC 0x1000a36 ; __decompress + 4 + 0x01000a84: 2000 . MOVS r0,#0 + 0x01000a86: bd70 p. POP {r4-r6,pc} + i.$Sub$$main + main + 0x01000a88: b510 .. PUSH {r4,lr} + 0x01000a8a: f006f8f0 .... BL rtthread_startup ; 0x1006c6e + 0x01000a8e: 2000 . MOVS r0,#0 + 0x01000a90: bd10 .. POP {r4,pc} + 0x01000a92: 0000 .. MOVS r0,r0 + i.NVIC_DisableIRQ + NVIC_DisableIRQ + 0x01000a94: bf00 .. NOP + 0x01000a96: 2101 .! MOVS r1,#1 + 0x01000a98: 4081 .@ LSLS r1,r1,r0 + 0x01000a9a: 4a02 .J LDR r2,[pc,#8] ; [0x1000aa4] = 0xe000e180 + 0x01000a9c: 6011 .` STR r1,[r2,#0] + 0x01000a9e: bf00 .. NOP + 0x01000aa0: 4770 pG BX lr + $d + 0x01000aa2: 0000 .. DCW 0 + 0x01000aa4: e000e180 .... DCD 3758154112 + $t + i.NVIC_EnableIRQ + NVIC_EnableIRQ + 0x01000aa8: bf00 .. NOP + 0x01000aaa: 4904 .I LDR r1,[pc,#16] ; [0x1000abc] = 0xe000e100 + 0x01000aac: 6809 .h LDR r1,[r1,#0] + 0x01000aae: 2201 ." MOVS r2,#1 + 0x01000ab0: 4082 .@ LSLS r2,r2,r0 + 0x01000ab2: 4311 .C ORRS r1,r1,r2 + 0x01000ab4: 4a01 .J LDR r2,[pc,#4] ; [0x1000abc] = 0xe000e100 + 0x01000ab6: 6011 .` STR r1,[r2,#0] + 0x01000ab8: bf00 .. NOP + 0x01000aba: 4770 pG BX lr + $d + 0x01000abc: e000e100 .... DCD 3758153984 + $t + i.SysTick_Config + SysTick_Config + 0x01000ac0: 4601 .F MOV r1,r0 + 0x01000ac2: 1e49 I. SUBS r1,r1,#1 + 0x01000ac4: 2900 .) CMP r1,#0 + 0x01000ac6: d002 .. BEQ 0x1000ace ; SysTick_Config + 14 + 0x01000ac8: 480c .H LDR r0,[pc,#48] ; [0x1000afc] = 0xffffff + 0x01000aca: 4281 .B CMP r1,r0 + 0x01000acc: d901 .. BLS 0x1000ad2 ; SysTick_Config + 18 + 0x01000ace: 2001 . MOVS r0,#1 + 0x01000ad0: 4770 pG BX lr + 0x01000ad2: 480b .H LDR r0,[pc,#44] ; [0x1000b00] = 0xe000e000 + 0x01000ad4: 6900 .i LDR r0,[r0,#0x10] + 0x01000ad6: 0840 @. LSRS r0,r0,#1 + 0x01000ad8: 0040 @. LSLS r0,r0,#1 + 0x01000ada: 4a09 .J LDR r2,[pc,#36] ; [0x1000b00] = 0xe000e000 + 0x01000adc: 6110 .a STR r0,[r2,#0x10] + 0x01000ade: 4610 .F MOV r0,r2 + 0x01000ae0: 6141 Aa STR r1,[r0,#0x14] + 0x01000ae2: 2000 . MOVS r0,#0 + 0x01000ae4: 6190 .a STR r0,[r2,#0x18] + 0x01000ae6: 4a07 .J LDR r2,[pc,#28] ; [0x1000b04] = 0x20154 + 0x01000ae8: 6010 .` STR r0,[r2,#0] + 0x01000aea: 4805 .H LDR r0,[pc,#20] ; [0x1000b00] = 0xe000e000 + 0x01000aec: 6900 .i LDR r0,[r0,#0x10] + 0x01000aee: 2207 ." MOVS r2,#7 + 0x01000af0: 4310 .C ORRS r0,r0,r2 + 0x01000af2: 4a03 .J LDR r2,[pc,#12] ; [0x1000b00] = 0xe000e000 + 0x01000af4: 6110 .a STR r0,[r2,#0x10] + 0x01000af6: 2000 . MOVS r0,#0 + 0x01000af8: e7ea .. B 0x1000ad0 ; SysTick_Config + 16 + $d + 0x01000afa: 0000 .. DCW 0 + 0x01000afc: 00ffffff .... DCD 16777215 + 0x01000b00: e000e000 .... DCD 3758153728 + 0x01000b04: 00020154 T... DCD 131412 + $t + i.SysTick_Handler + SysTick_Handler + 0x01000b08: b510 .. PUSH {r4,lr} + 0x01000b0a: f003fc9b .... BL rt_interrupt_enter ; 0x1004444 + 0x01000b0e: f005fbed .... BL rt_tick_increase ; 0x10062ec + 0x01000b12: f003fcc1 .... BL rt_interrupt_leave ; 0x1004498 + 0x01000b16: bd10 .. POP {r4,pc} + i.UART0_IRQHandler + UART0_IRQHandler + 0x01000b18: b510 .. PUSH {r4,lr} + 0x01000b1a: f003fc93 .... BL rt_interrupt_enter ; 0x1004444 + 0x01000b1e: 4906 .I LDR r1,[pc,#24] ; [0x1000b38] = 0x20010 + 0x01000b20: 7808 .x LDRB r0,[r1,#0] + 0x01000b22: f000f80d .... BL UART_GetITIdentity ; 0x1000b40 + 0x01000b26: 2802 .( CMP r0,#2 + 0x01000b28: d103 .. BNE 0x1000b32 ; UART0_IRQHandler + 26 + 0x01000b2a: 2101 .! MOVS r1,#1 + 0x01000b2c: 4803 .H LDR r0,[pc,#12] ; [0x1000b3c] = 0x2019c + 0x01000b2e: f003fb7b ..{. BL rt_hw_serial_isr ; 0x1004228 + 0x01000b32: f003fcb1 .... BL rt_interrupt_leave ; 0x1004498 + 0x01000b36: bd10 .. POP {r4,pc} + $d + 0x01000b38: 00020010 .... DCD 131088 + 0x01000b3c: 0002019c .... DCD 131484 + $t + i.UART_GetITIdentity + UART_GetITIdentity + 0x01000b40: 4601 .F MOV r1,r0 + 0x01000b42: 2000 . MOVS r0,#0 + 0x01000b44: 2900 .) CMP r1,#0 + 0x01000b46: d002 .. BEQ 0x1000b4e ; UART_GetITIdentity + 14 + 0x01000b48: 2901 .) CMP r1,#1 + 0x01000b4a: d130 0. BNE 0x1000bae ; UART_GetITIdentity + 110 + 0x01000b4c: e017 .. B 0x1000b7e ; UART_GetITIdentity + 62 + 0x01000b4e: 4a19 .J LDR r2,[pc,#100] ; [0x1000bb4] = 0xf8b00 + 0x01000b50: 69d2 .i LDR r2,[r2,#0x1c] + 0x01000b52: 23ff .# MOVS r3,#0xff + 0x01000b54: 021b .. LSLS r3,r3,#8 + 0x01000b56: 401a .@ ANDS r2,r2,r3 + 0x01000b58: 2a00 .* CMP r2,#0 + 0x01000b5a: dd06 .. BLE 0x1000b6a ; UART_GetITIdentity + 42 + 0x01000b5c: 4a15 .J LDR r2,[pc,#84] ; [0x1000bb4] = 0xf8b00 + 0x01000b5e: 6a92 .j LDR r2,[r2,#0x28] + 0x01000b60: 1412 .. ASRS r2,r2,#16 + 0x01000b62: 2a00 .* CMP r2,#0 + 0x01000b64: dd01 .. BLE 0x1000b6a ; UART_GetITIdentity + 42 + 0x01000b66: 2002 . MOVS r0,#2 + 0x01000b68: e008 .. B 0x1000b7c ; UART_GetITIdentity + 60 + 0x01000b6a: 4a12 .J LDR r2,[pc,#72] ; [0x1000bb4] = 0xf8b00 + 0x01000b6c: 69d2 .i LDR r2,[r2,#0x1c] + 0x01000b6e: 0fd2 .. LSRS r2,r2,#31 + 0x01000b70: 07d2 .. LSLS r2,r2,#31 + 0x01000b72: 2a00 .* CMP r2,#0 + 0x01000b74: d001 .. BEQ 0x1000b7a ; UART_GetITIdentity + 58 + 0x01000b76: 2001 . MOVS r0,#1 + 0x01000b78: e000 .. B 0x1000b7c ; UART_GetITIdentity + 60 + 0x01000b7a: 2000 . MOVS r0,#0 + 0x01000b7c: e017 .. B 0x1000bae ; UART_GetITIdentity + 110 + 0x01000b7e: 4a0e .J LDR r2,[pc,#56] ; [0x1000bb8] = 0xf8c00 + 0x01000b80: 69d2 .i LDR r2,[r2,#0x1c] + 0x01000b82: 23ff .# MOVS r3,#0xff + 0x01000b84: 021b .. LSLS r3,r3,#8 + 0x01000b86: 401a .@ ANDS r2,r2,r3 + 0x01000b88: 2a00 .* CMP r2,#0 + 0x01000b8a: dd06 .. BLE 0x1000b9a ; UART_GetITIdentity + 90 + 0x01000b8c: 4a0a .J LDR r2,[pc,#40] ; [0x1000bb8] = 0xf8c00 + 0x01000b8e: 6a92 .j LDR r2,[r2,#0x28] + 0x01000b90: 1412 .. ASRS r2,r2,#16 + 0x01000b92: 2a00 .* CMP r2,#0 + 0x01000b94: dd01 .. BLE 0x1000b9a ; UART_GetITIdentity + 90 + 0x01000b96: 2002 . MOVS r0,#2 + 0x01000b98: e008 .. B 0x1000bac ; UART_GetITIdentity + 108 + 0x01000b9a: 4a07 .J LDR r2,[pc,#28] ; [0x1000bb8] = 0xf8c00 + 0x01000b9c: 69d2 .i LDR r2,[r2,#0x1c] + 0x01000b9e: 0fd2 .. LSRS r2,r2,#31 + 0x01000ba0: 07d2 .. LSLS r2,r2,#31 + 0x01000ba2: 2a00 .* CMP r2,#0 + 0x01000ba4: d001 .. BEQ 0x1000baa ; UART_GetITIdentity + 106 + 0x01000ba6: 2001 . MOVS r0,#1 + 0x01000ba8: e000 .. B 0x1000bac ; UART_GetITIdentity + 108 + 0x01000baa: 2000 . MOVS r0,#0 + 0x01000bac: bf00 .. NOP + 0x01000bae: bf00 .. NOP + 0x01000bb0: 4770 pG BX lr + $d + 0x01000bb2: 0000 .. DCW 0 + 0x01000bb4: 000f8b00 .... DCD 1018624 + 0x01000bb8: 000f8c00 .... DCD 1018880 + $t + i.UART_ITConfig + UART_ITConfig + 0x01000bbc: b570 p. PUSH {r4-r6,lr} + 0x01000bbe: 4606 .F MOV r6,r0 + 0x01000bc0: 460c .F MOV r4,r1 + 0x01000bc2: 4615 .F MOV r5,r2 + 0x01000bc4: 2e00 .. CMP r6,#0 + 0x01000bc6: d006 .. BEQ 0x1000bd6 ; UART_ITConfig + 26 + 0x01000bc8: 2e01 .. CMP r6,#1 + 0x01000bca: d004 .. BEQ 0x1000bd6 ; UART_ITConfig + 26 + 0x01000bcc: 4a2c ,J LDR r2,[pc,#176] ; [0x1000c80] = 0x1007c9e + 0x01000bce: 21f3 .! MOVS r1,#0xf3 + 0x01000bd0: a02c ,. ADR r0,{pc}+0xb4 ; 0x1000c84 + 0x01000bd2: f000fa3b ..;. BL _assert_handler ; 0x100104c + 0x01000bd6: 2c01 ., CMP r4,#1 + 0x01000bd8: d006 .. BEQ 0x1000be8 ; UART_ITConfig + 44 + 0x01000bda: 2c02 ., CMP r4,#2 + 0x01000bdc: d004 .. BEQ 0x1000be8 ; UART_ITConfig + 44 + 0x01000bde: 4a28 (J LDR r2,[pc,#160] ; [0x1000c80] = 0x1007c9e + 0x01000be0: 21f4 .! MOVS r1,#0xf4 + 0x01000be2: a028 (. ADR r0,{pc}+0xa2 ; 0x1000c84 + 0x01000be4: f000fa32 ..2. BL _assert_handler ; 0x100104c + 0x01000be8: 2e00 .. CMP r6,#0 + 0x01000bea: d002 .. BEQ 0x1000bf2 ; UART_ITConfig + 54 + 0x01000bec: 2e01 .. CMP r6,#1 + 0x01000bee: d144 D. BNE 0x1000c7a ; UART_ITConfig + 190 + 0x01000bf0: e021 !. B 0x1000c36 ; UART_ITConfig + 122 + 0x01000bf2: 2c02 ., CMP r4,#2 + 0x01000bf4: d110 .. BNE 0x1000c18 ; UART_ITConfig + 92 + 0x01000bf6: 2d00 .- CMP r5,#0 + 0x01000bf8: d006 .. BEQ 0x1000c08 ; UART_ITConfig + 76 + 0x01000bfa: 4828 (H LDR r0,[pc,#160] ; [0x1000c9c] = 0xf8b00 + 0x01000bfc: 69c0 .i LDR r0,[r0,#0x1c] + 0x01000bfe: 01e1 .. LSLS r1,r4,#7 + 0x01000c00: 4308 .C ORRS r0,r0,r1 + 0x01000c02: 4926 &I LDR r1,[pc,#152] ; [0x1000c9c] = 0xf8b00 + 0x01000c04: 61c8 .a STR r0,[r1,#0x1c] + 0x01000c06: e015 .. B 0x1000c34 ; UART_ITConfig + 120 + 0x01000c08: 4824 $H LDR r0,[pc,#144] ; [0x1000c9c] = 0xf8b00 + 0x01000c0a: 69c0 .i LDR r0,[r0,#0x1c] + 0x01000c0c: 21ff .! MOVS r1,#0xff + 0x01000c0e: 0209 .. LSLS r1,r1,#8 + 0x01000c10: 4388 .C BICS r0,r0,r1 + 0x01000c12: 4922 "I LDR r1,[pc,#136] ; [0x1000c9c] = 0xf8b00 + 0x01000c14: 61c8 .a STR r0,[r1,#0x1c] + 0x01000c16: e00d .. B 0x1000c34 ; UART_ITConfig + 120 + 0x01000c18: 2c01 ., CMP r4,#1 + 0x01000c1a: d10b .. BNE 0x1000c34 ; UART_ITConfig + 120 + 0x01000c1c: 481f .H LDR r0,[pc,#124] ; [0x1000c9c] = 0xf8b00 + 0x01000c1e: 69c0 .i LDR r0,[r0,#0x1c] + 0x01000c20: 0040 @. LSLS r0,r0,#1 + 0x01000c22: 0840 @. LSRS r0,r0,#1 + 0x01000c24: 491d .I LDR r1,[pc,#116] ; [0x1000c9c] = 0xf8b00 + 0x01000c26: 61c8 .a STR r0,[r1,#0x1c] + 0x01000c28: 4608 .F MOV r0,r1 + 0x01000c2a: 69c0 .i LDR r0,[r0,#0x1c] + 0x01000c2c: 07e9 .. LSLS r1,r5,#31 + 0x01000c2e: 4308 .C ORRS r0,r0,r1 + 0x01000c30: 491a .I LDR r1,[pc,#104] ; [0x1000c9c] = 0xf8b00 + 0x01000c32: 61c8 .a STR r0,[r1,#0x1c] + 0x01000c34: e021 !. B 0x1000c7a ; UART_ITConfig + 190 + 0x01000c36: 2c02 ., CMP r4,#2 + 0x01000c38: d110 .. BNE 0x1000c5c ; UART_ITConfig + 160 + 0x01000c3a: 2d00 .- CMP r5,#0 + 0x01000c3c: d006 .. BEQ 0x1000c4c ; UART_ITConfig + 144 + 0x01000c3e: 4818 .H LDR r0,[pc,#96] ; [0x1000ca0] = 0xf8c00 + 0x01000c40: 69c0 .i LDR r0,[r0,#0x1c] + 0x01000c42: 01e1 .. LSLS r1,r4,#7 + 0x01000c44: 4308 .C ORRS r0,r0,r1 + 0x01000c46: 4916 .I LDR r1,[pc,#88] ; [0x1000ca0] = 0xf8c00 + 0x01000c48: 61c8 .a STR r0,[r1,#0x1c] + 0x01000c4a: e015 .. B 0x1000c78 ; UART_ITConfig + 188 + 0x01000c4c: 4814 .H LDR r0,[pc,#80] ; [0x1000ca0] = 0xf8c00 + 0x01000c4e: 69c0 .i LDR r0,[r0,#0x1c] + 0x01000c50: 21ff .! MOVS r1,#0xff + 0x01000c52: 0209 .. LSLS r1,r1,#8 + 0x01000c54: 4388 .C BICS r0,r0,r1 + 0x01000c56: 4912 .I LDR r1,[pc,#72] ; [0x1000ca0] = 0xf8c00 + 0x01000c58: 61c8 .a STR r0,[r1,#0x1c] + 0x01000c5a: e00d .. B 0x1000c78 ; UART_ITConfig + 188 + 0x01000c5c: 2c01 ., CMP r4,#1 + 0x01000c5e: d10b .. BNE 0x1000c78 ; UART_ITConfig + 188 + 0x01000c60: 480f .H LDR r0,[pc,#60] ; [0x1000ca0] = 0xf8c00 + 0x01000c62: 69c0 .i LDR r0,[r0,#0x1c] + 0x01000c64: 0040 @. LSLS r0,r0,#1 + 0x01000c66: 0840 @. LSRS r0,r0,#1 + 0x01000c68: 490d .I LDR r1,[pc,#52] ; [0x1000ca0] = 0xf8c00 + 0x01000c6a: 61c8 .a STR r0,[r1,#0x1c] + 0x01000c6c: 4608 .F MOV r0,r1 + 0x01000c6e: 69c0 .i LDR r0,[r0,#0x1c] + 0x01000c70: 07e9 .. LSLS r1,r5,#31 + 0x01000c72: 4308 .C ORRS r0,r0,r1 + 0x01000c74: 490a .I LDR r1,[pc,#40] ; [0x1000ca0] = 0xf8c00 + 0x01000c76: 61c8 .a STR r0,[r1,#0x1c] + 0x01000c78: bf00 .. NOP + 0x01000c7a: bf00 .. NOP + 0x01000c7c: bd70 p. POP {r4-r6,pc} + $d + 0x01000c7e: 0000 .. DCW 0 + 0x01000c80: 01007c9e .|.. DCD 16809118 + 0x01000c84: 7262694c Libr DCD 1919052108 + 0x01000c88: 65697261 arie DCD 1701409377 + 0x01000c8c: 64735c73 s\sd DCD 1685281907 + 0x01000c90: 63795c6b k\yc DCD 1668897899 + 0x01000c94: 7261755f _uar DCD 1918989663 + 0x01000c98: 00632e74 t.c. DCD 6499956 + 0x01000c9c: 000f8b00 .... DCD 1018624 + 0x01000ca0: 000f8c00 .... DCD 1018880 + $t + i.UART_Init + UART_Init + 0x01000ca4: b5f8 .. PUSH {r3-r7,lr} + 0x01000ca6: 4605 .F MOV r5,r0 + 0x01000ca8: 460c .F MOV r4,r1 + 0x01000caa: 2600 .& MOVS r6,#0 + 0x01000cac: 2700 .' MOVS r7,#0 + 0x01000cae: 2d00 .- CMP r5,#0 + 0x01000cb0: d006 .. BEQ 0x1000cc0 ; UART_Init + 28 + 0x01000cb2: 2d01 .- CMP r5,#1 + 0x01000cb4: d004 .. BEQ 0x1000cc0 ; UART_Init + 28 + 0x01000cb6: 4a47 GJ LDR r2,[pc,#284] ; [0x1000dd4] = 0x1007c5c + 0x01000cb8: 219a .! MOVS r1,#0x9a + 0x01000cba: a047 G. ADR r0,{pc}+0x11e ; 0x1000dd8 + 0x01000cbc: f000f9c6 .... BL _assert_handler ; 0x100104c + 0x01000cc0: 7820 x LDRB r0,[r4,#0] + 0x01000cc2: 2840 @( CMP r0,#0x40 + 0x01000cc4: d007 .. BEQ 0x1000cd6 ; UART_Init + 50 + 0x01000cc6: 7820 x LDRB r0,[r4,#0] + 0x01000cc8: 2800 .( CMP r0,#0 + 0x01000cca: d004 .. BEQ 0x1000cd6 ; UART_Init + 50 + 0x01000ccc: 4a41 AJ LDR r2,[pc,#260] ; [0x1000dd4] = 0x1007c5c + 0x01000cce: 219b .! MOVS r1,#0x9b + 0x01000cd0: a041 A. ADR r0,{pc}+0x108 ; 0x1000dd8 + 0x01000cd2: f000f9bb .... BL _assert_handler ; 0x100104c + 0x01000cd6: 21b7 .! MOVS r1,#0xb7 + 0x01000cd8: 00c9 .. LSLS r1,r1,#3 + 0x01000cda: 6860 `h LDR r0,[r4,#4] + 0x01000cdc: 4288 .B CMP r0,r1 + 0x01000cde: d903 .. BLS 0x1000ce8 ; UART_Init + 68 + 0x01000ce0: 4943 CI LDR r1,[pc,#268] ; [0x1000df0] = 0x44aa21 + 0x01000ce2: 6860 `h LDR r0,[r4,#4] + 0x01000ce4: 4288 .B CMP r0,r1 + 0x01000ce6: d304 .. BCC 0x1000cf2 ; UART_Init + 78 + 0x01000ce8: 4a3a :J LDR r2,[pc,#232] ; [0x1000dd4] = 0x1007c5c + 0x01000cea: 219c .! MOVS r1,#0x9c + 0x01000cec: a03a :. ADR r0,{pc}+0xec ; 0x1000dd8 + 0x01000cee: f000f9ad .... BL _assert_handler ; 0x100104c + 0x01000cf2: 7aa0 .z LDRB r0,[r4,#0xa] + 0x01000cf4: 2800 .( CMP r0,#0 + 0x01000cf6: d00a .. BEQ 0x1000d0e ; UART_Init + 106 + 0x01000cf8: 7aa0 .z LDRB r0,[r4,#0xa] + 0x01000cfa: 2800 .( CMP r0,#0 + 0x01000cfc: d007 .. BEQ 0x1000d0e ; UART_Init + 106 + 0x01000cfe: 7aa0 .z LDRB r0,[r4,#0xa] + 0x01000d00: 2802 .( CMP r0,#2 + 0x01000d02: d004 .. BEQ 0x1000d0e ; UART_Init + 106 + 0x01000d04: 4a33 3J LDR r2,[pc,#204] ; [0x1000dd4] = 0x1007c5c + 0x01000d06: 219d .! MOVS r1,#0x9d + 0x01000d08: a033 3. ADR r0,{pc}+0xd0 ; 0x1000dd8 + 0x01000d0a: f000f99f .... BL _assert_handler ; 0x100104c + 0x01000d0e: 7ae0 .z LDRB r0,[r4,#0xb] + 0x01000d10: 2800 .( CMP r0,#0 + 0x01000d12: d007 .. BEQ 0x1000d24 ; UART_Init + 128 + 0x01000d14: 7ae0 .z LDRB r0,[r4,#0xb] + 0x01000d16: 2810 .( CMP r0,#0x10 + 0x01000d18: d004 .. BEQ 0x1000d24 ; UART_Init + 128 + 0x01000d1a: 4a2e .J LDR r2,[pc,#184] ; [0x1000dd4] = 0x1007c5c + 0x01000d1c: 219e .! MOVS r1,#0x9e + 0x01000d1e: a02e .. ADR r0,{pc}+0xba ; 0x1000dd8 + 0x01000d20: f000f994 .... BL _assert_handler ; 0x100104c + 0x01000d24: 7a60 `z LDRB r0,[r4,#9] + 0x01000d26: 2800 .( CMP r0,#0 + 0x01000d28: d007 .. BEQ 0x1000d3a ; UART_Init + 150 + 0x01000d2a: 7a60 `z LDRB r0,[r4,#9] + 0x01000d2c: 2808 .( CMP r0,#8 + 0x01000d2e: d004 .. BEQ 0x1000d3a ; UART_Init + 150 + 0x01000d30: 4a28 (J LDR r2,[pc,#160] ; [0x1000dd4] = 0x1007c5c + 0x01000d32: 219f .! MOVS r1,#0x9f + 0x01000d34: a028 (. ADR r0,{pc}+0xa4 ; 0x1000dd8 + 0x01000d36: f000f989 .... BL _assert_handler ; 0x100104c + 0x01000d3a: 482e .H LDR r0,[pc,#184] ; [0x1000df4] = 0x2dc6c00 + 0x01000d3c: 6861 ah LDR r1,[r4,#4] + 0x01000d3e: f7fffd95 .... BL __aeabi_uidiv ; 0x100086c + 0x01000d42: 0407 .. LSLS r7,r0,#16 + 0x01000d44: 7aa0 .z LDRB r0,[r4,#0xa] + 0x01000d46: 2101 .! MOVS r1,#1 + 0x01000d48: 4308 .C ORRS r0,r0,r1 + 0x01000d4a: 7a21 !z LDRB r1,[r4,#8] + 0x01000d4c: 4308 .C ORRS r0,r0,r1 + 0x01000d4e: 7a61 az LDRB r1,[r4,#9] + 0x01000d50: 4308 .C ORRS r0,r0,r1 + 0x01000d52: 7ae1 .z LDRB r1,[r4,#0xb] + 0x01000d54: 4308 .C ORRS r0,r0,r1 + 0x01000d56: 7821 !x LDRB r1,[r4,#0] + 0x01000d58: 4308 .C ORRS r0,r0,r1 + 0x01000d5a: 2180 .! MOVS r1,#0x80 + 0x01000d5c: 4308 .C ORRS r0,r0,r1 + 0x01000d5e: 4338 8C ORRS r0,r0,r7 + 0x01000d60: 4606 .F MOV r6,r0 + 0x01000d62: 2d00 .- CMP r5,#0 + 0x01000d64: d11a .. BNE 0x1000d9c ; UART_Init + 248 + 0x01000d66: 2000 . MOVS r0,#0 + 0x01000d68: 4923 #I LDR r1,[pc,#140] ; [0x1000df8] = 0xf8b00 + 0x01000d6a: 61c8 .a STR r0,[r1,#0x1c] + 0x01000d6c: 4823 #H LDR r0,[pc,#140] ; [0x1000dfc] = 0x205a4 + 0x01000d6e: 6048 H` STR r0,[r1,#4] + 0x01000d70: 2001 . MOVS r0,#1 + 0x01000d72: 0280 .. LSLS r0,r0,#10 + 0x01000d74: 6088 .` STR r0,[r1,#8] + 0x01000d76: 2001 . MOVS r0,#1 + 0x01000d78: 7308 .s STRB r0,[r1,#0xc] + 0x01000d7a: 4608 .F MOV r0,r1 + 0x01000d7c: 7bc0 .{ LDRB r0,[r0,#0xf] + 0x01000d7e: 2120 ! MOVS r1,#0x20 + 0x01000d80: 4308 .C ORRS r0,r0,r1 + 0x01000d82: 491d .I LDR r1,[pc,#116] ; [0x1000df8] = 0xf8b00 + 0x01000d84: 73c8 .s STRB r0,[r1,#0xf] + 0x01000d86: 4608 .F MOV r0,r1 + 0x01000d88: 7bc0 .{ LDRB r0,[r0,#0xf] + 0x01000d8a: 2120 ! MOVS r1,#0x20 + 0x01000d8c: 4388 .C BICS r0,r0,r1 + 0x01000d8e: 491a .I LDR r1,[pc,#104] ; [0x1000df8] = 0xf8b00 + 0x01000d90: 73c8 .s STRB r0,[r1,#0xf] + 0x01000d92: 2000 . MOVS r0,#0 + 0x01000d94: 61c8 .a STR r0,[r1,#0x1c] + 0x01000d96: 4608 .F MOV r0,r1 + 0x01000d98: 61c6 .a STR r6,[r0,#0x1c] + 0x01000d9a: e019 .. B 0x1000dd0 ; UART_Init + 300 + 0x01000d9c: 2000 . MOVS r0,#0 + 0x01000d9e: 4918 .I LDR r1,[pc,#96] ; [0x1000e00] = 0xf8c00 + 0x01000da0: 61c8 .a STR r0,[r1,#0x1c] + 0x01000da2: 4818 .H LDR r0,[pc,#96] ; [0x1000e04] = 0x209a4 + 0x01000da4: 6048 H` STR r0,[r1,#4] + 0x01000da6: 2001 . MOVS r0,#1 + 0x01000da8: 0280 .. LSLS r0,r0,#10 + 0x01000daa: 6088 .` STR r0,[r1,#8] + 0x01000dac: 2001 . MOVS r0,#1 + 0x01000dae: 7308 .s STRB r0,[r1,#0xc] + 0x01000db0: 4608 .F MOV r0,r1 + 0x01000db2: 7bc0 .{ LDRB r0,[r0,#0xf] + 0x01000db4: 2120 ! MOVS r1,#0x20 + 0x01000db6: 4308 .C ORRS r0,r0,r1 + 0x01000db8: 4911 .I LDR r1,[pc,#68] ; [0x1000e00] = 0xf8c00 + 0x01000dba: 73c8 .s STRB r0,[r1,#0xf] + 0x01000dbc: 4608 .F MOV r0,r1 + 0x01000dbe: 7bc0 .{ LDRB r0,[r0,#0xf] + 0x01000dc0: 2120 ! MOVS r1,#0x20 + 0x01000dc2: 4388 .C BICS r0,r0,r1 + 0x01000dc4: 490e .I LDR r1,[pc,#56] ; [0x1000e00] = 0xf8c00 + 0x01000dc6: 73c8 .s STRB r0,[r1,#0xf] + 0x01000dc8: 2000 . MOVS r0,#0 + 0x01000dca: 61c8 .a STR r0,[r1,#0x1c] + 0x01000dcc: 4608 .F MOV r0,r1 + 0x01000dce: 61c6 .a STR r6,[r0,#0x1c] + 0x01000dd0: bdf8 .. POP {r3-r7,pc} + $d + 0x01000dd2: 0000 .. DCW 0 + 0x01000dd4: 01007c5c \|.. DCD 16809052 + 0x01000dd8: 7262694c Libr DCD 1919052108 + 0x01000ddc: 65697261 arie DCD 1701409377 + 0x01000de0: 64735c73 s\sd DCD 1685281907 + 0x01000de4: 63795c6b k\yc DCD 1668897899 + 0x01000de8: 7261755f _uar DCD 1918989663 + 0x01000dec: 00632e74 t.c. DCD 6499956 + 0x01000df0: 0044aa21 !.D. DCD 4500001 + 0x01000df4: 02dc6c00 .l.. DCD 48000000 + 0x01000df8: 000f8b00 .... DCD 1018624 + 0x01000dfc: 000205a4 .... DCD 132516 + 0x01000e00: 000f8c00 .... DCD 1018880 + 0x01000e04: 000209a4 .... DCD 133540 + $t + i.UART_IsUARTBusy + UART_IsUARTBusy + 0x01000e08: b510 .. PUSH {r4,lr} + 0x01000e0a: 4604 .F MOV r4,r0 + 0x01000e0c: 2c00 ., CMP r4,#0 + 0x01000e0e: d006 .. BEQ 0x1000e1e ; UART_IsUARTBusy + 22 + 0x01000e10: 2c01 ., CMP r4,#1 + 0x01000e12: d004 .. BEQ 0x1000e1e ; UART_IsUARTBusy + 22 + 0x01000e14: 4a0a .J LDR r2,[pc,#40] ; [0x1000e40] = 0x1007c8e + 0x01000e16: 21e5 .! MOVS r1,#0xe5 + 0x01000e18: a00a .. ADR r0,{pc}+0x2c ; 0x1000e44 + 0x01000e1a: f000f917 .... BL _assert_handler ; 0x100104c + 0x01000e1e: 2c00 ., CMP r4,#0 + 0x01000e20: d106 .. BNE 0x1000e30 ; UART_IsUARTBusy + 40 + 0x01000e22: 480e .H LDR r0,[pc,#56] ; [0x1000e5c] = 0xf8b00 + 0x01000e24: 6900 .i LDR r0,[r0,#0x10] + 0x01000e26: 07c0 .. LSLS r0,r0,#31 + 0x01000e28: 0fc0 .. LSRS r0,r0,#31 + 0x01000e2a: 2101 .! MOVS r1,#1 + 0x01000e2c: 4048 H@ EORS r0,r0,r1 + 0x01000e2e: bd10 .. POP {r4,pc} + 0x01000e30: 480b .H LDR r0,[pc,#44] ; [0x1000e60] = 0xf8c00 + 0x01000e32: 6900 .i LDR r0,[r0,#0x10] + 0x01000e34: 07c0 .. LSLS r0,r0,#31 + 0x01000e36: 0fc0 .. LSRS r0,r0,#31 + 0x01000e38: 2101 .! MOVS r1,#1 + 0x01000e3a: 4048 H@ EORS r0,r0,r1 + 0x01000e3c: e7f7 .. B 0x1000e2e ; UART_IsUARTBusy + 38 + $d + 0x01000e3e: 0000 .. DCW 0 + 0x01000e40: 01007c8e .|.. DCD 16809102 + 0x01000e44: 7262694c Libr DCD 1919052108 + 0x01000e48: 65697261 arie DCD 1701409377 + 0x01000e4c: 64735c73 s\sd DCD 1685281907 + 0x01000e50: 63795c6b k\yc DCD 1668897899 + 0x01000e54: 7261755f _uar DCD 1918989663 + 0x01000e58: 00632e74 t.c. DCD 6499956 + 0x01000e5c: 000f8b00 .... DCD 1018624 + 0x01000e60: 000f8c00 .... DCD 1018880 + $t + i.UART_ReceiveData + UART_ReceiveData + 0x01000e64: b510 .. PUSH {r4,lr} + 0x01000e66: 4604 .F MOV r4,r0 + 0x01000e68: 2c00 ., CMP r4,#0 + 0x01000e6a: d007 .. BEQ 0x1000e7c ; UART_ReceiveData + 24 + 0x01000e6c: 2c01 ., CMP r4,#1 + 0x01000e6e: d005 .. BEQ 0x1000e7c ; UART_ReceiveData + 24 + 0x01000e70: 4a06 .J LDR r2,[pc,#24] ; [0x1000e8c] = 0x1007cac + 0x01000e72: 21ff .! MOVS r1,#0xff + 0x01000e74: 3128 (1 ADDS r1,r1,#0x28 + 0x01000e76: a006 .. ADR r0,{pc}+0x1a ; 0x1000e90 + 0x01000e78: f000f8e8 .... BL _assert_handler ; 0x100104c + 0x01000e7c: 2c00 ., CMP r4,#0 + 0x01000e7e: d102 .. BNE 0x1000e86 ; UART_ReceiveData + 34 + 0x01000e80: 4809 .H LDR r0,[pc,#36] ; [0x1000ea8] = 0xf8b20 + 0x01000e82: 7900 .y LDRB r0,[r0,#4] + 0x01000e84: bd10 .. POP {r4,pc} + 0x01000e86: 4809 .H LDR r0,[pc,#36] ; [0x1000eac] = 0xf8c20 + 0x01000e88: 7900 .y LDRB r0,[r0,#4] + 0x01000e8a: e7fb .. B 0x1000e84 ; UART_ReceiveData + 32 + $d + 0x01000e8c: 01007cac .|.. DCD 16809132 + 0x01000e90: 7262694c Libr DCD 1919052108 + 0x01000e94: 65697261 arie DCD 1701409377 + 0x01000e98: 64735c73 s\sd DCD 1685281907 + 0x01000e9c: 63795c6b k\yc DCD 1668897899 + 0x01000ea0: 7261755f _uar DCD 1918989663 + 0x01000ea4: 00632e74 t.c. DCD 6499956 + 0x01000ea8: 000f8b20 ... DCD 1018656 + 0x01000eac: 000f8c20 ... DCD 1018912 + $t + i.UART_ReceiveDataLen + UART_ReceiveDataLen + 0x01000eb0: b510 .. PUSH {r4,lr} + 0x01000eb2: 4604 .F MOV r4,r0 + 0x01000eb4: 2c00 ., CMP r4,#0 + 0x01000eb6: d007 .. BEQ 0x1000ec8 ; UART_ReceiveDataLen + 24 + 0x01000eb8: 2c01 ., CMP r4,#1 + 0x01000eba: d005 .. BEQ 0x1000ec8 ; UART_ReceiveDataLen + 24 + 0x01000ebc: 4a07 .J LDR r2,[pc,#28] ; [0x1000edc] = 0x1007ce7 + 0x01000ebe: 21ff .! MOVS r1,#0xff + 0x01000ec0: 31a8 .1 ADDS r1,r1,#0xa8 + 0x01000ec2: a007 .. ADR r0,{pc}+0x1e ; 0x1000ee0 + 0x01000ec4: f000f8c2 .... BL _assert_handler ; 0x100104c + 0x01000ec8: 2c00 ., CMP r4,#0 + 0x01000eca: d103 .. BNE 0x1000ed4 ; UART_ReceiveDataLen + 36 + 0x01000ecc: 480a .H LDR r0,[pc,#40] ; [0x1000ef8] = 0xf8b00 + 0x01000ece: 6a80 .j LDR r0,[r0,#0x28] + 0x01000ed0: 0c00 .. LSRS r0,r0,#16 + 0x01000ed2: bd10 .. POP {r4,pc} + 0x01000ed4: 4809 .H LDR r0,[pc,#36] ; [0x1000efc] = 0xf8c00 + 0x01000ed6: 6a80 .j LDR r0,[r0,#0x28] + 0x01000ed8: 0c00 .. LSRS r0,r0,#16 + 0x01000eda: e7fa .. B 0x1000ed2 ; UART_ReceiveDataLen + 34 + $d + 0x01000edc: 01007ce7 .|.. DCD 16809191 + 0x01000ee0: 7262694c Libr DCD 1919052108 + 0x01000ee4: 65697261 arie DCD 1701409377 + 0x01000ee8: 64735c73 s\sd DCD 1685281907 + 0x01000eec: 63795c6b k\yc DCD 1668897899 + 0x01000ef0: 7261755f _uar DCD 1918989663 + 0x01000ef4: 00632e74 t.c. DCD 6499956 + 0x01000ef8: 000f8b00 .... DCD 1018624 + 0x01000efc: 000f8c00 .... DCD 1018880 + $t + i.UART_SendData + UART_SendData + 0x01000f00: b508 .. PUSH {r3,lr} + 0x01000f02: 9100 .. STR r1,[sp,#0] + 0x01000f04: 2800 .( CMP r0,#0 + 0x01000f06: d114 .. BNE 0x1000f32 ; UART_SendData + 50 + 0x01000f08: 466a jF MOV r2,sp + 0x01000f0a: 4b14 .K LDR r3,[pc,#80] ; [0x1000f5c] = 0xf8b00 + 0x01000f0c: 601a .` STR r2,[r3,#0] + 0x01000f0e: 461a .F MOV r2,r3 + 0x01000f10: 6892 .h LDR r2,[r2,#8] + 0x01000f12: b292 .. UXTH r2,r2 + 0x01000f14: 2301 .# MOVS r3,#1 + 0x01000f16: 041b .. LSLS r3,r3,#16 + 0x01000f18: 18d2 .. ADDS r2,r2,r3 + 0x01000f1a: 4b10 .K LDR r3,[pc,#64] ; [0x1000f5c] = 0xf8b00 + 0x01000f1c: 609a .` STR r2,[r3,#8] + 0x01000f1e: 2280 ." MOVS r2,#0x80 + 0x01000f20: 73da .s STRB r2,[r3,#0xf] + 0x01000f22: bf00 .. NOP + 0x01000f24: 4a0d .J LDR r2,[pc,#52] ; [0x1000f5c] = 0xf8b00 + 0x01000f26: 6912 .i LDR r2,[r2,#0x10] + 0x01000f28: 07d2 .. LSLS r2,r2,#31 + 0x01000f2a: 0fd2 .. LSRS r2,r2,#31 + 0x01000f2c: 2a00 .* CMP r2,#0 + 0x01000f2e: d0f9 .. BEQ 0x1000f24 ; UART_SendData + 36 + 0x01000f30: e013 .. B 0x1000f5a ; UART_SendData + 90 + 0x01000f32: 466a jF MOV r2,sp + 0x01000f34: 4b0a .K LDR r3,[pc,#40] ; [0x1000f60] = 0xf8c00 + 0x01000f36: 601a .` STR r2,[r3,#0] + 0x01000f38: 461a .F MOV r2,r3 + 0x01000f3a: 6892 .h LDR r2,[r2,#8] + 0x01000f3c: b292 .. UXTH r2,r2 + 0x01000f3e: 2301 .# MOVS r3,#1 + 0x01000f40: 041b .. LSLS r3,r3,#16 + 0x01000f42: 18d2 .. ADDS r2,r2,r3 + 0x01000f44: 4b06 .K LDR r3,[pc,#24] ; [0x1000f60] = 0xf8c00 + 0x01000f46: 609a .` STR r2,[r3,#8] + 0x01000f48: 2280 ." MOVS r2,#0x80 + 0x01000f4a: 73da .s STRB r2,[r3,#0xf] + 0x01000f4c: bf00 .. NOP + 0x01000f4e: 4a04 .J LDR r2,[pc,#16] ; [0x1000f60] = 0xf8c00 + 0x01000f50: 6912 .i LDR r2,[r2,#0x10] + 0x01000f52: 07d2 .. LSLS r2,r2,#31 + 0x01000f54: 0fd2 .. LSRS r2,r2,#31 + 0x01000f56: 2a00 .* CMP r2,#0 + 0x01000f58: d0f9 .. BEQ 0x1000f4e ; UART_SendData + 78 + 0x01000f5a: bd08 .. POP {r3,pc} + $d + 0x01000f5c: 000f8b00 .... DCD 1018624 + 0x01000f60: 000f8c00 .... DCD 1018880 + $t + i.UART_SetRxITNum + UART_SetRxITNum + 0x01000f64: b570 p. PUSH {r4-r6,lr} + 0x01000f66: 4604 .F MOV r4,r0 + 0x01000f68: 460d .F MOV r5,r1 + 0x01000f6a: 2c00 ., CMP r4,#0 + 0x01000f6c: d007 .. BEQ 0x1000f7e ; UART_SetRxITNum + 26 + 0x01000f6e: 2c01 ., CMP r4,#1 + 0x01000f70: d005 .. BEQ 0x1000f7e ; UART_SetRxITNum + 26 + 0x01000f72: 4a0f .J LDR r2,[pc,#60] ; [0x1000fb0] = 0x1007cd7 + 0x01000f74: 21ff .! MOVS r1,#0xff + 0x01000f76: 318f .1 ADDS r1,r1,#0x8f + 0x01000f78: a00e .. ADR r0,{pc}+0x3c ; 0x1000fb4 + 0x01000f7a: f000f867 ..g. BL _assert_handler ; 0x100104c + 0x01000f7e: 2c00 ., CMP r4,#0 + 0x01000f80: d10a .. BNE 0x1000f98 ; UART_SetRxITNum + 52 + 0x01000f82: 4812 .H LDR r0,[pc,#72] ; [0x1000fcc] = 0xf8b00 + 0x01000f84: 69c0 .i LDR r0,[r0,#0x1c] + 0x01000f86: 21ff .! MOVS r1,#0xff + 0x01000f88: 0209 .. LSLS r1,r1,#8 + 0x01000f8a: 4388 .C BICS r0,r0,r1 + 0x01000f8c: 0629 ). LSLS r1,r5,#24 + 0x01000f8e: 0c09 .. LSRS r1,r1,#16 + 0x01000f90: 4308 .C ORRS r0,r0,r1 + 0x01000f92: 490e .I LDR r1,[pc,#56] ; [0x1000fcc] = 0xf8b00 + 0x01000f94: 61c8 .a STR r0,[r1,#0x1c] + 0x01000f96: e009 .. B 0x1000fac ; UART_SetRxITNum + 72 + 0x01000f98: 480d .H LDR r0,[pc,#52] ; [0x1000fd0] = 0xf8c00 + 0x01000f9a: 69c0 .i LDR r0,[r0,#0x1c] + 0x01000f9c: 21ff .! MOVS r1,#0xff + 0x01000f9e: 0209 .. LSLS r1,r1,#8 + 0x01000fa0: 4388 .C BICS r0,r0,r1 + 0x01000fa2: 0629 ). LSLS r1,r5,#24 + 0x01000fa4: 0c09 .. LSRS r1,r1,#16 + 0x01000fa6: 4308 .C ORRS r0,r0,r1 + 0x01000fa8: 4909 .I LDR r1,[pc,#36] ; [0x1000fd0] = 0xf8c00 + 0x01000faa: 61c8 .a STR r0,[r1,#0x1c] + 0x01000fac: bd70 p. POP {r4-r6,pc} + $d + 0x01000fae: 0000 .. DCW 0 + 0x01000fb0: 01007cd7 .|.. DCD 16809175 + 0x01000fb4: 7262694c Libr DCD 1919052108 + 0x01000fb8: 65697261 arie DCD 1701409377 + 0x01000fbc: 64735c73 s\sd DCD 1685281907 + 0x01000fc0: 63795c6b k\yc DCD 1668897899 + 0x01000fc4: 7261755f _uar DCD 1918989663 + 0x01000fc8: 00632e74 t.c. DCD 6499956 + 0x01000fcc: 000f8b00 .... DCD 1018624 + 0x01000fd0: 000f8c00 .... DCD 1018880 + $t + i.__ARM_common_switch8 + __ARM_common_switch8 + 0x01000fd4: b430 0. PUSH {r4,r5} + 0x01000fd6: 4674 tF MOV r4,lr + 0x01000fd8: 1e64 d. SUBS r4,r4,#1 + 0x01000fda: 7825 %x LDRB r5,[r4,#0] + 0x01000fdc: 1c64 d. ADDS r4,r4,#1 + 0x01000fde: 42ab .B CMP r3,r5 + 0x01000fe0: d304 .. BCC 0x1000fec ; __ARM_common_switch8 + 24 + 0x01000fe2: 5d63 c] LDRB r3,[r4,r5] + 0x01000fe4: 005b [. LSLS r3,r3,#1 + 0x01000fe6: 18e3 .. ADDS r3,r4,r3 + 0x01000fe8: bc30 0. POP {r4,r5} + 0x01000fea: 4718 .G BX r3 + 0x01000fec: 461d .F MOV r5,r3 + 0x01000fee: e7f8 .. B 0x1000fe2 ; __ARM_common_switch8 + 14 + i.__rt_ffs + __rt_ffs + 0x01000ff0: 4601 .F MOV r1,r0 + 0x01000ff2: 2900 .) CMP r1,#0 + 0x01000ff4: d100 .. BNE 0x1000ff8 ; __rt_ffs + 8 + 0x01000ff6: 4770 pG BX lr + 0x01000ff8: b2c8 .. UXTB r0,r1 + 0x01000ffa: 2800 .( CMP r0,#0 + 0x01000ffc: d004 .. BEQ 0x1001008 ; __rt_ffs + 24 + 0x01000ffe: b2c8 .. UXTB r0,r1 + 0x01001000: 4a11 .J LDR r2,[pc,#68] ; [0x1001048] = 0x10076b3 + 0x01001002: 5c10 .\ LDRB r0,[r2,r0] + 0x01001004: 1c40 @. ADDS r0,r0,#1 + 0x01001006: e7f6 .. B 0x1000ff6 ; __rt_ffs + 6 + 0x01001008: 20ff . MOVS r0,#0xff + 0x0100100a: 0200 .. LSLS r0,r0,#8 + 0x0100100c: 4008 .@ ANDS r0,r0,r1 + 0x0100100e: 2800 .( CMP r0,#0 + 0x01001010: d007 .. BEQ 0x1001022 ; __rt_ffs + 50 + 0x01001012: 20ff . MOVS r0,#0xff + 0x01001014: 0200 .. LSLS r0,r0,#8 + 0x01001016: 4008 .@ ANDS r0,r0,r1 + 0x01001018: 1200 .. ASRS r0,r0,#8 + 0x0100101a: 4a0b .J LDR r2,[pc,#44] ; [0x1001048] = 0x10076b3 + 0x0100101c: 5c10 .\ LDRB r0,[r2,r0] + 0x0100101e: 3009 .0 ADDS r0,r0,#9 + 0x01001020: e7e9 .. B 0x1000ff6 ; __rt_ffs + 6 + 0x01001022: 20ff . MOVS r0,#0xff + 0x01001024: 0400 .. LSLS r0,r0,#16 + 0x01001026: 4008 .@ ANDS r0,r0,r1 + 0x01001028: 2800 .( CMP r0,#0 + 0x0100102a: d007 .. BEQ 0x100103c ; __rt_ffs + 76 + 0x0100102c: 20ff . MOVS r0,#0xff + 0x0100102e: 0400 .. LSLS r0,r0,#16 + 0x01001030: 4008 .@ ANDS r0,r0,r1 + 0x01001032: 1400 .. ASRS r0,r0,#16 + 0x01001034: 4a04 .J LDR r2,[pc,#16] ; [0x1001048] = 0x10076b3 + 0x01001036: 5c10 .\ LDRB r0,[r2,r0] + 0x01001038: 3011 .0 ADDS r0,r0,#0x11 + 0x0100103a: e7dc .. B 0x1000ff6 ; __rt_ffs + 6 + 0x0100103c: 0e08 .. LSRS r0,r1,#24 + 0x0100103e: 4a02 .J LDR r2,[pc,#8] ; [0x1001048] = 0x10076b3 + 0x01001040: 5c10 .\ LDRB r0,[r2,r0] + 0x01001042: 3019 .0 ADDS r0,r0,#0x19 + 0x01001044: e7d7 .. B 0x1000ff6 ; __rt_ffs + 6 + $d + 0x01001046: 0000 .. DCW 0 + 0x01001048: 010076b3 .v.. DCD 16807603 + $t + i._assert_handler + _assert_handler + 0x0100104c: bf00 .. NOP + 0x0100104e: e7fe .. B 0x100104e ; _assert_handler + 2 + i._ipc_list_resume + _ipc_list_resume + 0x01001050: b570 p. PUSH {r4-r6,lr} + 0x01001052: 4604 .F MOV r4,r0 + 0x01001054: 6820 h LDR r0,[r4,#0] + 0x01001056: 4605 .F MOV r5,r0 + 0x01001058: 3d14 .= SUBS r5,r5,#0x14 + 0x0100105a: bf00 .. NOP + 0x0100105c: bf00 .. NOP + 0x0100105e: 4628 (F MOV r0,r5 + 0x01001060: f004ff4e ..N. BL rt_thread_resume ; 0x1005f00 + 0x01001064: 2000 . MOVS r0,#0 + 0x01001066: bd70 p. POP {r4-r6,pc} + i._ipc_list_suspend + _ipc_list_suspend + 0x01001068: b5f7 .. PUSH {r0-r2,r4-r7,lr} + 0x0100106a: 4605 .F MOV r5,r0 + 0x0100106c: 460c .F MOV r4,r1 + 0x0100106e: 4620 F MOV r0,r4 + 0x01001070: f005f842 ..B. BL rt_thread_suspend ; 0x10060f8 + 0x01001074: 9802 .. LDR r0,[sp,#8] + 0x01001076: 2800 .( CMP r0,#0 + 0x01001078: d002 .. BEQ 0x1001080 ; _ipc_list_suspend + 24 + 0x0100107a: 2801 .( CMP r0,#1 + 0x0100107c: d122 ". BNE 0x10010c4 ; _ipc_list_suspend + 92 + 0x0100107e: e005 .. B 0x100108c ; _ipc_list_suspend + 36 + 0x01001080: 4621 !F MOV r1,r4 + 0x01001082: 3114 .1 ADDS r1,r1,#0x14 + 0x01001084: 4628 (F MOV r0,r5 + 0x01001086: f003fa5f .._. BL rt_list_insert_before ; 0x1004548 + 0x0100108a: e021 !. B 0x10010d0 ; _ipc_list_suspend + 104 + 0x0100108c: 682e .h LDR r6,[r5,#0] + 0x0100108e: e00e .. B 0x10010ae ; _ipc_list_suspend + 70 + 0x01001090: 4637 7F MOV r7,r6 + 0x01001092: 3f14 .? SUBS r7,r7,#0x14 + 0x01001094: 2035 5 MOVS r0,#0x35 + 0x01001096: 5d01 .] LDRB r1,[r0,r4] + 0x01001098: 5dc0 .] LDRB r0,[r0,r7] + 0x0100109a: 4281 .B CMP r1,r0 + 0x0100109c: da06 .. BGE 0x10010ac ; _ipc_list_suspend + 68 + 0x0100109e: 4621 !F MOV r1,r4 + 0x010010a0: 3114 .1 ADDS r1,r1,#0x14 + 0x010010a2: 4638 8F MOV r0,r7 + 0x010010a4: 3014 .0 ADDS r0,r0,#0x14 + 0x010010a6: f003fa4f ..O. BL rt_list_insert_before ; 0x1004548 + 0x010010aa: e002 .. B 0x10010b2 ; _ipc_list_suspend + 74 + 0x010010ac: 6836 6h LDR r6,[r6,#0] + 0x010010ae: 42ae .B CMP r6,r5 + 0x010010b0: d1ee .. BNE 0x1001090 ; _ipc_list_suspend + 40 + 0x010010b2: bf00 .. NOP + 0x010010b4: 42ae .B CMP r6,r5 + 0x010010b6: d104 .. BNE 0x10010c2 ; _ipc_list_suspend + 90 + 0x010010b8: 4621 !F MOV r1,r4 + 0x010010ba: 3114 .1 ADDS r1,r1,#0x14 + 0x010010bc: 4628 (F MOV r0,r5 + 0x010010be: f003fa43 ..C. BL rt_list_insert_before ; 0x1004548 + 0x010010c2: e005 .. B 0x10010d0 ; _ipc_list_suspend + 104 + 0x010010c4: 2297 ." MOVS r2,#0x97 + 0x010010c6: 4904 .I LDR r1,[pc,#16] ; [0x10010d8] = 0x10077d5 + 0x010010c8: a004 .. ADR r0,{pc}+0x14 ; 0x10010dc + 0x010010ca: f002fa99 .... BL rt_assert_handler ; 0x1003600 + 0x010010ce: bf00 .. NOP + 0x010010d0: bf00 .. NOP + 0x010010d2: 2000 . MOVS r0,#0 + 0x010010d4: bdfe .. POP {r1-r7,pc} + $d + 0x010010d6: 0000 .. DCW 0 + 0x010010d8: 010077d5 .w.. DCD 16807893 + 0x010010dc: 00000030 0... DCD 48 + $t + i._ipc_object_init + _ipc_object_init + 0x010010e0: b510 .. PUSH {r4,lr} + 0x010010e2: 4604 .F MOV r4,r0 + 0x010010e4: 4620 F MOV r0,r4 + 0x010010e6: 3014 .0 ADDS r0,r0,#0x14 + 0x010010e8: f003fa1a .... BL rt_list_init ; 0x1004520 + 0x010010ec: 2000 . MOVS r0,#0 + 0x010010ee: bd10 .. POP {r4,pc} + i._memheap_dump_tag + _memheap_dump_tag + 0x010010f0: b57c |. PUSH {r2-r6,lr} + 0x010010f2: 4604 .F MOV r4,r0 + 0x010010f4: 4625 %F MOV r5,r4 + 0x010010f6: 3510 .5 ADDS r5,r5,#0x10 + 0x010010f8: 2204 ." MOVS r2,#4 + 0x010010fa: 4629 )F MOV r1,r5 + 0x010010fc: 4668 hF MOV r0,sp + 0x010010fe: f003fbd1 .... BL rt_memcpy ; 0x10048a4 + 0x01001102: 4625 %F MOV r5,r4 + 0x01001104: 3514 .5 ADDS r5,r5,#0x14 + 0x01001106: 2204 ." MOVS r2,#4 + 0x01001108: 4629 )F MOV r1,r5 + 0x0100110a: a801 .. ADD r0,sp,#4 + 0x0100110c: f003fbca .... BL rt_memcpy ; 0x10048a4 + 0x01001110: 466a jF MOV r2,sp + 0x01001112: 2108 .! MOVS r1,#8 + 0x01001114: a001 .. ADR r0,{pc}+8 ; 0x100111c + 0x01001116: f003f9db .... BL rt_kprintf ; 0x10044d0 + 0x0100111a: bd7c |. POP {r2-r6,pc} + $d + 0x0100111c: 732a2e25 %.*s DCD 1932144165 + 0x01001120: 00000000 .... DCD 0 + $t + i._msh_exec_cmd + _msh_exec_cmd + 0x01001124: b5f7 .. PUSH {r0-r2,r4-r7,lr} + 0x01001126: b08c .. SUB sp,sp,#0x30 + 0x01001128: 4605 .F MOV r5,r0 + 0x0100112a: 4617 .F MOV r7,r2 + 0x0100112c: 2400 .$ MOVS r4,#0 + 0x0100112e: 2d00 .- CMP r5,#0 + 0x01001130: d105 .. BNE 0x100113e ; _msh_exec_cmd + 26 + 0x01001132: 22ff ." MOVS r2,#0xff + 0x01001134: 321d .2 ADDS r2,r2,#0x1d + 0x01001136: 491d .I LDR r1,[pc,#116] ; [0x10011ac] = 0x100750f + 0x01001138: a01d .. ADR r0,{pc}+0x78 ; 0x10011b0 + 0x0100113a: f002fa61 ..a. BL rt_assert_handler ; 0x1003600 + 0x0100113e: 2f00 ./ CMP r7,#0 + 0x01001140: d105 .. BNE 0x100114e ; _msh_exec_cmd + 42 + 0x01001142: 22ff ." MOVS r2,#0xff + 0x01001144: 321e .2 ADDS r2,r2,#0x1e + 0x01001146: 4919 .I LDR r1,[pc,#100] ; [0x10011ac] = 0x100750f + 0x01001148: a01a .. ADR r0,{pc}+0x6c ; 0x10011b4 + 0x0100114a: f002fa59 ..Y. BL rt_assert_handler ; 0x1003600 + 0x0100114e: e000 .. B 0x1001152 ; _msh_exec_cmd + 46 + 0x01001150: 1c64 d. ADDS r4,r4,#1 + 0x01001152: 5d28 (] LDRB r0,[r5,r4] + 0x01001154: 2820 ( CMP r0,#0x20 + 0x01001156: d005 .. BEQ 0x1001164 ; _msh_exec_cmd + 64 + 0x01001158: 5d28 (] LDRB r0,[r5,r4] + 0x0100115a: 2809 .( CMP r0,#9 + 0x0100115c: d002 .. BEQ 0x1001164 ; _msh_exec_cmd + 64 + 0x0100115e: 980d .. LDR r0,[sp,#0x34] + 0x01001160: 4284 .B CMP r4,r0 + 0x01001162: d3f5 .. BCC 0x1001150 ; _msh_exec_cmd + 44 + 0x01001164: 2c00 ., CMP r4,#0 + 0x01001166: d102 .. BNE 0x100116e ; _msh_exec_cmd + 74 + 0x01001168: 1e60 `. SUBS r0,r4,#1 + 0x0100116a: b00f .. ADD sp,sp,#0x3c + 0x0100116c: bdf0 .. POP {r4-r7,pc} + 0x0100116e: 4621 !F MOV r1,r4 + 0x01001170: 4628 (F MOV r0,r5 + 0x01001172: f001ffed .... BL msh_get_cmd ; 0x1003150 + 0x01001176: 4606 .F MOV r6,r0 + 0x01001178: 2e00 .. CMP r6,#0 + 0x0100117a: d101 .. BNE 0x1001180 ; _msh_exec_cmd + 92 + 0x0100117c: 1e40 @. SUBS r0,r0,#1 + 0x0100117e: e7f4 .. B 0x100116a ; _msh_exec_cmd + 70 + 0x01001180: 2128 (! MOVS r1,#0x28 + 0x01001182: a801 .. ADD r0,sp,#4 + 0x01001184: f7fffb39 ..9. BL __aeabi_memclr4 ; 0x10007fa + 0x01001188: aa01 .. ADD r2,sp,#4 + 0x0100118a: 4628 (F MOV r0,r5 + 0x0100118c: 990d .. LDR r1,[sp,#0x34] + 0x0100118e: f002f831 ..1. BL msh_split ; 0x10031f4 + 0x01001192: 900b .. STR r0,[sp,#0x2c] + 0x01001194: 980b .. LDR r0,[sp,#0x2c] + 0x01001196: 2800 .( CMP r0,#0 + 0x01001198: d101 .. BNE 0x100119e ; _msh_exec_cmd + 122 + 0x0100119a: 1e40 @. SUBS r0,r0,#1 + 0x0100119c: e7e5 .. B 0x100116a ; _msh_exec_cmd + 70 + 0x0100119e: a901 .. ADD r1,sp,#4 + 0x010011a0: 980b .. LDR r0,[sp,#0x2c] + 0x010011a2: 47b0 .G BLX r6 + 0x010011a4: 6038 8` STR r0,[r7,#0] + 0x010011a6: 2000 . MOVS r0,#0 + 0x010011a8: e7df .. B 0x100116a ; _msh_exec_cmd + 70 + $d + 0x010011aa: 0000 .. DCW 0 + 0x010011ac: 0100750f .u.. DCD 16807183 + 0x010011b0: 00646d63 cmd. DCD 6581603 + 0x010011b4: 70746572 retp DCD 1886676338 + 0x010011b8: 00000000 .... DCD 0 + $t + i._pin_control + _pin_control + 0x010011bc: b5f8 .. PUSH {r3-r7,lr} + 0x010011be: 4605 .F MOV r5,r0 + 0x010011c0: 4616 .F MOV r6,r2 + 0x010011c2: 462f /F MOV r7,r5 + 0x010011c4: 2f00 ./ CMP r7,#0 + 0x010011c6: d104 .. BNE 0x10011d2 ; _pin_control + 22 + 0x010011c8: 2238 8" MOVS r2,#0x38 + 0x010011ca: 4908 .I LDR r1,[pc,#32] ; [0x10011ec] = 0x1007291 + 0x010011cc: a008 .. ADR r0,{pc}+0x24 ; 0x10011f0 + 0x010011ce: f002fa17 .... BL rt_assert_handler ; 0x1003600 + 0x010011d2: 4634 4F MOV r4,r6 + 0x010011d4: 2c00 ., CMP r4,#0 + 0x010011d6: d101 .. BNE 0x10011dc ; _pin_control + 32 + 0x010011d8: 1e60 `. SUBS r0,r4,#1 + 0x010011da: bdf8 .. POP {r3-r7,pc} + 0x010011dc: 8862 b. LDRH r2,[r4,#2] + 0x010011de: 8821 !. LDRH r1,[r4,#0] + 0x010011e0: 6c38 8l LDR r0,[r7,#0x40] + 0x010011e2: 6803 .h LDR r3,[r0,#0] + 0x010011e4: 4628 (F MOV r0,r5 + 0x010011e6: 4798 .G BLX r3 + 0x010011e8: 2000 . MOVS r0,#0 + 0x010011ea: e7f6 .. B 0x10011da ; _pin_control + 30 + $d + 0x010011ec: 01007291 .r.. DCD 16806545 + 0x010011f0: 206e6970 pin DCD 544106864 + 0x010011f4: 52203d21 != R DCD 1377844513 + 0x010011f8: 554e5f54 T_NU DCD 1431199572 + 0x010011fc: 00004c4c LL.. DCD 19532 + $t + i._pin_read + _pin_read + 0x01001200: b5f8 .. PUSH {r3-r7,lr} + 0x01001202: 4605 .F MOV r5,r0 + 0x01001204: 4616 .F MOV r6,r2 + 0x01001206: 461f .F MOV r7,r3 + 0x01001208: 9500 .. STR r5,[sp,#0] + 0x0100120a: 9d00 .. LDR r5,[sp,#0] + 0x0100120c: 2d00 .- CMP r5,#0 + 0x0100120e: d104 .. BNE 0x100121a ; _pin_read + 26 + 0x01001210: 2219 ." MOVS r2,#0x19 + 0x01001212: 490a .I LDR r1,[pc,#40] ; [0x100123c] = 0x100727c + 0x01001214: a00a .. ADR r0,{pc}+0x2c ; 0x1001240 + 0x01001216: f002f9f3 .... BL rt_assert_handler ; 0x1003600 + 0x0100121a: 4634 4F MOV r4,r6 + 0x0100121c: 2c00 ., CMP r4,#0 + 0x0100121e: d001 .. BEQ 0x1001224 ; _pin_read + 36 + 0x01001220: 2f04 ./ CMP r7,#4 + 0x01001222: d001 .. BEQ 0x1001228 ; _pin_read + 40 + 0x01001224: 2000 . MOVS r0,#0 + 0x01001226: bdf8 .. POP {r3-r7,pc} + 0x01001228: 8821 !. LDRH r1,[r4,#0] + 0x0100122a: 9800 .. LDR r0,[sp,#0] + 0x0100122c: 6c00 .l LDR r0,[r0,#0x40] + 0x0100122e: 6882 .h LDR r2,[r0,#8] + 0x01001230: 4628 (F MOV r0,r5 + 0x01001232: 4790 .G BLX r2 + 0x01001234: 8060 `. STRH r0,[r4,#2] + 0x01001236: 4638 8F MOV r0,r7 + 0x01001238: e7f5 .. B 0x1001226 ; _pin_read + 38 + $d + 0x0100123a: 0000 .. DCW 0 + 0x0100123c: 0100727c |r.. DCD 16806524 + 0x01001240: 206e6970 pin DCD 544106864 + 0x01001244: 52203d21 != R DCD 1377844513 + 0x01001248: 554e5f54 T_NU DCD 1431199572 + 0x0100124c: 00004c4c LL.. DCD 19532 + $t + i._pin_write + _pin_write + 0x01001250: b5f8 .. PUSH {r3-r7,lr} + 0x01001252: 4605 .F MOV r5,r0 + 0x01001254: 4616 .F MOV r6,r2 + 0x01001256: 461f .F MOV r7,r3 + 0x01001258: 9500 .. STR r5,[sp,#0] + 0x0100125a: 9d00 .. LDR r5,[sp,#0] + 0x0100125c: 2d00 .- CMP r5,#0 + 0x0100125e: d104 .. BNE 0x100126a ; _pin_write + 26 + 0x01001260: 2228 (" MOVS r2,#0x28 + 0x01001262: 490a .I LDR r1,[pc,#40] ; [0x100128c] = 0x1007286 + 0x01001264: a00a .. ADR r0,{pc}+0x2c ; 0x1001290 + 0x01001266: f002f9cb .... BL rt_assert_handler ; 0x1003600 + 0x0100126a: 4634 4F MOV r4,r6 + 0x0100126c: 2c00 ., CMP r4,#0 + 0x0100126e: d001 .. BEQ 0x1001274 ; _pin_write + 36 + 0x01001270: 2f04 ./ CMP r7,#4 + 0x01001272: d001 .. BEQ 0x1001278 ; _pin_write + 40 + 0x01001274: 2000 . MOVS r0,#0 + 0x01001276: bdf8 .. POP {r3-r7,pc} + 0x01001278: 8862 b. LDRH r2,[r4,#2] + 0x0100127a: 8821 !. LDRH r1,[r4,#0] + 0x0100127c: 9800 .. LDR r0,[sp,#0] + 0x0100127e: 6c00 .l LDR r0,[r0,#0x40] + 0x01001280: 6843 Ch LDR r3,[r0,#4] + 0x01001282: 4628 (F MOV r0,r5 + 0x01001284: 4798 .G BLX r3 + 0x01001286: 4638 8F MOV r0,r7 + 0x01001288: e7f5 .. B 0x1001276 ; _pin_write + 38 + $d + 0x0100128a: 0000 .. DCW 0 + 0x0100128c: 01007286 .r.. DCD 16806534 + 0x01001290: 206e6970 pin DCD 544106864 + 0x01001294: 52203d21 != R DCD 1377844513 + 0x01001298: 554e5f54 T_NU DCD 1431199572 + 0x0100129c: 00004c4c LL.. DCD 19532 + $t + i._rt_scheduler_stack_check + _rt_scheduler_stack_check + 0x010012a0: b570 p. PUSH {r4-r6,lr} + 0x010012a2: 4604 .F MOV r4,r0 + 0x010012a4: 2c00 ., CMP r4,#0 + 0x010012a6: d104 .. BNE 0x10012b2 ; _rt_scheduler_stack_check + 18 + 0x010012a8: 2254 T" MOVS r2,#0x54 + 0x010012aa: 4913 .I LDR r1,[pc,#76] ; [0x10012f8] = 0x1007598 + 0x010012ac: a013 .. ADR r0,{pc}+0x50 ; 0x10012fc + 0x010012ae: f002f9a7 .... BL rt_assert_handler ; 0x1003600 + 0x010012b2: 6aa0 .j LDR r0,[r4,#0x28] + 0x010012b4: 7800 .x LDRB r0,[r0,#0] + 0x010012b6: 2823 #( CMP r0,#0x23 + 0x010012b8: d109 .. BNE 0x10012ce ; _rt_scheduler_stack_check + 46 + 0x010012ba: 6aa1 .j LDR r1,[r4,#0x28] + 0x010012bc: 69e0 .i LDR r0,[r4,#0x1c] + 0x010012be: 4288 .B CMP r0,r1 + 0x010012c0: d905 .. BLS 0x10012ce ; _rt_scheduler_stack_check + 46 + 0x010012c2: 6ae1 .j LDR r1,[r4,#0x2c] + 0x010012c4: 6aa0 .j LDR r0,[r4,#0x28] + 0x010012c6: 1840 @. ADDS r0,r0,r1 + 0x010012c8: 69e1 .i LDR r1,[r4,#0x1c] + 0x010012ca: 4288 .B CMP r0,r1 + 0x010012cc: d20a .. BCS 0x10012e4 ; _rt_scheduler_stack_check + 68 + 0x010012ce: 4621 !F MOV r1,r4 + 0x010012d0: a00f .. ADR r0,{pc}+0x40 ; 0x1001310 + 0x010012d2: f003f8fd .... BL rt_kprintf ; 0x10044d0 + 0x010012d6: f7fff8f3 .... BL rt_hw_interrupt_disable ; 0x10004c0 + 0x010012da: 4605 .F MOV r5,r0 + 0x010012dc: bf00 .. NOP + 0x010012de: 2d00 .- CMP r5,#0 + 0x010012e0: d1fd .. BNE 0x10012de ; _rt_scheduler_stack_check + 62 + 0x010012e2: e008 .. B 0x10012f6 ; _rt_scheduler_stack_check + 86 + 0x010012e4: 6aa0 .j LDR r0,[r4,#0x28] + 0x010012e6: 3020 0 ADDS r0,r0,#0x20 + 0x010012e8: 69e1 .i LDR r1,[r4,#0x1c] + 0x010012ea: 4281 .B CMP r1,r0 + 0x010012ec: d803 .. BHI 0x10012f6 ; _rt_scheduler_stack_check + 86 + 0x010012ee: 4621 !F MOV r1,r4 + 0x010012f0: a00e .. ADR r0,{pc}+0x3c ; 0x100132c + 0x010012f2: f003f8ed .... BL rt_kprintf ; 0x10044d0 + 0x010012f6: bd70 p. POP {r4-r6,pc} + $d + 0x010012f8: 01007598 .u.. DCD 16807320 + 0x010012fc: 65726874 thre DCD 1701996660 + 0x01001300: 21206461 ad ! DCD 555770977 + 0x01001304: 5452203d = RT DCD 1414668349 + 0x01001308: 4c554e5f _NUL DCD 1280659039 + 0x0100130c: 0000004c L... DCD 76 + 0x01001310: 65726874 thre DCD 1701996660 + 0x01001314: 253a6461 ad:% DCD 624583777 + 0x01001318: 74732073 s st DCD 1953702003 + 0x0100131c: 206b6361 ack DCD 543908705 + 0x01001320: 7265766f over DCD 1919252079 + 0x01001324: 776f6c66 flow DCD 2003790950 + 0x01001328: 0000000a .... DCD 10 + 0x0100132c: 6e726177 warn DCD 1852989815 + 0x01001330: 3a676e69 ing: DCD 979857001 + 0x01001334: 20732520 %s DCD 544417056 + 0x01001338: 63617473 stac DCD 1667331187 + 0x0100133c: 7369206b k is DCD 1936269419 + 0x01001340: 6f6c6320 clo DCD 1869374240 + 0x01001344: 74206573 se t DCD 1948280179 + 0x01001348: 6e65206f o en DCD 1852121199 + 0x0100134c: 666f2064 d of DCD 1718558820 + 0x01001350: 61747320 sta DCD 1635021600 + 0x01001354: 61206b63 ck a DCD 1629514595 + 0x01001358: 65726464 ddre DCD 1701995620 + 0x0100135c: 0a2e7373 ss.. DCD 170816371 + 0x01001360: 00000000 .... DCD 0 + $t + i._scheduler_get_highest_priority_thread + _scheduler_get_highest_priority_thread + 0x01001364: b570 p. PUSH {r4-r6,lr} + 0x01001366: 4604 .F MOV r4,r0 + 0x01001368: 4806 .H LDR r0,[pc,#24] ; [0x1001384] = 0x20024 + 0x0100136a: 6800 .h LDR r0,[r0,#0] + 0x0100136c: f7fffe40 ..@. BL __rt_ffs ; 0x1000ff0 + 0x01001370: 1e45 E. SUBS r5,r0,#1 + 0x01001372: 00e8 .. LSLS r0,r5,#3 + 0x01001374: 4904 .I LDR r1,[pc,#16] ; [0x1001388] = 0x20274 + 0x01001376: 5808 .X LDR r0,[r1,r0] + 0x01001378: 4606 .F MOV r6,r0 + 0x0100137a: 3e14 .> SUBS r6,r6,#0x14 + 0x0100137c: 6025 %` STR r5,[r4,#0] + 0x0100137e: 4630 0F MOV r0,r6 + 0x01001380: bd70 p. POP {r4-r6,pc} + $d + 0x01001382: 0000 .. DCW 0 + 0x01001384: 00020024 $... DCD 131108 + 0x01001388: 00020274 t... DCD 131700 + $t + i._serial_check_buffer_size + _serial_check_buffer_size + 0x0100138c: b510 .. PUSH {r4,lr} + 0x0100138e: 4809 .H LDR r0,[pc,#36] ; [0x10013b4] = 0x2000c + 0x01001390: 6800 .h LDR r0,[r0,#0] + 0x01001392: 2800 .( CMP r0,#0 + 0x01001394: d10d .. BNE 0x10013b2 ; _serial_check_buffer_size + 38 + 0x01001396: bf00 .. NOP + 0x01001398: a007 .. ADR r0,{pc}+0x20 ; 0x10013b8 + 0x0100139a: f003f899 .... BL rt_kprintf ; 0x10044d0 + 0x0100139e: 480a .H LDR r0,[pc,#40] ; [0x10013c8] = 0x1007cfc + 0x010013a0: f003f896 .... BL rt_kprintf ; 0x10044d0 + 0x010013a4: a009 .. ADR r0,{pc}+0x28 ; 0x10013cc + 0x010013a6: f003f893 .... BL rt_kprintf ; 0x10044d0 + 0x010013aa: bf00 .. NOP + 0x010013ac: 2001 . MOVS r0,#1 + 0x010013ae: 4901 .I LDR r1,[pc,#4] ; [0x10013b4] = 0x2000c + 0x010013b0: 6008 .` STR r0,[r1,#0] + 0x010013b2: bd10 .. POP {r4,pc} + $d + 0x010013b4: 0002000c .... DCD 131084 + 0x010013b8: 33335b1b .[33 DCD 859003675 + 0x010013bc: 2f575b6d m[W/ DCD 794254189 + 0x010013c0: 54524155 UART DCD 1414676821 + 0x010013c4: 0000205d ] .. DCD 8285 + 0x010013c8: 01007cfc .|.. DCD 16809212 + 0x010013cc: 6d305b1b .[0m DCD 1831885595 + 0x010013d0: 0000000a .... DCD 10 + $t + i._serial_int_rx + _serial_int_rx + 0x010013d4: b5fe .. PUSH {r1-r7,lr} + 0x010013d6: 4606 .F MOV r6,r0 + 0x010013d8: 460f .F MOV r7,r1 + 0x010013da: 4615 .F MOV r5,r2 + 0x010013dc: 2e00 .. CMP r6,#0 + 0x010013de: d105 .. BNE 0x10013ec ; _serial_int_rx + 24 + 0x010013e0: 22ff ." MOVS r2,#0xff + 0x010013e2: 320f .2 ADDS r2,r2,#0xf + 0x010013e4: 491f .I LDR r1,[pc,#124] ; [0x1001464] = 0x1007324 + 0x010013e6: a020 . ADR r0,{pc}+0x82 ; 0x1001468 + 0x010013e8: f002f90a .... BL rt_assert_handler ; 0x1003600 + 0x010013ec: 9502 .. STR r5,[sp,#8] + 0x010013ee: 6cf4 .l LDR r4,[r6,#0x4c] + 0x010013f0: 2c00 ., CMP r4,#0 + 0x010013f2: d105 .. BNE 0x1001400 ; _serial_int_rx + 44 + 0x010013f4: 22ff ." MOVS r2,#0xff + 0x010013f6: 3213 .2 ADDS r2,r2,#0x13 + 0x010013f8: 491a .I LDR r1,[pc,#104] ; [0x1001464] = 0x1007324 + 0x010013fa: a020 . ADR r0,{pc}+0x82 ; 0x100147c + 0x010013fc: f002f900 .... BL rt_assert_handler ; 0x1003600 + 0x01001400: e029 ). B 0x1001456 ; _serial_int_rx + 130 + 0x01001402: f7fff85d ..]. BL rt_hw_interrupt_disable ; 0x10004c0 + 0x01001406: 9000 .. STR r0,[sp,#0] + 0x01001408: 88e0 .. LDRH r0,[r4,#6] + 0x0100140a: 88a1 .. LDRH r1,[r4,#4] + 0x0100140c: 4288 .B CMP r0,r1 + 0x0100140e: d106 .. BNE 0x100141e ; _serial_int_rx + 74 + 0x01001410: 68a0 .h LDR r0,[r4,#8] + 0x01001412: 2800 .( CMP r0,#0 + 0x01001414: d103 .. BNE 0x100141e ; _serial_int_rx + 74 + 0x01001416: 9800 .. LDR r0,[sp,#0] + 0x01001418: f7fff856 ..V. BL rt_hw_interrupt_enable ; 0x10004c8 + 0x0100141c: e01d .. B 0x100145a ; _serial_int_rx + 134 + 0x0100141e: 88e1 .. LDRH r1,[r4,#6] + 0x01001420: 6820 h LDR r0,[r4,#0] + 0x01001422: 5c40 @\ LDRB r0,[r0,r1] + 0x01001424: 9001 .. STR r0,[sp,#4] + 0x01001426: 88e0 .. LDRH r0,[r4,#6] + 0x01001428: 1c40 @. ADDS r0,r0,#1 + 0x0100142a: 80e0 .. STRH r0,[r4,#6] + 0x0100142c: 88e1 .. LDRH r1,[r4,#6] + 0x0100142e: 6cb0 .l LDR r0,[r6,#0x48] + 0x01001430: 0180 .. LSLS r0,r0,#6 + 0x01001432: 0c00 .. LSRS r0,r0,#16 + 0x01001434: 4281 .B CMP r1,r0 + 0x01001436: db01 .. BLT 0x100143c ; _serial_int_rx + 104 + 0x01001438: 2000 . MOVS r0,#0 + 0x0100143a: 80e0 .. STRH r0,[r4,#6] + 0x0100143c: 68a0 .h LDR r0,[r4,#8] + 0x0100143e: 2801 .( CMP r0,#1 + 0x01001440: d101 .. BNE 0x1001446 ; _serial_int_rx + 114 + 0x01001442: 2000 . MOVS r0,#0 + 0x01001444: 60a0 .` STR r0,[r4,#8] + 0x01001446: 9800 .. LDR r0,[sp,#0] + 0x01001448: f7fff83e ..>. BL rt_hw_interrupt_enable ; 0x10004c8 + 0x0100144c: 9801 .. LDR r0,[sp,#4] + 0x0100144e: 7038 8p STRB r0,[r7,#0] + 0x01001450: 1c7f .. ADDS r7,r7,#1 + 0x01001452: 1e6d m. SUBS r5,r5,#1 + 0x01001454: bf00 .. NOP + 0x01001456: 2d00 .- CMP r5,#0 + 0x01001458: d1d3 .. BNE 0x1001402 ; _serial_int_rx + 46 + 0x0100145a: bf00 .. NOP + 0x0100145c: 9802 .. LDR r0,[sp,#8] + 0x0100145e: 1b40 @. SUBS r0,r0,r5 + 0x01001460: bdfe .. POP {r1-r7,pc} + $d + 0x01001462: 0000 .. DCW 0 + 0x01001464: 01007324 $s.. DCD 16806692 + 0x01001468: 69726573 seri DCD 1769104755 + 0x0100146c: 21206c61 al ! DCD 555773025 + 0x01001470: 5452203d = RT DCD 1414668349 + 0x01001474: 4c554e5f _NUL DCD 1280659039 + 0x01001478: 0000004c L... DCD 76 + 0x0100147c: 665f7872 rx_f DCD 1717532786 + 0x01001480: 206f6669 ifo DCD 544171625 + 0x01001484: 52203d21 != R DCD 1377844513 + 0x01001488: 554e5f54 T_NU DCD 1431199572 + 0x0100148c: 00004c4c LL.. DCD 19532 + $t + i._serial_int_tx + _serial_int_tx + 0x01001490: b5f8 .. PUSH {r3-r7,lr} + 0x01001492: 4604 .F MOV r4,r0 + 0x01001494: 460e .F MOV r6,r1 + 0x01001496: 4615 .F MOV r5,r2 + 0x01001498: 2c00 ., CMP r4,#0 + 0x0100149a: d105 .. BNE 0x10014a8 ; _serial_int_tx + 24 + 0x0100149c: 22ff ." MOVS r2,#0xff + 0x0100149e: 323f ?2 ADDS r2,r2,#0x3f + 0x010014a0: 491c .I LDR r1,[pc,#112] ; [0x1001514] = 0x1007333 + 0x010014a2: 481d .H LDR r0,[pc,#116] ; [0x1001518] = 0x1001580 + 0x010014a4: f002f8ac .... BL rt_assert_handler ; 0x1003600 + 0x010014a8: 9500 .. STR r5,[sp,#0] + 0x010014aa: 6d27 'm LDR r7,[r4,#0x50] + 0x010014ac: 2f00 ./ CMP r7,#0 + 0x010014ae: d105 .. BNE 0x10014bc ; _serial_int_tx + 44 + 0x010014b0: 22ff ." MOVS r2,#0xff + 0x010014b2: 3243 C2 ADDS r2,r2,#0x43 + 0x010014b4: 4917 .I LDR r1,[pc,#92] ; [0x1001514] = 0x1007333 + 0x010014b6: a019 .. ADR r0,{pc}+0x66 ; 0x100151c + 0x010014b8: f002f8a2 .... BL rt_assert_handler ; 0x1003600 + 0x010014bc: e024 $. B 0x1001508 ; _serial_int_tx + 120 + 0x010014be: 7830 0x LDRB r0,[r6,#0] + 0x010014c0: 280a .( CMP r0,#0xa + 0x010014c2: d111 .. BNE 0x10014e8 ; _serial_int_tx + 88 + 0x010014c4: 8b20 . LDRH r0,[r4,#0x18] + 0x010014c6: 2140 @! MOVS r1,#0x40 + 0x010014c8: 4008 .@ ANDS r0,r0,r1 + 0x010014ca: 2800 .( CMP r0,#0 + 0x010014cc: d00c .. BEQ 0x10014e8 ; _serial_int_tx + 88 + 0x010014ce: 6c20 l LDR r0,[r4,#0x40] + 0x010014d0: 210d .! MOVS r1,#0xd + 0x010014d2: 6882 .h LDR r2,[r0,#8] + 0x010014d4: 4620 F MOV r0,r4 + 0x010014d6: 4790 .G BLX r2 + 0x010014d8: 1c40 @. ADDS r0,r0,#1 + 0x010014da: 2800 .( CMP r0,#0 + 0x010014dc: d104 .. BNE 0x10014e8 ; _serial_int_tx + 88 + 0x010014de: 1e41 A. SUBS r1,r0,#1 + 0x010014e0: 4638 8F MOV r0,r7 + 0x010014e2: f002f937 ..7. BL rt_completion_wait ; 0x1003754 + 0x010014e6: e00f .. B 0x1001508 ; _serial_int_tx + 120 + 0x010014e8: 7831 1x LDRB r1,[r6,#0] + 0x010014ea: 6c20 l LDR r0,[r4,#0x40] + 0x010014ec: 6882 .h LDR r2,[r0,#8] + 0x010014ee: 4620 F MOV r0,r4 + 0x010014f0: 4790 .G BLX r2 + 0x010014f2: 1c40 @. ADDS r0,r0,#1 + 0x010014f4: 2800 .( CMP r0,#0 + 0x010014f6: d104 .. BNE 0x1001502 ; _serial_int_tx + 114 + 0x010014f8: 1e41 A. SUBS r1,r0,#1 + 0x010014fa: 4638 8F MOV r0,r7 + 0x010014fc: f002f92a ..*. BL rt_completion_wait ; 0x1003754 + 0x01001500: e002 .. B 0x1001508 ; _serial_int_tx + 120 + 0x01001502: 1c76 v. ADDS r6,r6,#1 + 0x01001504: 1e6d m. SUBS r5,r5,#1 + 0x01001506: bf00 .. NOP + 0x01001508: 2d00 .- CMP r5,#0 + 0x0100150a: d1d8 .. BNE 0x10014be ; _serial_int_tx + 46 + 0x0100150c: 9800 .. LDR r0,[sp,#0] + 0x0100150e: 1b40 @. SUBS r0,r0,r5 + 0x01001510: bdf8 .. POP {r3-r7,pc} + $d + 0x01001512: 0000 .. DCW 0 + 0x01001514: 01007333 3s.. DCD 16806707 + 0x01001518: 01001580 .... DCD 16782720 + 0x0100151c: 21207874 tx ! DCD 555776116 + 0x01001520: 5452203d = RT DCD 1414668349 + 0x01001524: 4c554e5f _NUL DCD 1280659039 + 0x01001528: 0000004c L... DCD 76 + $t + i._serial_poll_rx + _serial_poll_rx + 0x0100152c: b5f8 .. PUSH {r3-r7,lr} + 0x0100152e: 4606 .F MOV r6,r0 + 0x01001530: 460f .F MOV r7,r1 + 0x01001532: 4614 .F MOV r4,r2 + 0x01001534: 2e00 .. CMP r6,#0 + 0x01001536: d104 .. BNE 0x1001542 ; _serial_poll_rx + 22 + 0x01001538: 22d8 ." MOVS r2,#0xd8 + 0x0100153a: 4910 .I LDR r1,[pc,#64] ; [0x100157c] = 0x1007304 + 0x0100153c: a010 .. ADR r0,{pc}+0x44 ; 0x1001580 + 0x0100153e: f002f85f .._. BL rt_assert_handler ; 0x1003600 + 0x01001542: 9400 .. STR r4,[sp,#0] + 0x01001544: e013 .. B 0x100156e ; _serial_poll_rx + 66 + 0x01001546: 6c30 0l LDR r0,[r6,#0x40] + 0x01001548: 68c1 .h LDR r1,[r0,#0xc] + 0x0100154a: 4630 0F MOV r0,r6 + 0x0100154c: 4788 .G BLX r1 + 0x0100154e: 4605 .F MOV r5,r0 + 0x01001550: 1c68 h. ADDS r0,r5,#1 + 0x01001552: 2800 .( CMP r0,#0 + 0x01001554: d100 .. BNE 0x1001558 ; _serial_poll_rx + 44 + 0x01001556: e00c .. B 0x1001572 ; _serial_poll_rx + 70 + 0x01001558: 703d =p STRB r5,[r7,#0] + 0x0100155a: 1c7f .. ADDS r7,r7,#1 + 0x0100155c: 1e64 d. SUBS r4,r4,#1 + 0x0100155e: 8b30 0. LDRH r0,[r6,#0x18] + 0x01001560: 2140 @! MOVS r1,#0x40 + 0x01001562: 4008 .@ ANDS r0,r0,r1 + 0x01001564: 2800 .( CMP r0,#0 + 0x01001566: d002 .. BEQ 0x100156e ; _serial_poll_rx + 66 + 0x01001568: 2d0a .- CMP r5,#0xa + 0x0100156a: d100 .. BNE 0x100156e ; _serial_poll_rx + 66 + 0x0100156c: e001 .. B 0x1001572 ; _serial_poll_rx + 70 + 0x0100156e: 2c00 ., CMP r4,#0 + 0x01001570: d1e9 .. BNE 0x1001546 ; _serial_poll_rx + 26 + 0x01001572: bf00 .. NOP + 0x01001574: 9800 .. LDR r0,[sp,#0] + 0x01001576: 1b00 .. SUBS r0,r0,r4 + 0x01001578: bdf8 .. POP {r3-r7,pc} + $d + 0x0100157a: 0000 .. DCW 0 + 0x0100157c: 01007304 .s.. DCD 16806660 + 0x01001580: 69726573 seri DCD 1769104755 + 0x01001584: 21206c61 al ! DCD 555773025 + 0x01001588: 5452203d = RT DCD 1414668349 + 0x0100158c: 4c554e5f _NUL DCD 1280659039 + 0x01001590: 0000004c L... DCD 76 + $t + i._serial_poll_tx + _serial_poll_tx + 0x01001594: b5f8 .. PUSH {r3-r7,lr} + 0x01001596: 4604 .F MOV r4,r0 + 0x01001598: 460e .F MOV r6,r1 + 0x0100159a: 4615 .F MOV r5,r2 + 0x0100159c: 2c00 ., CMP r4,#0 + 0x0100159e: d104 .. BNE 0x10015aa ; _serial_poll_tx + 22 + 0x010015a0: 22ef ." MOVS r2,#0xef + 0x010015a2: 490f .I LDR r1,[pc,#60] ; [0x10015e0] = 0x1007314 + 0x010015a4: 480f .H LDR r0,[pc,#60] ; [0x10015e4] = 0x1001580 + 0x010015a6: f002f82b ..+. BL rt_assert_handler ; 0x1003600 + 0x010015aa: 462f /F MOV r7,r5 + 0x010015ac: e013 .. B 0x10015d6 ; _serial_poll_tx + 66 + 0x010015ae: 7830 0x LDRB r0,[r6,#0] + 0x010015b0: 280a .( CMP r0,#0xa + 0x010015b2: d109 .. BNE 0x10015c8 ; _serial_poll_tx + 52 + 0x010015b4: 8b20 . LDRH r0,[r4,#0x18] + 0x010015b6: 2140 @! MOVS r1,#0x40 + 0x010015b8: 4008 .@ ANDS r0,r0,r1 + 0x010015ba: 2800 .( CMP r0,#0 + 0x010015bc: d004 .. BEQ 0x10015c8 ; _serial_poll_tx + 52 + 0x010015be: 6c20 l LDR r0,[r4,#0x40] + 0x010015c0: 210d .! MOVS r1,#0xd + 0x010015c2: 6882 .h LDR r2,[r0,#8] + 0x010015c4: 4620 F MOV r0,r4 + 0x010015c6: 4790 .G BLX r2 + 0x010015c8: 7831 1x LDRB r1,[r6,#0] + 0x010015ca: 6c20 l LDR r0,[r4,#0x40] + 0x010015cc: 6882 .h LDR r2,[r0,#8] + 0x010015ce: 4620 F MOV r0,r4 + 0x010015d0: 4790 .G BLX r2 + 0x010015d2: 1c76 v. ADDS r6,r6,#1 + 0x010015d4: 1e6d m. SUBS r5,r5,#1 + 0x010015d6: 2d00 .- CMP r5,#0 + 0x010015d8: d1e9 .. BNE 0x10015ae ; _serial_poll_tx + 26 + 0x010015da: 1b78 x. SUBS r0,r7,r5 + 0x010015dc: bdf8 .. POP {r3-r7,pc} + $d + 0x010015de: 0000 .. DCW 0 + 0x010015e0: 01007314 .s.. DCD 16806676 + 0x010015e4: 01001580 .... DCD 16782720 + $t + i._thread_cleanup_execute + _thread_cleanup_execute + 0x010015e8: b570 p. PUSH {r4-r6,lr} + 0x010015ea: 4604 .F MOV r4,r0 + 0x010015ec: f7feff68 ..h. BL rt_hw_interrupt_disable ; 0x10004c0 + 0x010015f0: 4605 .F MOV r5,r0 + 0x010015f2: 6fa0 .o LDR r0,[r4,#0x78] + 0x010015f4: 2800 .( CMP r0,#0 + 0x010015f6: d002 .. BEQ 0x10015fe ; _thread_cleanup_execute + 22 + 0x010015f8: 4620 F MOV r0,r4 + 0x010015fa: 6fa1 .o LDR r1,[r4,#0x78] + 0x010015fc: 4788 .G BLX r1 + 0x010015fe: 4628 (F MOV r0,r5 + 0x01001600: f7feff62 ..b. BL rt_hw_interrupt_enable ; 0x10004c8 + 0x01001604: bd70 p. POP {r4-r6,pc} + i._thread_exit + _thread_exit + 0x01001606: b570 p. PUSH {r4-r6,lr} + 0x01001608: f004fcca .... BL rt_thread_self ; 0x1005fa0 + 0x0100160c: 4604 .F MOV r4,r0 + 0x0100160e: f7feff57 ..W. BL rt_hw_interrupt_disable ; 0x10004c0 + 0x01001612: 4605 .F MOV r5,r0 + 0x01001614: 4620 F MOV r0,r4 + 0x01001616: f7ffffe7 .... BL _thread_cleanup_execute ; 0x10015e8 + 0x0100161a: 4620 F MOV r0,r4 + 0x0100161c: f003fe0c .... BL rt_schedule_remove_thread ; 0x1005238 + 0x01001620: 2104 .! MOVS r1,#4 + 0x01001622: 2034 4 MOVS r0,#0x34 + 0x01001624: 5501 .U STRB r1,[r0,r4] + 0x01001626: 4620 F MOV r0,r4 + 0x01001628: 304c L0 ADDS r0,r0,#0x4c + 0x0100162a: f004ff6b ..k. BL rt_timer_detach ; 0x1006504 + 0x0100162e: 4620 F MOV r0,r4 + 0x01001630: f003fc98 .... BL rt_object_is_systemobject ; 0x1004f64 + 0x01001634: 2801 .( CMP r0,#1 + 0x01001636: d103 .. BNE 0x1001640 ; _thread_exit + 58 + 0x01001638: 4620 F MOV r0,r4 + 0x0100163a: f003fb33 ..3. BL rt_object_detach ; 0x1004ca4 + 0x0100163e: e002 .. B 0x1001646 ; _thread_exit + 64 + 0x01001640: 4620 F MOV r0,r4 + 0x01001642: f004fbc1 .... BL rt_thread_defunct_enqueue ; 0x1005dc8 + 0x01001646: f003fcf5 .... BL rt_schedule ; 0x1005034 + 0x0100164a: 4628 (F MOV r0,r5 + 0x0100164c: f7feff3c ..<. BL rt_hw_interrupt_enable ; 0x10004c8 + 0x01001650: bd70 p. POP {r4-r6,pc} + 0x01001652: 0000 .. MOVS r0,r0 + i._thread_init + _thread_init + 0x01001654: b5fe .. PUSH {r1-r7,lr} + 0x01001656: 4604 .F MOV r4,r0 + 0x01001658: 4616 .F MOV r6,r2 + 0x0100165a: 461f .F MOV r7,r3 + 0x0100165c: 9d0a .. LDR r5,[sp,#0x28] + 0x0100165e: 4620 F MOV r0,r4 + 0x01001660: 3014 .0 ADDS r0,r0,#0x14 + 0x01001662: 6040 @` STR r0,[r0,#4] + 0x01001664: 6000 .` STR r0,[r0,#0] + 0x01001666: bf00 .. NOP + 0x01001668: 6226 &b STR r6,[r4,#0x20] + 0x0100166a: 6267 gb STR r7,[r4,#0x24] + 0x0100166c: 9808 .. LDR r0,[sp,#0x20] + 0x0100166e: 62a0 .b STR r0,[r4,#0x28] + 0x01001670: 9809 .. LDR r0,[sp,#0x24] + 0x01001672: 62e0 .b STR r0,[r4,#0x2c] + 0x01001674: 2123 #! MOVS r1,#0x23 + 0x01001676: 6ae2 .j LDR r2,[r4,#0x2c] + 0x01001678: 6aa0 .j LDR r0,[r4,#0x28] + 0x0100167a: f003fa22 ..". BL rt_memset ; 0x1004ac2 + 0x0100167e: 6ae1 .j LDR r1,[r4,#0x2c] + 0x01001680: 6aa0 .j LDR r0,[r4,#0x28] + 0x01001682: 1840 @. ADDS r0,r0,r1 + 0x01001684: 1f02 .. SUBS r2,r0,#4 + 0x01001686: 6a60 `j LDR r0,[r4,#0x24] + 0x01001688: 9001 .. STR r0,[sp,#4] + 0x0100168a: 6a20 j LDR r0,[r4,#0x20] + 0x0100168c: 4b19 .K LDR r3,[pc,#100] ; [0x10016f4] = 0x1001607 + 0x0100168e: 9000 .. STR r0,[sp,#0] + 0x01001690: 9901 .. LDR r1,[sp,#4] + 0x01001692: f002fe89 .... BL rt_hw_stack_init ; 0x10043a8 + 0x01001696: 61e0 .a STR r0,[r4,#0x1c] + 0x01001698: 2d20 - CMP r5,#0x20 + 0x0100169a: db04 .. BLT 0x10016a6 ; _thread_init + 82 + 0x0100169c: 22ae ." MOVS r2,#0xae + 0x0100169e: 4916 .I LDR r1,[pc,#88] ; [0x10016f8] = 0x1007b32 + 0x010016a0: a016 .. ADR r0,{pc}+0x5c ; 0x10016fc + 0x010016a2: f001ffad .... BL rt_assert_handler ; 0x1003600 + 0x010016a6: 2036 6 MOVS r0,#0x36 + 0x010016a8: 5505 .U STRB r5,[r0,r4] + 0x010016aa: 2035 5 MOVS r0,#0x35 + 0x010016ac: 5505 .U STRB r5,[r0,r4] + 0x010016ae: 2000 . MOVS r0,#0 + 0x010016b0: 63a0 .c STR r0,[r4,#0x38] + 0x010016b2: 980b .. LDR r0,[sp,#0x2c] + 0x010016b4: 6460 `d STR r0,[r4,#0x44] + 0x010016b6: 980b .. LDR r0,[sp,#0x2c] + 0x010016b8: 64a0 .d STR r0,[r4,#0x48] + 0x010016ba: 2000 . MOVS r0,#0 + 0x010016bc: 6320 c STR r0,[r4,#0x30] + 0x010016be: 2100 .! MOVS r1,#0 + 0x010016c0: 2034 4 MOVS r0,#0x34 + 0x010016c2: 5501 .U STRB r1,[r0,r4] + 0x010016c4: 2000 . MOVS r0,#0 + 0x010016c6: 67a0 .g STR r0,[r4,#0x78] + 0x010016c8: 67e0 .g STR r0,[r4,#0x7c] + 0x010016ca: 9000 .. STR r0,[sp,#0] + 0x010016cc: 4623 #F MOV r3,r4 + 0x010016ce: 4a14 .J LDR r2,[pc,#80] ; [0x1001720] = 0x10061d9 + 0x010016d0: 4621 !F MOV r1,r4 + 0x010016d2: 9001 .. STR r0,[sp,#4] + 0x010016d4: 4620 F MOV r0,r4 + 0x010016d6: 304c L0 ADDS r0,r0,#0x4c + 0x010016d8: f004ff86 .... BL rt_timer_init ; 0x10065e8 + 0x010016dc: bf00 .. NOP + 0x010016de: 4811 .H LDR r0,[pc,#68] ; [0x1001724] = 0x20130 + 0x010016e0: 6800 .h LDR r0,[r0,#0] + 0x010016e2: 2800 .( CMP r0,#0 + 0x010016e4: d003 .. BEQ 0x10016ee ; _thread_init + 154 + 0x010016e6: 4620 F MOV r0,r4 + 0x010016e8: 490e .I LDR r1,[pc,#56] ; [0x1001724] = 0x20130 + 0x010016ea: 6809 .h LDR r1,[r1,#0] + 0x010016ec: 4788 .G BLX r1 + 0x010016ee: bf00 .. NOP + 0x010016f0: 2000 . MOVS r0,#0 + 0x010016f2: bdfe .. POP {r1-r7,pc} + $d + 0x010016f4: 01001607 .... DCD 16782855 + 0x010016f8: 01007b32 2{.. DCD 16808754 + 0x010016fc: 6f697270 prio DCD 1869181552 + 0x01001700: 79746972 rity DCD 2037672306 + 0x01001704: 52203c20 < R DCD 1377844256 + 0x01001708: 48545f54 T_TH DCD 1213488980 + 0x0100170c: 44414552 READ DCD 1145128274 + 0x01001710: 4952505f _PRI DCD 1230131295 + 0x01001714: 5449524f ORIT DCD 1414091343 + 0x01001718: 414d5f59 Y_MA DCD 1095589721 + 0x0100171c: 00000058 X... DCD 88 + 0x01001720: 010061d9 .a.. DCD 16802265 + 0x01001724: 00020130 0... DCD 131376 + $t + i._timer_init + _timer_init + 0x01001728: b5ff .. PUSH {r0-r7,lr} + 0x0100172a: b081 .. SUB sp,sp,#4 + 0x0100172c: 4604 .F MOV r4,r0 + 0x0100172e: 460e .F MOV r6,r1 + 0x01001730: 4617 .F MOV r7,r2 + 0x01001732: 980a .. LDR r0,[sp,#0x28] + 0x01001734: 7260 `r STRB r0,[r4,#9] + 0x01001736: 7a60 `z LDRB r0,[r4,#9] + 0x01001738: 0840 @. LSRS r0,r0,#1 + 0x0100173a: 0040 @. LSLS r0,r0,#1 + 0x0100173c: 7260 `r STRB r0,[r4,#9] + 0x0100173e: 61e6 .a STR r6,[r4,#0x1c] + 0x01001740: 6227 'b STR r7,[r4,#0x20] + 0x01001742: 2000 . MOVS r0,#0 + 0x01001744: 62a0 .b STR r0,[r4,#0x28] + 0x01001746: 9804 .. LDR r0,[sp,#0x10] + 0x01001748: 6260 `b STR r0,[r4,#0x24] + 0x0100174a: 2500 .% MOVS r5,#0 + 0x0100174c: e006 .. B 0x100175c ; _timer_init + 52 + 0x0100174e: 00ea .. LSLS r2,r5,#3 + 0x01001750: 4621 !F MOV r1,r4 + 0x01001752: 3114 .1 ADDS r1,r1,#0x14 + 0x01001754: 1850 P. ADDS r0,r2,r1 + 0x01001756: f002fee6 .... BL rt_list_init ; 0x1004526 + 0x0100175a: 1c6d m. ADDS r5,r5,#1 + 0x0100175c: 2d01 .- CMP r5,#1 + 0x0100175e: dbf6 .. BLT 0x100174e ; _timer_init + 38 + 0x01001760: b005 .. ADD sp,sp,#0x14 + 0x01001762: bdf0 .. POP {r4-r7,pc} + i._timer_remove + _timer_remove + 0x01001764: b570 p. PUSH {r4-r6,lr} + 0x01001766: 4605 .F MOV r5,r0 + 0x01001768: 2400 .$ MOVS r4,#0 + 0x0100176a: e006 .. B 0x100177a ; _timer_remove + 22 + 0x0100176c: 00e2 .. LSLS r2,r4,#3 + 0x0100176e: 4629 )F MOV r1,r5 + 0x01001770: 3114 .1 ADDS r1,r1,#0x14 + 0x01001772: 1850 P. ADDS r0,r2,r1 + 0x01001774: f002ff19 .... BL rt_list_remove ; 0x10045aa + 0x01001778: 1c64 d. ADDS r4,r4,#1 + 0x0100177a: 2c01 ., CMP r4,#1 + 0x0100177c: dbf6 .. BLT 0x100176c ; _timer_remove + 8 + 0x0100177e: bd70 p. POP {r4-r6,pc} + i.bsp_clock_config + bsp_clock_config + 0x01001780: b510 .. PUSH {r4,lr} + 0x01001782: 4802 .H LDR r0,[pc,#8] ; [0x100178c] = 0x75300 + 0x01001784: f7fff99c .... BL SysTick_Config ; 0x1000ac0 + 0x01001788: bd10 .. POP {r4,pc} + $d + 0x0100178a: 0000 .. DCW 0 + 0x0100178c: 00075300 .S.. DCD 480000 + $t + i.clear + clear + 0x01001790: b510 .. PUSH {r4,lr} + 0x01001792: a002 .. ADR r0,{pc}+0xa ; 0x100179c + 0x01001794: f002fe9c .... BL rt_kprintf ; 0x10044d0 + 0x01001798: 2000 . MOVS r0,#0 + 0x0100179a: bd10 .. POP {r4,pc} + $d + 0x0100179c: 4a325b1b .[2J DCD 1244814107 + 0x010017a0: 00485b1b .[H. DCD 4741915 + $t + i.cmd_free + cmd_free + 0x010017a4: b570 p. PUSH {r4-r6,lr} + 0x010017a6: 4604 .F MOV r4,r0 + 0x010017a8: 460d .F MOV r5,r1 + 0x010017aa: f000ff09 .... BL list_mem ; 0x10025c0 + 0x010017ae: 2000 . MOVS r0,#0 + 0x010017b0: bd70 p. POP {r4-r6,pc} + i.cmd_ps + cmd_ps + 0x010017b2: b570 p. PUSH {r4-r6,lr} + 0x010017b4: 4604 .F MOV r4,r0 + 0x010017b6: 460d .F MOV r5,r1 + 0x010017b8: f001fa4a ..J. BL list_thread ; 0x1002c50 + 0x010017bc: 2000 . MOVS r0,#0 + 0x010017be: bd70 p. POP {r4-r6,pc} + i.finsh_get_prompt + finsh_get_prompt + 0x010017c0: b510 .. PUSH {r4,lr} + 0x010017c2: 4811 .H LDR r0,[pc,#68] ; [0x1001808] = 0x2001c + 0x010017c4: 6800 .h LDR r0,[r0,#0] + 0x010017c6: 3020 0 ADDS r0,r0,#0x20 + 0x010017c8: 7840 @x LDRB r0,[r0,#1] + 0x010017ca: 0780 .. LSLS r0,r0,#30 + 0x010017cc: 0fc0 .. LSRS r0,r0,#31 + 0x010017ce: 2800 .( CMP r0,#0 + 0x010017d0: d103 .. BNE 0x10017da ; finsh_get_prompt + 26 + 0x010017d2: 490e .I LDR r1,[pc,#56] ; [0x100180c] = 0x201f0 + 0x010017d4: 7008 .p STRB r0,[r1,#0] + 0x010017d6: 4608 .F MOV r0,r1 + 0x010017d8: bd10 .. POP {r4,pc} + 0x010017da: 480d .H LDR r0,[pc,#52] ; [0x1001810] = 0x20020 + 0x010017dc: 6800 .h LDR r0,[r0,#0] + 0x010017de: 2800 .( CMP r0,#0 + 0x010017e0: d007 .. BEQ 0x10017f2 ; finsh_get_prompt + 50 + 0x010017e2: 2280 ." MOVS r2,#0x80 + 0x010017e4: 480a .H LDR r0,[pc,#40] ; [0x1001810] = 0x20020 + 0x010017e6: 6801 .h LDR r1,[r0,#0] + 0x010017e8: 4808 .H LDR r0,[pc,#32] ; [0x100180c] = 0x201f0 + 0x010017ea: f7fff809 .... BL strncpy ; 0x1000800 + 0x010017ee: 4807 .H LDR r0,[pc,#28] ; [0x100180c] = 0x201f0 + 0x010017f0: e7f2 .. B 0x10017d8 ; finsh_get_prompt + 24 + 0x010017f2: a108 .. ADR r1,{pc}+0x22 ; 0x1001814 + 0x010017f4: 4805 .H LDR r0,[pc,#20] ; [0x100180c] = 0x201f0 + 0x010017f6: f7fefefd .... BL strcpy ; 0x10005f4 + 0x010017fa: a108 .. ADR r1,{pc}+0x22 ; 0x100181c + 0x010017fc: 4803 .H LDR r0,[pc,#12] ; [0x100180c] = 0x201f0 + 0x010017fe: f7feff91 .... BL strcat ; 0x1000724 + 0x01001802: 4802 .H LDR r0,[pc,#8] ; [0x100180c] = 0x201f0 + 0x01001804: e7e8 .. B 0x10017d8 ; finsh_get_prompt + 24 + $d + 0x01001806: 0000 .. DCW 0 + 0x01001808: 0002001c .... DCD 131100 + 0x0100180c: 000201f0 .... DCD 131568 + 0x01001810: 00020020 ... DCD 131104 + 0x01001814: 2068736d msh DCD 543716205 + 0x01001818: 00000000 .... DCD 0 + 0x0100181c: 0000003e >... DCD 62 + $t + i.finsh_getchar + finsh_getchar + 0x01001820: b508 .. PUSH {r3,lr} + 0x01001822: 2000 . MOVS r0,#0 + 0x01001824: 9000 .. STR r0,[sp,#0] + 0x01001826: 4810 .H LDR r0,[pc,#64] ; [0x1001868] = 0x2001c + 0x01001828: 6800 .h LDR r0,[r0,#0] + 0x0100182a: 2800 .( CMP r0,#0 + 0x0100182c: d104 .. BNE 0x1001838 ; finsh_getchar + 24 + 0x0100182e: 2299 ." MOVS r2,#0x99 + 0x01001830: 490e .I LDR r1,[pc,#56] ; [0x100186c] = 0x10074b4 + 0x01001832: a00f .. ADR r0,{pc}+0x3e ; 0x1001870 + 0x01001834: f001fee4 .... BL rt_assert_handler ; 0x1003600 + 0x01001838: e005 .. B 0x1001846 ; finsh_getchar + 38 + 0x0100183a: 2100 .! MOVS r1,#0 + 0x0100183c: 43c9 .C MVNS r1,r1 + 0x0100183e: 480a .H LDR r0,[pc,#40] ; [0x1001868] = 0x2001c + 0x01001840: 6800 .h LDR r0,[r0,#0] + 0x01001842: f003fdcd .... BL rt_sem_take ; 0x10053e0 + 0x01001846: 4908 .I LDR r1,[pc,#32] ; [0x1001868] = 0x2001c + 0x01001848: 6809 .h LDR r1,[r1,#0] + 0x0100184a: 31ff .1 ADDS r1,r1,#0xff + 0x0100184c: 31ff .1 ADDS r1,r1,#0xff + 0x0100184e: 3102 .1 ADDS r1,#2 + 0x01001850: 2301 .# MOVS r3,#1 + 0x01001852: 466a jF MOV r2,sp + 0x01001854: 68c8 .h LDR r0,[r1,#0xc] + 0x01001856: 1e99 .. SUBS r1,r3,#2 + 0x01001858: f002f9f4 .... BL rt_device_read ; 0x1003c44 + 0x0100185c: 2801 .( CMP r0,#1 + 0x0100185e: d1ec .. BNE 0x100183a ; finsh_getchar + 26 + 0x01001860: 4668 hF MOV r0,sp + 0x01001862: 7800 .x LDRB r0,[r0,#0] + 0x01001864: bd08 .. POP {r3,pc} + $d + 0x01001866: 0000 .. DCW 0 + 0x01001868: 0002001c .... DCD 131100 + 0x0100186c: 010074b4 .t.. DCD 16807092 + 0x01001870: 6c656873 shel DCD 1818585203 + 0x01001874: 3d21206c l != DCD 1025581164 + 0x01001878: 5f545220 RT_ DCD 1599361568 + 0x0100187c: 4c4c554e NULL DCD 1280070990 + 0x01001880: 00000000 .... DCD 0 + $t + i.finsh_rx_ind + finsh_rx_ind + 0x01001884: b570 p. PUSH {r4-r6,lr} + 0x01001886: 4604 .F MOV r4,r0 + 0x01001888: 460d .F MOV r5,r1 + 0x0100188a: 4807 .H LDR r0,[pc,#28] ; [0x10018a8] = 0x2001c + 0x0100188c: 6800 .h LDR r0,[r0,#0] + 0x0100188e: 2800 .( CMP r0,#0 + 0x01001890: d104 .. BNE 0x100189c ; finsh_rx_ind + 24 + 0x01001892: 22a8 ." MOVS r2,#0xa8 + 0x01001894: 4905 .I LDR r1,[pc,#20] ; [0x10018ac] = 0x10074c2 + 0x01001896: a006 .. ADR r0,{pc}+0x1a ; 0x10018b0 + 0x01001898: f001feb2 .... BL rt_assert_handler ; 0x1003600 + 0x0100189c: 4802 .H LDR r0,[pc,#8] ; [0x10018a8] = 0x2001c + 0x0100189e: 6800 .h LDR r0,[r0,#0] + 0x010018a0: f003fd44 ..D. BL rt_sem_release ; 0x100532c + 0x010018a4: 2000 . MOVS r0,#0 + 0x010018a6: bd70 p. POP {r4-r6,pc} + $d + 0x010018a8: 0002001c .... DCD 131100 + 0x010018ac: 010074c2 .t.. DCD 16807106 + 0x010018b0: 6c656873 shel DCD 1818585203 + 0x010018b4: 3d21206c l != DCD 1025581164 + 0x010018b8: 5f545220 RT_ DCD 1599361568 + 0x010018bc: 4c4c554e NULL DCD 1280070990 + 0x010018c0: 00000000 .... DCD 0 + $t + i.finsh_set_device + finsh_set_device + 0x010018c4: b570 p. PUSH {r4-r6,lr} + 0x010018c6: 4605 .F MOV r5,r0 + 0x010018c8: 2400 .$ MOVS r4,#0 + 0x010018ca: 482e .H LDR r0,[pc,#184] ; [0x1001984] = 0x2001c + 0x010018cc: 6800 .h LDR r0,[r0,#0] + 0x010018ce: 2800 .( CMP r0,#0 + 0x010018d0: d104 .. BNE 0x10018dc ; finsh_set_device + 24 + 0x010018d2: 22bb ." MOVS r2,#0xbb + 0x010018d4: 492c ,I LDR r1,[pc,#176] ; [0x1001988] = 0x10074cf + 0x010018d6: a02d -. ADR r0,{pc}+0xb6 ; 0x100198c + 0x010018d8: f001fe92 .... BL rt_assert_handler ; 0x1003600 + 0x010018dc: 4628 (F MOV r0,r5 + 0x010018de: f002f8d9 .... BL rt_device_find ; 0x1003a94 + 0x010018e2: 4604 .F MOV r4,r0 + 0x010018e4: 2c00 ., CMP r4,#0 + 0x010018e6: d104 .. BNE 0x10018f2 ; finsh_set_device + 46 + 0x010018e8: 4629 )F MOV r1,r5 + 0x010018ea: a02d -. ADR r0,{pc}+0xb6 ; 0x10019a0 + 0x010018ec: f002fdf0 .... BL rt_kprintf ; 0x10044d0 + 0x010018f0: bd70 p. POP {r4-r6,pc} + 0x010018f2: 4824 $H LDR r0,[pc,#144] ; [0x1001984] = 0x2001c + 0x010018f4: 6800 .h LDR r0,[r0,#0] + 0x010018f6: 30ff .0 ADDS r0,r0,#0xff + 0x010018f8: 30ff .0 ADDS r0,r0,#0xff + 0x010018fa: 3002 .0 ADDS r0,#2 + 0x010018fc: 68c0 .h LDR r0,[r0,#0xc] + 0x010018fe: 42a0 .B CMP r0,r4 + 0x01001900: d100 .. BNE 0x1001904 ; finsh_set_device + 64 + 0x01001902: e7f5 .. B 0x10018f0 ; finsh_set_device + 44 + 0x01001904: 21ff .! MOVS r1,#0xff + 0x01001906: 3144 D1 ADDS r1,r1,#0x44 + 0x01001908: 4620 F MOV r0,r4 + 0x0100190a: f002f8cb .... BL rt_device_open ; 0x1003aa4 + 0x0100190e: 2800 .( CMP r0,#0 + 0x01001910: d136 6. BNE 0x1001980 ; finsh_set_device + 188 + 0x01001912: 481c .H LDR r0,[pc,#112] ; [0x1001984] = 0x2001c + 0x01001914: 6800 .h LDR r0,[r0,#0] + 0x01001916: 30ff .0 ADDS r0,r0,#0xff + 0x01001918: 30ff .0 ADDS r0,r0,#0xff + 0x0100191a: 3002 .0 ADDS r0,#2 + 0x0100191c: 68c0 .h LDR r0,[r0,#0xc] + 0x0100191e: 2800 .( CMP r0,#0 + 0x01001920: d010 .. BEQ 0x1001944 ; finsh_set_device + 128 + 0x01001922: 4918 .I LDR r1,[pc,#96] ; [0x1001984] = 0x2001c + 0x01001924: 6809 .h LDR r1,[r1,#0] + 0x01001926: 31ff .1 ADDS r1,r1,#0xff + 0x01001928: 31ff .1 ADDS r1,r1,#0xff + 0x0100192a: 3102 .1 ADDS r1,#2 + 0x0100192c: 68c8 .h LDR r0,[r1,#0xc] + 0x0100192e: f002f855 ..U. BL rt_device_close ; 0x10039dc + 0x01001932: 4914 .I LDR r1,[pc,#80] ; [0x1001984] = 0x2001c + 0x01001934: 6809 .h LDR r1,[r1,#0] + 0x01001936: 31ff .1 ADDS r1,r1,#0xff + 0x01001938: 31ff .1 ADDS r1,r1,#0xff + 0x0100193a: 3102 .1 ADDS r1,#2 + 0x0100193c: 68c8 .h LDR r0,[r1,#0xc] + 0x0100193e: 2100 .! MOVS r1,#0 + 0x01001940: f002f9f6 .... BL rt_device_set_rx_indicate ; 0x1003d30 + 0x01001944: 2151 Q! MOVS r1,#0x51 + 0x01001946: 480f .H LDR r0,[pc,#60] ; [0x1001984] = 0x2001c + 0x01001948: 6800 .h LDR r0,[r0,#0] + 0x0100194a: 30ff .0 ADDS r0,r0,#0xff + 0x0100194c: 30b7 .0 ADDS r0,r0,#0xb7 + 0x0100194e: f7feff52 ..R. BL __aeabi_memclr ; 0x10007f6 + 0x01001952: 2100 .! MOVS r1,#0 + 0x01001954: 480b .H LDR r0,[pc,#44] ; [0x1001984] = 0x2001c + 0x01001956: 6800 .h LDR r0,[r0,#0] + 0x01001958: 30ff .0 ADDS r0,r0,#0xff + 0x0100195a: 30ff .0 ADDS r0,r0,#0xff + 0x0100195c: 3002 .0 ADDS r0,#2 + 0x0100195e: 8101 .. STRH r1,[r0,#8] + 0x01001960: 4808 .H LDR r0,[pc,#32] ; [0x1001984] = 0x2001c + 0x01001962: 6800 .h LDR r0,[r0,#0] + 0x01001964: 30ff .0 ADDS r0,r0,#0xff + 0x01001966: 30ff .0 ADDS r0,r0,#0xff + 0x01001968: 3002 .0 ADDS r0,#2 + 0x0100196a: 8141 A. STRH r1,[r0,#0xa] + 0x0100196c: 4805 .H LDR r0,[pc,#20] ; [0x1001984] = 0x2001c + 0x0100196e: 6800 .h LDR r0,[r0,#0] + 0x01001970: 30ff .0 ADDS r0,r0,#0xff + 0x01001972: 30ff .0 ADDS r0,r0,#0xff + 0x01001974: 3002 .0 ADDS r0,#2 + 0x01001976: 60c4 .` STR r4,[r0,#0xc] + 0x01001978: 4911 .I LDR r1,[pc,#68] ; [0x10019c0] = 0x1001885 + 0x0100197a: 4620 F MOV r0,r4 + 0x0100197c: f002f9d8 .... BL rt_device_set_rx_indicate ; 0x1003d30 + 0x01001980: bf00 .. NOP + 0x01001982: e7b5 .. B 0x10018f0 ; finsh_set_device + 44 + $d + 0x01001984: 0002001c .... DCD 131100 + 0x01001988: 010074cf .t.. DCD 16807119 + 0x0100198c: 6c656873 shel DCD 1818585203 + 0x01001990: 3d21206c l != DCD 1025581164 + 0x01001994: 5f545220 RT_ DCD 1599361568 + 0x01001998: 4c4c554e NULL DCD 1280070990 + 0x0100199c: 00000000 .... DCD 0 + 0x010019a0: 736e6966 fins DCD 1936615782 + 0x010019a4: 63203a68 h: c DCD 1663056488 + 0x010019a8: 6e206e61 an n DCD 1847619169 + 0x010019ac: 6620746f ot f DCD 1713402991 + 0x010019b0: 20646e69 ind DCD 543452777 + 0x010019b4: 69766564 devi DCD 1769366884 + 0x010019b8: 203a6563 ce: DCD 540697955 + 0x010019bc: 000a7325 %s.. DCD 684837 + 0x010019c0: 01001885 .... DCD 16783493 + $t + i.finsh_set_prompt_mode + finsh_set_prompt_mode + 0x010019c4: b510 .. PUSH {r4,lr} + 0x010019c6: 4604 .F MOV r4,r0 + 0x010019c8: 480b .H LDR r0,[pc,#44] ; [0x10019f8] = 0x2001c + 0x010019ca: 6800 .h LDR r0,[r0,#0] + 0x010019cc: 2800 .( CMP r0,#0 + 0x010019ce: d104 .. BNE 0x10019da ; finsh_set_prompt_mode + 22 + 0x010019d0: 228d ." MOVS r2,#0x8d + 0x010019d2: 490a .I LDR r1,[pc,#40] ; [0x10019fc] = 0x100749e + 0x010019d4: a00a .. ADR r0,{pc}+0x2c ; 0x1001a00 + 0x010019d6: f001fe13 .... BL rt_assert_handler ; 0x1003600 + 0x010019da: 4807 .H LDR r0,[pc,#28] ; [0x10019f8] = 0x2001c + 0x010019dc: 6800 .h LDR r0,[r0,#0] + 0x010019de: 3020 0 ADDS r0,r0,#0x20 + 0x010019e0: 7840 @x LDRB r0,[r0,#1] + 0x010019e2: 2102 .! MOVS r1,#2 + 0x010019e4: 4388 .C BICS r0,r0,r1 + 0x010019e6: 0061 a. LSLS r1,r4,#1 + 0x010019e8: 2202 ." MOVS r2,#2 + 0x010019ea: 4011 .@ ANDS r1,r1,r2 + 0x010019ec: 4308 .C ORRS r0,r0,r1 + 0x010019ee: 4902 .I LDR r1,[pc,#8] ; [0x10019f8] = 0x2001c + 0x010019f0: 6809 .h LDR r1,[r1,#0] + 0x010019f2: 3120 1 ADDS r1,r1,#0x20 + 0x010019f4: 7048 Hp STRB r0,[r1,#1] + 0x010019f6: bd10 .. POP {r4,pc} + $d + 0x010019f8: 0002001c .... DCD 131100 + 0x010019fc: 0100749e .t.. DCD 16807070 + 0x01001a00: 6c656873 shel DCD 1818585203 + 0x01001a04: 3d21206c l != DCD 1025581164 + 0x01001a08: 5f545220 RT_ DCD 1599361568 + 0x01001a0c: 4c4c554e NULL DCD 1280070990 + 0x01001a10: 00000000 .... DCD 0 + $t + i.finsh_system_function_init + finsh_system_function_init + 0x01001a14: 4a02 .J LDR r2,[pc,#8] ; [0x1001a20] = 0x20014 + 0x01001a16: 6010 .` STR r0,[r2,#0] + 0x01001a18: 4a02 .J LDR r2,[pc,#8] ; [0x1001a24] = 0x20018 + 0x01001a1a: 6011 .` STR r1,[r2,#0] + 0x01001a1c: 4770 pG BX lr + $d + 0x01001a1e: 0000 .. DCW 0 + 0x01001a20: 00020014 .... DCD 131092 + 0x01001a24: 00020018 .... DCD 131096 + $t + i.finsh_system_init + finsh_system_init + 0x01001a28: b57c |. PUSH {r2-r6,lr} + 0x01001a2a: 2500 .% MOVS r5,#0 + 0x01001a2c: 4919 .I LDR r1,[pc,#100] ; [0x1001a94] = 0x10083e4 + 0x01001a2e: 481a .H LDR r0,[pc,#104] ; [0x1001a98] = 0x100830c + 0x01001a30: f7fffff0 .... BL finsh_system_function_init ; 0x1001a14 + 0x01001a34: 2121 !! MOVS r1,#0x21 + 0x01001a36: 0109 .. LSLS r1,r1,#4 + 0x01001a38: 2001 . MOVS r0,#1 + 0x01001a3a: f001fe1d .... BL rt_calloc ; 0x1003678 + 0x01001a3e: 4917 .I LDR r1,[pc,#92] ; [0x1001a9c] = 0x2001c + 0x01001a40: 6008 .` STR r0,[r1,#0] + 0x01001a42: 4608 .F MOV r0,r1 + 0x01001a44: 6800 .h LDR r0,[r0,#0] + 0x01001a46: 2800 .( CMP r0,#0 + 0x01001a48: d104 .. BNE 0x1001a54 ; finsh_system_init + 44 + 0x01001a4a: a015 .. ADR r0,{pc}+0x56 ; 0x1001aa0 + 0x01001a4c: f002fd40 ..@. BL rt_kprintf ; 0x10044d0 + 0x01001a50: 1e68 h. SUBS r0,r5,#1 + 0x01001a52: bd7c |. POP {r2-r6,pc} + 0x01001a54: 200a . MOVS r0,#0xa + 0x01001a56: 2114 .! MOVS r1,#0x14 + 0x01001a58: 2301 .# MOVS r3,#1 + 0x01001a5a: 031b .. LSLS r3,r3,#12 + 0x01001a5c: 2200 ." MOVS r2,#0 + 0x01001a5e: 9100 .. STR r1,[sp,#0] + 0x01001a60: 9001 .. STR r0,[sp,#4] + 0x01001a62: 4915 .I LDR r1,[pc,#84] ; [0x1001ab8] = 0x1001acd + 0x01001a64: a015 .. ADR r0,{pc}+0x58 ; 0x1001abc + 0x01001a66: f004f96c ..l. BL rt_thread_create ; 0x1005d42 + 0x01001a6a: 4604 .F MOV r4,r0 + 0x01001a6c: 2300 .# MOVS r3,#0 + 0x01001a6e: 461a .F MOV r2,r3 + 0x01001a70: a114 .. ADR r1,{pc}+0x54 ; 0x1001ac4 + 0x01001a72: 480a .H LDR r0,[pc,#40] ; [0x1001a9c] = 0x2001c + 0x01001a74: 6800 .h LDR r0,[r0,#0] + 0x01001a76: f003fc21 ..!. BL rt_sem_init ; 0x10052bc + 0x01001a7a: 2001 . MOVS r0,#1 + 0x01001a7c: f7ffffa2 .... BL finsh_set_prompt_mode ; 0x10019c4 + 0x01001a80: 2c00 ., CMP r4,#0 + 0x01001a82: d004 .. BEQ 0x1001a8e ; finsh_system_init + 102 + 0x01001a84: 2d00 .- CMP r5,#0 + 0x01001a86: d102 .. BNE 0x1001a8e ; finsh_system_init + 102 + 0x01001a88: 4620 F MOV r0,r4 + 0x01001a8a: f004fad1 .... BL rt_thread_startup ; 0x1006030 + 0x01001a8e: 2000 . MOVS r0,#0 + 0x01001a90: e7df .. B 0x1001a52 ; finsh_system_init + 42 + $d + 0x01001a92: 0000 .. DCW 0 + 0x01001a94: 010083e4 .... DCD 16810980 + 0x01001a98: 0100830c .... DCD 16810764 + 0x01001a9c: 0002001c .... DCD 131100 + 0x01001aa0: 6d206f6e no m DCD 1830842222 + 0x01001aa4: 726f6d65 emor DCD 1919905125 + 0x01001aa8: 6f662079 y fo DCD 1868963961 + 0x01001aac: 68732072 r sh DCD 1752375410 + 0x01001ab0: 0a6c6c65 ell. DCD 174877797 + 0x01001ab4: 00000000 .... DCD 0 + 0x01001ab8: 01001acd .... DCD 16784077 + 0x01001abc: 65687374 tshe DCD 1701344116 + 0x01001ac0: 00006c6c ll.. DCD 27756 + 0x01001ac4: 78726873 shrx DCD 2020763763 + 0x01001ac8: 00000000 .... DCD 0 + $t + i.finsh_thread_entry + finsh_thread_entry + 0x01001acc: 48fe .H LDR r0,[pc,#1016] ; [0x1001ec8] = 0x2001c + 0x01001ace: 6800 .h LDR r0,[r0,#0] + 0x01001ad0: 3020 0 ADDS r0,r0,#0x20 + 0x01001ad2: 7840 @x LDRB r0,[r0,#1] + 0x01001ad4: 0840 @. LSRS r0,r0,#1 + 0x01001ad6: 0040 @. LSLS r0,r0,#1 + 0x01001ad8: 1c40 @. ADDS r0,r0,#1 + 0x01001ada: 49fb .I LDR r1,[pc,#1004] ; [0x1001ec8] = 0x2001c + 0x01001adc: 6809 .h LDR r1,[r1,#0] + 0x01001ade: 3120 1 ADDS r1,r1,#0x20 + 0x01001ae0: 7048 Hp STRB r0,[r1,#1] + 0x01001ae2: 48f9 .H LDR r0,[pc,#996] ; [0x1001ec8] = 0x2001c + 0x01001ae4: 6800 .h LDR r0,[r0,#0] + 0x01001ae6: 30ff .0 ADDS r0,r0,#0xff + 0x01001ae8: 30ff .0 ADDS r0,r0,#0xff + 0x01001aea: 3002 .0 ADDS r0,#2 + 0x01001aec: 68c0 .h LDR r0,[r0,#0xc] + 0x01001aee: 2800 .( CMP r0,#0 + 0x01001af0: d108 .. BNE 0x1001b04 ; finsh_thread_entry + 56 + 0x01001af2: f001feed .... BL rt_console_get_device ; 0x10038d0 + 0x01001af6: 4605 .F MOV r5,r0 + 0x01001af8: 2d00 .- CMP r5,#0 + 0x01001afa: d002 .. BEQ 0x1001b02 ; finsh_thread_entry + 54 + 0x01001afc: 4628 (F MOV r0,r5 + 0x01001afe: f7fffee1 .... BL finsh_set_device ; 0x10018c4 + 0x01001b02: bf00 .. NOP + 0x01001b04: f7fffe5c ..\. BL finsh_get_prompt ; 0x10017c0 + 0x01001b08: 4605 .F MOV r5,r0 + 0x01001b0a: f002fce1 .... BL rt_kprintf ; 0x10044d0 + 0x01001b0e: e2cf .. B 0x10020b0 ; finsh_thread_entry + 1508 + 0x01001b10: f7fffe86 .... BL finsh_getchar ; 0x1001820 + 0x01001b14: 4604 .F MOV r4,r0 + 0x01001b16: 2c00 ., CMP r4,#0 + 0x01001b18: da00 .. BGE 0x1001b1c ; finsh_thread_entry + 80 + 0x01001b1a: e2c9 .. B 0x10020b0 ; finsh_thread_entry + 1508 + 0x01001b1c: 2c1b ., CMP r4,#0x1b + 0x01001b1e: d105 .. BNE 0x1001b2c ; finsh_thread_entry + 96 + 0x01001b20: 2101 .! MOVS r1,#1 + 0x01001b22: 48e9 .H LDR r0,[pc,#932] ; [0x1001ec8] = 0x2001c + 0x01001b24: 6800 .h LDR r0,[r0,#0] + 0x01001b26: 3020 0 ADDS r0,r0,#0x20 + 0x01001b28: 7001 .p STRB r1,[r0,#0] + 0x01001b2a: e2c1 .. B 0x10020b0 ; finsh_thread_entry + 1508 + 0x01001b2c: 48e6 .H LDR r0,[pc,#920] ; [0x1001ec8] = 0x2001c + 0x01001b2e: 6800 .h LDR r0,[r0,#0] + 0x01001b30: 3020 0 ADDS r0,r0,#0x20 + 0x01001b32: 7800 .x LDRB r0,[r0,#0] + 0x01001b34: 2801 .( CMP r0,#1 + 0x01001b36: d10d .. BNE 0x1001b54 ; finsh_thread_entry + 136 + 0x01001b38: 2c5b [, CMP r4,#0x5b + 0x01001b3a: d105 .. BNE 0x1001b48 ; finsh_thread_entry + 124 + 0x01001b3c: 2102 .! MOVS r1,#2 + 0x01001b3e: 48e2 .H LDR r0,[pc,#904] ; [0x1001ec8] = 0x2001c + 0x01001b40: 6800 .h LDR r0,[r0,#0] + 0x01001b42: 3020 0 ADDS r0,r0,#0x20 + 0x01001b44: 7001 .p STRB r1,[r0,#0] + 0x01001b46: e2b3 .. B 0x10020b0 ; finsh_thread_entry + 1508 + 0x01001b48: 2100 .! MOVS r1,#0 + 0x01001b4a: 48df .H LDR r0,[pc,#892] ; [0x1001ec8] = 0x2001c + 0x01001b4c: 6800 .h LDR r0,[r0,#0] + 0x01001b4e: 3020 0 ADDS r0,r0,#0x20 + 0x01001b50: 7001 .p STRB r1,[r0,#0] + 0x01001b52: e0d8 .. B 0x1001d06 ; finsh_thread_entry + 570 + 0x01001b54: 48dc .H LDR r0,[pc,#880] ; [0x1001ec8] = 0x2001c + 0x01001b56: 6800 .h LDR r0,[r0,#0] + 0x01001b58: 3020 0 ADDS r0,r0,#0x20 + 0x01001b5a: 7800 .x LDRB r0,[r0,#0] + 0x01001b5c: 2802 .( CMP r0,#2 + 0x01001b5e: d1f8 .. BNE 0x1001b52 ; finsh_thread_entry + 134 + 0x01001b60: 2100 .! MOVS r1,#0 + 0x01001b62: 48d9 .H LDR r0,[pc,#868] ; [0x1001ec8] = 0x2001c + 0x01001b64: 6800 .h LDR r0,[r0,#0] + 0x01001b66: 3020 0 ADDS r0,r0,#0x20 + 0x01001b68: 7001 .p STRB r1,[r0,#0] + 0x01001b6a: 2c41 A, CMP r4,#0x41 + 0x01001b6c: d139 9. BNE 0x1001be2 ; finsh_thread_entry + 278 + 0x01001b6e: 48d6 .H LDR r0,[pc,#856] ; [0x1001ec8] = 0x2001c + 0x01001b70: 6800 .h LDR r0,[r0,#0] + 0x01001b72: 8c40 @. LDRH r0,[r0,#0x22] + 0x01001b74: 2800 .( CMP r0,#0 + 0x01001b76: dd07 .. BLE 0x1001b88 ; finsh_thread_entry + 188 + 0x01001b78: 48d3 .H LDR r0,[pc,#844] ; [0x1001ec8] = 0x2001c + 0x01001b7a: 6800 .h LDR r0,[r0,#0] + 0x01001b7c: 8c40 @. LDRH r0,[r0,#0x22] + 0x01001b7e: 1e40 @. SUBS r0,r0,#1 + 0x01001b80: 49d1 .I LDR r1,[pc,#836] ; [0x1001ec8] = 0x2001c + 0x01001b82: 6809 .h LDR r1,[r1,#0] + 0x01001b84: 8448 H. STRH r0,[r1,#0x22] + 0x01001b86: e004 .. B 0x1001b92 ; finsh_thread_entry + 198 + 0x01001b88: 2000 . MOVS r0,#0 + 0x01001b8a: 49cf .I LDR r1,[pc,#828] ; [0x1001ec8] = 0x2001c + 0x01001b8c: 6809 .h LDR r1,[r1,#0] + 0x01001b8e: 8448 H. STRH r0,[r1,#0x22] + 0x01001b90: e28e .. B 0x10020b0 ; finsh_thread_entry + 1508 + 0x01001b92: 48cd .H LDR r0,[pc,#820] ; [0x1001ec8] = 0x2001c + 0x01001b94: 6800 .h LDR r0,[r0,#0] + 0x01001b96: 8c40 @. LDRH r0,[r0,#0x22] + 0x01001b98: 2250 P" MOVS r2,#0x50 + 0x01001b9a: 4350 PC MULS r0,r2,r0 + 0x01001b9c: 4aca .J LDR r2,[pc,#808] ; [0x1001ec8] = 0x2001c + 0x01001b9e: 6812 .h LDR r2,[r2,#0] + 0x01001ba0: 3226 &2 ADDS r2,r2,#0x26 + 0x01001ba2: 1881 .. ADDS r1,r0,r2 + 0x01001ba4: 2250 P" MOVS r2,#0x50 + 0x01001ba6: 48c8 .H LDR r0,[pc,#800] ; [0x1001ec8] = 0x2001c + 0x01001ba8: 6800 .h LDR r0,[r0,#0] + 0x01001baa: 30ff .0 ADDS r0,r0,#0xff + 0x01001bac: 30b7 .0 ADDS r0,r0,#0xb7 + 0x01001bae: f7fefdc5 .... BL __aeabi_memcpy ; 0x100073c + 0x01001bb2: 48c5 .H LDR r0,[pc,#788] ; [0x1001ec8] = 0x2001c + 0x01001bb4: 6800 .h LDR r0,[r0,#0] + 0x01001bb6: 30ff .0 ADDS r0,r0,#0xff + 0x01001bb8: 30b7 .0 ADDS r0,r0,#0xb7 + 0x01001bba: f7fefd41 ..A. BL strlen ; 0x1000640 + 0x01001bbe: b281 .. UXTH r1,r0 + 0x01001bc0: 48c1 .H LDR r0,[pc,#772] ; [0x1001ec8] = 0x2001c + 0x01001bc2: 6800 .h LDR r0,[r0,#0] + 0x01001bc4: 30ff .0 ADDS r0,r0,#0xff + 0x01001bc6: 30ff .0 ADDS r0,r0,#0xff + 0x01001bc8: 3002 .0 ADDS r0,#2 + 0x01001bca: 8101 .. STRH r1,[r0,#8] + 0x01001bcc: 48be .H LDR r0,[pc,#760] ; [0x1001ec8] = 0x2001c + 0x01001bce: 6800 .h LDR r0,[r0,#0] + 0x01001bd0: 30ff .0 ADDS r0,r0,#0xff + 0x01001bd2: 30ff .0 ADDS r0,r0,#0xff + 0x01001bd4: 3002 .0 ADDS r0,#2 + 0x01001bd6: 8141 A. STRH r1,[r0,#0xa] + 0x01001bd8: 48bb .H LDR r0,[pc,#748] ; [0x1001ec8] = 0x2001c + 0x01001bda: 6800 .h LDR r0,[r0,#0] + 0x01001bdc: f005f874 ..t. BL shell_handle_history ; 0x1006cc8 + 0x01001be0: e266 f. B 0x10020b0 ; finsh_thread_entry + 1508 + 0x01001be2: 2c42 B, CMP r4,#0x42 + 0x01001be4: d146 F. BNE 0x1001c74 ; finsh_thread_entry + 424 + 0x01001be6: 48b8 .H LDR r0,[pc,#736] ; [0x1001ec8] = 0x2001c + 0x01001be8: 6800 .h LDR r0,[r0,#0] + 0x01001bea: 8c41 A. LDRH r1,[r0,#0x22] + 0x01001bec: 48b6 .H LDR r0,[pc,#728] ; [0x1001ec8] = 0x2001c + 0x01001bee: 6800 .h LDR r0,[r0,#0] + 0x01001bf0: 8c80 .. LDRH r0,[r0,#0x24] + 0x01001bf2: 1e40 @. SUBS r0,r0,#1 + 0x01001bf4: 4281 .B CMP r1,r0 + 0x01001bf6: da07 .. BGE 0x1001c08 ; finsh_thread_entry + 316 + 0x01001bf8: 48b3 .H LDR r0,[pc,#716] ; [0x1001ec8] = 0x2001c + 0x01001bfa: 6800 .h LDR r0,[r0,#0] + 0x01001bfc: 8c40 @. LDRH r0,[r0,#0x22] + 0x01001bfe: 1c40 @. ADDS r0,r0,#1 + 0x01001c00: 49b1 .I LDR r1,[pc,#708] ; [0x1001ec8] = 0x2001c + 0x01001c02: 6809 .h LDR r1,[r1,#0] + 0x01001c04: 8448 H. STRH r0,[r1,#0x22] + 0x01001c06: e00d .. B 0x1001c24 ; finsh_thread_entry + 344 + 0x01001c08: 48af .H LDR r0,[pc,#700] ; [0x1001ec8] = 0x2001c + 0x01001c0a: 6800 .h LDR r0,[r0,#0] + 0x01001c0c: 8c80 .. LDRH r0,[r0,#0x24] + 0x01001c0e: 2800 .( CMP r0,#0 + 0x01001c10: d007 .. BEQ 0x1001c22 ; finsh_thread_entry + 342 + 0x01001c12: 48ad .H LDR r0,[pc,#692] ; [0x1001ec8] = 0x2001c + 0x01001c14: 6800 .h LDR r0,[r0,#0] + 0x01001c16: 8c80 .. LDRH r0,[r0,#0x24] + 0x01001c18: 1e40 @. SUBS r0,r0,#1 + 0x01001c1a: 49ab .I LDR r1,[pc,#684] ; [0x1001ec8] = 0x2001c + 0x01001c1c: 6809 .h LDR r1,[r1,#0] + 0x01001c1e: 8448 H. STRH r0,[r1,#0x22] + 0x01001c20: e000 .. B 0x1001c24 ; finsh_thread_entry + 344 + 0x01001c22: e245 E. B 0x10020b0 ; finsh_thread_entry + 1508 + 0x01001c24: 48a8 .H LDR r0,[pc,#672] ; [0x1001ec8] = 0x2001c + 0x01001c26: 6800 .h LDR r0,[r0,#0] + 0x01001c28: 8c40 @. LDRH r0,[r0,#0x22] + 0x01001c2a: 2250 P" MOVS r2,#0x50 + 0x01001c2c: 4350 PC MULS r0,r2,r0 + 0x01001c2e: 4aa6 .J LDR r2,[pc,#664] ; [0x1001ec8] = 0x2001c + 0x01001c30: 6812 .h LDR r2,[r2,#0] + 0x01001c32: 3226 &2 ADDS r2,r2,#0x26 + 0x01001c34: 1881 .. ADDS r1,r0,r2 + 0x01001c36: 2250 P" MOVS r2,#0x50 + 0x01001c38: 48a3 .H LDR r0,[pc,#652] ; [0x1001ec8] = 0x2001c + 0x01001c3a: 6800 .h LDR r0,[r0,#0] + 0x01001c3c: 30ff .0 ADDS r0,r0,#0xff + 0x01001c3e: 30b7 .0 ADDS r0,r0,#0xb7 + 0x01001c40: f7fefd7c ..|. BL __aeabi_memcpy ; 0x100073c + 0x01001c44: 48a0 .H LDR r0,[pc,#640] ; [0x1001ec8] = 0x2001c + 0x01001c46: 6800 .h LDR r0,[r0,#0] + 0x01001c48: 30ff .0 ADDS r0,r0,#0xff + 0x01001c4a: 30b7 .0 ADDS r0,r0,#0xb7 + 0x01001c4c: f7fefcf8 .... BL strlen ; 0x1000640 + 0x01001c50: b281 .. UXTH r1,r0 + 0x01001c52: 489d .H LDR r0,[pc,#628] ; [0x1001ec8] = 0x2001c + 0x01001c54: 6800 .h LDR r0,[r0,#0] + 0x01001c56: 30ff .0 ADDS r0,r0,#0xff + 0x01001c58: 30ff .0 ADDS r0,r0,#0xff + 0x01001c5a: 3002 .0 ADDS r0,#2 + 0x01001c5c: 8101 .. STRH r1,[r0,#8] + 0x01001c5e: 489a .H LDR r0,[pc,#616] ; [0x1001ec8] = 0x2001c + 0x01001c60: 6800 .h LDR r0,[r0,#0] + 0x01001c62: 30ff .0 ADDS r0,r0,#0xff + 0x01001c64: 30ff .0 ADDS r0,r0,#0xff + 0x01001c66: 3002 .0 ADDS r0,#2 + 0x01001c68: 8141 A. STRH r1,[r0,#0xa] + 0x01001c6a: 4897 .H LDR r0,[pc,#604] ; [0x1001ec8] = 0x2001c + 0x01001c6c: 6800 .h LDR r0,[r0,#0] + 0x01001c6e: f005f82b ..+. BL shell_handle_history ; 0x1006cc8 + 0x01001c72: e21d .. B 0x10020b0 ; finsh_thread_entry + 1508 + 0x01001c74: 2c44 D, CMP r4,#0x44 + 0x01001c76: d119 .. BNE 0x1001cac ; finsh_thread_entry + 480 + 0x01001c78: 4893 .H LDR r0,[pc,#588] ; [0x1001ec8] = 0x2001c + 0x01001c7a: 6800 .h LDR r0,[r0,#0] + 0x01001c7c: 30ff .0 ADDS r0,r0,#0xff + 0x01001c7e: 30ff .0 ADDS r0,r0,#0xff + 0x01001c80: 3002 .0 ADDS r0,#2 + 0x01001c82: 8940 @. LDRH r0,[r0,#0xa] + 0x01001c84: 2800 .( CMP r0,#0 + 0x01001c86: d010 .. BEQ 0x1001caa ; finsh_thread_entry + 478 + 0x01001c88: a090 .. ADR r0,{pc}+0x244 ; 0x1001ecc + 0x01001c8a: f002fc21 ..!. BL rt_kprintf ; 0x10044d0 + 0x01001c8e: 488e .H LDR r0,[pc,#568] ; [0x1001ec8] = 0x2001c + 0x01001c90: 6800 .h LDR r0,[r0,#0] + 0x01001c92: 30ff .0 ADDS r0,r0,#0xff + 0x01001c94: 30ff .0 ADDS r0,r0,#0xff + 0x01001c96: 3002 .0 ADDS r0,#2 + 0x01001c98: 8940 @. LDRH r0,[r0,#0xa] + 0x01001c9a: 1e40 @. SUBS r0,r0,#1 + 0x01001c9c: b281 .. UXTH r1,r0 + 0x01001c9e: 488a .H LDR r0,[pc,#552] ; [0x1001ec8] = 0x2001c + 0x01001ca0: 6800 .h LDR r0,[r0,#0] + 0x01001ca2: 30ff .0 ADDS r0,r0,#0xff + 0x01001ca4: 30ff .0 ADDS r0,r0,#0xff + 0x01001ca6: 3002 .0 ADDS r0,#2 + 0x01001ca8: 8141 A. STRH r1,[r0,#0xa] + 0x01001caa: e201 .. B 0x10020b0 ; finsh_thread_entry + 1508 + 0x01001cac: 2c43 C, CMP r4,#0x43 + 0x01001cae: d12a *. BNE 0x1001d06 ; finsh_thread_entry + 570 + 0x01001cb0: 4885 .H LDR r0,[pc,#532] ; [0x1001ec8] = 0x2001c + 0x01001cb2: 6800 .h LDR r0,[r0,#0] + 0x01001cb4: 30ff .0 ADDS r0,r0,#0xff + 0x01001cb6: 30ff .0 ADDS r0,r0,#0xff + 0x01001cb8: 3002 .0 ADDS r0,#2 + 0x01001cba: 8941 A. LDRH r1,[r0,#0xa] + 0x01001cbc: 4882 .H LDR r0,[pc,#520] ; [0x1001ec8] = 0x2001c + 0x01001cbe: 6800 .h LDR r0,[r0,#0] + 0x01001cc0: 30ff .0 ADDS r0,r0,#0xff + 0x01001cc2: 30ff .0 ADDS r0,r0,#0xff + 0x01001cc4: 3002 .0 ADDS r0,#2 + 0x01001cc6: 8900 .. LDRH r0,[r0,#8] + 0x01001cc8: 4281 .B CMP r1,r0 + 0x01001cca: da1b .. BGE 0x1001d04 ; finsh_thread_entry + 568 + 0x01001ccc: 487e ~H LDR r0,[pc,#504] ; [0x1001ec8] = 0x2001c + 0x01001cce: 6800 .h LDR r0,[r0,#0] + 0x01001cd0: 30ff .0 ADDS r0,r0,#0xff + 0x01001cd2: 30ff .0 ADDS r0,r0,#0xff + 0x01001cd4: 3002 .0 ADDS r0,#2 + 0x01001cd6: 8942 B. LDRH r2,[r0,#0xa] + 0x01001cd8: 487b {H LDR r0,[pc,#492] ; [0x1001ec8] = 0x2001c + 0x01001cda: 6800 .h LDR r0,[r0,#0] + 0x01001cdc: 30ff .0 ADDS r0,r0,#0xff + 0x01001cde: 30b7 .0 ADDS r0,r0,#0xb7 + 0x01001ce0: 5c81 .\ LDRB r1,[r0,r2] + 0x01001ce2: a07b {. ADR r0,{pc}+0x1ee ; 0x1001ed0 + 0x01001ce4: f002fbf4 .... BL rt_kprintf ; 0x10044d0 + 0x01001ce8: 4877 wH LDR r0,[pc,#476] ; [0x1001ec8] = 0x2001c + 0x01001cea: 6800 .h LDR r0,[r0,#0] + 0x01001cec: 30ff .0 ADDS r0,r0,#0xff + 0x01001cee: 30ff .0 ADDS r0,r0,#0xff + 0x01001cf0: 3002 .0 ADDS r0,#2 + 0x01001cf2: 8940 @. LDRH r0,[r0,#0xa] + 0x01001cf4: 1c40 @. ADDS r0,r0,#1 + 0x01001cf6: b281 .. UXTH r1,r0 + 0x01001cf8: 4873 sH LDR r0,[pc,#460] ; [0x1001ec8] = 0x2001c + 0x01001cfa: 6800 .h LDR r0,[r0,#0] + 0x01001cfc: 30ff .0 ADDS r0,r0,#0xff + 0x01001cfe: 30ff .0 ADDS r0,r0,#0xff + 0x01001d00: 3002 .0 ADDS r0,#2 + 0x01001d02: 8141 A. STRH r1,[r0,#0xa] + 0x01001d04: e1d4 .. B 0x10020b0 ; finsh_thread_entry + 1508 + 0x01001d06: 2c00 ., CMP r4,#0 + 0x01001d08: d001 .. BEQ 0x1001d0e ; finsh_thread_entry + 578 + 0x01001d0a: 2cff ., CMP r4,#0xff + 0x01001d0c: d100 .. BNE 0x1001d10 ; finsh_thread_entry + 580 + 0x01001d0e: e1cf .. B 0x10020b0 ; finsh_thread_entry + 1508 + 0x01001d10: 2c09 ., CMP r4,#9 + 0x01001d12: d127 '. BNE 0x1001d64 ; finsh_thread_entry + 664 + 0x01001d14: 2500 .% MOVS r5,#0 + 0x01001d16: e003 .. B 0x1001d20 ; finsh_thread_entry + 596 + 0x01001d18: a06c l. ADR r0,{pc}+0x1b4 ; 0x1001ecc + 0x01001d1a: f002fbd9 .... BL rt_kprintf ; 0x10044d0 + 0x01001d1e: 1c6d m. ADDS r5,r5,#1 + 0x01001d20: 4869 iH LDR r0,[pc,#420] ; [0x1001ec8] = 0x2001c + 0x01001d22: 6800 .h LDR r0,[r0,#0] + 0x01001d24: 30ff .0 ADDS r0,r0,#0xff + 0x01001d26: 30ff .0 ADDS r0,r0,#0xff + 0x01001d28: 3002 .0 ADDS r0,#2 + 0x01001d2a: 8940 @. LDRH r0,[r0,#0xa] + 0x01001d2c: 42a8 .B CMP r0,r5 + 0x01001d2e: dcf3 .. BGT 0x1001d18 ; finsh_thread_entry + 588 + 0x01001d30: 4865 eH LDR r0,[pc,#404] ; [0x1001ec8] = 0x2001c + 0x01001d32: 6800 .h LDR r0,[r0,#0] + 0x01001d34: 30ff .0 ADDS r0,r0,#0xff + 0x01001d36: 30b7 .0 ADDS r0,r0,#0xb7 + 0x01001d38: f004ffae .... BL shell_auto_complete ; 0x1006c98 + 0x01001d3c: 4862 bH LDR r0,[pc,#392] ; [0x1001ec8] = 0x2001c + 0x01001d3e: 6800 .h LDR r0,[r0,#0] + 0x01001d40: 30ff .0 ADDS r0,r0,#0xff + 0x01001d42: 30b7 .0 ADDS r0,r0,#0xb7 + 0x01001d44: f7fefc7c ..|. BL strlen ; 0x1000640 + 0x01001d48: b281 .. UXTH r1,r0 + 0x01001d4a: 485f _H LDR r0,[pc,#380] ; [0x1001ec8] = 0x2001c + 0x01001d4c: 6800 .h LDR r0,[r0,#0] + 0x01001d4e: 30ff .0 ADDS r0,r0,#0xff + 0x01001d50: 30ff .0 ADDS r0,r0,#0xff + 0x01001d52: 3002 .0 ADDS r0,#2 + 0x01001d54: 8101 .. STRH r1,[r0,#8] + 0x01001d56: 485c \H LDR r0,[pc,#368] ; [0x1001ec8] = 0x2001c + 0x01001d58: 6800 .h LDR r0,[r0,#0] + 0x01001d5a: 30ff .0 ADDS r0,r0,#0xff + 0x01001d5c: 30ff .0 ADDS r0,r0,#0xff + 0x01001d5e: 3002 .0 ADDS r0,#2 + 0x01001d60: 8141 A. STRH r1,[r0,#0xa] + 0x01001d62: e1a5 .. B 0x10020b0 ; finsh_thread_entry + 1508 + 0x01001d64: 2c7f ., CMP r4,#0x7f + 0x01001d66: d001 .. BEQ 0x1001d6c ; finsh_thread_entry + 672 + 0x01001d68: 2c08 ., CMP r4,#8 + 0x01001d6a: d179 y. BNE 0x1001e60 ; finsh_thread_entry + 916 + 0x01001d6c: 4856 VH LDR r0,[pc,#344] ; [0x1001ec8] = 0x2001c + 0x01001d6e: 6800 .h LDR r0,[r0,#0] + 0x01001d70: 30ff .0 ADDS r0,r0,#0xff + 0x01001d72: 30ff .0 ADDS r0,r0,#0xff + 0x01001d74: 3002 .0 ADDS r0,#2 + 0x01001d76: 8940 @. LDRH r0,[r0,#0xa] + 0x01001d78: 2800 .( CMP r0,#0 + 0x01001d7a: d100 .. BNE 0x1001d7e ; finsh_thread_entry + 690 + 0x01001d7c: e198 .. B 0x10020b0 ; finsh_thread_entry + 1508 + 0x01001d7e: 4852 RH LDR r0,[pc,#328] ; [0x1001ec8] = 0x2001c + 0x01001d80: 6800 .h LDR r0,[r0,#0] + 0x01001d82: 30ff .0 ADDS r0,r0,#0xff + 0x01001d84: 30ff .0 ADDS r0,r0,#0xff + 0x01001d86: 3002 .0 ADDS r0,#2 + 0x01001d88: 8900 .. LDRH r0,[r0,#8] + 0x01001d8a: 1e40 @. SUBS r0,r0,#1 + 0x01001d8c: b281 .. UXTH r1,r0 + 0x01001d8e: 484e NH LDR r0,[pc,#312] ; [0x1001ec8] = 0x2001c + 0x01001d90: 6800 .h LDR r0,[r0,#0] + 0x01001d92: 30ff .0 ADDS r0,r0,#0xff + 0x01001d94: 30ff .0 ADDS r0,r0,#0xff + 0x01001d96: 3002 .0 ADDS r0,#2 + 0x01001d98: 8101 .. STRH r1,[r0,#8] + 0x01001d9a: 484b KH LDR r0,[pc,#300] ; [0x1001ec8] = 0x2001c + 0x01001d9c: 6800 .h LDR r0,[r0,#0] + 0x01001d9e: 30ff .0 ADDS r0,r0,#0xff + 0x01001da0: 30ff .0 ADDS r0,r0,#0xff + 0x01001da2: 3002 .0 ADDS r0,#2 + 0x01001da4: 8940 @. LDRH r0,[r0,#0xa] + 0x01001da6: 1e40 @. SUBS r0,r0,#1 + 0x01001da8: b281 .. UXTH r1,r0 + 0x01001daa: 4847 GH LDR r0,[pc,#284] ; [0x1001ec8] = 0x2001c + 0x01001dac: 6800 .h LDR r0,[r0,#0] + 0x01001dae: 30ff .0 ADDS r0,r0,#0xff + 0x01001db0: 30ff .0 ADDS r0,r0,#0xff + 0x01001db2: 3002 .0 ADDS r0,#2 + 0x01001db4: 8141 A. STRH r1,[r0,#0xa] + 0x01001db6: 4844 DH LDR r0,[pc,#272] ; [0x1001ec8] = 0x2001c + 0x01001db8: 6800 .h LDR r0,[r0,#0] + 0x01001dba: 30ff .0 ADDS r0,r0,#0xff + 0x01001dbc: 30ff .0 ADDS r0,r0,#0xff + 0x01001dbe: 3002 .0 ADDS r0,#2 + 0x01001dc0: 8901 .. LDRH r1,[r0,#8] + 0x01001dc2: 4841 AH LDR r0,[pc,#260] ; [0x1001ec8] = 0x2001c + 0x01001dc4: 6800 .h LDR r0,[r0,#0] + 0x01001dc6: 30ff .0 ADDS r0,r0,#0xff + 0x01001dc8: 30ff .0 ADDS r0,r0,#0xff + 0x01001dca: 3002 .0 ADDS r0,#2 + 0x01001dcc: 8940 @. LDRH r0,[r0,#0xa] + 0x01001dce: 4281 .B CMP r1,r0 + 0x01001dd0: dd54 T. BLE 0x1001e7c ; finsh_thread_entry + 944 + 0x01001dd2: 4b3d =K LDR r3,[pc,#244] ; [0x1001ec8] = 0x2001c + 0x01001dd4: 681b .h LDR r3,[r3,#0] + 0x01001dd6: 33ff .3 ADDS r3,r3,#0xff + 0x01001dd8: 33ff .3 ADDS r3,r3,#0xff + 0x01001dda: 3302 .3 ADDS r3,#2 + 0x01001ddc: 891e .. LDRH r6,[r3,#8] + 0x01001dde: 4b3a :K LDR r3,[pc,#232] ; [0x1001ec8] = 0x2001c + 0x01001de0: 681b .h LDR r3,[r3,#0] + 0x01001de2: 33ff .3 ADDS r3,r3,#0xff + 0x01001de4: 33ff .3 ADDS r3,r3,#0xff + 0x01001de6: 3302 .3 ADDS r3,#2 + 0x01001de8: 895b [. LDRH r3,[r3,#0xa] + 0x01001dea: 1af2 .. SUBS r2,r6,r3 + 0x01001dec: 4b36 6K LDR r3,[pc,#216] ; [0x1001ec8] = 0x2001c + 0x01001dee: 681b .h LDR r3,[r3,#0] + 0x01001df0: 33ff .3 ADDS r3,r3,#0xff + 0x01001df2: 33ff .3 ADDS r3,r3,#0xff + 0x01001df4: 3302 .3 ADDS r3,#2 + 0x01001df6: 895b [. LDRH r3,[r3,#0xa] + 0x01001df8: 1c5b [. ADDS r3,r3,#1 + 0x01001dfa: 4e33 3N LDR r6,[pc,#204] ; [0x1001ec8] = 0x2001c + 0x01001dfc: 6836 6h LDR r6,[r6,#0] + 0x01001dfe: 36ff .6 ADDS r6,r6,#0xff + 0x01001e00: 36b7 .6 ADDS r6,r6,#0xb7 + 0x01001e02: 1999 .. ADDS r1,r3,r6 + 0x01001e04: 4b30 0K LDR r3,[pc,#192] ; [0x1001ec8] = 0x2001c + 0x01001e06: 681b .h LDR r3,[r3,#0] + 0x01001e08: 33ff .3 ADDS r3,r3,#0xff + 0x01001e0a: 33ff .3 ADDS r3,r3,#0xff + 0x01001e0c: 3302 .3 ADDS r3,#2 + 0x01001e0e: 895e ^. LDRH r6,[r3,#0xa] + 0x01001e10: 4b2d -K LDR r3,[pc,#180] ; [0x1001ec8] = 0x2001c + 0x01001e12: 681b .h LDR r3,[r3,#0] + 0x01001e14: 33ff .3 ADDS r3,r3,#0xff + 0x01001e16: 33b7 .3 ADDS r3,r3,#0xb7 + 0x01001e18: 18f0 .. ADDS r0,r6,r3 + 0x01001e1a: f002fe31 ..1. BL rt_memmove ; 0x1004a80 + 0x01001e1e: 2100 .! MOVS r1,#0 + 0x01001e20: 4829 )H LDR r0,[pc,#164] ; [0x1001ec8] = 0x2001c + 0x01001e22: 6800 .h LDR r0,[r0,#0] + 0x01001e24: 30ff .0 ADDS r0,r0,#0xff + 0x01001e26: 30ff .0 ADDS r0,r0,#0xff + 0x01001e28: 3002 .0 ADDS r0,#2 + 0x01001e2a: 8902 .. LDRH r2,[r0,#8] + 0x01001e2c: 4826 &H LDR r0,[pc,#152] ; [0x1001ec8] = 0x2001c + 0x01001e2e: 6800 .h LDR r0,[r0,#0] + 0x01001e30: 30ff .0 ADDS r0,r0,#0xff + 0x01001e32: 30b7 .0 ADDS r0,r0,#0xb7 + 0x01001e34: 5481 .T STRB r1,[r0,r2] + 0x01001e36: 4824 $H LDR r0,[pc,#144] ; [0x1001ec8] = 0x2001c + 0x01001e38: 6800 .h LDR r0,[r0,#0] + 0x01001e3a: 30ff .0 ADDS r0,r0,#0xff + 0x01001e3c: 30ff .0 ADDS r0,r0,#0xff + 0x01001e3e: 3002 .0 ADDS r0,#2 + 0x01001e40: 8942 B. LDRH r2,[r0,#0xa] + 0x01001e42: 4821 !H LDR r0,[pc,#132] ; [0x1001ec8] = 0x2001c + 0x01001e44: 6800 .h LDR r0,[r0,#0] + 0x01001e46: 30ff .0 ADDS r0,r0,#0xff + 0x01001e48: 30b7 .0 ADDS r0,r0,#0xb7 + 0x01001e4a: 1811 .. ADDS r1,r2,r0 + 0x01001e4c: a021 !. ADR r0,{pc}+0x88 ; 0x1001ed4 + 0x01001e4e: f002fb3f ..?. BL rt_kprintf ; 0x10044d0 + 0x01001e52: 481d .H LDR r0,[pc,#116] ; [0x1001ec8] = 0x2001c + 0x01001e54: 6800 .h LDR r0,[r0,#0] + 0x01001e56: 30ff .0 ADDS r0,r0,#0xff + 0x01001e58: 30ff .0 ADDS r0,r0,#0xff + 0x01001e5a: 3002 .0 ADDS r0,#2 + 0x01001e5c: 8945 E. LDRH r5,[r0,#0xa] + 0x01001e5e: e004 .. B 0x1001e6a ; finsh_thread_entry + 926 + 0x01001e60: e01c .. B 0x1001e9c ; finsh_thread_entry + 976 + 0x01001e62: a01a .. ADR r0,{pc}+0x6a ; 0x1001ecc + 0x01001e64: f002fb34 ..4. BL rt_kprintf ; 0x10044d0 + 0x01001e68: 1c6d m. ADDS r5,r5,#1 + 0x01001e6a: 4817 .H LDR r0,[pc,#92] ; [0x1001ec8] = 0x2001c + 0x01001e6c: 6800 .h LDR r0,[r0,#0] + 0x01001e6e: 30ff .0 ADDS r0,r0,#0xff + 0x01001e70: 30ff .0 ADDS r0,r0,#0xff + 0x01001e72: 3002 .0 ADDS r0,#2 + 0x01001e74: 8900 .. LDRH r0,[r0,#8] + 0x01001e76: 42a8 .B CMP r0,r5 + 0x01001e78: daf3 .. BGE 0x1001e62 ; finsh_thread_entry + 918 + 0x01001e7a: e00e .. B 0x1001e9a ; finsh_thread_entry + 974 + 0x01001e7c: a017 .. ADR r0,{pc}+0x60 ; 0x1001edc + 0x01001e7e: f002fb27 ..'. BL rt_kprintf ; 0x10044d0 + 0x01001e82: 2100 .! MOVS r1,#0 + 0x01001e84: 4810 .H LDR r0,[pc,#64] ; [0x1001ec8] = 0x2001c + 0x01001e86: 6800 .h LDR r0,[r0,#0] + 0x01001e88: 30ff .0 ADDS r0,r0,#0xff + 0x01001e8a: 30ff .0 ADDS r0,r0,#0xff + 0x01001e8c: 3002 .0 ADDS r0,#2 + 0x01001e8e: 8902 .. LDRH r2,[r0,#8] + 0x01001e90: 480d .H LDR r0,[pc,#52] ; [0x1001ec8] = 0x2001c + 0x01001e92: 6800 .h LDR r0,[r0,#0] + 0x01001e94: 30ff .0 ADDS r0,r0,#0xff + 0x01001e96: 30b7 .0 ADDS r0,r0,#0xb7 + 0x01001e98: 5481 .T STRB r1,[r0,r2] + 0x01001e9a: e109 .. B 0x10020b0 ; finsh_thread_entry + 1508 + 0x01001e9c: 2c0d ., CMP r4,#0xd + 0x01001e9e: d001 .. BEQ 0x1001ea4 ; finsh_thread_entry + 984 + 0x01001ea0: 2c0a ., CMP r4,#0xa + 0x01001ea2: d143 C. BNE 0x1001f2c ; finsh_thread_entry + 1120 + 0x01001ea4: 4808 .H LDR r0,[pc,#32] ; [0x1001ec8] = 0x2001c + 0x01001ea6: 6800 .h LDR r0,[r0,#0] + 0x01001ea8: f004ff28 ..(. BL shell_push_history ; 0x1006cfc + 0x01001eac: 4806 .H LDR r0,[pc,#24] ; [0x1001ec8] = 0x2001c + 0x01001eae: 6800 .h LDR r0,[r0,#0] + 0x01001eb0: 3020 0 ADDS r0,r0,#0x20 + 0x01001eb2: 7840 @x LDRB r0,[r0,#1] + 0x01001eb4: 07c0 .. LSLS r0,r0,#31 + 0x01001eb6: 0fc0 .. LSRS r0,r0,#31 + 0x01001eb8: 2800 .( CMP r0,#0 + 0x01001eba: d002 .. BEQ 0x1001ec2 ; finsh_thread_entry + 1014 + 0x01001ebc: a008 .. ADR r0,{pc}+0x24 ; 0x1001ee0 + 0x01001ebe: f002fb07 .... BL rt_kprintf ; 0x10044d0 + 0x01001ec2: 4801 .H LDR r0,[pc,#4] ; [0x1001ec8] = 0x2001c + 0x01001ec4: 6800 .h LDR r0,[r0,#0] + 0x01001ec6: e00d .. B 0x1001ee4 ; finsh_thread_entry + 1048 + $d + 0x01001ec8: 0002001c .... DCD 131100 + 0x01001ecc: 00000008 .... DCD 8 + 0x01001ed0: 00006325 %c.. DCD 25381 + 0x01001ed4: 20732508 .%s DCD 544417032 + 0x01001ed8: 00000820 ... DCD 2080 + 0x01001edc: 00082008 . .. DCD 532488 + 0x01001ee0: 0000000a .... DCD 10 + $t + 0x01001ee4: 30ff .0 ADDS r0,r0,#0xff + 0x01001ee6: 30ff .0 ADDS r0,r0,#0xff + 0x01001ee8: 3002 .0 ADDS r0,#2 + 0x01001eea: 8901 .. LDRH r1,[r0,#8] + 0x01001eec: 4871 qH LDR r0,[pc,#452] ; [0x10020b4] = 0x2001c + 0x01001eee: 6800 .h LDR r0,[r0,#0] + 0x01001ef0: 30ff .0 ADDS r0,r0,#0xff + 0x01001ef2: 30b7 .0 ADDS r0,r0,#0xb7 + 0x01001ef4: f001f8f2 .... BL msh_exec ; 0x10030dc + 0x01001ef8: f7fffc62 ..b. BL finsh_get_prompt ; 0x10017c0 + 0x01001efc: 4605 .F MOV r5,r0 + 0x01001efe: f002fae7 .... BL rt_kprintf ; 0x10044d0 + 0x01001f02: 2151 Q! MOVS r1,#0x51 + 0x01001f04: 486b kH LDR r0,[pc,#428] ; [0x10020b4] = 0x2001c + 0x01001f06: 6800 .h LDR r0,[r0,#0] + 0x01001f08: 30ff .0 ADDS r0,r0,#0xff + 0x01001f0a: 30b7 .0 ADDS r0,r0,#0xb7 + 0x01001f0c: f7fefc73 ..s. BL __aeabi_memclr ; 0x10007f6 + 0x01001f10: 2100 .! MOVS r1,#0 + 0x01001f12: 4868 hH LDR r0,[pc,#416] ; [0x10020b4] = 0x2001c + 0x01001f14: 6800 .h LDR r0,[r0,#0] + 0x01001f16: 30ff .0 ADDS r0,r0,#0xff + 0x01001f18: 30ff .0 ADDS r0,r0,#0xff + 0x01001f1a: 3002 .0 ADDS r0,#2 + 0x01001f1c: 8101 .. STRH r1,[r0,#8] + 0x01001f1e: 4865 eH LDR r0,[pc,#404] ; [0x10020b4] = 0x2001c + 0x01001f20: 6800 .h LDR r0,[r0,#0] + 0x01001f22: 30ff .0 ADDS r0,r0,#0xff + 0x01001f24: 30ff .0 ADDS r0,r0,#0xff + 0x01001f26: 3002 .0 ADDS r0,#2 + 0x01001f28: 8141 A. STRH r1,[r0,#0xa] + 0x01001f2a: e0c1 .. B 0x10020b0 ; finsh_thread_entry + 1508 + 0x01001f2c: 4861 aH LDR r0,[pc,#388] ; [0x10020b4] = 0x2001c + 0x01001f2e: 6800 .h LDR r0,[r0,#0] + 0x01001f30: 30ff .0 ADDS r0,r0,#0xff + 0x01001f32: 30ff .0 ADDS r0,r0,#0xff + 0x01001f34: 3002 .0 ADDS r0,#2 + 0x01001f36: 8900 .. LDRH r0,[r0,#8] + 0x01001f38: 2850 P( CMP r0,#0x50 + 0x01001f3a: db06 .. BLT 0x1001f4a ; finsh_thread_entry + 1150 + 0x01001f3c: 2100 .! MOVS r1,#0 + 0x01001f3e: 485d ]H LDR r0,[pc,#372] ; [0x10020b4] = 0x2001c + 0x01001f40: 6800 .h LDR r0,[r0,#0] + 0x01001f42: 30ff .0 ADDS r0,r0,#0xff + 0x01001f44: 30ff .0 ADDS r0,r0,#0xff + 0x01001f46: 3002 .0 ADDS r0,#2 + 0x01001f48: 8101 .. STRH r1,[r0,#8] + 0x01001f4a: 485a ZH LDR r0,[pc,#360] ; [0x10020b4] = 0x2001c + 0x01001f4c: 6800 .h LDR r0,[r0,#0] + 0x01001f4e: 30ff .0 ADDS r0,r0,#0xff + 0x01001f50: 30ff .0 ADDS r0,r0,#0xff + 0x01001f52: 3002 .0 ADDS r0,#2 + 0x01001f54: 8941 A. LDRH r1,[r0,#0xa] + 0x01001f56: 4857 WH LDR r0,[pc,#348] ; [0x10020b4] = 0x2001c + 0x01001f58: 6800 .h LDR r0,[r0,#0] + 0x01001f5a: 30ff .0 ADDS r0,r0,#0xff + 0x01001f5c: 30ff .0 ADDS r0,r0,#0xff + 0x01001f5e: 3002 .0 ADDS r0,#2 + 0x01001f60: 8900 .. LDRH r0,[r0,#8] + 0x01001f62: 4281 .B CMP r1,r0 + 0x01001f64: da5a Z. BGE 0x100201c ; finsh_thread_entry + 1360 + 0x01001f66: 4b53 SK LDR r3,[pc,#332] ; [0x10020b4] = 0x2001c + 0x01001f68: 681b .h LDR r3,[r3,#0] + 0x01001f6a: 33ff .3 ADDS r3,r3,#0xff + 0x01001f6c: 33ff .3 ADDS r3,r3,#0xff + 0x01001f6e: 3302 .3 ADDS r3,#2 + 0x01001f70: 891e .. LDRH r6,[r3,#8] + 0x01001f72: 4b50 PK LDR r3,[pc,#320] ; [0x10020b4] = 0x2001c + 0x01001f74: 681b .h LDR r3,[r3,#0] + 0x01001f76: 33ff .3 ADDS r3,r3,#0xff + 0x01001f78: 33ff .3 ADDS r3,r3,#0xff + 0x01001f7a: 3302 .3 ADDS r3,#2 + 0x01001f7c: 895b [. LDRH r3,[r3,#0xa] + 0x01001f7e: 1af2 .. SUBS r2,r6,r3 + 0x01001f80: 4b4c LK LDR r3,[pc,#304] ; [0x10020b4] = 0x2001c + 0x01001f82: 681b .h LDR r3,[r3,#0] + 0x01001f84: 33ff .3 ADDS r3,r3,#0xff + 0x01001f86: 33ff .3 ADDS r3,r3,#0xff + 0x01001f88: 3302 .3 ADDS r3,#2 + 0x01001f8a: 895e ^. LDRH r6,[r3,#0xa] + 0x01001f8c: 4b49 IK LDR r3,[pc,#292] ; [0x10020b4] = 0x2001c + 0x01001f8e: 681b .h LDR r3,[r3,#0] + 0x01001f90: 33ff .3 ADDS r3,r3,#0xff + 0x01001f92: 33b7 .3 ADDS r3,r3,#0xb7 + 0x01001f94: 18f1 .. ADDS r1,r6,r3 + 0x01001f96: 4b47 GK LDR r3,[pc,#284] ; [0x10020b4] = 0x2001c + 0x01001f98: 681b .h LDR r3,[r3,#0] + 0x01001f9a: 33ff .3 ADDS r3,r3,#0xff + 0x01001f9c: 33ff .3 ADDS r3,r3,#0xff + 0x01001f9e: 3302 .3 ADDS r3,#2 + 0x01001fa0: 895b [. LDRH r3,[r3,#0xa] + 0x01001fa2: 1c5b [. ADDS r3,r3,#1 + 0x01001fa4: 4e43 CN LDR r6,[pc,#268] ; [0x10020b4] = 0x2001c + 0x01001fa6: 6836 6h LDR r6,[r6,#0] + 0x01001fa8: 36ff .6 ADDS r6,r6,#0xff + 0x01001faa: 36b7 .6 ADDS r6,r6,#0xb7 + 0x01001fac: 1998 .. ADDS r0,r3,r6 + 0x01001fae: f002fd67 ..g. BL rt_memmove ; 0x1004a80 + 0x01001fb2: 4840 @H LDR r0,[pc,#256] ; [0x10020b4] = 0x2001c + 0x01001fb4: 6800 .h LDR r0,[r0,#0] + 0x01001fb6: 30ff .0 ADDS r0,r0,#0xff + 0x01001fb8: 30ff .0 ADDS r0,r0,#0xff + 0x01001fba: 3002 .0 ADDS r0,#2 + 0x01001fbc: 8942 B. LDRH r2,[r0,#0xa] + 0x01001fbe: 483d =H LDR r0,[pc,#244] ; [0x10020b4] = 0x2001c + 0x01001fc0: 6800 .h LDR r0,[r0,#0] + 0x01001fc2: 30ff .0 ADDS r0,r0,#0xff + 0x01001fc4: 30b7 .0 ADDS r0,r0,#0xb7 + 0x01001fc6: 5484 .T STRB r4,[r0,r2] + 0x01001fc8: 483a :H LDR r0,[pc,#232] ; [0x10020b4] = 0x2001c + 0x01001fca: 6800 .h LDR r0,[r0,#0] + 0x01001fcc: 3020 0 ADDS r0,r0,#0x20 + 0x01001fce: 7840 @x LDRB r0,[r0,#1] + 0x01001fd0: 07c0 .. LSLS r0,r0,#31 + 0x01001fd2: 0fc0 .. LSRS r0,r0,#31 + 0x01001fd4: 2800 .( CMP r0,#0 + 0x01001fd6: d00d .. BEQ 0x1001ff4 ; finsh_thread_entry + 1320 + 0x01001fd8: 4836 6H LDR r0,[pc,#216] ; [0x10020b4] = 0x2001c + 0x01001fda: 6800 .h LDR r0,[r0,#0] + 0x01001fdc: 30ff .0 ADDS r0,r0,#0xff + 0x01001fde: 30ff .0 ADDS r0,r0,#0xff + 0x01001fe0: 3002 .0 ADDS r0,#2 + 0x01001fe2: 8942 B. LDRH r2,[r0,#0xa] + 0x01001fe4: 4833 3H LDR r0,[pc,#204] ; [0x10020b4] = 0x2001c + 0x01001fe6: 6800 .h LDR r0,[r0,#0] + 0x01001fe8: 30ff .0 ADDS r0,r0,#0xff + 0x01001fea: 30b7 .0 ADDS r0,r0,#0xb7 + 0x01001fec: 1811 .. ADDS r1,r2,r0 + 0x01001fee: a032 2. ADR r0,{pc}+0xca ; 0x10020b8 + 0x01001ff0: f002fa6e ..n. BL rt_kprintf ; 0x10044d0 + 0x01001ff4: 482f /H LDR r0,[pc,#188] ; [0x10020b4] = 0x2001c + 0x01001ff6: 6800 .h LDR r0,[r0,#0] + 0x01001ff8: 30ff .0 ADDS r0,r0,#0xff + 0x01001ffa: 30ff .0 ADDS r0,r0,#0xff + 0x01001ffc: 3002 .0 ADDS r0,#2 + 0x01001ffe: 8945 E. LDRH r5,[r0,#0xa] + 0x01002000: e003 .. B 0x100200a ; finsh_thread_entry + 1342 + 0x01002002: a02e .. ADR r0,{pc}+0xba ; 0x10020bc + 0x01002004: f002fa64 ..d. BL rt_kprintf ; 0x10044d0 + 0x01002008: 1c6d m. ADDS r5,r5,#1 + 0x0100200a: 482a *H LDR r0,[pc,#168] ; [0x10020b4] = 0x2001c + 0x0100200c: 6800 .h LDR r0,[r0,#0] + 0x0100200e: 30ff .0 ADDS r0,r0,#0xff + 0x01002010: 30ff .0 ADDS r0,r0,#0xff + 0x01002012: 3002 .0 ADDS r0,#2 + 0x01002014: 8900 .. LDRH r0,[r0,#8] + 0x01002016: 42a8 .B CMP r0,r5 + 0x01002018: dcf3 .. BGT 0x1002002 ; finsh_thread_entry + 1334 + 0x0100201a: e016 .. B 0x100204a ; finsh_thread_entry + 1406 + 0x0100201c: 4825 %H LDR r0,[pc,#148] ; [0x10020b4] = 0x2001c + 0x0100201e: 6800 .h LDR r0,[r0,#0] + 0x01002020: 30ff .0 ADDS r0,r0,#0xff + 0x01002022: 30ff .0 ADDS r0,r0,#0xff + 0x01002024: 3002 .0 ADDS r0,#2 + 0x01002026: 8902 .. LDRH r2,[r0,#8] + 0x01002028: 4822 "H LDR r0,[pc,#136] ; [0x10020b4] = 0x2001c + 0x0100202a: 6800 .h LDR r0,[r0,#0] + 0x0100202c: 30ff .0 ADDS r0,r0,#0xff + 0x0100202e: 30b7 .0 ADDS r0,r0,#0xb7 + 0x01002030: 5484 .T STRB r4,[r0,r2] + 0x01002032: 4820 H LDR r0,[pc,#128] ; [0x10020b4] = 0x2001c + 0x01002034: 6800 .h LDR r0,[r0,#0] + 0x01002036: 3020 0 ADDS r0,r0,#0x20 + 0x01002038: 7840 @x LDRB r0,[r0,#1] + 0x0100203a: 07c0 .. LSLS r0,r0,#31 + 0x0100203c: 0fc0 .. LSRS r0,r0,#31 + 0x0100203e: 2800 .( CMP r0,#0 + 0x01002040: d003 .. BEQ 0x100204a ; finsh_thread_entry + 1406 + 0x01002042: 4621 !F MOV r1,r4 + 0x01002044: a01e .. ADR r0,{pc}+0x7c ; 0x10020c0 + 0x01002046: f002fa43 ..C. BL rt_kprintf ; 0x10044d0 + 0x0100204a: 2400 .$ MOVS r4,#0 + 0x0100204c: 4819 .H LDR r0,[pc,#100] ; [0x10020b4] = 0x2001c + 0x0100204e: 6800 .h LDR r0,[r0,#0] + 0x01002050: 30ff .0 ADDS r0,r0,#0xff + 0x01002052: 30ff .0 ADDS r0,r0,#0xff + 0x01002054: 3002 .0 ADDS r0,#2 + 0x01002056: 8900 .. LDRH r0,[r0,#8] + 0x01002058: 1c40 @. ADDS r0,r0,#1 + 0x0100205a: b281 .. UXTH r1,r0 + 0x0100205c: 4815 .H LDR r0,[pc,#84] ; [0x10020b4] = 0x2001c + 0x0100205e: 6800 .h LDR r0,[r0,#0] + 0x01002060: 30ff .0 ADDS r0,r0,#0xff + 0x01002062: 30ff .0 ADDS r0,r0,#0xff + 0x01002064: 3002 .0 ADDS r0,#2 + 0x01002066: 8101 .. STRH r1,[r0,#8] + 0x01002068: 4812 .H LDR r0,[pc,#72] ; [0x10020b4] = 0x2001c + 0x0100206a: 6800 .h LDR r0,[r0,#0] + 0x0100206c: 30ff .0 ADDS r0,r0,#0xff + 0x0100206e: 30ff .0 ADDS r0,r0,#0xff + 0x01002070: 3002 .0 ADDS r0,#2 + 0x01002072: 8940 @. LDRH r0,[r0,#0xa] + 0x01002074: 1c40 @. ADDS r0,r0,#1 + 0x01002076: b281 .. UXTH r1,r0 + 0x01002078: 480e .H LDR r0,[pc,#56] ; [0x10020b4] = 0x2001c + 0x0100207a: 6800 .h LDR r0,[r0,#0] + 0x0100207c: 30ff .0 ADDS r0,r0,#0xff + 0x0100207e: 30ff .0 ADDS r0,r0,#0xff + 0x01002080: 3002 .0 ADDS r0,#2 + 0x01002082: 8141 A. STRH r1,[r0,#0xa] + 0x01002084: 480b .H LDR r0,[pc,#44] ; [0x10020b4] = 0x2001c + 0x01002086: 6800 .h LDR r0,[r0,#0] + 0x01002088: 30ff .0 ADDS r0,r0,#0xff + 0x0100208a: 30ff .0 ADDS r0,r0,#0xff + 0x0100208c: 3002 .0 ADDS r0,#2 + 0x0100208e: 8900 .. LDRH r0,[r0,#8] + 0x01002090: 2850 P( CMP r0,#0x50 + 0x01002092: db0c .. BLT 0x10020ae ; finsh_thread_entry + 1506 + 0x01002094: 2100 .! MOVS r1,#0 + 0x01002096: 4807 .H LDR r0,[pc,#28] ; [0x10020b4] = 0x2001c + 0x01002098: 6800 .h LDR r0,[r0,#0] + 0x0100209a: 30ff .0 ADDS r0,r0,#0xff + 0x0100209c: 30ff .0 ADDS r0,r0,#0xff + 0x0100209e: 3002 .0 ADDS r0,#2 + 0x010020a0: 8101 .. STRH r1,[r0,#8] + 0x010020a2: 4804 .H LDR r0,[pc,#16] ; [0x10020b4] = 0x2001c + 0x010020a4: 6800 .h LDR r0,[r0,#0] + 0x010020a6: 30ff .0 ADDS r0,r0,#0xff + 0x010020a8: 30ff .0 ADDS r0,r0,#0xff + 0x010020aa: 3002 .0 ADDS r0,#2 + 0x010020ac: 8141 A. STRH r1,[r0,#0xa] + 0x010020ae: bf00 .. NOP + 0x010020b0: e52e .. B 0x1001b10 ; finsh_thread_entry + 68 + $d + 0x010020b2: 0000 .. DCW 0 + 0x010020b4: 0002001c .... DCD 131100 + 0x010020b8: 00007325 %s.. DCD 29477 + 0x010020bc: 00000008 .... DCD 8 + 0x010020c0: 00006325 %c.. DCD 25381 + $t + i.hello + hello + 0x010020c4: b510 .. PUSH {r4,lr} + 0x010020c6: a002 .. ADR r0,{pc}+0xa ; 0x10020d0 + 0x010020c8: f002fa02 .... BL rt_kprintf ; 0x10044d0 + 0x010020cc: 2000 . MOVS r0,#0 + 0x010020ce: bd10 .. POP {r4,pc} + $d + 0x010020d0: 6c6c6548 Hell DCD 1819043144 + 0x010020d4: 5452206f o RT DCD 1414668399 + 0x010020d8: 7268542d -Thr DCD 1919439917 + 0x010020dc: 21646165 ead! DCD 560226661 + 0x010020e0: 0000000a .... DCD 10 + $t + i.list + list + 0x010020e4: b510 .. PUSH {r4,lr} + 0x010020e6: a00d .. ADR r0,{pc}+0x36 ; 0x100211c + 0x010020e8: f002f9f2 .... BL rt_kprintf ; 0x10044d0 + 0x010020ec: 4810 .H LDR r0,[pc,#64] ; [0x1002130] = 0x20014 + 0x010020ee: 6804 .h LDR r4,[r0,#0] + 0x010020f0: e00e .. B 0x1002110 ; list + 44 + 0x010020f2: 2202 ." MOVS r2,#2 + 0x010020f4: a10f .. ADR r1,{pc}+0x40 ; 0x1002134 + 0x010020f6: 6820 h LDR r0,[r4,#0] + 0x010020f8: f7fefac4 .... BL strncmp ; 0x1000684 + 0x010020fc: 2800 .( CMP r0,#0 + 0x010020fe: d100 .. BNE 0x1002102 ; list + 30 + 0x01002100: e005 .. B 0x100210e ; list + 42 + 0x01002102: a00d .. ADR r0,{pc}+0x36 ; 0x1002138 + 0x01002104: 6862 bh LDR r2,[r4,#4] + 0x01002106: 6821 !h LDR r1,[r4,#0] + 0x01002108: f002f9e2 .... BL rt_kprintf ; 0x10044d0 + 0x0100210c: bf00 .. NOP + 0x0100210e: 340c .4 ADDS r4,r4,#0xc + 0x01002110: 480d .H LDR r0,[pc,#52] ; [0x1002148] = 0x20018 + 0x01002112: 6800 .h LDR r0,[r0,#0] + 0x01002114: 4284 .B CMP r4,r0 + 0x01002116: d3ec .. BCC 0x10020f2 ; list + 14 + 0x01002118: 2000 . MOVS r0,#0 + 0x0100211a: bd10 .. POP {r4,pc} + $d + 0x0100211c: 6f432d2d --Co DCD 1866673453 + 0x01002120: 6e616d6d mman DCD 1851878765 + 0x01002124: 4c207364 ds L DCD 1277195108 + 0x01002128: 3a747369 ist: DCD 980710249 + 0x0100212c: 0000000a .... DCD 10 + 0x01002130: 00020014 .... DCD 131092 + 0x01002134: 00005f5f __.. DCD 24415 + 0x01002138: 36312d25 %-16 DCD 909192485 + 0x0100213c: 2d2d2073 s -- DCD 757932147 + 0x01002140: 0a732520 %s. DCD 175318304 + 0x01002144: 00000000 .... DCD 0 + 0x01002148: 00020018 .... DCD 131096 + $t + i.list_device + list_device + 0x0100214c: b5f0 .. PUSH {r4-r7,lr} + 0x0100214e: b093 .. SUB sp,sp,#0x4c + 0x01002150: 2700 .' MOVS r7,#0 + 0x01002152: a028 (. ADR r0,{pc}+0xa2 ; 0x10021f4 + 0x01002154: 9003 .. STR r0,[sp,#0xc] + 0x01002156: 2308 .# MOVS r3,#8 + 0x01002158: aa05 .. ADD r2,sp,#0x14 + 0x0100215a: 2109 .! MOVS r1,#9 + 0x0100215c: a80d .. ADD r0,sp,#0x34 + 0x0100215e: f000f921 ..!. BL list_find_init ; 0x10023a4 + 0x01002162: 2008 . MOVS r0,#8 + 0x01002164: 9004 .. STR r0,[sp,#0x10] + 0x01002166: a025 %. ADR r0,{pc}+0x96 ; 0x10021fc + 0x01002168: 9a03 .. LDR r2,[sp,#0xc] + 0x0100216a: 9904 .. LDR r1,[sp,#0x10] + 0x0100216c: f002f9b0 .... BL rt_kprintf ; 0x10044d0 + 0x01002170: 9804 .. LDR r0,[sp,#0x10] + 0x01002172: f001f8bb .... BL object_split ; 0x10032ec + 0x01002176: a02b +. ADR r0,{pc}+0xae ; 0x1002224 + 0x01002178: f002f9aa .... BL rt_kprintf ; 0x10044d0 + 0x0100217c: bf00 .. NOP + 0x0100217e: a90d .. ADD r1,sp,#0x34 + 0x01002180: 4638 8F MOV r0,r7 + 0x01002182: f000f923 ..#. BL list_get_next ; 0x10023cc + 0x01002186: 4607 .F MOV r7,r0 + 0x01002188: 2600 .& MOVS r6,#0 + 0x0100218a: e02b +. B 0x10021e4 ; list_device + 152 + 0x0100218c: 00b0 .. LSLS r0,r6,#2 + 0x0100218e: a905 .. ADD r1,sp,#0x14 + 0x01002190: 5808 .X LDR r0,[r1,r0] + 0x01002192: 4605 .F MOV r5,r0 + 0x01002194: 3d0c .= SUBS r5,r5,#0xc + 0x01002196: f7fef993 .... BL rt_hw_interrupt_disable ; 0x10004c0 + 0x0100219a: 9012 .. STR r0,[sp,#0x48] + 0x0100219c: 7a28 (z LDRB r0,[r5,#8] + 0x0100219e: 2180 .! MOVS r1,#0x80 + 0x010021a0: 4388 .C BICS r0,r0,r1 + 0x010021a2: a908 .. ADD r1,sp,#0x20 + 0x010021a4: 7f09 .. LDRB r1,[r1,#0x1c] + 0x010021a6: 4288 .B CMP r0,r1 + 0x010021a8: d003 .. BEQ 0x10021b2 ; list_device + 102 + 0x010021aa: 9812 .. LDR r0,[sp,#0x48] + 0x010021ac: f7fef98c .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x010021b0: e017 .. B 0x10021e2 ; list_device + 150 + 0x010021b2: 9812 .. LDR r0,[sp,#0x48] + 0x010021b4: f7fef988 .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x010021b8: 462c ,F MOV r4,r5 + 0x010021ba: 7ea1 .~ LDRB r1,[r4,#0x1a] + 0x010021bc: 7d20 } LDRB r0,[r4,#0x14] + 0x010021be: 2818 .( CMP r0,#0x18 + 0x010021c0: dc04 .. BGT 0x10021cc ; list_device + 128 + 0x010021c2: 7d20 } LDRB r0,[r4,#0x14] + 0x010021c4: 0080 .. LSLS r0,r0,#2 + 0x010021c6: 4a20 J LDR r2,[pc,#128] ; [0x1002248] = 0x1007520 + 0x010021c8: 5810 .X LDR r0,[r2,r0] + 0x010021ca: e001 .. B 0x10021d0 ; list_device + 132 + 0x010021cc: 481e .H LDR r0,[pc,#120] ; [0x1002248] = 0x1007520 + 0x010021ce: 6e00 .n LDR r0,[r0,#0x60] + 0x010021d0: 4623 #F MOV r3,r4 + 0x010021d2: 2208 ." MOVS r2,#8 + 0x010021d4: 9101 .. STR r1,[sp,#4] + 0x010021d6: 9000 .. STR r0,[sp,#0] + 0x010021d8: a01c .. ADR r0,{pc}+0x74 ; 0x100224c + 0x010021da: 9904 .. LDR r1,[sp,#0x10] + 0x010021dc: f002f978 ..x. BL rt_kprintf ; 0x10044d0 + 0x010021e0: bf00 .. NOP + 0x010021e2: 1c76 v. ADDS r6,r6,#1 + 0x010021e4: 9811 .. LDR r0,[sp,#0x44] + 0x010021e6: 42b0 .B CMP r0,r6 + 0x010021e8: dcd0 .. BGT 0x100218c ; list_device + 64 + 0x010021ea: 2f00 ./ CMP r7,#0 + 0x010021ec: d1c7 .. BNE 0x100217e ; list_device + 50 + 0x010021ee: 2000 . MOVS r0,#0 + 0x010021f0: b013 .. ADD sp,sp,#0x4c + 0x010021f2: bdf0 .. POP {r4-r7,pc} + $d + 0x010021f4: 69766564 devi DCD 1769366884 + 0x010021f8: 00006563 ce.. DCD 25955 + 0x010021fc: 2e2a2d25 %-*. DCD 774516005 + 0x01002200: 20202073 s DCD 538976371 + 0x01002204: 20202020 DCD 538976288 + 0x01002208: 79742020 ty DCD 2037653536 + 0x0100220c: 20206570 pe DCD 538994032 + 0x01002210: 20202020 DCD 538976288 + 0x01002214: 72202020 r DCD 1914708000 + 0x01002218: 63206665 ef c DCD 1663067749 + 0x0100221c: 746e756f ount DCD 1953396079 + 0x01002220: 0000000a .... DCD 10 + 0x01002224: 2d2d2d20 --- DCD 757935392 + 0x01002228: 2d2d2d2d ---- DCD 757935405 + 0x0100222c: 2d2d2d2d ---- DCD 757935405 + 0x01002230: 2d2d2d2d ---- DCD 757935405 + 0x01002234: 2d2d2d2d ---- DCD 757935405 + 0x01002238: 2d2d202d - -- DCD 757932077 + 0x0100223c: 2d2d2d2d ---- DCD 757935405 + 0x01002240: 2d2d2d2d ---- DCD 757935405 + 0x01002244: 0000000a .... DCD 10 + 0x01002248: 01007520 u.. DCD 16807200 + 0x0100224c: 2e2a2d25 %-*. DCD 774516005 + 0x01002250: 2520732a *s % DCD 622883626 + 0x01002254: 7330322d -20s DCD 1932538413 + 0x01002258: 382d2520 %-8 DCD 942482720 + 0x0100225c: 00000a64 d... DCD 2660 + $t + i.list_event + list_event + 0x01002260: b5f0 .. PUSH {r4-r7,lr} + 0x01002262: b093 .. SUB sp,sp,#0x4c + 0x01002264: 2700 .' MOVS r7,#0 + 0x01002266: a031 1. ADR r0,{pc}+0xc6 ; 0x100232c + 0x01002268: 9003 .. STR r0,[sp,#0xc] + 0x0100226a: 2308 .# MOVS r3,#8 + 0x0100226c: aa05 .. ADD r2,sp,#0x14 + 0x0100226e: 2104 .! MOVS r1,#4 + 0x01002270: a80d .. ADD r0,sp,#0x34 + 0x01002272: f000f897 .... BL list_find_init ; 0x10023a4 + 0x01002276: 2008 . MOVS r0,#8 + 0x01002278: 9004 .. STR r0,[sp,#0x10] + 0x0100227a: a02e .. ADR r0,{pc}+0xba ; 0x1002334 + 0x0100227c: 9a03 .. LDR r2,[sp,#0xc] + 0x0100227e: 9904 .. LDR r1,[sp,#0x10] + 0x01002280: f002f926 ..&. BL rt_kprintf ; 0x10044d0 + 0x01002284: 9804 .. LDR r0,[sp,#0x10] + 0x01002286: f001f831 ..1. BL object_split ; 0x10032ec + 0x0100228a: a033 3. ADR r0,{pc}+0xce ; 0x1002358 + 0x0100228c: f002f920 .. . BL rt_kprintf ; 0x10044d0 + 0x01002290: bf00 .. NOP + 0x01002292: a90d .. ADD r1,sp,#0x34 + 0x01002294: 4638 8F MOV r0,r7 + 0x01002296: f000f899 .... BL list_get_next ; 0x10023cc + 0x0100229a: 4607 .F MOV r7,r0 + 0x0100229c: 2500 .% MOVS r5,#0 + 0x0100229e: e03c <. B 0x100231a ; list_event + 186 + 0x010022a0: 00a8 .. LSLS r0,r5,#2 + 0x010022a2: a905 .. ADD r1,sp,#0x14 + 0x010022a4: 5808 .X LDR r0,[r1,r0] + 0x010022a6: 4606 .F MOV r6,r0 + 0x010022a8: 3e0c .> SUBS r6,r6,#0xc + 0x010022aa: f7fef909 .... BL rt_hw_interrupt_disable ; 0x10004c0 + 0x010022ae: 9012 .. STR r0,[sp,#0x48] + 0x010022b0: 7a30 0z LDRB r0,[r6,#8] + 0x010022b2: 2180 .! MOVS r1,#0x80 + 0x010022b4: 4388 .C BICS r0,r0,r1 + 0x010022b6: a908 .. ADD r1,sp,#0x20 + 0x010022b8: 7f09 .. LDRB r1,[r1,#0x1c] + 0x010022ba: 4288 .B CMP r0,r1 + 0x010022bc: d003 .. BEQ 0x10022c6 ; list_event + 102 + 0x010022be: 9812 .. LDR r0,[sp,#0x48] + 0x010022c0: f7fef902 .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x010022c4: e028 (. B 0x1002318 ; list_event + 184 + 0x010022c6: 9812 .. LDR r0,[sp,#0x48] + 0x010022c8: f7fef8fe .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x010022cc: 4634 4F MOV r4,r6 + 0x010022ce: 4620 F MOV r0,r4 + 0x010022d0: 3014 .0 ADDS r0,r0,#0x14 + 0x010022d2: f002f948 ..H. BL rt_list_isempty ; 0x1004566 + 0x010022d6: 2800 .( CMP r0,#0 + 0x010022d8: d115 .. BNE 0x1002306 ; list_event + 166 + 0x010022da: 4620 F MOV r0,r4 + 0x010022dc: 3014 .0 ADDS r0,r0,#0x14 + 0x010022de: f002f95a ..Z. BL rt_list_len ; 0x1004596 + 0x010022e2: 9002 .. STR r0,[sp,#8] + 0x010022e4: 69e1 .i LDR r1,[r4,#0x1c] + 0x010022e6: 4623 #F MOV r3,r4 + 0x010022e8: 2208 ." MOVS r2,#8 + 0x010022ea: 9100 .. STR r1,[sp,#0] + 0x010022ec: 9001 .. STR r0,[sp,#4] + 0x010022ee: a022 ". ADR r0,{pc}+0x8a ; 0x1002378 + 0x010022f0: 9904 .. LDR r1,[sp,#0x10] + 0x010022f2: f002f8ed .... BL rt_kprintf ; 0x10044d0 + 0x010022f6: 4620 F MOV r0,r4 + 0x010022f8: 3014 .0 ADDS r0,r0,#0x14 + 0x010022fa: f004fd6d ..m. BL show_wait_queue ; 0x1006dd8 + 0x010022fe: a015 .. ADR r0,{pc}+0x56 ; 0x1002354 + 0x01002300: f002f8e6 .... BL rt_kprintf ; 0x10044d0 + 0x01002304: e007 .. B 0x1002316 ; list_event + 182 + 0x01002306: 69e0 .i LDR r0,[r4,#0x1c] + 0x01002308: 4623 #F MOV r3,r4 + 0x0100230a: 2208 ." MOVS r2,#8 + 0x0100230c: 9000 .. STR r0,[sp,#0] + 0x0100230e: a020 . ADR r0,{pc}+0x82 ; 0x1002390 + 0x01002310: 9904 .. LDR r1,[sp,#0x10] + 0x01002312: f002f8dd .... BL rt_kprintf ; 0x10044d0 + 0x01002316: bf00 .. NOP + 0x01002318: 1c6d m. ADDS r5,r5,#1 + 0x0100231a: 9811 .. LDR r0,[sp,#0x44] + 0x0100231c: 42a8 .B CMP r0,r5 + 0x0100231e: dcbf .. BGT 0x10022a0 ; list_event + 64 + 0x01002320: 2f00 ./ CMP r7,#0 + 0x01002322: d1b6 .. BNE 0x1002292 ; list_event + 50 + 0x01002324: 2000 . MOVS r0,#0 + 0x01002326: b013 .. ADD sp,sp,#0x4c + 0x01002328: bdf0 .. POP {r4-r7,pc} + $d + 0x0100232a: 0000 .. DCW 0 + 0x0100232c: 6e657665 even DCD 1852143205 + 0x01002330: 00000074 t... DCD 116 + 0x01002334: 2e2a2d25 %-*. DCD 774516005 + 0x01002338: 20202073 s DCD 538976371 + 0x0100233c: 73202020 s DCD 1931485216 + 0x01002340: 20207465 et DCD 538997861 + 0x01002344: 75732020 su DCD 1970479136 + 0x01002348: 6e657073 spen DCD 1852141683 + 0x0100234c: 68742064 d th DCD 1752440932 + 0x01002350: 64616572 read DCD 1684104562 + 0x01002354: 0000000a .... DCD 10 + 0x01002358: 2d2d2020 -- DCD 757932064 + 0x0100235c: 2d2d2d2d ---- DCD 757935405 + 0x01002360: 2d2d2d2d ---- DCD 757935405 + 0x01002364: 2d2d2d20 --- DCD 757935392 + 0x01002368: 2d2d2d2d ---- DCD 757935405 + 0x0100236c: 2d2d2d2d ---- DCD 757935405 + 0x01002370: 0a2d2d2d ---. DCD 170732845 + 0x01002374: 00000000 .... DCD 0 + 0x01002378: 2e2a2d25 %-*. DCD 774516005 + 0x0100237c: 2020732a *s DCD 538997546 + 0x01002380: 30257830 0x%0 DCD 807761968 + 0x01002384: 25207838 8x % DCD 622884920 + 0x01002388: 3a643330 03d: DCD 979645232 + 0x0100238c: 00000000 .... DCD 0 + 0x01002390: 2e2a2d25 %-*. DCD 774516005 + 0x01002394: 2020732a *s DCD 538997546 + 0x01002398: 30257830 0x%0 DCD 807761968 + 0x0100239c: 30207838 8x 0 DCD 807434296 + 0x010023a0: 0000000a .... DCD 10 + $t + i.list_find_init + list_find_init + 0x010023a4: b5fe .. PUSH {r1-r7,lr} + 0x010023a6: 4604 .F MOV r4,r0 + 0x010023a8: 460d .F MOV r5,r1 + 0x010023aa: 4616 .F MOV r6,r2 + 0x010023ac: 461f .F MOV r7,r3 + 0x010023ae: 4628 (F MOV r0,r5 + 0x010023b0: f002fd02 .... BL rt_object_get_information ; 0x1004db8 + 0x010023b4: 9001 .. STR r0,[sp,#4] + 0x010023b6: 9801 .. LDR r0,[sp,#4] + 0x010023b8: 1d00 .. ADDS r0,r0,#4 + 0x010023ba: 9000 .. STR r0,[sp,#0] + 0x010023bc: 9800 .. LDR r0,[sp,#0] + 0x010023be: 6020 ` STR r0,[r4,#0] + 0x010023c0: 7225 %r STRB r5,[r4,#8] + 0x010023c2: 6066 f` STR r6,[r4,#4] + 0x010023c4: 60e7 .` STR r7,[r4,#0xc] + 0x010023c6: 2000 . MOVS r0,#0 + 0x010023c8: 6120 a STR r0,[r4,#0x10] + 0x010023ca: bdfe .. POP {r1-r7,pc} + i.list_get_next + list_get_next + 0x010023cc: b5f0 .. PUSH {r4-r7,lr} + 0x010023ce: b085 .. SUB sp,sp,#0x14 + 0x010023d0: 4607 .F MOV r7,r0 + 0x010023d2: 460c .F MOV r4,r1 + 0x010023d4: 2000 . MOVS r0,#0 + 0x010023d6: 9004 .. STR r0,[sp,#0x10] + 0x010023d8: 6120 a STR r0,[r4,#0x10] + 0x010023da: 68e0 .h LDR r0,[r4,#0xc] + 0x010023dc: 2800 .( CMP r0,#0 + 0x010023de: d002 .. BEQ 0x10023e6 ; list_get_next + 26 + 0x010023e0: 7a20 z LDRB r0,[r4,#8] + 0x010023e2: 2800 .( CMP r0,#0 + 0x010023e4: d102 .. BNE 0x10023ec ; list_get_next + 32 + 0x010023e6: 2000 . MOVS r0,#0 + 0x010023e8: b005 .. ADD sp,sp,#0x14 + 0x010023ea: bdf0 .. POP {r4-r7,pc} + 0x010023ec: 6820 h LDR r0,[r4,#0] + 0x010023ee: 9002 .. STR r0,[sp,#8] + 0x010023f0: 2f00 ./ CMP r7,#0 + 0x010023f2: d103 .. BNE 0x10023fc ; list_get_next + 48 + 0x010023f4: 9d02 .. LDR r5,[sp,#8] + 0x010023f6: 2001 . MOVS r0,#1 + 0x010023f8: 9004 .. STR r0,[sp,#0x10] + 0x010023fa: e000 .. B 0x10023fe ; list_get_next + 50 + 0x010023fc: 463d =F MOV r5,r7 + 0x010023fe: f7fef85f .._. BL rt_hw_interrupt_disable ; 0x10004c0 + 0x01002402: 9003 .. STR r0,[sp,#0xc] + 0x01002404: 9804 .. LDR r0,[sp,#0x10] + 0x01002406: 2800 .( CMP r0,#0 + 0x01002408: d10f .. BNE 0x100242a ; list_get_next + 94 + 0x0100240a: 4628 (F MOV r0,r5 + 0x0100240c: 380c .8 SUBS r0,r0,#0xc + 0x0100240e: 9000 .. STR r0,[sp,#0] + 0x01002410: 9800 .. LDR r0,[sp,#0] + 0x01002412: 7a00 .z LDRB r0,[r0,#8] + 0x01002414: 2180 .! MOVS r1,#0x80 + 0x01002416: 4388 .C BICS r0,r0,r1 + 0x01002418: 7a21 !z LDRB r1,[r4,#8] + 0x0100241a: 4288 .B CMP r0,r1 + 0x0100241c: d004 .. BEQ 0x1002428 ; list_get_next + 92 + 0x0100241e: 9803 .. LDR r0,[sp,#0xc] + 0x01002420: f7fef852 ..R. BL rt_hw_interrupt_enable ; 0x10004c8 + 0x01002424: 2000 . MOVS r0,#0 + 0x01002426: e7df .. B 0x10023e8 ; list_get_next + 28 + 0x01002428: bf00 .. NOP + 0x0100242a: 2600 .& MOVS r6,#0 + 0x0100242c: 6860 `h LDR r0,[r4,#4] + 0x0100242e: 9001 .. STR r0,[sp,#4] + 0x01002430: e00f .. B 0x1002452 ; list_get_next + 134 + 0x01002432: 682d -h LDR r5,[r5,#0] + 0x01002434: 9802 .. LDR r0,[sp,#8] + 0x01002436: 4285 .B CMP r5,r0 + 0x01002438: d101 .. BNE 0x100243e ; list_get_next + 114 + 0x0100243a: 2500 .% MOVS r5,#0 + 0x0100243c: e00a .. B 0x1002454 ; list_get_next + 136 + 0x0100243e: 1c76 v. ADDS r6,r6,#1 + 0x01002440: 9801 .. LDR r0,[sp,#4] + 0x01002442: 6005 .` STR r5,[r0,#0] + 0x01002444: 9801 .. LDR r0,[sp,#4] + 0x01002446: 1d00 .. ADDS r0,r0,#4 + 0x01002448: 9001 .. STR r0,[sp,#4] + 0x0100244a: 68e0 .h LDR r0,[r4,#0xc] + 0x0100244c: 42b0 .B CMP r0,r6 + 0x0100244e: d100 .. BNE 0x1002452 ; list_get_next + 134 + 0x01002450: e000 .. B 0x1002454 ; list_get_next + 136 + 0x01002452: e7ee .. B 0x1002432 ; list_get_next + 102 + 0x01002454: bf00 .. NOP + 0x01002456: 9803 .. LDR r0,[sp,#0xc] + 0x01002458: f7fef836 ..6. BL rt_hw_interrupt_enable ; 0x10004c8 + 0x0100245c: 6126 &a STR r6,[r4,#0x10] + 0x0100245e: 4628 (F MOV r0,r5 + 0x01002460: e7c2 .. B 0x10023e8 ; list_get_next + 28 + 0x01002462: 0000 .. MOVS r0,r0 + i.list_mailbox + list_mailbox + 0x01002464: b5f0 .. PUSH {r4-r7,lr} + 0x01002466: b095 .. SUB sp,sp,#0x54 + 0x01002468: 2700 .' MOVS r7,#0 + 0x0100246a: a036 6. ADR r0,{pc}+0xda ; 0x1002544 + 0x0100246c: 9005 .. STR r0,[sp,#0x14] + 0x0100246e: 2308 .# MOVS r3,#8 + 0x01002470: aa07 .. ADD r2,sp,#0x1c + 0x01002472: 2105 .! MOVS r1,#5 + 0x01002474: a80f .. ADD r0,sp,#0x3c + 0x01002476: f7ffff95 .... BL list_find_init ; 0x10023a4 + 0x0100247a: 2008 . MOVS r0,#8 + 0x0100247c: 9006 .. STR r0,[sp,#0x18] + 0x0100247e: a033 3. ADR r0,{pc}+0xce ; 0x100254c + 0x01002480: 9a05 .. LDR r2,[sp,#0x14] + 0x01002482: 9906 .. LDR r1,[sp,#0x18] + 0x01002484: f002f824 ..$. BL rt_kprintf ; 0x10044d0 + 0x01002488: 9806 .. LDR r0,[sp,#0x18] + 0x0100248a: f000ff2f ../. BL object_split ; 0x10032ec + 0x0100248e: a038 8. ADR r0,{pc}+0xe2 ; 0x1002570 + 0x01002490: f002f81e .... BL rt_kprintf ; 0x10044d0 + 0x01002494: bf00 .. NOP + 0x01002496: a90f .. ADD r1,sp,#0x3c + 0x01002498: 4638 8F MOV r0,r7 + 0x0100249a: f7ffff97 .... BL list_get_next ; 0x10023cc + 0x0100249e: 4607 .F MOV r7,r0 + 0x010024a0: 2500 .% MOVS r5,#0 + 0x010024a2: e046 F. B 0x1002532 ; list_mailbox + 206 + 0x010024a4: 00a8 .. LSLS r0,r5,#2 + 0x010024a6: a907 .. ADD r1,sp,#0x1c + 0x010024a8: 5808 .X LDR r0,[r1,r0] + 0x010024aa: 4606 .F MOV r6,r0 + 0x010024ac: 3e0c .> SUBS r6,r6,#0xc + 0x010024ae: f7fef807 .... BL rt_hw_interrupt_disable ; 0x10004c0 + 0x010024b2: 9014 .. STR r0,[sp,#0x50] + 0x010024b4: 7a30 0z LDRB r0,[r6,#8] + 0x010024b6: 2180 .! MOVS r1,#0x80 + 0x010024b8: 4388 .C BICS r0,r0,r1 + 0x010024ba: a910 .. ADD r1,sp,#0x40 + 0x010024bc: 7909 .y LDRB r1,[r1,#4] + 0x010024be: 4288 .B CMP r0,r1 + 0x010024c0: d003 .. BEQ 0x10024ca ; list_mailbox + 102 + 0x010024c2: 9814 .. LDR r0,[sp,#0x50] + 0x010024c4: f7fef800 .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x010024c8: e032 2. B 0x1002530 ; list_mailbox + 204 + 0x010024ca: 9814 .. LDR r0,[sp,#0x50] + 0x010024cc: f7fdfffc .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x010024d0: 4634 4F MOV r4,r6 + 0x010024d2: 4620 F MOV r0,r4 + 0x010024d4: 3014 .0 ADDS r0,r0,#0x14 + 0x010024d6: f002f846 ..F. BL rt_list_isempty ; 0x1004566 + 0x010024da: 2800 .( CMP r0,#0 + 0x010024dc: d117 .. BNE 0x100250e ; list_mailbox + 170 + 0x010024de: 4620 F MOV r0,r4 + 0x010024e0: 3014 .0 ADDS r0,r0,#0x14 + 0x010024e2: f002f858 ..X. BL rt_list_len ; 0x1004596 + 0x010024e6: 9004 .. STR r0,[sp,#0x10] + 0x010024e8: 8c21 !. LDRH r1,[r4,#0x20] + 0x010024ea: 8c62 b. LDRH r2,[r4,#0x22] + 0x010024ec: 4623 #F MOV r3,r4 + 0x010024ee: 9200 .. STR r2,[sp,#0] + 0x010024f0: 9101 .. STR r1,[sp,#4] + 0x010024f2: 9002 .. STR r0,[sp,#8] + 0x010024f4: 2208 ." MOVS r2,#8 + 0x010024f6: a025 %. ADR r0,{pc}+0x96 ; 0x100258c + 0x010024f8: 9906 .. LDR r1,[sp,#0x18] + 0x010024fa: f001ffe9 .... BL rt_kprintf ; 0x10044d0 + 0x010024fe: 4620 F MOV r0,r4 + 0x01002500: 3014 .0 ADDS r0,r0,#0x14 + 0x01002502: f004fc69 ..i. BL show_wait_queue ; 0x1006dd8 + 0x01002506: a027 '. ADR r0,{pc}+0x9e ; 0x10025a4 + 0x01002508: f001ffe2 .... BL rt_kprintf ; 0x10044d0 + 0x0100250c: e00f .. B 0x100252e ; list_mailbox + 202 + 0x0100250e: 4620 F MOV r0,r4 + 0x01002510: 3014 .0 ADDS r0,r0,#0x14 + 0x01002512: f002f840 ..@. BL rt_list_len ; 0x1004596 + 0x01002516: 9004 .. STR r0,[sp,#0x10] + 0x01002518: 8c21 !. LDRH r1,[r4,#0x20] + 0x0100251a: 8c62 b. LDRH r2,[r4,#0x22] + 0x0100251c: 4623 #F MOV r3,r4 + 0x0100251e: 9200 .. STR r2,[sp,#0] + 0x01002520: 9101 .. STR r1,[sp,#4] + 0x01002522: 9002 .. STR r0,[sp,#8] + 0x01002524: 2208 ." MOVS r2,#8 + 0x01002526: a020 . ADR r0,{pc}+0x82 ; 0x10025a8 + 0x01002528: 9906 .. LDR r1,[sp,#0x18] + 0x0100252a: f001ffd1 .... BL rt_kprintf ; 0x10044d0 + 0x0100252e: bf00 .. NOP + 0x01002530: 1c6d m. ADDS r5,r5,#1 + 0x01002532: 9813 .. LDR r0,[sp,#0x4c] + 0x01002534: 42a8 .B CMP r0,r5 + 0x01002536: dcb5 .. BGT 0x10024a4 ; list_mailbox + 64 + 0x01002538: 2f00 ./ CMP r7,#0 + 0x0100253a: d1ac .. BNE 0x1002496 ; list_mailbox + 50 + 0x0100253c: 2000 . MOVS r0,#0 + 0x0100253e: b015 .. ADD sp,sp,#0x54 + 0x01002540: bdf0 .. POP {r4-r7,pc} + $d + 0x01002542: 0000 .. DCW 0 + 0x01002544: 6c69616d mail DCD 1818845549 + 0x01002548: 00786f62 box. DCD 7892834 + 0x0100254c: 2e2a2d25 %-*. DCD 774516005 + 0x01002550: 6e652073 s en DCD 1852121203 + 0x01002554: 20797274 try DCD 544830068 + 0x01002558: 657a6973 size DCD 1702521203 + 0x0100255c: 73757320 sus DCD 1937077024 + 0x01002560: 646e6570 pend DCD 1684956528 + 0x01002564: 72687420 thr DCD 1919448096 + 0x01002568: 0a646165 ead. DCD 174350693 + 0x0100256c: 00000000 .... DCD 0 + 0x01002570: 2d2d2d20 --- DCD 757935392 + 0x01002574: 2d20202d - - DCD 757080109 + 0x01002578: 202d2d2d --- DCD 539831597 + 0x0100257c: 2d2d2d2d ---- DCD 757935405 + 0x01002580: 2d2d2d2d ---- DCD 757935405 + 0x01002584: 2d2d2d2d ---- DCD 757935405 + 0x01002588: 000a2d2d --.. DCD 666925 + 0x0100258c: 2e2a2d25 %-*. DCD 774516005 + 0x01002590: 2520732a *s % DCD 622883626 + 0x01002594: 20643430 04d DCD 543437872 + 0x01002598: 34302520 %04 DCD 875570464 + 0x0100259c: 64252064 d %d DCD 1680154724 + 0x010025a0: 0000003a :... DCD 58 + 0x010025a4: 0000000a .... DCD 10 + 0x010025a8: 2e2a2d25 %-*. DCD 774516005 + 0x010025ac: 2520732a *s % DCD 622883626 + 0x010025b0: 20643430 04d DCD 543437872 + 0x010025b4: 34302520 %04 DCD 875570464 + 0x010025b8: 64252064 d %d DCD 1680154724 + 0x010025bc: 0000000a .... DCD 10 + $t + i.list_mem + list_mem + 0x010025c0: b510 .. PUSH {r4,lr} + 0x010025c2: 4808 .H LDR r0,[pc,#32] ; [0x10025e4] = 0x20148 + 0x010025c4: 6801 .h LDR r1,[r0,#0] + 0x010025c6: a008 .. ADR r0,{pc}+0x22 ; 0x10025e8 + 0x010025c8: f001ff82 .... BL rt_kprintf ; 0x10044d0 + 0x010025cc: 480b .H LDR r0,[pc,#44] ; [0x10025fc] = 0x2014c + 0x010025ce: 6801 .h LDR r1,[r0,#0] + 0x010025d0: a00b .. ADR r0,{pc}+0x30 ; 0x1002600 + 0x010025d2: f001ff7d ..}. BL rt_kprintf ; 0x10044d0 + 0x010025d6: 480f .H LDR r0,[pc,#60] ; [0x1002614] = 0x20150 + 0x010025d8: 6801 .h LDR r1,[r0,#0] + 0x010025da: a00f .. ADR r0,{pc}+0x3e ; 0x1002618 + 0x010025dc: f001ff78 ..x. BL rt_kprintf ; 0x10044d0 + 0x010025e0: bd10 .. POP {r4,pc} + $d + 0x010025e2: 0000 .. DCW 0 + 0x010025e4: 00020148 H... DCD 131400 + 0x010025e8: 61746f74 tota DCD 1635020660 + 0x010025ec: 656d206c l me DCD 1701650540 + 0x010025f0: 79726f6d mory DCD 2037542765 + 0x010025f4: 6425203a : %d DCD 1680154682 + 0x010025f8: 0000000a .... DCD 10 + 0x010025fc: 0002014c L... DCD 131404 + 0x01002600: 64657375 used DCD 1684370293 + 0x01002604: 6d656d20 mem DCD 1835363616 + 0x01002608: 2079726f ory DCD 544830063 + 0x0100260c: 6425203a : %d DCD 1680154682 + 0x01002610: 0000000a .... DCD 10 + 0x01002614: 00020150 P... DCD 131408 + 0x01002618: 6978616d maxi DCD 1769496941 + 0x0100261c: 206d756d mum DCD 544044397 + 0x01002620: 6f6c6c61 allo DCD 1869376609 + 0x01002624: 65746163 cate DCD 1702125923 + 0x01002628: 656d2064 d me DCD 1701650532 + 0x0100262c: 79726f6d mory DCD 2037542765 + 0x01002630: 6425203a : %d DCD 1680154682 + 0x01002634: 0000000a .... DCD 10 + $t + i.list_memheap + list_memheap + 0x01002638: b5f0 .. PUSH {r4-r7,lr} + 0x0100263a: b093 .. SUB sp,sp,#0x4c + 0x0100263c: 2700 .' MOVS r7,#0 + 0x0100263e: a025 %. ADR r0,{pc}+0x96 ; 0x10026d4 + 0x01002640: 9003 .. STR r0,[sp,#0xc] + 0x01002642: 2308 .# MOVS r3,#8 + 0x01002644: aa05 .. ADD r2,sp,#0x14 + 0x01002646: 2107 .! MOVS r1,#7 + 0x01002648: a80d .. ADD r0,sp,#0x34 + 0x0100264a: f7fffeab .... BL list_find_init ; 0x10023a4 + 0x0100264e: 2008 . MOVS r0,#8 + 0x01002650: 9004 .. STR r0,[sp,#0x10] + 0x01002652: a022 ". ADR r0,{pc}+0x8a ; 0x10026dc + 0x01002654: 9a03 .. LDR r2,[sp,#0xc] + 0x01002656: 9904 .. LDR r1,[sp,#0x10] + 0x01002658: f001ff3a ..:. BL rt_kprintf ; 0x10044d0 + 0x0100265c: 9804 .. LDR r0,[sp,#0x10] + 0x0100265e: f000fe45 ..E. BL object_split ; 0x10032ec + 0x01002662: a02a *. ADR r0,{pc}+0xaa ; 0x100270c + 0x01002664: f001ff34 ..4. BL rt_kprintf ; 0x10044d0 + 0x01002668: bf00 .. NOP + 0x0100266a: a90d .. ADD r1,sp,#0x34 + 0x0100266c: 4638 8F MOV r0,r7 + 0x0100266e: f7fffead .... BL list_get_next ; 0x10023cc + 0x01002672: 4607 .F MOV r7,r0 + 0x01002674: 2600 .& MOVS r6,#0 + 0x01002676: e024 $. B 0x10026c2 ; list_memheap + 138 + 0x01002678: 00b0 .. LSLS r0,r6,#2 + 0x0100267a: a905 .. ADD r1,sp,#0x14 + 0x0100267c: 5808 .X LDR r0,[r1,r0] + 0x0100267e: 4604 .F MOV r4,r0 + 0x01002680: 3c0c .< SUBS r4,r4,#0xc + 0x01002682: f7fdff1d .... BL rt_hw_interrupt_disable ; 0x10004c0 + 0x01002686: 9012 .. STR r0,[sp,#0x48] + 0x01002688: 7a20 z LDRB r0,[r4,#8] + 0x0100268a: 2180 .! MOVS r1,#0x80 + 0x0100268c: 4388 .C BICS r0,r0,r1 + 0x0100268e: a908 .. ADD r1,sp,#0x20 + 0x01002690: 7f09 .. LDRB r1,[r1,#0x1c] + 0x01002692: 4288 .B CMP r0,r1 + 0x01002694: d003 .. BEQ 0x100269e ; list_memheap + 102 + 0x01002696: 9812 .. LDR r0,[sp,#0x48] + 0x01002698: f7fdff16 .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x0100269c: e010 .. B 0x10026c0 ; list_memheap + 136 + 0x0100269e: 9812 .. LDR r0,[sp,#0x48] + 0x010026a0: f7fdff12 .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x010026a4: 4625 %F MOV r5,r4 + 0x010026a6: 6a2a *j LDR r2,[r5,#0x20] + 0x010026a8: 69a9 .i LDR r1,[r5,#0x18] + 0x010026aa: 69e8 .i LDR r0,[r5,#0x1c] + 0x010026ac: 462b +F MOV r3,r5 + 0x010026ae: 9201 .. STR r2,[sp,#4] + 0x010026b0: 9100 .. STR r1,[sp,#0] + 0x010026b2: 9002 .. STR r0,[sp,#8] + 0x010026b4: 2208 ." MOVS r2,#8 + 0x010026b6: a020 . ADR r0,{pc}+0x82 ; 0x1002738 + 0x010026b8: 9904 .. LDR r1,[sp,#0x10] + 0x010026ba: f001ff09 .... BL rt_kprintf ; 0x10044d0 + 0x010026be: bf00 .. NOP + 0x010026c0: 1c76 v. ADDS r6,r6,#1 + 0x010026c2: 9811 .. LDR r0,[sp,#0x44] + 0x010026c4: 42b0 .B CMP r0,r6 + 0x010026c6: dcd7 .. BGT 0x1002678 ; list_memheap + 64 + 0x010026c8: 2f00 ./ CMP r7,#0 + 0x010026ca: d1ce .. BNE 0x100266a ; list_memheap + 50 + 0x010026cc: 2000 . MOVS r0,#0 + 0x010026ce: b013 .. ADD sp,sp,#0x4c + 0x010026d0: bdf0 .. POP {r4-r7,pc} + $d + 0x010026d2: 0000 .. DCW 0 + 0x010026d4: 686d656d memh DCD 1751999853 + 0x010026d8: 00706165 eap. DCD 7364965 + 0x010026dc: 2e2a2d25 %-*. DCD 774516005 + 0x010026e0: 70202073 s p DCD 1881153651 + 0x010026e4: 206c6f6f ool DCD 543977327 + 0x010026e8: 657a6973 size DCD 1702521203 + 0x010026ec: 616d2020 ma DCD 1634541600 + 0x010026f0: 73752078 x us DCD 1937055864 + 0x010026f4: 73206465 ed s DCD 1931502693 + 0x010026f8: 20657a69 ize DCD 543521385 + 0x010026fc: 69617661 avai DCD 1767994977 + 0x01002700: 6c62616c labl DCD 1818386796 + 0x01002704: 69732065 e si DCD 1769152613 + 0x01002708: 000a657a ze.. DCD 681338 + 0x0100270c: 2d2d2d20 --- DCD 757935392 + 0x01002710: 2d2d2d2d ---- DCD 757935405 + 0x01002714: 202d2d2d --- DCD 539831597 + 0x01002718: 2d2d2d2d ---- DCD 757935405 + 0x0100271c: 2d2d2d2d ---- DCD 757935405 + 0x01002720: 2d2d2d2d ---- DCD 757935405 + 0x01002724: 2d2d202d - -- DCD 757932077 + 0x01002728: 2d2d2d2d ---- DCD 757935405 + 0x0100272c: 2d2d2d2d ---- DCD 757935405 + 0x01002730: 2d2d2d2d ---- DCD 757935405 + 0x01002734: 0000000a .... DCD 10 + 0x01002738: 2e2a2d25 %-*. DCD 774516005 + 0x0100273c: 2520732a *s % DCD 622883626 + 0x01002740: 3031302d -010 DCD 808529965 + 0x01002744: 2d252064 d %- DCD 757407844 + 0x01002748: 64333130 013d DCD 1681076528 + 0x0100274c: 302d2520 %-0 DCD 808264992 + 0x01002750: 000a6435 5d.. DCD 681013 + $t + i.list_mempool + list_mempool + 0x01002754: b5f0 .. PUSH {r4-r7,lr} + 0x01002756: b097 .. SUB sp,sp,#0x5c + 0x01002758: 2000 . MOVS r0,#0 + 0x0100275a: 9008 .. STR r0,[sp,#0x20] + 0x0100275c: a037 7. ADR r0,{pc}+0xe0 ; 0x100283c + 0x0100275e: 9006 .. STR r0,[sp,#0x18] + 0x01002760: 2308 .# MOVS r3,#8 + 0x01002762: aa09 .. ADD r2,sp,#0x24 + 0x01002764: 4619 .F MOV r1,r3 + 0x01002766: a811 .. ADD r0,sp,#0x44 + 0x01002768: f7fffe1c .... BL list_find_init ; 0x10023a4 + 0x0100276c: 2008 . MOVS r0,#8 + 0x0100276e: 9007 .. STR r0,[sp,#0x1c] + 0x01002770: a034 4. ADR r0,{pc}+0xd4 ; 0x1002844 + 0x01002772: 9a06 .. LDR r2,[sp,#0x18] + 0x01002774: 9907 .. LDR r1,[sp,#0x1c] + 0x01002776: f001feab .... BL rt_kprintf ; 0x10044d0 + 0x0100277a: 9807 .. LDR r0,[sp,#0x1c] + 0x0100277c: f000fdb6 .... BL object_split ; 0x10032ec + 0x01002780: a03a :. ADR r0,{pc}+0xec ; 0x100286c + 0x01002782: f001fea5 .... BL rt_kprintf ; 0x10044d0 + 0x01002786: bf00 .. NOP + 0x01002788: a911 .. ADD r1,sp,#0x44 + 0x0100278a: 9808 .. LDR r0,[sp,#0x20] + 0x0100278c: f7fffe1e .... BL list_get_next ; 0x10023cc + 0x01002790: 9008 .. STR r0,[sp,#0x20] + 0x01002792: 2600 .& MOVS r6,#0 + 0x01002794: e049 I. B 0x100282a ; list_mempool + 214 + 0x01002796: 00b0 .. LSLS r0,r6,#2 + 0x01002798: a909 .. ADD r1,sp,#0x24 + 0x0100279a: 5808 .X LDR r0,[r1,r0] + 0x0100279c: 4607 .F MOV r7,r0 + 0x0100279e: 3f0c .? SUBS r7,r7,#0xc + 0x010027a0: f7fdfe8e .... BL rt_hw_interrupt_disable ; 0x10004c0 + 0x010027a4: 9016 .. STR r0,[sp,#0x58] + 0x010027a6: 7a38 8z LDRB r0,[r7,#8] + 0x010027a8: 2180 .! MOVS r1,#0x80 + 0x010027aa: 4388 .C BICS r0,r0,r1 + 0x010027ac: a910 .. ADD r1,sp,#0x40 + 0x010027ae: 7b09 .{ LDRB r1,[r1,#0xc] + 0x010027b0: 4288 .B CMP r0,r1 + 0x010027b2: d003 .. BEQ 0x10027bc ; list_mempool + 104 + 0x010027b4: 9816 .. LDR r0,[sp,#0x58] + 0x010027b6: f7fdfe87 .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x010027ba: e035 5. B 0x1002828 ; list_mempool + 212 + 0x010027bc: 9816 .. LDR r0,[sp,#0x58] + 0x010027be: f7fdfe83 .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x010027c2: 463c SUBS r6,r6,#0xc + 0x01002912: f7fdfdd5 .... BL rt_hw_interrupt_disable ; 0x10004c0 + 0x01002916: 9012 .. STR r0,[sp,#0x48] + 0x01002918: 7a30 0z LDRB r0,[r6,#8] + 0x0100291a: 2180 .! MOVS r1,#0x80 + 0x0100291c: 4388 .C BICS r0,r0,r1 + 0x0100291e: a908 .. ADD r1,sp,#0x20 + 0x01002920: 7f09 .. LDRB r1,[r1,#0x1c] + 0x01002922: 4288 .B CMP r0,r1 + 0x01002924: d003 .. BEQ 0x100292e ; list_msgqueue + 102 + 0x01002926: 9812 .. LDR r0,[sp,#0x48] + 0x01002928: f7fdfdce .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x0100292c: e02e .. B 0x100298c ; list_msgqueue + 196 + 0x0100292e: 9812 .. LDR r0,[sp,#0x48] + 0x01002930: f7fdfdca .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x01002934: 4634 4F MOV r4,r6 + 0x01002936: 4620 F MOV r0,r4 + 0x01002938: 3014 .0 ADDS r0,r0,#0x14 + 0x0100293a: f001fe14 .... BL rt_list_isempty ; 0x1004566 + 0x0100293e: 2800 .( CMP r0,#0 + 0x01002940: d115 .. BNE 0x100296e ; list_msgqueue + 166 + 0x01002942: 4620 F MOV r0,r4 + 0x01002944: 3014 .0 ADDS r0,r0,#0x14 + 0x01002946: f001fe26 ..&. BL rt_list_len ; 0x1004596 + 0x0100294a: 9002 .. STR r0,[sp,#8] + 0x0100294c: 8ca1 .. LDRH r1,[r4,#0x24] + 0x0100294e: 4623 #F MOV r3,r4 + 0x01002950: 2208 ." MOVS r2,#8 + 0x01002952: 9100 .. STR r1,[sp,#0] + 0x01002954: 9001 .. STR r0,[sp,#4] + 0x01002956: a022 ". ADR r0,{pc}+0x8a ; 0x10029e0 + 0x01002958: 9904 .. LDR r1,[sp,#0x10] + 0x0100295a: f001fdb9 .... BL rt_kprintf ; 0x10044d0 + 0x0100295e: 4620 F MOV r0,r4 + 0x01002960: 3014 .0 ADDS r0,r0,#0x14 + 0x01002962: f004fa39 ..9. BL show_wait_queue ; 0x1006dd8 + 0x01002966: a023 #. ADR r0,{pc}+0x8e ; 0x10029f4 + 0x01002968: f001fdb2 .... BL rt_kprintf ; 0x10044d0 + 0x0100296c: e00d .. B 0x100298a ; list_msgqueue + 194 + 0x0100296e: 4620 F MOV r0,r4 + 0x01002970: 3014 .0 ADDS r0,r0,#0x14 + 0x01002972: f001fe10 .... BL rt_list_len ; 0x1004596 + 0x01002976: 9002 .. STR r0,[sp,#8] + 0x01002978: 8ca1 .. LDRH r1,[r4,#0x24] + 0x0100297a: 4623 #F MOV r3,r4 + 0x0100297c: 2208 ." MOVS r2,#8 + 0x0100297e: 9100 .. STR r1,[sp,#0] + 0x01002980: 9001 .. STR r0,[sp,#4] + 0x01002982: a01d .. ADR r0,{pc}+0x76 ; 0x10029f8 + 0x01002984: 9904 .. LDR r1,[sp,#0x10] + 0x01002986: f001fda3 .... BL rt_kprintf ; 0x10044d0 + 0x0100298a: bf00 .. NOP + 0x0100298c: 1c6d m. ADDS r5,r5,#1 + 0x0100298e: 9811 .. LDR r0,[sp,#0x44] + 0x01002990: 42a8 .B CMP r0,r5 + 0x01002992: dcb9 .. BGT 0x1002908 ; list_msgqueue + 64 + 0x01002994: 2f00 ./ CMP r7,#0 + 0x01002996: d1b0 .. BNE 0x10028fa ; list_msgqueue + 50 + 0x01002998: 2000 . MOVS r0,#0 + 0x0100299a: b013 .. ADD sp,sp,#0x4c + 0x0100299c: bdf0 .. POP {r4-r7,pc} + $d + 0x0100299e: 0000 .. DCW 0 + 0x010029a0: 7167736d msgq DCD 1902605165 + 0x010029a4: 65756575 ueue DCD 1702192501 + 0x010029a8: 00000000 .... DCD 0 + 0x010029ac: 2e2a2d25 %-*. DCD 774516005 + 0x010029b0: 6e652073 s en DCD 1852121203 + 0x010029b4: 20797274 try DCD 544830068 + 0x010029b8: 70737573 susp DCD 1886614899 + 0x010029bc: 20646e65 end DCD 543452773 + 0x010029c0: 65726874 thre DCD 1701996660 + 0x010029c4: 000a6461 ad.. DCD 681057 + 0x010029c8: 2d2d2d20 --- DCD 757935392 + 0x010029cc: 2d20202d - - DCD 757080109 + 0x010029d0: 2d2d2d2d ---- DCD 757935405 + 0x010029d4: 2d2d2d2d ---- DCD 757935405 + 0x010029d8: 2d2d2d2d ---- DCD 757935405 + 0x010029dc: 00000a2d -... DCD 2605 + 0x010029e0: 2e2a2d25 %-*. DCD 774516005 + 0x010029e4: 2520732a *s % DCD 622883626 + 0x010029e8: 20643430 04d DCD 543437872 + 0x010029ec: 3a642520 %d: DCD 979641632 + 0x010029f0: 00000000 .... DCD 0 + 0x010029f4: 0000000a .... DCD 10 + 0x010029f8: 2e2a2d25 %-*. DCD 774516005 + 0x010029fc: 2520732a *s % DCD 622883626 + 0x01002a00: 20643430 04d DCD 543437872 + 0x01002a04: 0a642520 %d. DCD 174335264 + 0x01002a08: 00000000 .... DCD 0 + $t + i.list_mutex + list_mutex + 0x01002a0c: b5f0 .. PUSH {r4-r7,lr} + 0x01002a0e: b095 .. SUB sp,sp,#0x54 + 0x01002a10: 2700 .' MOVS r7,#0 + 0x01002a12: a028 (. ADR r0,{pc}+0xa2 ; 0x1002ab4 + 0x01002a14: 9005 .. STR r0,[sp,#0x14] + 0x01002a16: 2308 .# MOVS r3,#8 + 0x01002a18: aa07 .. ADD r2,sp,#0x1c + 0x01002a1a: 2103 .! MOVS r1,#3 + 0x01002a1c: a80f .. ADD r0,sp,#0x3c + 0x01002a1e: f7fffcc1 .... BL list_find_init ; 0x10023a4 + 0x01002a22: 2008 . MOVS r0,#8 + 0x01002a24: 9006 .. STR r0,[sp,#0x18] + 0x01002a26: a025 %. ADR r0,{pc}+0x96 ; 0x1002abc + 0x01002a28: 9a05 .. LDR r2,[sp,#0x14] + 0x01002a2a: 9906 .. LDR r1,[sp,#0x18] + 0x01002a2c: f001fd50 ..P. BL rt_kprintf ; 0x10044d0 + 0x01002a30: 9806 .. LDR r0,[sp,#0x18] + 0x01002a32: f000fc5b ..[. BL object_split ; 0x10032ec + 0x01002a36: a02a *. ADR r0,{pc}+0xaa ; 0x1002ae0 + 0x01002a38: f001fd4a ..J. BL rt_kprintf ; 0x10044d0 + 0x01002a3c: bf00 .. NOP + 0x01002a3e: a90f .. ADD r1,sp,#0x3c + 0x01002a40: 4638 8F MOV r0,r7 + 0x01002a42: f7fffcc3 .... BL list_get_next ; 0x10023cc + 0x01002a46: 4607 .F MOV r7,r0 + 0x01002a48: 2600 .& MOVS r6,#0 + 0x01002a4a: e02a *. B 0x1002aa2 ; list_mutex + 150 + 0x01002a4c: 00b0 .. LSLS r0,r6,#2 + 0x01002a4e: a907 .. ADD r1,sp,#0x1c + 0x01002a50: 5808 .X LDR r0,[r1,r0] + 0x01002a52: 4604 .F MOV r4,r0 + 0x01002a54: 3c0c .< SUBS r4,r4,#0xc + 0x01002a56: f7fdfd33 ..3. BL rt_hw_interrupt_disable ; 0x10004c0 + 0x01002a5a: 9014 .. STR r0,[sp,#0x50] + 0x01002a5c: 7a20 z LDRB r0,[r4,#8] + 0x01002a5e: 2180 .! MOVS r1,#0x80 + 0x01002a60: 4388 .C BICS r0,r0,r1 + 0x01002a62: a910 .. ADD r1,sp,#0x40 + 0x01002a64: 7909 .y LDRB r1,[r1,#4] + 0x01002a66: 4288 .B CMP r0,r1 + 0x01002a68: d003 .. BEQ 0x1002a72 ; list_mutex + 102 + 0x01002a6a: 9814 .. LDR r0,[sp,#0x50] + 0x01002a6c: f7fdfd2c ..,. BL rt_hw_interrupt_enable ; 0x10004c8 + 0x01002a70: e016 .. B 0x1002aa0 ; list_mutex + 148 + 0x01002a72: 9814 .. LDR r0,[sp,#0x50] + 0x01002a74: f7fdfd28 ..(. BL rt_hw_interrupt_enable ; 0x10004c8 + 0x01002a78: 4625 %F MOV r5,r4 + 0x01002a7a: 4628 (F MOV r0,r5 + 0x01002a7c: 3014 .0 ADDS r0,r0,#0x14 + 0x01002a7e: f001fd8a .... BL rt_list_len ; 0x1004596 + 0x01002a82: 9004 .. STR r0,[sp,#0x10] + 0x01002a84: 7fe9 .. LDRB r1,[r5,#0x1f] + 0x01002a86: 2308 .# MOVS r3,#8 + 0x01002a88: 6a2a *j LDR r2,[r5,#0x20] + 0x01002a8a: 9300 .. STR r3,[sp,#0] + 0x01002a8c: 9201 .. STR r2,[sp,#4] + 0x01002a8e: 9102 .. STR r1,[sp,#8] + 0x01002a90: 9003 .. STR r0,[sp,#0xc] + 0x01002a92: 462b +F MOV r3,r5 + 0x01002a94: 2208 ." MOVS r2,#8 + 0x01002a96: a01a .. ADR r0,{pc}+0x6a ; 0x1002b00 + 0x01002a98: 9906 .. LDR r1,[sp,#0x18] + 0x01002a9a: f001fd19 .... BL rt_kprintf ; 0x10044d0 + 0x01002a9e: bf00 .. NOP + 0x01002aa0: 1c76 v. ADDS r6,r6,#1 + 0x01002aa2: 9813 .. LDR r0,[sp,#0x4c] + 0x01002aa4: 42b0 .B CMP r0,r6 + 0x01002aa6: dcd1 .. BGT 0x1002a4c ; list_mutex + 64 + 0x01002aa8: 2f00 ./ CMP r7,#0 + 0x01002aaa: d1c8 .. BNE 0x1002a3e ; list_mutex + 50 + 0x01002aac: 2000 . MOVS r0,#0 + 0x01002aae: b015 .. ADD sp,sp,#0x54 + 0x01002ab0: bdf0 .. POP {r4-r7,pc} + $d + 0x01002ab2: 0000 .. DCW 0 + 0x01002ab4: 6574756d mute DCD 1702131053 + 0x01002ab8: 00000078 x... DCD 120 + 0x01002abc: 2e2a2d25 %-*. DCD 774516005 + 0x01002ac0: 20202073 s DCD 538976371 + 0x01002ac4: 656e776f owne DCD 1701738351 + 0x01002ac8: 68202072 r h DCD 1746935922 + 0x01002acc: 20646c6f old DCD 543452271 + 0x01002ad0: 70737573 susp DCD 1886614899 + 0x01002ad4: 20646e65 end DCD 543452773 + 0x01002ad8: 65726874 thre DCD 1701996660 + 0x01002adc: 000a6461 ad.. DCD 681057 + 0x01002ae0: 2d2d2d20 --- DCD 757935392 + 0x01002ae4: 2d2d2d2d ---- DCD 757935405 + 0x01002ae8: 2d2d202d - -- DCD 757932077 + 0x01002aec: 2d202d2d -- - DCD 757083437 + 0x01002af0: 2d2d2d2d ---- DCD 757935405 + 0x01002af4: 2d2d2d2d ---- DCD 757935405 + 0x01002af8: 2d2d2d2d ---- DCD 757935405 + 0x01002afc: 00000a2d -... DCD 2605 + 0x01002b00: 2e2a2d25 %-*. DCD 774516005 + 0x01002b04: 2520732a *s % DCD 622883626 + 0x01002b08: 2a2e382d -8.* DCD 707672109 + 0x01002b0c: 30252073 s %0 DCD 807739507 + 0x01002b10: 25206434 4d % DCD 622879796 + 0x01002b14: 00000a64 d... DCD 2660 + $t + i.list_sem + list_sem + 0x01002b18: b5f0 .. PUSH {r4-r7,lr} + 0x01002b1a: b093 .. SUB sp,sp,#0x4c + 0x01002b1c: 2700 .' MOVS r7,#0 + 0x01002b1e: a034 4. ADR r0,{pc}+0xd2 ; 0x1002bf0 + 0x01002b20: 9003 .. STR r0,[sp,#0xc] + 0x01002b22: 2308 .# MOVS r3,#8 + 0x01002b24: aa05 .. ADD r2,sp,#0x14 + 0x01002b26: 2102 .! MOVS r1,#2 + 0x01002b28: a80d .. ADD r0,sp,#0x34 + 0x01002b2a: f7fffc3b ..;. BL list_find_init ; 0x10023a4 + 0x01002b2e: 2008 . MOVS r0,#8 + 0x01002b30: 9004 .. STR r0,[sp,#0x10] + 0x01002b32: a032 2. ADR r0,{pc}+0xca ; 0x1002bfc + 0x01002b34: 9a03 .. LDR r2,[sp,#0xc] + 0x01002b36: 9904 .. LDR r1,[sp,#0x10] + 0x01002b38: f001fcca .... BL rt_kprintf ; 0x10044d0 + 0x01002b3c: 9804 .. LDR r0,[sp,#0x10] + 0x01002b3e: f000fbd5 .... BL object_split ; 0x10032ec + 0x01002b42: a035 5. ADR r0,{pc}+0xd6 ; 0x1002c18 + 0x01002b44: f001fcc4 .... BL rt_kprintf ; 0x10044d0 + 0x01002b48: bf00 .. NOP + 0x01002b4a: a90d .. ADD r1,sp,#0x34 + 0x01002b4c: 4638 8F MOV r0,r7 + 0x01002b4e: f7fffc3d ..=. BL list_get_next ; 0x10023cc + 0x01002b52: 4607 .F MOV r7,r0 + 0x01002b54: 2500 .% MOVS r5,#0 + 0x01002b56: e042 B. B 0x1002bde ; list_sem + 198 + 0x01002b58: 00a8 .. LSLS r0,r5,#2 + 0x01002b5a: a905 .. ADD r1,sp,#0x14 + 0x01002b5c: 5808 .X LDR r0,[r1,r0] + 0x01002b5e: 4606 .F MOV r6,r0 + 0x01002b60: 3e0c .> SUBS r6,r6,#0xc + 0x01002b62: f7fdfcad .... BL rt_hw_interrupt_disable ; 0x10004c0 + 0x01002b66: 9012 .. STR r0,[sp,#0x48] + 0x01002b68: 7a30 0z LDRB r0,[r6,#8] + 0x01002b6a: 2180 .! MOVS r1,#0x80 + 0x01002b6c: 4388 .C BICS r0,r0,r1 + 0x01002b6e: a908 .. ADD r1,sp,#0x20 + 0x01002b70: 7f09 .. LDRB r1,[r1,#0x1c] + 0x01002b72: 4288 .B CMP r0,r1 + 0x01002b74: d003 .. BEQ 0x1002b7e ; list_sem + 102 + 0x01002b76: 9812 .. LDR r0,[sp,#0x48] + 0x01002b78: f7fdfca6 .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x01002b7c: e02e .. B 0x1002bdc ; list_sem + 196 + 0x01002b7e: 9812 .. LDR r0,[sp,#0x48] + 0x01002b80: f7fdfca2 .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x01002b84: 4634 4F MOV r4,r6 + 0x01002b86: 4620 F MOV r0,r4 + 0x01002b88: 3014 .0 ADDS r0,r0,#0x14 + 0x01002b8a: f001fcec .... BL rt_list_isempty ; 0x1004566 + 0x01002b8e: 2800 .( CMP r0,#0 + 0x01002b90: d115 .. BNE 0x1002bbe ; list_sem + 166 + 0x01002b92: 4620 F MOV r0,r4 + 0x01002b94: 3014 .0 ADDS r0,r0,#0x14 + 0x01002b96: f001fcfe .... BL rt_list_len ; 0x1004596 + 0x01002b9a: 9002 .. STR r0,[sp,#8] + 0x01002b9c: 8ba1 .. LDRH r1,[r4,#0x1c] + 0x01002b9e: 4623 #F MOV r3,r4 + 0x01002ba0: 2208 ." MOVS r2,#8 + 0x01002ba2: 9100 .. STR r1,[sp,#0] + 0x01002ba4: 9001 .. STR r0,[sp,#4] + 0x01002ba6: a022 ". ADR r0,{pc}+0x8a ; 0x1002c30 + 0x01002ba8: 9904 .. LDR r1,[sp,#0x10] + 0x01002baa: f001fc91 .... BL rt_kprintf ; 0x10044d0 + 0x01002bae: 4620 F MOV r0,r4 + 0x01002bb0: 3014 .0 ADDS r0,r0,#0x14 + 0x01002bb2: f004f911 .... BL show_wait_queue ; 0x1006dd8 + 0x01002bb6: a017 .. ADR r0,{pc}+0x5e ; 0x1002c14 + 0x01002bb8: f001fc8a .... BL rt_kprintf ; 0x10044d0 + 0x01002bbc: e00d .. B 0x1002bda ; list_sem + 194 + 0x01002bbe: 4620 F MOV r0,r4 + 0x01002bc0: 3014 .0 ADDS r0,r0,#0x14 + 0x01002bc2: f001fce8 .... BL rt_list_len ; 0x1004596 + 0x01002bc6: 9002 .. STR r0,[sp,#8] + 0x01002bc8: 8ba1 .. LDRH r1,[r4,#0x1c] + 0x01002bca: 4623 #F MOV r3,r4 + 0x01002bcc: 2208 ." MOVS r2,#8 + 0x01002bce: 9100 .. STR r1,[sp,#0] + 0x01002bd0: 9001 .. STR r0,[sp,#4] + 0x01002bd2: a01b .. ADR r0,{pc}+0x6e ; 0x1002c40 + 0x01002bd4: 9904 .. LDR r1,[sp,#0x10] + 0x01002bd6: f001fc7b ..{. BL rt_kprintf ; 0x10044d0 + 0x01002bda: bf00 .. NOP + 0x01002bdc: 1c6d m. ADDS r5,r5,#1 + 0x01002bde: 9811 .. LDR r0,[sp,#0x44] + 0x01002be0: 42a8 .B CMP r0,r5 + 0x01002be2: dcb9 .. BGT 0x1002b58 ; list_sem + 64 + 0x01002be4: 2f00 ./ CMP r7,#0 + 0x01002be6: d1b0 .. BNE 0x1002b4a ; list_sem + 50 + 0x01002be8: 2000 . MOVS r0,#0 + 0x01002bea: b013 .. ADD sp,sp,#0x4c + 0x01002bec: bdf0 .. POP {r4-r7,pc} + $d + 0x01002bee: 0000 .. DCW 0 + 0x01002bf0: 616d6573 sema DCD 1634559347 + 0x01002bf4: 726f6870 phor DCD 1919903856 + 0x01002bf8: 00000065 e... DCD 101 + 0x01002bfc: 2e2a2d25 %-*. DCD 774516005 + 0x01002c00: 20762073 s v DCD 544612467 + 0x01002c04: 75732020 su DCD 1970479136 + 0x01002c08: 6e657073 spen DCD 1852141683 + 0x01002c0c: 68742064 d th DCD 1752440932 + 0x01002c10: 64616572 read DCD 1684104562 + 0x01002c14: 0000000a .... DCD 10 + 0x01002c18: 2d2d2d20 --- DCD 757935392 + 0x01002c1c: 2d2d2d20 --- DCD 757935392 + 0x01002c20: 2d2d2d2d ---- DCD 757935405 + 0x01002c24: 2d2d2d2d ---- DCD 757935405 + 0x01002c28: 0a2d2d2d ---. DCD 170732845 + 0x01002c2c: 00000000 .... DCD 0 + 0x01002c30: 2e2a2d25 %-*. DCD 774516005 + 0x01002c34: 2520732a *s % DCD 622883626 + 0x01002c38: 20643330 03d DCD 543437616 + 0x01002c3c: 003a6425 %d:. DCD 3826725 + 0x01002c40: 2e2a2d25 %-*. DCD 774516005 + 0x01002c44: 2520732a *s % DCD 622883626 + 0x01002c48: 20643330 03d DCD 543437616 + 0x01002c4c: 000a6425 %d.. DCD 680997 + $t + i.list_thread + list_thread + 0x01002c50: b5f0 .. PUSH {r4-r7,lr} + 0x01002c52: b0b7 .. SUB sp,sp,#0xdc + 0x01002c54: 2000 . MOVS r0,#0 + 0x01002c56: 9028 (. STR r0,[sp,#0xa0] + 0x01002c58: a049 I. ADR r0,{pc}+0x128 ; 0x1002d80 + 0x01002c5a: 9027 '. STR r0,[sp,#0x9c] + 0x01002c5c: 2308 .# MOVS r3,#8 + 0x01002c5e: aa29 ). ADD r2,sp,#0xa4 + 0x01002c60: 2101 .! MOVS r1,#1 + 0x01002c62: a831 1. ADD r0,sp,#0xc4 + 0x01002c64: f7fffb9e .... BL list_find_init ; 0x10023a4 + 0x01002c68: 2008 . MOVS r0,#8 + 0x01002c6a: 9026 &. STR r0,[sp,#0x98] + 0x01002c6c: 4846 FH LDR r0,[pc,#280] ; [0x1002d88] = 0x1007d60 + 0x01002c6e: 9a27 '. LDR r2,[sp,#0x9c] + 0x01002c70: 9926 &. LDR r1,[sp,#0x98] + 0x01002c72: f001fc2d ..-. BL rt_kprintf ; 0x10044d0 + 0x01002c76: 9826 &. LDR r0,[sp,#0x98] + 0x01002c78: f000fb38 ..8. BL object_split ; 0x10032ec + 0x01002c7c: a043 C. ADR r0,{pc}+0x110 ; 0x1002d8c + 0x01002c7e: f001fc27 ..'. BL rt_kprintf ; 0x10044d0 + 0x01002c82: bf00 .. NOP + 0x01002c84: a931 1. ADD r1,sp,#0xc4 + 0x01002c86: 9828 (. LDR r0,[sp,#0xa0] + 0x01002c88: f7fffba0 .... BL list_get_next ; 0x10023cc + 0x01002c8c: 9028 (. STR r0,[sp,#0xa0] + 0x01002c8e: 2000 . MOVS r0,#0 + 0x01002c90: 9025 %. STR r0,[sp,#0x94] + 0x01002c92: e06b k. B 0x1002d6c ; list_thread + 284 + 0x01002c94: 9825 %. LDR r0,[sp,#0x94] + 0x01002c96: 0080 .. LSLS r0,r0,#2 + 0x01002c98: a929 ). ADD r1,sp,#0xa4 + 0x01002c9a: 5808 .X LDR r0,[r1,r0] + 0x01002c9c: 4605 .F MOV r5,r0 + 0x01002c9e: 3d0c .= SUBS r5,r5,#0xc + 0x01002ca0: f7fdfc0e .... BL rt_hw_interrupt_disable ; 0x10004c0 + 0x01002ca4: 9036 6. STR r0,[sp,#0xd8] + 0x01002ca6: 7a28 (z LDRB r0,[r5,#8] + 0x01002ca8: 2180 .! MOVS r1,#0x80 + 0x01002caa: 4388 .C BICS r0,r0,r1 + 0x01002cac: a930 0. ADD r1,sp,#0xc0 + 0x01002cae: 7b09 .{ LDRB r1,[r1,#0xc] + 0x01002cb0: 4288 .B CMP r0,r1 + 0x01002cb2: d003 .. BEQ 0x1002cbc ; list_thread + 108 + 0x01002cb4: 9836 6. LDR r0,[sp,#0xd8] + 0x01002cb6: f7fdfc07 .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x01002cba: e054 T. B 0x1002d66 ; list_thread + 278 + 0x01002cbc: 2280 ." MOVS r2,#0x80 + 0x01002cbe: 4629 )F MOV r1,r5 + 0x01002cc0: a805 .. ADD r0,sp,#0x14 + 0x01002cc2: f001fdef .... BL rt_memcpy ; 0x10048a4 + 0x01002cc6: 9836 6. LDR r0,[sp,#0xd8] + 0x01002cc8: f7fdfbfe .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x01002ccc: 462c ,F MOV r4,r5 + 0x01002cce: 2035 5 MOVS r0,#0x35 + 0x01002cd0: 5d00 .] LDRB r0,[r0,r4] + 0x01002cd2: 4623 #F MOV r3,r4 + 0x01002cd4: 2208 ." MOVS r2,#8 + 0x01002cd6: 9000 .. STR r0,[sp,#0] + 0x01002cd8: a03c <. ADR r0,{pc}+0xf4 ; 0x1002dcc + 0x01002cda: 9926 &. LDR r1,[sp,#0x98] + 0x01002cdc: f001fbf8 .... BL rt_kprintf ; 0x10044d0 + 0x01002ce0: 2034 4 MOVS r0,#0x34 + 0x01002ce2: 5d00 .] LDRB r0,[r0,r4] + 0x01002ce4: 0746 F. LSLS r6,r0,#29 + 0x01002ce6: 0f76 v. LSRS r6,r6,#29 + 0x01002ce8: 2e01 .. CMP r6,#1 + 0x01002cea: d103 .. BNE 0x1002cf4 ; list_thread + 164 + 0x01002cec: a03a :. ADR r0,{pc}+0xec ; 0x1002dd8 + 0x01002cee: f001fbef .... BL rt_kprintf ; 0x10044d0 + 0x01002cf2: e016 .. B 0x1002d22 ; list_thread + 210 + 0x01002cf4: 2e02 .. CMP r6,#2 + 0x01002cf6: d103 .. BNE 0x1002d00 ; list_thread + 176 + 0x01002cf8: a03a :. ADR r0,{pc}+0xec ; 0x1002de4 + 0x01002cfa: f001fbe9 .... BL rt_kprintf ; 0x10044d0 + 0x01002cfe: e010 .. B 0x1002d22 ; list_thread + 210 + 0x01002d00: 2e00 .. CMP r6,#0 + 0x01002d02: d103 .. BNE 0x1002d0c ; list_thread + 188 + 0x01002d04: a03a :. ADR r0,{pc}+0xec ; 0x1002df0 + 0x01002d06: f001fbe3 .... BL rt_kprintf ; 0x10044d0 + 0x01002d0a: e00a .. B 0x1002d22 ; list_thread + 210 + 0x01002d0c: 2e04 .. CMP r6,#4 + 0x01002d0e: d103 .. BNE 0x1002d18 ; list_thread + 200 + 0x01002d10: a03a :. ADR r0,{pc}+0xec ; 0x1002dfc + 0x01002d12: f001fbdd .... BL rt_kprintf ; 0x10044d0 + 0x01002d16: e004 .. B 0x1002d22 ; list_thread + 210 + 0x01002d18: 2e03 .. CMP r6,#3 + 0x01002d1a: d102 .. BNE 0x1002d22 ; list_thread + 210 + 0x01002d1c: a03a :. ADR r0,{pc}+0xec ; 0x1002e08 + 0x01002d1e: f001fbd7 .... BL rt_kprintf ; 0x10044d0 + 0x01002d22: 6aa7 .j LDR r7,[r4,#0x28] + 0x01002d24: e000 .. B 0x1002d28 ; list_thread + 216 + 0x01002d26: 1c7f .. ADDS r7,r7,#1 + 0x01002d28: 7838 8x LDRB r0,[r7,#0] + 0x01002d2a: 2823 #( CMP r0,#0x23 + 0x01002d2c: d0fb .. BEQ 0x1002d26 ; list_thread + 214 + 0x01002d2e: 6aa3 .j LDR r3,[r4,#0x28] + 0x01002d30: 1afb .. SUBS r3,r7,r3 + 0x01002d32: 6ae2 .j LDR r2,[r4,#0x2c] + 0x01002d34: 1ad2 .. SUBS r2,r2,r3 + 0x01002d36: 2364 d# MOVS r3,#0x64 + 0x01002d38: 435a ZC MULS r2,r3,r2 + 0x01002d3a: 4610 .F MOV r0,r2 + 0x01002d3c: 6ae1 .j LDR r1,[r4,#0x2c] + 0x01002d3e: f7fdfd95 .... BL __aeabi_uidiv ; 0x100086c + 0x01002d42: 9004 .. STR r0,[sp,#0x10] + 0x01002d44: 6b21 !k LDR r1,[r4,#0x30] + 0x01002d46: 6ca0 .l LDR r0,[r4,#0x48] + 0x01002d48: 9101 .. STR r1,[sp,#4] + 0x01002d4a: 9000 .. STR r0,[sp,#0] + 0x01002d4c: 69e1 .i LDR r1,[r4,#0x1c] + 0x01002d4e: 6aa0 .j LDR r0,[r4,#0x28] + 0x01002d50: 1a40 @. SUBS r0,r0,r1 + 0x01002d52: 6ae1 .j LDR r1,[r4,#0x2c] + 0x01002d54: 1840 @. ADDS r0,r0,r1 + 0x01002d56: 9003 .. STR r0,[sp,#0xc] + 0x01002d58: 6ae2 .j LDR r2,[r4,#0x2c] + 0x01002d5a: 4601 .F MOV r1,r0 + 0x01002d5c: a02d -. ADR r0,{pc}+0xb8 ; 0x1002e14 + 0x01002d5e: 9b04 .. LDR r3,[sp,#0x10] + 0x01002d60: f001fbb6 .... BL rt_kprintf ; 0x10044d0 + 0x01002d64: bf00 .. NOP + 0x01002d66: 9825 %. LDR r0,[sp,#0x94] + 0x01002d68: 1c40 @. ADDS r0,r0,#1 + 0x01002d6a: 9025 %. STR r0,[sp,#0x94] + 0x01002d6c: 9935 5. LDR r1,[sp,#0xd4] + 0x01002d6e: 9825 %. LDR r0,[sp,#0x94] + 0x01002d70: 4281 .B CMP r1,r0 + 0x01002d72: dc8f .. BGT 0x1002c94 ; list_thread + 68 + 0x01002d74: 9828 (. LDR r0,[sp,#0xa0] + 0x01002d76: 2800 .( CMP r0,#0 + 0x01002d78: d184 .. BNE 0x1002c84 ; list_thread + 52 + 0x01002d7a: b037 7. ADD sp,sp,#0xdc + 0x01002d7c: bdf0 .. POP {r4-r7,pc} + $d + 0x01002d7e: 0000 .. DCW 0 + 0x01002d80: 65726874 thre DCD 1701996660 + 0x01002d84: 00006461 ad.. DCD 25697 + 0x01002d88: 01007d60 `}.. DCD 16809312 + 0x01002d8c: 2d2d2d20 --- DCD 757935392 + 0x01002d90: 2d2d2020 -- DCD 757932064 + 0x01002d94: 2d2d2d2d ---- DCD 757935405 + 0x01002d98: 2d2d202d - -- DCD 757932077 + 0x01002d9c: 2d2d2d2d ---- DCD 757935405 + 0x01002da0: 2d2d2d2d ---- DCD 757935405 + 0x01002da4: 2d2d2d20 --- DCD 757935392 + 0x01002da8: 2d2d2d2d ---- DCD 757935405 + 0x01002dac: 202d2d2d --- DCD 539831597 + 0x01002db0: 2d2d2d20 --- DCD 757935392 + 0x01002db4: 202d2d2d --- DCD 539831597 + 0x01002db8: 2d2d2d20 --- DCD 757935392 + 0x01002dbc: 2d2d2d2d ---- DCD 757935405 + 0x01002dc0: 202d2d2d --- DCD 539831597 + 0x01002dc4: 0a2d2d2d ---. DCD 170732845 + 0x01002dc8: 00000000 .... DCD 0 + 0x01002dcc: 2e2a2d25 %-*. DCD 774516005 + 0x01002dd0: 2520732a *s % DCD 622883626 + 0x01002dd4: 00206433 3d . DCD 2122803 + 0x01002dd8: 61657220 rea DCD 1634038304 + 0x01002ddc: 20207964 dy DCD 538999140 + 0x01002de0: 00000000 .... DCD 0 + 0x01002de4: 73757320 sus DCD 1937077024 + 0x01002de8: 646e6570 pend DCD 1684956528 + 0x01002dec: 00000000 .... DCD 0 + 0x01002df0: 696e6920 ini DCD 1768843552 + 0x01002df4: 20202074 t DCD 538976372 + 0x01002df8: 00000000 .... DCD 0 + 0x01002dfc: 6f6c6320 clo DCD 1869374240 + 0x01002e00: 20206573 se DCD 538994035 + 0x01002e04: 00000000 .... DCD 0 + 0x01002e08: 6e757220 run DCD 1853190688 + 0x01002e0c: 676e696e ning DCD 1735289198 + 0x01002e10: 00000000 .... DCD 0 + 0x01002e14: 25783020 0x% DCD 628633632 + 0x01002e18: 20783830 08x DCD 544749616 + 0x01002e1c: 30257830 0x%0 DCD 807761968 + 0x01002e20: 20207838 8x DCD 538998840 + 0x01002e24: 30252020 %0 DCD 807739424 + 0x01002e28: 25256432 2d%% DCD 623207474 + 0x01002e2c: 30202020 0 DCD 807411744 + 0x01002e30: 38302578 x%08 DCD 942679416 + 0x01002e34: 30252078 x %0 DCD 807739512 + 0x01002e38: 000a6433 3d.. DCD 681011 + $t + i.list_timer + list_timer + 0x01002e3c: b5f0 .. PUSH {r4-r7,lr} + 0x01002e3e: b093 .. SUB sp,sp,#0x4c + 0x01002e40: 2700 .' MOVS r7,#0 + 0x01002e42: a02d -. ADR r0,{pc}+0xb6 ; 0x1002ef8 + 0x01002e44: 9003 .. STR r0,[sp,#0xc] + 0x01002e46: 2308 .# MOVS r3,#8 + 0x01002e48: aa05 .. ADD r2,sp,#0x14 + 0x01002e4a: 210a .! MOVS r1,#0xa + 0x01002e4c: a80d .. ADD r0,sp,#0x34 + 0x01002e4e: f7fffaa9 .... BL list_find_init ; 0x10023a4 + 0x01002e52: 2008 . MOVS r0,#8 + 0x01002e54: 9004 .. STR r0,[sp,#0x10] + 0x01002e56: a02a *. ADR r0,{pc}+0xaa ; 0x1002f00 + 0x01002e58: 9a03 .. LDR r2,[sp,#0xc] + 0x01002e5a: 9904 .. LDR r1,[sp,#0x10] + 0x01002e5c: f001fb38 ..8. BL rt_kprintf ; 0x10044d0 + 0x01002e60: 9804 .. LDR r0,[sp,#0x10] + 0x01002e62: f000fa43 ..C. BL object_split ; 0x10032ec + 0x01002e66: a030 0. ADR r0,{pc}+0xc2 ; 0x1002f28 + 0x01002e68: f001fb32 ..2. BL rt_kprintf ; 0x10044d0 + 0x01002e6c: bf00 .. NOP + 0x01002e6e: a90d .. ADD r1,sp,#0x34 + 0x01002e70: 4638 8F MOV r0,r7 + 0x01002e72: f7fffaab .... BL list_get_next ; 0x10023cc + 0x01002e76: 4607 .F MOV r7,r0 + 0x01002e78: 2600 .& MOVS r6,#0 + 0x01002e7a: e02e .. B 0x1002eda ; list_timer + 158 + 0x01002e7c: 00b0 .. LSLS r0,r6,#2 + 0x01002e7e: a905 .. ADD r1,sp,#0x14 + 0x01002e80: 5808 .X LDR r0,[r1,r0] + 0x01002e82: 4604 .F MOV r4,r0 + 0x01002e84: 3c0c .< SUBS r4,r4,#0xc + 0x01002e86: f7fdfb1b .... BL rt_hw_interrupt_disable ; 0x10004c0 + 0x01002e8a: 9012 .. STR r0,[sp,#0x48] + 0x01002e8c: 7a20 z LDRB r0,[r4,#8] + 0x01002e8e: 2180 .! MOVS r1,#0x80 + 0x01002e90: 4388 .C BICS r0,r0,r1 + 0x01002e92: a908 .. ADD r1,sp,#0x20 + 0x01002e94: 7f09 .. LDRB r1,[r1,#0x1c] + 0x01002e96: 4288 .B CMP r0,r1 + 0x01002e98: d003 .. BEQ 0x1002ea2 ; list_timer + 102 + 0x01002e9a: 9812 .. LDR r0,[sp,#0x48] + 0x01002e9c: f7fdfb14 .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x01002ea0: e01a .. B 0x1002ed8 ; list_timer + 156 + 0x01002ea2: 9812 .. LDR r0,[sp,#0x48] + 0x01002ea4: f7fdfb10 .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x01002ea8: 4625 %F MOV r5,r4 + 0x01002eaa: 6aa9 .j LDR r1,[r5,#0x28] + 0x01002eac: 6a68 hj LDR r0,[r5,#0x24] + 0x01002eae: 462b +F MOV r3,r5 + 0x01002eb0: 2208 ." MOVS r2,#8 + 0x01002eb2: 9101 .. STR r1,[sp,#4] + 0x01002eb4: 9000 .. STR r0,[sp,#0] + 0x01002eb6: a025 %. ADR r0,{pc}+0x96 ; 0x1002f4c + 0x01002eb8: 9904 .. LDR r1,[sp,#0x10] + 0x01002eba: f001fb09 .... BL rt_kprintf ; 0x10044d0 + 0x01002ebe: 7a68 hz LDRB r0,[r5,#9] + 0x01002ec0: 07c0 .. LSLS r0,r0,#31 + 0x01002ec2: 0fc0 .. LSRS r0,r0,#31 + 0x01002ec4: 2800 .( CMP r0,#0 + 0x01002ec6: d003 .. BEQ 0x1002ed0 ; list_timer + 148 + 0x01002ec8: a026 &. ADR r0,{pc}+0x9c ; 0x1002f64 + 0x01002eca: f001fb01 .... BL rt_kprintf ; 0x10044d0 + 0x01002ece: e002 .. B 0x1002ed6 ; list_timer + 154 + 0x01002ed0: a027 '. ADR r0,{pc}+0xa0 ; 0x1002f70 + 0x01002ed2: f001fafd .... BL rt_kprintf ; 0x10044d0 + 0x01002ed6: bf00 .. NOP + 0x01002ed8: 1c76 v. ADDS r6,r6,#1 + 0x01002eda: 9811 .. LDR r0,[sp,#0x44] + 0x01002edc: 42b0 .B CMP r0,r6 + 0x01002ede: dccd .. BGT 0x1002e7c ; list_timer + 64 + 0x01002ee0: 2f00 ./ CMP r7,#0 + 0x01002ee2: d1c4 .. BNE 0x1002e6e ; list_timer + 50 + 0x01002ee4: f003f9fc .... BL rt_tick_get ; 0x10062e0 + 0x01002ee8: 4604 .F MOV r4,r0 + 0x01002eea: 4621 !F MOV r1,r4 + 0x01002eec: a024 $. ADR r0,{pc}+0x94 ; 0x1002f80 + 0x01002eee: f001faef .... BL rt_kprintf ; 0x10044d0 + 0x01002ef2: 2000 . MOVS r0,#0 + 0x01002ef4: b013 .. ADD sp,sp,#0x4c + 0x01002ef6: bdf0 .. POP {r4-r7,pc} + $d + 0x01002ef8: 656d6974 time DCD 1701669236 + 0x01002efc: 00000072 r... DCD 114 + 0x01002f00: 2e2a2d25 %-*. DCD 774516005 + 0x01002f04: 70202073 s p DCD 1881153651 + 0x01002f08: 6f697265 erio DCD 1869181541 + 0x01002f0c: 20636964 dic DCD 543385956 + 0x01002f10: 69742020 ti DCD 1769218080 + 0x01002f14: 756f656d meou DCD 1970234733 + 0x01002f18: 20202074 t DCD 538976372 + 0x01002f1c: 20202020 DCD 538976288 + 0x01002f20: 67616c66 flag DCD 1734437990 + 0x01002f24: 0000000a .... DCD 10 + 0x01002f28: 2d2d2d20 --- DCD 757935392 + 0x01002f2c: 2d2d2d2d ---- DCD 757935405 + 0x01002f30: 202d2d2d --- DCD 539831597 + 0x01002f34: 2d2d2d2d ---- DCD 757935405 + 0x01002f38: 2d2d2d2d ---- DCD 757935405 + 0x01002f3c: 2d202d2d -- - DCD 757083437 + 0x01002f40: 2d2d2d2d ---- DCD 757935405 + 0x01002f44: 2d2d2d2d ---- DCD 757935405 + 0x01002f48: 000a2d2d --.. DCD 666925 + 0x01002f4c: 2e2a2d25 %-*. DCD 774516005 + 0x01002f50: 3020732a *s 0 DCD 807433002 + 0x01002f54: 38302578 x%08 DCD 942679416 + 0x01002f58: 78302078 x 0x DCD 2016419960 + 0x01002f5c: 78383025 %08x DCD 2016948261 + 0x01002f60: 00000020 ... DCD 32 + 0x01002f64: 69746361 acti DCD 1769235297 + 0x01002f68: 65746176 vate DCD 1702125942 + 0x01002f6c: 00000a64 d... DCD 2660 + 0x01002f70: 63616564 deac DCD 1667327332 + 0x01002f74: 61766974 tiva DCD 1635150196 + 0x01002f78: 0a646574 ted. DCD 174351732 + 0x01002f7c: 00000000 .... DCD 0 + 0x01002f80: 72727563 curr DCD 1920103779 + 0x01002f84: 20746e65 ent DCD 544501349 + 0x01002f88: 6b636974 tick DCD 1801677172 + 0x01002f8c: 2578303a :0x% DCD 628633658 + 0x01002f90: 0a783830 08x. DCD 175650864 + 0x01002f94: 00000000 .... DCD 0 + $t + i.main + $Super$$main + 0x01002f98: b510 .. PUSH {r4,lr} + 0x01002f9a: 2401 .$ MOVS r4,#1 + 0x01002f9c: 2100 .! MOVS r1,#0 + 0x01002f9e: 2002 . MOVS r0,#2 + 0x01002fa0: f002f800 .... BL rt_pin_mode ; 0x1004fa4 + 0x01002fa4: e00f .. B 0x1002fc6 ; $Super$$main + 46 + 0x01002fa6: 2101 .! MOVS r1,#1 + 0x01002fa8: 2002 . MOVS r0,#2 + 0x01002faa: f002f81f .... BL rt_pin_write ; 0x1004fec + 0x01002fae: 20ff . MOVS r0,#0xff + 0x01002fb0: 30f5 .0 ADDS r0,r0,#0xf5 + 0x01002fb2: f002ff9b .... BL rt_thread_mdelay ; 0x1005eec + 0x01002fb6: 2100 .! MOVS r1,#0 + 0x01002fb8: 2002 . MOVS r0,#2 + 0x01002fba: f002f817 .... BL rt_pin_write ; 0x1004fec + 0x01002fbe: 20ff . MOVS r0,#0xff + 0x01002fc0: 30f5 .0 ADDS r0,r0,#0xf5 + 0x01002fc2: f002ff93 .... BL rt_thread_mdelay ; 0x1005eec + 0x01002fc6: 4620 F MOV r0,r4 + 0x01002fc8: 1c64 d. ADDS r4,r4,#1 + 0x01002fca: 2800 .( CMP r0,#0 + 0x01002fcc: d1eb .. BNE 0x1002fa6 ; $Super$$main + 14 + 0x01002fce: bd10 .. POP {r4,pc} + i.main_thread_entry + main_thread_entry + 0x01002fd0: b510 .. PUSH {r4,lr} + 0x01002fd2: 4604 .F MOV r4,r0 + 0x01002fd4: f000fc6e ..n. BL rt_components_init ; 0x10038b4 + 0x01002fd8: f7ffffde .... BL $Super$$main ; 0x1002f98 + 0x01002fdc: bd10 .. POP {r4,pc} + 0x01002fde: 0000 .. MOVS r0,r0 + i.memheaptrace + memheaptrace + 0x01002fe0: b570 p. PUSH {r4-r6,lr} + 0x01002fe2: 2007 . MOVS r0,#7 + 0x01002fe4: f001fefa .... BL rt_object_get_length ; 0x1004ddc + 0x01002fe8: 4605 .F MOV r5,r0 + 0x01002fea: 2d00 .- CMP r5,#0 + 0x01002fec: dd1f .. BLE 0x100302e ; memheaptrace + 78 + 0x01002fee: 00a8 .. LSLS r0,r5,#2 + 0x01002ff0: f001faf6 .... BL rt_malloc ; 0x10045e0 + 0x01002ff4: 4604 .F MOV r4,r0 + 0x01002ff6: 2c00 ., CMP r4,#0 + 0x01002ff8: d100 .. BNE 0x1002ffc ; memheaptrace + 28 + 0x01002ffa: bd70 p. POP {r4-r6,pc} + 0x01002ffc: f7fffb1c .... BL list_memheap ; 0x1002638 + 0x01003000: 2118 .! MOVS r1,#0x18 + 0x01003002: a00c .. ADR r0,{pc}+0x32 ; 0x1003034 + 0x01003004: f001fa64 ..d. BL rt_kprintf ; 0x10044d0 + 0x01003008: 462a *F MOV r2,r5 + 0x0100300a: 4621 !F MOV r1,r4 + 0x0100300c: 2007 . MOVS r0,#7 + 0x0100300e: f001ff00 .... BL rt_object_get_pointers ; 0x1004e12 + 0x01003012: 4605 .F MOV r5,r0 + 0x01003014: 2600 .& MOVS r6,#0 + 0x01003016: e004 .. B 0x1003022 ; memheaptrace + 66 + 0x01003018: 00b1 .. LSLS r1,r6,#2 + 0x0100301a: 5860 `X LDR r0,[r4,r1] + 0x0100301c: f001fc72 ..r. BL rt_memheap_dump ; 0x1004904 + 0x01003020: 1c76 v. ADDS r6,r6,#1 + 0x01003022: 42ae .B CMP r6,r5 + 0x01003024: dbf8 .. BLT 0x1003018 ; memheaptrace + 56 + 0x01003026: 4620 F MOV r0,r4 + 0x01003028: f000ff52 ..R. BL rt_free ; 0x1003ed0 + 0x0100302c: bf00 .. NOP + 0x0100302e: 2000 . MOVS r0,#0 + 0x01003030: e7e3 .. B 0x1002ffa ; memheaptrace + 26 + $d + 0x01003032: 0000 .. DCW 0 + 0x01003034: 686d656d memh DCD 1751999853 + 0x01003038: 20706165 eap DCD 544235877 + 0x0100303c: 64616568 head DCD 1684104552 + 0x01003040: 73207265 er s DCD 1931506277 + 0x01003044: 3a657a69 ize: DCD 979729001 + 0x01003048: 0a642520 %d. DCD 174335264 + 0x0100304c: 00000000 .... DCD 0 + $t + i.msh_auto_complete + msh_auto_complete + 0x01003050: b5f1 .. PUSH {r0,r4-r7,lr} + 0x01003052: b082 .. SUB sp,sp,#8 + 0x01003054: 2600 .& MOVS r6,#0 + 0x01003056: 2000 . MOVS r0,#0 + 0x01003058: 9001 .. STR r0,[sp,#4] + 0x0100305a: 9802 .. LDR r0,[sp,#8] + 0x0100305c: 7800 .x LDRB r0,[r0,#0] + 0x0100305e: 2800 .( CMP r0,#0 + 0x01003060: d104 .. BNE 0x100306c ; msh_auto_complete + 28 + 0x01003062: 2100 .! MOVS r1,#0 + 0x01003064: 4608 .F MOV r0,r1 + 0x01003066: f000f893 .... BL msh_help ; 0x1003190 + 0x0100306a: bdfe .. POP {r1-r7,pc} + 0x0100306c: 4818 .H LDR r0,[pc,#96] ; [0x10030d0] = 0x20014 + 0x0100306e: 6805 .h LDR r5,[r0,#0] + 0x01003070: e01f .. B 0x10030b2 ; msh_auto_complete + 98 + 0x01003072: 682f /h LDR r7,[r5,#0] + 0x01003074: 9802 .. LDR r0,[sp,#8] + 0x01003076: f7fdfae3 .... BL strlen ; 0x1000640 + 0x0100307a: 4602 .F MOV r2,r0 + 0x0100307c: 4639 9F MOV r1,r7 + 0x0100307e: 9000 .. STR r0,[sp,#0] + 0x01003080: 9802 .. LDR r0,[sp,#8] + 0x01003082: f7fdfaff .... BL strncmp ; 0x1000684 + 0x01003086: 2800 .( CMP r0,#0 + 0x01003088: d112 .. BNE 0x10030b0 ; msh_auto_complete + 96 + 0x0100308a: 2e00 .. CMP r6,#0 + 0x0100308c: d104 .. BNE 0x1003098 ; msh_auto_complete + 72 + 0x0100308e: 9701 .. STR r7,[sp,#4] + 0x01003090: 9801 .. LDR r0,[sp,#4] + 0x01003092: f7fdfad5 .... BL strlen ; 0x1000640 + 0x01003096: 4606 .F MOV r6,r0 + 0x01003098: 4639 9F MOV r1,r7 + 0x0100309a: 9801 .. LDR r0,[sp,#4] + 0x0100309c: f003feca .... BL str_common ; 0x1006e34 + 0x010030a0: 4604 .F MOV r4,r0 + 0x010030a2: 42b4 .B CMP r4,r6 + 0x010030a4: da00 .. BGE 0x10030a8 ; msh_auto_complete + 88 + 0x010030a6: 4626 &F MOV r6,r4 + 0x010030a8: 4639 9F MOV r1,r7 + 0x010030aa: a00a .. ADR r0,{pc}+0x2a ; 0x10030d4 + 0x010030ac: f001fa10 .... BL rt_kprintf ; 0x10044d0 + 0x010030b0: 350c .5 ADDS r5,r5,#0xc + 0x010030b2: 4809 .H LDR r0,[pc,#36] ; [0x10030d8] = 0x20018 + 0x010030b4: 6800 .h LDR r0,[r0,#0] + 0x010030b6: 4285 .B CMP r5,r0 + 0x010030b8: d3db .. BCC 0x1003072 ; msh_auto_complete + 34 + 0x010030ba: 9801 .. LDR r0,[sp,#4] + 0x010030bc: 2800 .( CMP r0,#0 + 0x010030be: d004 .. BEQ 0x10030ca ; msh_auto_complete + 122 + 0x010030c0: 4632 2F MOV r2,r6 + 0x010030c2: 9901 .. LDR r1,[sp,#4] + 0x010030c4: 9802 .. LDR r0,[sp,#8] + 0x010030c6: f002fd38 ..8. BL rt_strncpy ; 0x1005b3a + 0x010030ca: bf00 .. NOP + 0x010030cc: e7cd .. B 0x100306a ; msh_auto_complete + 26 + $d + 0x010030ce: 0000 .. DCW 0 + 0x010030d0: 00020014 .... DCD 131092 + 0x010030d4: 000a7325 %s.. DCD 684837 + 0x010030d8: 00020018 .... DCD 131096 + $t + i.msh_exec + msh_exec + 0x010030dc: b538 8. PUSH {r3-r5,lr} + 0x010030de: 4604 .F MOV r4,r0 + 0x010030e0: 460d .F MOV r5,r1 + 0x010030e2: e001 .. B 0x10030e8 ; msh_exec + 12 + 0x010030e4: 1c64 d. ADDS r4,r4,#1 + 0x010030e6: 1e6d m. SUBS r5,r5,#1 + 0x010030e8: 2d00 .- CMP r5,#0 + 0x010030ea: d005 .. BEQ 0x10030f8 ; msh_exec + 28 + 0x010030ec: 7820 x LDRB r0,[r4,#0] + 0x010030ee: 2820 ( CMP r0,#0x20 + 0x010030f0: d0f8 .. BEQ 0x10030e4 ; msh_exec + 8 + 0x010030f2: 7820 x LDRB r0,[r4,#0] + 0x010030f4: 2809 .( CMP r0,#9 + 0x010030f6: d0f5 .. BEQ 0x10030e4 ; msh_exec + 8 + 0x010030f8: 2d00 .- CMP r5,#0 + 0x010030fa: d101 .. BNE 0x1003100 ; msh_exec + 36 + 0x010030fc: 2000 . MOVS r0,#0 + 0x010030fe: bd38 8. POP {r3-r5,pc} + 0x01003100: 466a jF MOV r2,sp + 0x01003102: 4629 )F MOV r1,r5 + 0x01003104: 4620 F MOV r0,r4 + 0x01003106: f7fef80d .... BL _msh_exec_cmd ; 0x1001124 + 0x0100310a: 2800 .( CMP r0,#0 + 0x0100310c: d101 .. BNE 0x1003112 ; msh_exec + 54 + 0x0100310e: 9800 .. LDR r0,[sp,#0] + 0x01003110: e7f5 .. B 0x10030fe ; msh_exec + 34 + 0x01003112: 4620 F MOV r0,r4 + 0x01003114: e000 .. B 0x1003118 ; msh_exec + 60 + 0x01003116: 1c40 @. ADDS r0,r0,#1 + 0x01003118: 7801 .x LDRB r1,[r0,#0] + 0x0100311a: 2920 ) CMP r1,#0x20 + 0x0100311c: d002 .. BEQ 0x1003124 ; msh_exec + 72 + 0x0100311e: 7801 .x LDRB r1,[r0,#0] + 0x01003120: 2900 .) CMP r1,#0 + 0x01003122: d1f8 .. BNE 0x1003116 ; msh_exec + 58 + 0x01003124: 2100 .! MOVS r1,#0 + 0x01003126: 7001 .p STRB r1,[r0,#0] + 0x01003128: 4621 !F MOV r1,r4 + 0x0100312a: a003 .. ADR r0,{pc}+0xe ; 0x1003138 + 0x0100312c: f001f9d0 .... BL rt_kprintf ; 0x10044d0 + 0x01003130: 2000 . MOVS r0,#0 + 0x01003132: 43c0 .C MVNS r0,r0 + 0x01003134: e7e3 .. B 0x10030fe ; msh_exec + 34 + $d + 0x01003136: 0000 .. DCW 0 + 0x01003138: 203a7325 %s: DCD 540701477 + 0x0100313c: 6d6d6f63 comm DCD 1835888483 + 0x01003140: 20646e61 and DCD 543452769 + 0x01003144: 20746f6e not DCD 544501614 + 0x01003148: 6e756f66 foun DCD 1853189990 + 0x0100314c: 000a2e64 d... DCD 667236 + $t + i.msh_get_cmd + msh_get_cmd + 0x01003150: b5f8 .. PUSH {r3-r7,lr} + 0x01003152: 4606 .F MOV r6,r0 + 0x01003154: 460d .F MOV r5,r1 + 0x01003156: 2700 .' MOVS r7,#0 + 0x01003158: 480b .H LDR r0,[pc,#44] ; [0x1003188] = 0x20014 + 0x0100315a: 6804 .h LDR r4,[r0,#0] + 0x0100315c: e00d .. B 0x100317a ; msh_get_cmd + 42 + 0x0100315e: 462a *F MOV r2,r5 + 0x01003160: 4631 1F MOV r1,r6 + 0x01003162: 6820 h LDR r0,[r4,#0] + 0x01003164: f7fdfa8e .... BL strncmp ; 0x1000684 + 0x01003168: 2800 .( CMP r0,#0 + 0x0100316a: d105 .. BNE 0x1003178 ; msh_get_cmd + 40 + 0x0100316c: 6820 h LDR r0,[r4,#0] + 0x0100316e: 5d40 @] LDRB r0,[r0,r5] + 0x01003170: 2800 .( CMP r0,#0 + 0x01003172: d101 .. BNE 0x1003178 ; msh_get_cmd + 40 + 0x01003174: 68a7 .h LDR r7,[r4,#8] + 0x01003176: e004 .. B 0x1003182 ; msh_get_cmd + 50 + 0x01003178: 340c .4 ADDS r4,r4,#0xc + 0x0100317a: 4804 .H LDR r0,[pc,#16] ; [0x100318c] = 0x20018 + 0x0100317c: 6800 .h LDR r0,[r0,#0] + 0x0100317e: 4284 .B CMP r4,r0 + 0x01003180: d3ed .. BCC 0x100315e ; msh_get_cmd + 14 + 0x01003182: bf00 .. NOP + 0x01003184: 4638 8F MOV r0,r7 + 0x01003186: bdf8 .. POP {r3-r7,pc} + $d + 0x01003188: 00020014 .... DCD 131092 + 0x0100318c: 00020018 .... DCD 131096 + $t + i.msh_help + msh_help + 0x01003190: b570 p. PUSH {r4-r6,lr} + 0x01003192: 4605 .F MOV r5,r0 + 0x01003194: 460e .F MOV r6,r1 + 0x01003196: a00a .. ADR r0,{pc}+0x2a ; 0x10031c0 + 0x01003198: f001f99a .... BL rt_kprintf ; 0x10044d0 + 0x0100319c: 480f .H LDR r0,[pc,#60] ; [0x10031dc] = 0x20014 + 0x0100319e: 6804 .h LDR r4,[r0,#0] + 0x010031a0: e005 .. B 0x10031ae ; msh_help + 30 + 0x010031a2: a00f .. ADR r0,{pc}+0x3e ; 0x10031e0 + 0x010031a4: 6862 bh LDR r2,[r4,#4] + 0x010031a6: 6821 !h LDR r1,[r4,#0] + 0x010031a8: f001f992 .... BL rt_kprintf ; 0x10044d0 + 0x010031ac: 340c .4 ADDS r4,r4,#0xc + 0x010031ae: 480f .H LDR r0,[pc,#60] ; [0x10031ec] = 0x20018 + 0x010031b0: 6800 .h LDR r0,[r0,#0] + 0x010031b2: 4284 .B CMP r4,r0 + 0x010031b4: d3f5 .. BCC 0x10031a2 ; msh_help + 18 + 0x010031b6: a00e .. ADR r0,{pc}+0x3a ; 0x10031f0 + 0x010031b8: f001f98a .... BL rt_kprintf ; 0x10044d0 + 0x010031bc: 2000 . MOVS r0,#0 + 0x010031be: bd70 p. POP {r4-r6,pc} + $d + 0x010031c0: 542d5452 RT-T DCD 1412256850 + 0x010031c4: 61657268 hrea DCD 1634038376 + 0x010031c8: 68732064 d sh DCD 1752375396 + 0x010031cc: 206c6c65 ell DCD 543976549 + 0x010031d0: 6d6d6f63 comm DCD 1835888483 + 0x010031d4: 73646e61 ands DCD 1935961697 + 0x010031d8: 00000a3a :... DCD 2618 + 0x010031dc: 00020014 .... DCD 131092 + 0x010031e0: 36312d25 %-16 DCD 909192485 + 0x010031e4: 202d2073 s - DCD 539828339 + 0x010031e8: 000a7325 %s.. DCD 684837 + 0x010031ec: 00020018 .... DCD 131096 + 0x010031f0: 0000000a .... DCD 10 + $t + i.msh_split + msh_split + 0x010031f4: b5f7 .. PUSH {r0-r2,r4-r7,lr} + 0x010031f6: b082 .. SUB sp,sp,#8 + 0x010031f8: 460e .F MOV r6,r1 + 0x010031fa: 9c02 .. LDR r4,[sp,#8] + 0x010031fc: 2500 .% MOVS r5,#0 + 0x010031fe: 2700 .' MOVS r7,#0 + 0x01003200: e05b [. B 0x10032ba ; msh_split + 198 + 0x01003202: e003 .. B 0x100320c ; msh_split + 24 + 0x01003204: 2000 . MOVS r0,#0 + 0x01003206: 7020 p STRB r0,[r4,#0] + 0x01003208: 1c64 d. ADDS r4,r4,#1 + 0x0100320a: 1c6d m. ADDS r5,r5,#1 + 0x0100320c: 7820 x LDRB r0,[r4,#0] + 0x0100320e: 2820 ( CMP r0,#0x20 + 0x01003210: d002 .. BEQ 0x1003218 ; msh_split + 36 + 0x01003212: 7820 x LDRB r0,[r4,#0] + 0x01003214: 2809 .( CMP r0,#9 + 0x01003216: d101 .. BNE 0x100321c ; msh_split + 40 + 0x01003218: 42b5 .B CMP r5,r6 + 0x0100321a: d3f3 .. BCC 0x1003204 ; msh_split + 16 + 0x0100321c: 2f0a ./ CMP r7,#0xa + 0x0100321e: d316 .. BCC 0x100324e ; msh_split + 90 + 0x01003220: a029 ). ADR r0,{pc}+0xa8 ; 0x10032c8 + 0x01003222: f001f955 ..U. BL rt_kprintf ; 0x10044d0 + 0x01003226: 2000 . MOVS r0,#0 + 0x01003228: 9001 .. STR r0,[sp,#4] + 0x0100322a: e009 .. B 0x1003240 ; msh_split + 76 + 0x0100322c: 9801 .. LDR r0,[sp,#4] + 0x0100322e: 0082 .. LSLS r2,r0,#2 + 0x01003230: 9804 .. LDR r0,[sp,#0x10] + 0x01003232: 5881 .X LDR r1,[r0,r2] + 0x01003234: a02c ,. ADR r0,{pc}+0xb4 ; 0x10032e8 + 0x01003236: f001f94b ..K. BL rt_kprintf ; 0x10044d0 + 0x0100323a: 9801 .. LDR r0,[sp,#4] + 0x0100323c: 1c40 @. ADDS r0,r0,#1 + 0x0100323e: 9001 .. STR r0,[sp,#4] + 0x01003240: 9801 .. LDR r0,[sp,#4] + 0x01003242: 42b8 .B CMP r0,r7 + 0x01003244: d3f2 .. BCC 0x100322c ; msh_split + 56 + 0x01003246: a027 '. ADR r0,{pc}+0x9e ; 0x10032e4 + 0x01003248: f001f942 ..B. BL rt_kprintf ; 0x10044d0 + 0x0100324c: e037 7. B 0x10032be ; msh_split + 202 + 0x0100324e: 42b5 .B CMP r5,r6 + 0x01003250: d300 .. BCC 0x1003254 ; msh_split + 96 + 0x01003252: e034 4. B 0x10032be ; msh_split + 202 + 0x01003254: 7820 x LDRB r0,[r4,#0] + 0x01003256: 2822 "( CMP r0,#0x22 + 0x01003258: d11d .. BNE 0x1003296 ; msh_split + 162 + 0x0100325a: 1c64 d. ADDS r4,r4,#1 + 0x0100325c: 1c6d m. ADDS r5,r5,#1 + 0x0100325e: 00b9 .. LSLS r1,r7,#2 + 0x01003260: 9804 .. LDR r0,[sp,#0x10] + 0x01003262: 5044 DP STR r4,[r0,r1] + 0x01003264: 1c7f .. ADDS r7,r7,#1 + 0x01003266: e009 .. B 0x100327c ; msh_split + 136 + 0x01003268: 7820 x LDRB r0,[r4,#0] + 0x0100326a: 285c \( CMP r0,#0x5c + 0x0100326c: d104 .. BNE 0x1003278 ; msh_split + 132 + 0x0100326e: 7860 `x LDRB r0,[r4,#1] + 0x01003270: 2822 "( CMP r0,#0x22 + 0x01003272: d101 .. BNE 0x1003278 ; msh_split + 132 + 0x01003274: 1c64 d. ADDS r4,r4,#1 + 0x01003276: 1c6d m. ADDS r5,r5,#1 + 0x01003278: 1c64 d. ADDS r4,r4,#1 + 0x0100327a: 1c6d m. ADDS r5,r5,#1 + 0x0100327c: 7820 x LDRB r0,[r4,#0] + 0x0100327e: 2822 "( CMP r0,#0x22 + 0x01003280: d001 .. BEQ 0x1003286 ; msh_split + 146 + 0x01003282: 42b5 .B CMP r5,r6 + 0x01003284: d3f0 .. BCC 0x1003268 ; msh_split + 116 + 0x01003286: 42b5 .B CMP r5,r6 + 0x01003288: d300 .. BCC 0x100328c ; msh_split + 152 + 0x0100328a: e018 .. B 0x10032be ; msh_split + 202 + 0x0100328c: 2000 . MOVS r0,#0 + 0x0100328e: 7020 p STRB r0,[r4,#0] + 0x01003290: 1c64 d. ADDS r4,r4,#1 + 0x01003292: 1c6d m. ADDS r5,r5,#1 + 0x01003294: e011 .. B 0x10032ba ; msh_split + 198 + 0x01003296: 00b9 .. LSLS r1,r7,#2 + 0x01003298: 9804 .. LDR r0,[sp,#0x10] + 0x0100329a: 5044 DP STR r4,[r0,r1] + 0x0100329c: 1c7f .. ADDS r7,r7,#1 + 0x0100329e: e001 .. B 0x10032a4 ; msh_split + 176 + 0x010032a0: 1c64 d. ADDS r4,r4,#1 + 0x010032a2: 1c6d m. ADDS r5,r5,#1 + 0x010032a4: 7820 x LDRB r0,[r4,#0] + 0x010032a6: 2820 ( CMP r0,#0x20 + 0x010032a8: d004 .. BEQ 0x10032b4 ; msh_split + 192 + 0x010032aa: 7820 x LDRB r0,[r4,#0] + 0x010032ac: 2809 .( CMP r0,#9 + 0x010032ae: d001 .. BEQ 0x10032b4 ; msh_split + 192 + 0x010032b0: 42b5 .B CMP r5,r6 + 0x010032b2: d3f5 .. BCC 0x10032a0 ; msh_split + 172 + 0x010032b4: 42b5 .B CMP r5,r6 + 0x010032b6: d300 .. BCC 0x10032ba ; msh_split + 198 + 0x010032b8: e001 .. B 0x10032be ; msh_split + 202 + 0x010032ba: 42b5 .B CMP r5,r6 + 0x010032bc: d3a1 .. BCC 0x1003202 ; msh_split + 14 + 0x010032be: bf00 .. NOP + 0x010032c0: 4638 8F MOV r0,r7 + 0x010032c2: b005 .. ADD sp,sp,#0x14 + 0x010032c4: bdf0 .. POP {r4-r7,pc} + $d + 0x010032c6: 0000 .. DCW 0 + 0x010032c8: 206f6f54 Too DCD 544173908 + 0x010032cc: 796e616d many DCD 2037277037 + 0x010032d0: 67726120 arg DCD 1735549216 + 0x010032d4: 20212073 s ! DCD 539041907 + 0x010032d8: 6f206557 We o DCD 1864394071 + 0x010032dc: 20796c6e nly DCD 544828526 + 0x010032e0: 3a657355 Use: DCD 979727189 + 0x010032e4: 0000000a .... DCD 10 + 0x010032e8: 00207325 %s . DCD 2126629 + $t + i.object_split + object_split + 0x010032ec: b510 .. PUSH {r4,lr} + 0x010032ee: 4604 .F MOV r4,r0 + 0x010032f0: e002 .. B 0x10032f8 ; object_split + 12 + 0x010032f2: a004 .. ADR r0,{pc}+0x12 ; 0x1003304 + 0x010032f4: f001f8ec .... BL rt_kprintf ; 0x10044d0 + 0x010032f8: 4620 F MOV r0,r4 + 0x010032fa: 1e64 d. SUBS r4,r4,#1 + 0x010032fc: 2800 .( CMP r0,#0 + 0x010032fe: d1f8 .. BNE 0x10032f2 ; object_split + 6 + 0x01003300: bd10 .. POP {r4,pc} + $d + 0x01003302: 0000 .. DCW 0 + 0x01003304: 0000002d -... DCD 45 + $t + i.plug_holes + plug_holes + 0x01003308: b570 p. PUSH {r4-r6,lr} + 0x0100330a: 4604 .F MOV r4,r0 + 0x0100330c: 4828 (H LDR r0,[pc,#160] ; [0x10033b0] = 0x2013c + 0x0100330e: 6800 .h LDR r0,[r0,#0] + 0x01003310: 4284 .B CMP r4,r0 + 0x01003312: d204 .. BCS 0x100331e ; plug_holes + 22 + 0x01003314: 22a1 ." MOVS r2,#0xa1 + 0x01003316: 4927 'I LDR r1,[pc,#156] ; [0x10033b4] = 0x1007bef + 0x01003318: a027 '. ADR r0,{pc}+0xa0 ; 0x10033b8 + 0x0100331a: f000f971 ..q. BL rt_assert_handler ; 0x1003600 + 0x0100331e: 482e .H LDR r0,[pc,#184] ; [0x10033d8] = 0x20140 + 0x01003320: 6800 .h LDR r0,[r0,#0] + 0x01003322: 4284 .B CMP r4,r0 + 0x01003324: d304 .. BCC 0x1003330 ; plug_holes + 40 + 0x01003326: 22a2 ." MOVS r2,#0xa2 + 0x01003328: 4922 "I LDR r1,[pc,#136] ; [0x10033b4] = 0x1007bef + 0x0100332a: a02c ,. ADR r0,{pc}+0xb2 ; 0x10033dc + 0x0100332c: f000f968 ..h. BL rt_assert_handler ; 0x1003600 + 0x01003330: 8860 `. LDRH r0,[r4,#2] + 0x01003332: 2800 .( CMP r0,#0 + 0x01003334: d004 .. BEQ 0x1003340 ; plug_holes + 56 + 0x01003336: 22a3 ." MOVS r2,#0xa3 + 0x01003338: 491e .I LDR r1,[pc,#120] ; [0x10033b4] = 0x1007bef + 0x0100333a: a033 3. ADR r0,{pc}+0xce ; 0x1003408 + 0x0100333c: f000f960 ..`. BL rt_assert_handler ; 0x1003600 + 0x01003340: 491b .I LDR r1,[pc,#108] ; [0x10033b0] = 0x2013c + 0x01003342: 6860 `h LDR r0,[r4,#4] + 0x01003344: 6809 .h LDR r1,[r1,#0] + 0x01003346: 1845 E. ADDS r5,r0,r1 + 0x01003348: 42ac .B CMP r4,r5 + 0x0100334a: d016 .. BEQ 0x100337a ; plug_holes + 114 + 0x0100334c: 8868 h. LDRH r0,[r5,#2] + 0x0100334e: 2800 .( CMP r0,#0 + 0x01003350: d113 .. BNE 0x100337a ; plug_holes + 114 + 0x01003352: 4821 !H LDR r0,[pc,#132] ; [0x10033d8] = 0x20140 + 0x01003354: 6800 .h LDR r0,[r0,#0] + 0x01003356: 4285 .B CMP r5,r0 + 0x01003358: d00f .. BEQ 0x100337a ; plug_holes + 114 + 0x0100335a: 482f /H LDR r0,[pc,#188] ; [0x1003418] = 0x20144 + 0x0100335c: 6800 .h LDR r0,[r0,#0] + 0x0100335e: 42a8 .B CMP r0,r5 + 0x01003360: d101 .. BNE 0x1003366 ; plug_holes + 94 + 0x01003362: 482d -H LDR r0,[pc,#180] ; [0x1003418] = 0x20144 + 0x01003364: 6004 .` STR r4,[r0,#0] + 0x01003366: 6868 hh LDR r0,[r5,#4] + 0x01003368: 6060 `` STR r0,[r4,#4] + 0x0100336a: 4811 .H LDR r0,[pc,#68] ; [0x10033b0] = 0x2013c + 0x0100336c: 6800 .h LDR r0,[r0,#0] + 0x0100336e: 1a20 . SUBS r0,r4,r0 + 0x01003370: 4a0f .J LDR r2,[pc,#60] ; [0x10033b0] = 0x2013c + 0x01003372: 6869 ih LDR r1,[r5,#4] + 0x01003374: 6812 .h LDR r2,[r2,#0] + 0x01003376: 1889 .. ADDS r1,r1,r2 + 0x01003378: 6088 .` STR r0,[r1,#8] + 0x0100337a: 490d .I LDR r1,[pc,#52] ; [0x10033b0] = 0x2013c + 0x0100337c: 68a0 .h LDR r0,[r4,#8] + 0x0100337e: 6809 .h LDR r1,[r1,#0] + 0x01003380: 1846 F. ADDS r6,r0,r1 + 0x01003382: 42a6 .B CMP r6,r4 + 0x01003384: d012 .. BEQ 0x10033ac ; plug_holes + 164 + 0x01003386: 8870 p. LDRH r0,[r6,#2] + 0x01003388: 2800 .( CMP r0,#0 + 0x0100338a: d10f .. BNE 0x10033ac ; plug_holes + 164 + 0x0100338c: 4822 "H LDR r0,[pc,#136] ; [0x1003418] = 0x20144 + 0x0100338e: 6800 .h LDR r0,[r0,#0] + 0x01003390: 42a0 .B CMP r0,r4 + 0x01003392: d101 .. BNE 0x1003398 ; plug_holes + 144 + 0x01003394: 4820 H LDR r0,[pc,#128] ; [0x1003418] = 0x20144 + 0x01003396: 6006 .` STR r6,[r0,#0] + 0x01003398: 6860 `h LDR r0,[r4,#4] + 0x0100339a: 6070 p` STR r0,[r6,#4] + 0x0100339c: 4804 .H LDR r0,[pc,#16] ; [0x10033b0] = 0x2013c + 0x0100339e: 6800 .h LDR r0,[r0,#0] + 0x010033a0: 1a31 1. SUBS r1,r6,r0 + 0x010033a2: 4a03 .J LDR r2,[pc,#12] ; [0x10033b0] = 0x2013c + 0x010033a4: 6860 `h LDR r0,[r4,#4] + 0x010033a6: 6812 .h LDR r2,[r2,#0] + 0x010033a8: 1880 .. ADDS r0,r0,r2 + 0x010033aa: 6081 .` STR r1,[r0,#8] + 0x010033ac: bd70 p. POP {r4-r6,pc} + $d + 0x010033ae: 0000 .. DCW 0 + 0x010033b0: 0002013c <... DCD 131388 + 0x010033b4: 01007bef .{.. DCD 16808943 + 0x010033b8: 5f747228 (rt_ DCD 1601466920 + 0x010033bc: 746e6975 uint DCD 1953393013 + 0x010033c0: 20745f38 8_t DCD 544497464 + 0x010033c4: 656d292a *)me DCD 1701652778 + 0x010033c8: 3d3e206d m >= DCD 1027481709 + 0x010033cc: 61656820 hea DCD 1634035744 + 0x010033d0: 74705f70 p_pt DCD 1953521520 + 0x010033d4: 00000072 r... DCD 114 + 0x010033d8: 00020140 @... DCD 131392 + 0x010033dc: 5f747228 (rt_ DCD 1601466920 + 0x010033e0: 746e6975 uint DCD 1953393013 + 0x010033e4: 20745f38 8_t DCD 544497464 + 0x010033e8: 656d292a *)me DCD 1701652778 + 0x010033ec: 203c206d m < DCD 540811373 + 0x010033f0: 5f747228 (rt_ DCD 1601466920 + 0x010033f4: 746e6975 uint DCD 1953393013 + 0x010033f8: 20745f38 8_t DCD 544497464 + 0x010033fc: 6568292a *)he DCD 1701325098 + 0x01003400: 655f7061 ap_e DCD 1700753505 + 0x01003404: 0000646e nd.. DCD 25710 + 0x01003408: 2d6d656d mem- DCD 762144109 + 0x0100340c: 6573753e >use DCD 1702065470 + 0x01003410: 3d3d2064 d == DCD 1027416164 + 0x01003414: 00003020 0.. DCD 12320 + 0x01003418: 00020144 D... DCD 131396 + $t + i.print_number + print_number + 0x0100341c: b5ff .. PUSH {r0-r7,lr} + 0x0100341e: b08b .. SUB sp,sp,#0x2c + 0x01003420: 4604 .F MOV r4,r0 + 0x01003422: 4615 .F MOV r5,r2 + 0x01003424: 9e16 .. LDR r6,[sp,#0x58] + 0x01003426: 9815 .. LDR r0,[sp,#0x54] + 0x01003428: 9004 .. STR r0,[sp,#0x10] + 0x0100342a: 9814 .. LDR r0,[sp,#0x50] + 0x0100342c: 9002 .. STR r0,[sp,#8] + 0x0100342e: 2040 @ MOVS r0,#0x40 + 0x01003430: 4030 0@ ANDS r0,r0,r6 + 0x01003432: 2800 .( CMP r0,#0 + 0x01003434: d001 .. BEQ 0x100343a ; print_number + 30 + 0x01003436: 485c \H LDR r0,[pc,#368] ; [0x10035a8] = 0x10077c4 + 0x01003438: e000 .. B 0x100343c ; print_number + 32 + 0x0100343a: 485c \H LDR r0,[pc,#368] ; [0x10035ac] = 0x10077b3 + 0x0100343c: 9003 .. STR r0,[sp,#0xc] + 0x0100343e: 2010 . MOVS r0,#0x10 + 0x01003440: 4030 0@ ANDS r0,r0,r6 + 0x01003442: 2800 .( CMP r0,#0 + 0x01003444: d001 .. BEQ 0x100344a ; print_number + 46 + 0x01003446: 0876 v. LSRS r6,r6,#1 + 0x01003448: 0076 v. LSLS r6,r6,#1 + 0x0100344a: 07f0 .. LSLS r0,r6,#31 + 0x0100344c: 0fc0 .. LSRS r0,r0,#31 + 0x0100344e: 2800 .( CMP r0,#0 + 0x01003450: d001 .. BEQ 0x1003456 ; print_number + 58 + 0x01003452: 2030 0 MOVS r0,#0x30 + 0x01003454: e000 .. B 0x1003458 ; print_number + 60 + 0x01003456: 2020 MOVS r0,#0x20 + 0x01003458: 900a .. STR r0,[sp,#0x28] + 0x0100345a: 2000 . MOVS r0,#0 + 0x0100345c: 9009 .. STR r0,[sp,#0x24] + 0x0100345e: 2002 . MOVS r0,#2 + 0x01003460: 4030 0@ ANDS r0,r0,r6 + 0x01003462: 2800 .( CMP r0,#0 + 0x01003464: d012 .. BEQ 0x100348c ; print_number + 112 + 0x01003466: 2d00 .- CMP r5,#0 + 0x01003468: da03 .. BGE 0x1003472 ; print_number + 86 + 0x0100346a: 202d - MOVS r0,#0x2d + 0x0100346c: 9009 .. STR r0,[sp,#0x24] + 0x0100346e: 426d mB RSBS r5,r5,#0 + 0x01003470: e00c .. B 0x100348c ; print_number + 112 + 0x01003472: 2004 . MOVS r0,#4 + 0x01003474: 4030 0@ ANDS r0,r0,r6 + 0x01003476: 2800 .( CMP r0,#0 + 0x01003478: d002 .. BEQ 0x1003480 ; print_number + 100 + 0x0100347a: 202b + MOVS r0,#0x2b + 0x0100347c: 9009 .. STR r0,[sp,#0x24] + 0x0100347e: e005 .. B 0x100348c ; print_number + 112 + 0x01003480: 2008 . MOVS r0,#8 + 0x01003482: 4030 0@ ANDS r0,r0,r6 + 0x01003484: 2800 .( CMP r0,#0 + 0x01003486: d001 .. BEQ 0x100348c ; print_number + 112 + 0x01003488: 2020 MOVS r0,#0x20 + 0x0100348a: 9009 .. STR r0,[sp,#0x24] + 0x0100348c: 2700 .' MOVS r7,#0 + 0x0100348e: 2d00 .- CMP r5,#0 + 0x01003490: d105 .. BNE 0x100349e ; print_number + 130 + 0x01003492: 2230 0" MOVS r2,#0x30 + 0x01003494: 4638 8F MOV r0,r7 + 0x01003496: 1c7f .. ADDS r7,r7,#1 + 0x01003498: a905 .. ADD r1,sp,#0x14 + 0x0100349a: 540a .T STRB r2,[r1,r0] + 0x0100349c: e01d .. B 0x10034da ; print_number + 190 + 0x0100349e: e01a .. B 0x10034d6 ; print_number + 186 + 0x010034a0: 980e .. LDR r0,[sp,#0x38] + 0x010034a2: 9001 .. STR r0,[sp,#4] + 0x010034a4: 9801 .. LDR r0,[sp,#4] + 0x010034a6: 280a .( CMP r0,#0xa + 0x010034a8: d10a .. BNE 0x10034c0 ; print_number + 164 + 0x010034aa: 4628 (F MOV r0,r5 + 0x010034ac: 210a .! MOVS r1,#0xa + 0x010034ae: f7fdf9dd .... BL __aeabi_uidiv ; 0x100086c + 0x010034b2: 9100 .. STR r1,[sp,#0] + 0x010034b4: 4628 (F MOV r0,r5 + 0x010034b6: 210a .! MOVS r1,#0xa + 0x010034b8: f7fdf9d8 .... BL __aeabi_uidiv ; 0x100086c + 0x010034bc: 4605 .F MOV r5,r0 + 0x010034be: e003 .. B 0x10034c8 ; print_number + 172 + 0x010034c0: 0728 (. LSLS r0,r5,#28 + 0x010034c2: 0f00 .. LSRS r0,r0,#28 + 0x010034c4: 9000 .. STR r0,[sp,#0] + 0x010034c6: 092d -. LSRS r5,r5,#4 + 0x010034c8: 9800 .. LDR r0,[sp,#0] + 0x010034ca: 9903 .. LDR r1,[sp,#0xc] + 0x010034cc: 5c0a .\ LDRB r2,[r1,r0] + 0x010034ce: 4638 8F MOV r0,r7 + 0x010034d0: 1c7f .. ADDS r7,r7,#1 + 0x010034d2: a905 .. ADD r1,sp,#0x14 + 0x010034d4: 540a .T STRB r2,[r1,r0] + 0x010034d6: 2d00 .- CMP r5,#0 + 0x010034d8: d1e2 .. BNE 0x10034a0 ; print_number + 132 + 0x010034da: 9815 .. LDR r0,[sp,#0x54] + 0x010034dc: 4287 .B CMP r7,r0 + 0x010034de: dd00 .. BLE 0x10034e2 ; print_number + 198 + 0x010034e0: 9715 .. STR r7,[sp,#0x54] + 0x010034e2: 9915 .. LDR r1,[sp,#0x54] + 0x010034e4: 9802 .. LDR r0,[sp,#8] + 0x010034e6: 1a40 @. SUBS r0,r0,r1 + 0x010034e8: 9002 .. STR r0,[sp,#8] + 0x010034ea: 2011 . MOVS r0,#0x11 + 0x010034ec: 4030 0@ ANDS r0,r0,r6 + 0x010034ee: 2800 .( CMP r0,#0 + 0x010034f0: d114 .. BNE 0x100351c ; print_number + 256 + 0x010034f2: 9809 .. LDR r0,[sp,#0x24] + 0x010034f4: 2800 .( CMP r0,#0 + 0x010034f6: d005 .. BEQ 0x1003504 ; print_number + 232 + 0x010034f8: 9802 .. LDR r0,[sp,#8] + 0x010034fa: 2800 .( CMP r0,#0 + 0x010034fc: dd02 .. BLE 0x1003504 ; print_number + 232 + 0x010034fe: 9802 .. LDR r0,[sp,#8] + 0x01003500: 1e40 @. SUBS r0,r0,#1 + 0x01003502: 9002 .. STR r0,[sp,#8] + 0x01003504: e005 .. B 0x1003512 ; print_number + 246 + 0x01003506: 980c .. LDR r0,[sp,#0x30] + 0x01003508: 4284 .B CMP r4,r0 + 0x0100350a: d201 .. BCS 0x1003510 ; print_number + 244 + 0x0100350c: 2020 MOVS r0,#0x20 + 0x0100350e: 7020 p STRB r0,[r4,#0] + 0x01003510: 1c64 d. ADDS r4,r4,#1 + 0x01003512: 9802 .. LDR r0,[sp,#8] + 0x01003514: 1e41 A. SUBS r1,r0,#1 + 0x01003516: 9102 .. STR r1,[sp,#8] + 0x01003518: 2800 .( CMP r0,#0 + 0x0100351a: dcf4 .. BGT 0x1003506 ; print_number + 234 + 0x0100351c: 9809 .. LDR r0,[sp,#0x24] + 0x0100351e: 2800 .( CMP r0,#0 + 0x01003520: d008 .. BEQ 0x1003534 ; print_number + 280 + 0x01003522: 980c .. LDR r0,[sp,#0x30] + 0x01003524: 4284 .B CMP r4,r0 + 0x01003526: d201 .. BCS 0x100352c ; print_number + 272 + 0x01003528: 9809 .. LDR r0,[sp,#0x24] + 0x0100352a: 7020 p STRB r0,[r4,#0] + 0x0100352c: 9802 .. LDR r0,[sp,#8] + 0x0100352e: 1e40 @. SUBS r0,r0,#1 + 0x01003530: 9002 .. STR r0,[sp,#8] + 0x01003532: 1c64 d. ADDS r4,r4,#1 + 0x01003534: 2010 . MOVS r0,#0x10 + 0x01003536: 4030 0@ ANDS r0,r0,r6 + 0x01003538: 2800 .( CMP r0,#0 + 0x0100353a: d10b .. BNE 0x1003554 ; print_number + 312 + 0x0100353c: e005 .. B 0x100354a ; print_number + 302 + 0x0100353e: 980c .. LDR r0,[sp,#0x30] + 0x01003540: 4284 .B CMP r4,r0 + 0x01003542: d201 .. BCS 0x1003548 ; print_number + 300 + 0x01003544: 980a .. LDR r0,[sp,#0x28] + 0x01003546: 7020 p STRB r0,[r4,#0] + 0x01003548: 1c64 d. ADDS r4,r4,#1 + 0x0100354a: 9802 .. LDR r0,[sp,#8] + 0x0100354c: 1e41 A. SUBS r1,r0,#1 + 0x0100354e: 9102 .. STR r1,[sp,#8] + 0x01003550: 2800 .( CMP r0,#0 + 0x01003552: dcf4 .. BGT 0x100353e ; print_number + 290 + 0x01003554: e005 .. B 0x1003562 ; print_number + 326 + 0x01003556: 980c .. LDR r0,[sp,#0x30] + 0x01003558: 4284 .B CMP r4,r0 + 0x0100355a: d201 .. BCS 0x1003560 ; print_number + 324 + 0x0100355c: 2030 0 MOVS r0,#0x30 + 0x0100355e: 7020 p STRB r0,[r4,#0] + 0x01003560: 1c64 d. ADDS r4,r4,#1 + 0x01003562: 9815 .. LDR r0,[sp,#0x54] + 0x01003564: 1e41 A. SUBS r1,r0,#1 + 0x01003566: 9115 .. STR r1,[sp,#0x54] + 0x01003568: 42b8 .B CMP r0,r7 + 0x0100356a: dcf4 .. BGT 0x1003556 ; print_number + 314 + 0x0100356c: e006 .. B 0x100357c ; print_number + 352 + 0x0100356e: 980c .. LDR r0,[sp,#0x30] + 0x01003570: 4284 .B CMP r4,r0 + 0x01003572: d202 .. BCS 0x100357a ; print_number + 350 + 0x01003574: a805 .. ADD r0,sp,#0x14 + 0x01003576: 5dc0 .] LDRB r0,[r0,r7] + 0x01003578: 7020 p STRB r0,[r4,#0] + 0x0100357a: 1c64 d. ADDS r4,r4,#1 + 0x0100357c: 4638 8F MOV r0,r7 + 0x0100357e: 1e7f .. SUBS r7,r7,#1 + 0x01003580: 2800 .( CMP r0,#0 + 0x01003582: dd02 .. BLE 0x100358a ; print_number + 366 + 0x01003584: 9804 .. LDR r0,[sp,#0x10] + 0x01003586: 2800 .( CMP r0,#0 + 0x01003588: d1f1 .. BNE 0x100356e ; print_number + 338 + 0x0100358a: e005 .. B 0x1003598 ; print_number + 380 + 0x0100358c: 980c .. LDR r0,[sp,#0x30] + 0x0100358e: 4284 .B CMP r4,r0 + 0x01003590: d201 .. BCS 0x1003596 ; print_number + 378 + 0x01003592: 2020 MOVS r0,#0x20 + 0x01003594: 7020 p STRB r0,[r4,#0] + 0x01003596: 1c64 d. ADDS r4,r4,#1 + 0x01003598: 9802 .. LDR r0,[sp,#8] + 0x0100359a: 1e41 A. SUBS r1,r0,#1 + 0x0100359c: 9102 .. STR r1,[sp,#8] + 0x0100359e: 2800 .( CMP r0,#0 + 0x010035a0: dcf4 .. BGT 0x100358c ; print_number + 368 + 0x010035a2: 4620 F MOV r0,r4 + 0x010035a4: b00f .. ADD sp,sp,#0x3c + 0x010035a6: bdf0 .. POP {r4-r7,pc} + $d + 0x010035a8: 010077c4 .w.. DCD 16807876 + 0x010035ac: 010077b3 .w.. DCD 16807859 + $t + i.rt_application_init + rt_application_init + 0x010035b0: b51c .. PUSH {r2-r4,lr} + 0x010035b2: 2014 . MOVS r0,#0x14 + 0x010035b4: 210a .! MOVS r1,#0xa + 0x010035b6: 2301 .# MOVS r3,#1 + 0x010035b8: 02db .. LSLS r3,r3,#11 + 0x010035ba: 2200 ." MOVS r2,#0 + 0x010035bc: 9100 .. STR r1,[sp,#0] + 0x010035be: 9001 .. STR r0,[sp,#4] + 0x010035c0: 4907 .I LDR r1,[pc,#28] ; [0x10035e0] = 0x1002fd1 + 0x010035c2: a008 .. ADR r0,{pc}+0x22 ; 0x10035e4 + 0x010035c4: f002fbbd .... BL rt_thread_create ; 0x1005d42 + 0x010035c8: 4604 .F MOV r4,r0 + 0x010035ca: 2c00 ., CMP r4,#0 + 0x010035cc: d104 .. BNE 0x10035d8 ; rt_application_init + 40 + 0x010035ce: 22cb ." MOVS r2,#0xcb + 0x010035d0: 4906 .I LDR r1,[pc,#24] ; [0x10035ec] = 0x1007584 + 0x010035d2: a007 .. ADR r0,{pc}+0x1e ; 0x10035f0 + 0x010035d4: f000f814 .... BL rt_assert_handler ; 0x1003600 + 0x010035d8: 4620 F MOV r0,r4 + 0x010035da: f002fd29 ..). BL rt_thread_startup ; 0x1006030 + 0x010035de: bd1c .. POP {r2-r4,pc} + $d + 0x010035e0: 01002fd1 ./.. DCD 16789457 + 0x010035e4: 6e69616d main DCD 1852399981 + 0x010035e8: 00000000 .... DCD 0 + 0x010035ec: 01007584 .u.. DCD 16807300 + 0x010035f0: 20646974 tid DCD 543451508 + 0x010035f4: 52203d21 != R DCD 1377844513 + 0x010035f8: 554e5f54 T_NU DCD 1431199572 + 0x010035fc: 00004c4c LL.. DCD 19532 + $t + i.rt_assert_handler + rt_assert_handler + 0x01003600: b5f8 .. PUSH {r3-r7,lr} + 0x01003602: 4604 .F MOV r4,r0 + 0x01003604: 460d .F MOV r5,r1 + 0x01003606: 4616 .F MOV r6,r2 + 0x01003608: 2000 . MOVS r0,#0 + 0x0100360a: 9000 .. STR r0,[sp,#0] + 0x0100360c: 480b .H LDR r0,[pc,#44] ; [0x100363c] = 0x20050 + 0x0100360e: 6800 .h LDR r0,[r0,#0] + 0x01003610: 2800 .( CMP r0,#0 + 0x01003612: d10b .. BNE 0x100362c ; rt_assert_handler + 44 + 0x01003614: 4633 3F MOV r3,r6 + 0x01003616: 462a *F MOV r2,r5 + 0x01003618: 4621 !F MOV r1,r4 + 0x0100361a: a009 .. ADR r0,{pc}+0x26 ; 0x1003640 + 0x0100361c: f000ff58 ..X. BL rt_kprintf ; 0x10044d0 + 0x01003620: bf00 .. NOP + 0x01003622: 4668 hF MOV r0,sp + 0x01003624: 7800 .x LDRB r0,[r0,#0] + 0x01003626: 2800 .( CMP r0,#0 + 0x01003628: d0fb .. BEQ 0x1003622 ; rt_assert_handler + 34 + 0x0100362a: e005 .. B 0x1003638 ; rt_assert_handler + 56 + 0x0100362c: 4632 2F MOV r2,r6 + 0x0100362e: 4629 )F MOV r1,r5 + 0x01003630: 4620 F MOV r0,r4 + 0x01003632: 4b02 .K LDR r3,[pc,#8] ; [0x100363c] = 0x20050 + 0x01003634: 681b .h LDR r3,[r3,#0] + 0x01003636: 4798 .G BLX r3 + 0x01003638: bdf8 .. POP {r3-r7,pc} + $d + 0x0100363a: 0000 .. DCW 0 + 0x0100363c: 00020050 P... DCD 131152 + 0x01003640: 29732528 (%s) DCD 695412008 + 0x01003644: 73736120 ass DCD 1936941344 + 0x01003648: 69747265 erti DCD 1769239141 + 0x0100364c: 66206e6f on f DCD 1713401455 + 0x01003650: 656c6961 aile DCD 1701603681 + 0x01003654: 74612064 d at DCD 1952522340 + 0x01003658: 6e756620 fun DCD 1853187616 + 0x0100365c: 6f697463 ctio DCD 1869182051 + 0x01003660: 73253a6e n:%s DCD 1931819630 + 0x01003664: 696c202c , li DCD 1768693804 + 0x01003668: 6e20656e ne n DCD 1847616878 + 0x0100366c: 65626d75 umbe DCD 1700949365 + 0x01003670: 64253a72 r:%d DCD 1680161394 + 0x01003674: 00000a20 ... DCD 2592 + $t + i.rt_calloc + rt_calloc + 0x01003678: b570 p. PUSH {r4-r6,lr} + 0x0100367a: 4604 .F MOV r4,r0 + 0x0100367c: 460d .F MOV r5,r1 + 0x0100367e: 4621 !F MOV r1,r4 + 0x01003680: 4369 iC MULS r1,r5,r1 + 0x01003682: 4608 .F MOV r0,r1 + 0x01003684: f000ffac .... BL rt_malloc ; 0x10045e0 + 0x01003688: 4606 .F MOV r6,r0 + 0x0100368a: 2e00 .. CMP r6,#0 + 0x0100368c: d006 .. BEQ 0x100369c ; rt_calloc + 36 + 0x0100368e: 4620 F MOV r0,r4 + 0x01003690: 4368 hC MULS r0,r5,r0 + 0x01003692: 4602 .F MOV r2,r0 + 0x01003694: 2100 .! MOVS r1,#0 + 0x01003696: 4630 0F MOV r0,r6 + 0x01003698: f001fa13 .... BL rt_memset ; 0x1004ac2 + 0x0100369c: 4630 0F MOV r0,r6 + 0x0100369e: bd70 p. POP {r4-r6,pc} + i.rt_completion_done + rt_completion_done + 0x010036a0: b570 p. PUSH {r4-r6,lr} + 0x010036a2: 4604 .F MOV r4,r0 + 0x010036a4: 2c00 ., CMP r4,#0 + 0x010036a6: d104 .. BNE 0x10036b2 ; rt_completion_done + 18 + 0x010036a8: 227f ." MOVS r2,#0x7f + 0x010036aa: 4911 .I LDR r1,[pc,#68] ; [0x10036f0] = 0x10073ee + 0x010036ac: a011 .. ADR r0,{pc}+0x48 ; 0x10036f4 + 0x010036ae: f7ffffa7 .... BL rt_assert_handler ; 0x1003600 + 0x010036b2: 6820 h LDR r0,[r4,#0] + 0x010036b4: 2801 .( CMP r0,#1 + 0x010036b6: d100 .. BNE 0x10036ba ; rt_completion_done + 26 + 0x010036b8: bd70 p. POP {r4-r6,pc} + 0x010036ba: f7fcff01 .... BL rt_hw_interrupt_disable ; 0x10004c0 + 0x010036be: 4606 .F MOV r6,r0 + 0x010036c0: 2001 . MOVS r0,#1 + 0x010036c2: 6020 ` STR r0,[r4,#0] + 0x010036c4: 1d20 . ADDS r0,r4,#4 + 0x010036c6: f000ff46 ..F. BL rt_list_isempty ; 0x1004556 + 0x010036ca: 2800 .( CMP r0,#0 + 0x010036cc: d10b .. BNE 0x10036e6 ; rt_completion_done + 70 + 0x010036ce: 6860 `h LDR r0,[r4,#4] + 0x010036d0: 4605 .F MOV r5,r0 + 0x010036d2: 3d14 .= SUBS r5,r5,#0x14 + 0x010036d4: 4628 (F MOV r0,r5 + 0x010036d6: f002fc13 .... BL rt_thread_resume ; 0x1005f00 + 0x010036da: 4630 0F MOV r0,r6 + 0x010036dc: f7fcfef4 .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x010036e0: f001fca8 .... BL rt_schedule ; 0x1005034 + 0x010036e4: e002 .. B 0x10036ec ; rt_completion_done + 76 + 0x010036e6: 4630 0F MOV r0,r6 + 0x010036e8: f7fcfeee .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x010036ec: bf00 .. NOP + 0x010036ee: e7e3 .. B 0x10036b8 ; rt_completion_done + 24 + $d + 0x010036f0: 010073ee .s.. DCD 16806894 + 0x010036f4: 706d6f63 comp DCD 1886220131 + 0x010036f8: 6974656c leti DCD 1769235820 + 0x010036fc: 21206e6f on ! DCD 555773551 + 0x01003700: 5452203d = RT DCD 1414668349 + 0x01003704: 4c554e5f _NUL DCD 1280659039 + 0x01003708: 0000004c L... DCD 76 + $t + i.rt_completion_init + rt_completion_init + 0x0100370c: b570 p. PUSH {r4-r6,lr} + 0x0100370e: 4604 .F MOV r4,r0 + 0x01003710: 2c00 ., CMP r4,#0 + 0x01003712: d104 .. BNE 0x100371e ; rt_completion_init + 18 + 0x01003714: 221b ." MOVS r2,#0x1b + 0x01003716: 4908 .I LDR r1,[pc,#32] ; [0x1003738] = 0x10073c8 + 0x01003718: a008 .. ADR r0,{pc}+0x24 ; 0x100373c + 0x0100371a: f7ffff71 ..q. BL rt_assert_handler ; 0x1003600 + 0x0100371e: f7fcfecf .... BL rt_hw_interrupt_disable ; 0x10004c0 + 0x01003722: 4605 .F MOV r5,r0 + 0x01003724: 2000 . MOVS r0,#0 + 0x01003726: 6020 ` STR r0,[r4,#0] + 0x01003728: 1d20 . ADDS r0,r4,#4 + 0x0100372a: 6040 @` STR r0,[r0,#4] + 0x0100372c: 6000 .` STR r0,[r0,#0] + 0x0100372e: bf00 .. NOP + 0x01003730: 4628 (F MOV r0,r5 + 0x01003732: f7fcfec9 .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x01003736: bd70 p. POP {r4-r6,pc} + $d + 0x01003738: 010073c8 .s.. DCD 16806856 + 0x0100373c: 706d6f63 comp DCD 1886220131 + 0x01003740: 6974656c leti DCD 1769235820 + 0x01003744: 21206e6f on ! DCD 555773551 + 0x01003748: 5452203d = RT DCD 1414668349 + 0x0100374c: 4c554e5f _NUL DCD 1280659039 + 0x01003750: 0000004c L... DCD 76 + $t + i.rt_completion_wait + rt_completion_wait + 0x01003754: b5f3 .. PUSH {r0,r1,r4-r7,lr} + 0x01003756: b081 .. SUB sp,sp,#4 + 0x01003758: 4605 .F MOV r5,r0 + 0x0100375a: 2d00 .- CMP r5,#0 + 0x0100375c: d104 .. BNE 0x1003768 ; rt_completion_wait + 20 + 0x0100375e: 223a :" MOVS r2,#0x3a + 0x01003760: 492f /I LDR r1,[pc,#188] ; [0x1003820] = 0x10073db + 0x01003762: a030 0. ADR r0,{pc}+0xc2 ; 0x1003824 + 0x01003764: f7ffff4c ..L. BL rt_assert_handler ; 0x1003600 + 0x01003768: 2600 .& MOVS r6,#0 + 0x0100376a: f002fc19 .... BL rt_thread_self ; 0x1005fa0 + 0x0100376e: 4604 .F MOV r4,r0 + 0x01003770: f7fcfea6 .... BL rt_hw_interrupt_disable ; 0x10004c0 + 0x01003774: 4607 .F MOV r7,r0 + 0x01003776: 6828 (h LDR r0,[r5,#0] + 0x01003778: 2801 .( CMP r0,#1 + 0x0100377a: d048 H. BEQ 0x100380e ; rt_completion_wait + 186 + 0x0100377c: 1d28 (. ADDS r0,r5,#4 + 0x0100377e: f000feea .... BL rt_list_isempty ; 0x1004556 + 0x01003782: 2800 .( CMP r0,#0 + 0x01003784: d104 .. BNE 0x1003790 ; rt_completion_wait + 60 + 0x01003786: 2243 C" MOVS r2,#0x43 + 0x01003788: 4925 %I LDR r1,[pc,#148] ; [0x1003820] = 0x10073db + 0x0100378a: a02c ,. ADR r0,{pc}+0xb2 ; 0x100383c + 0x0100378c: f7ffff38 ..8. BL rt_assert_handler ; 0x1003600 + 0x01003790: 9802 .. LDR r0,[sp,#8] + 0x01003792: 2800 .( CMP r0,#0 + 0x01003794: d101 .. BNE 0x100379a ; rt_completion_wait + 70 + 0x01003796: 1e86 .. SUBS r6,r0,#2 + 0x01003798: e03c <. B 0x1003814 ; rt_completion_wait + 192 + 0x0100379a: 2000 . MOVS r0,#0 + 0x0100379c: 6320 c STR r0,[r4,#0x30] + 0x0100379e: 4620 F MOV r0,r4 + 0x010037a0: f002fcaa .... BL rt_thread_suspend ; 0x10060f8 + 0x010037a4: 1d29 ). ADDS r1,r5,#4 + 0x010037a6: 4620 F MOV r0,r4 + 0x010037a8: 3014 .0 ADDS r0,r0,#0x14 + 0x010037aa: 684a Jh LDR r2,[r1,#4] + 0x010037ac: 6010 .` STR r0,[r2,#0] + 0x010037ae: 684a Jh LDR r2,[r1,#4] + 0x010037b0: 6042 B` STR r2,[r0,#4] + 0x010037b2: 6048 H` STR r0,[r1,#4] + 0x010037b4: 6001 .` STR r1,[r0,#0] + 0x010037b6: bf00 .. NOP + 0x010037b8: bf00 .. NOP + 0x010037ba: f7fcfe81 .... BL rt_hw_interrupt_disable ; 0x10004c0 + 0x010037be: 9000 .. STR r0,[sp,#0] + 0x010037c0: f000fe5c ..\. BL rt_interrupt_get_nest ; 0x100447c + 0x010037c4: 2800 .( CMP r0,#0 + 0x010037c6: d008 .. BEQ 0x10037da ; rt_completion_wait + 134 + 0x010037c8: 4915 .I LDR r1,[pc,#84] ; [0x1003820] = 0x10073db + 0x010037ca: a028 (. ADR r0,{pc}+0xa2 ; 0x100386c + 0x010037cc: f000fe80 .... BL rt_kprintf ; 0x10044d0 + 0x010037d0: 2256 V" MOVS r2,#0x56 + 0x010037d2: 4913 .I LDR r1,[pc,#76] ; [0x1003820] = 0x10073db + 0x010037d4: a02f /. ADR r0,{pc}+0xc0 ; 0x1003894 + 0x010037d6: f7ffff13 .... BL rt_assert_handler ; 0x1003600 + 0x010037da: 9800 .. LDR r0,[sp,#0] + 0x010037dc: f7fcfe74 ..t. BL rt_hw_interrupt_enable ; 0x10004c8 + 0x010037e0: bf00 .. NOP + 0x010037e2: 9802 .. LDR r0,[sp,#8] + 0x010037e4: 2800 .( CMP r0,#0 + 0x010037e6: dd09 .. BLE 0x10037fc ; rt_completion_wait + 168 + 0x010037e8: aa02 .. ADD r2,sp,#8 + 0x010037ea: 2100 .! MOVS r1,#0 + 0x010037ec: 4620 F MOV r0,r4 + 0x010037ee: 304c L0 ADDS r0,r0,#0x4c + 0x010037f0: f002fe1a .... BL rt_timer_control ; 0x1006428 + 0x010037f4: 4620 F MOV r0,r4 + 0x010037f6: 304c L0 ADDS r0,r0,#0x4c + 0x010037f8: f002ff1c .... BL rt_timer_start ; 0x1006634 + 0x010037fc: 4638 8F MOV r0,r7 + 0x010037fe: f7fcfe63 ..c. BL rt_hw_interrupt_enable ; 0x10004c8 + 0x01003802: f001fc17 .... BL rt_schedule ; 0x1005034 + 0x01003806: 6b26 &k LDR r6,[r4,#0x30] + 0x01003808: f7fcfe5a ..Z. BL rt_hw_interrupt_disable ; 0x10004c0 + 0x0100380c: 4607 .F MOV r7,r0 + 0x0100380e: 2000 . MOVS r0,#0 + 0x01003810: 6028 (` STR r0,[r5,#0] + 0x01003812: bf00 .. NOP + 0x01003814: 4638 8F MOV r0,r7 + 0x01003816: f7fcfe57 ..W. BL rt_hw_interrupt_enable ; 0x10004c8 + 0x0100381a: 4630 0F MOV r0,r6 + 0x0100381c: bdfe .. POP {r1-r7,pc} + $d + 0x0100381e: 0000 .. DCW 0 + 0x01003820: 010073db .s.. DCD 16806875 + 0x01003824: 706d6f63 comp DCD 1886220131 + 0x01003828: 6974656c leti DCD 1769235820 + 0x0100382c: 21206e6f on ! DCD 555773551 + 0x01003830: 5452203d = RT DCD 1414668349 + 0x01003834: 4c554e5f _NUL DCD 1280659039 + 0x01003838: 0000004c L... DCD 76 + 0x0100383c: 6c5f7472 rt_l DCD 1818195058 + 0x01003840: 5f747369 ist_ DCD 1601467241 + 0x01003844: 6d657369 isem DCD 1835365225 + 0x01003848: 28797470 pty( DCD 679048304 + 0x0100384c: 6f632826 &(co DCD 1868769318 + 0x01003850: 656c706d mple DCD 1701605485 + 0x01003854: 6e6f6974 tion DCD 1852795252 + 0x01003858: 75733e2d ->su DCD 1970486829 + 0x0100385c: 6e657073 spen DCD 1852141683 + 0x01003860: 5f646564 ded_ DCD 1600415076 + 0x01003864: 7473696c list DCD 1953720684 + 0x01003868: 00002929 )).. DCD 10537 + 0x0100386c: 636e7546 Func DCD 1668183366 + 0x01003870: 6e6f6974 tion DCD 1852795252 + 0x01003874: 5d73255b [%s] DCD 1567827291 + 0x01003878: 61687320 sha DCD 1634235168 + 0x0100387c: 6e206c6c ll n DCD 1847618668 + 0x01003880: 6220746f ot b DCD 1646294127 + 0x01003884: 73752065 e us DCD 1937055845 + 0x01003888: 69206465 ed i DCD 1763730533 + 0x0100388c: 5349206e n IS DCD 1397301358 + 0x01003890: 00000a52 R... DCD 2642 + 0x01003894: 00000030 0... DCD 48 + $t + i.rt_components_board_init + rt_components_board_init + 0x01003898: b510 .. PUSH {r4,lr} + 0x0100389a: 4c04 .L LDR r4,[pc,#16] ; [0x10038ac] = 0x10082f4 + 0x0100389c: e002 .. B 0x10038a4 ; rt_components_board_init + 12 + 0x0100389e: 6820 h LDR r0,[r4,#0] + 0x010038a0: 4780 .G BLX r0 + 0x010038a2: 1d24 $. ADDS r4,r4,#4 + 0x010038a4: 4802 .H LDR r0,[pc,#8] ; [0x10038b0] = 0x1008300 + 0x010038a6: 4284 .B CMP r4,r0 + 0x010038a8: d3f9 .. BCC 0x100389e ; rt_components_board_init + 6 + 0x010038aa: bd10 .. POP {r4,pc} + $d + 0x010038ac: 010082f4 .... DCD 16810740 + 0x010038b0: 01008300 .... DCD 16810752 + $t + i.rt_components_init + rt_components_init + 0x010038b4: b510 .. PUSH {r4,lr} + 0x010038b6: 4c04 .L LDR r4,[pc,#16] ; [0x10038c8] = 0x1008300 + 0x010038b8: e002 .. B 0x10038c0 ; rt_components_init + 12 + 0x010038ba: 6820 h LDR r0,[r4,#0] + 0x010038bc: 4780 .G BLX r0 + 0x010038be: 1d24 $. ADDS r4,r4,#4 + 0x010038c0: 4802 .H LDR r0,[pc,#8] ; [0x10038cc] = 0x1008308 + 0x010038c2: 4284 .B CMP r4,r0 + 0x010038c4: d3f9 .. BCC 0x10038ba ; rt_components_init + 6 + 0x010038c6: bd10 .. POP {r4,pc} + $d + 0x010038c8: 01008300 .... DCD 16810752 + 0x010038cc: 01008308 .... DCD 16810760 + $t + i.rt_console_get_device + rt_console_get_device + 0x010038d0: 4801 .H LDR r0,[pc,#4] ; [0x10038d8] = 0x2004c + 0x010038d2: 6800 .h LDR r0,[r0,#0] + 0x010038d4: 4770 pG BX lr + $d + 0x010038d6: 0000 .. DCW 0 + 0x010038d8: 0002004c L... DCD 131148 + $t + i.rt_console_set_device + rt_console_set_device + 0x010038dc: b570 p. PUSH {r4-r6,lr} + 0x010038de: 4606 .F MOV r6,r0 + 0x010038e0: 480d .H LDR r0,[pc,#52] ; [0x1003918] = 0x2004c + 0x010038e2: 6805 .h LDR r5,[r0,#0] + 0x010038e4: 4630 0F MOV r0,r6 + 0x010038e6: f000f8d5 .... BL rt_device_find ; 0x1003a94 + 0x010038ea: 4604 .F MOV r4,r0 + 0x010038ec: 42ac .B CMP r4,r5 + 0x010038ee: d101 .. BNE 0x10038f4 ; rt_console_set_device + 24 + 0x010038f0: 2000 . MOVS r0,#0 + 0x010038f2: bd70 p. POP {r4-r6,pc} + 0x010038f4: 2c00 ., CMP r4,#0 + 0x010038f6: d00d .. BEQ 0x1003914 ; rt_console_set_device + 56 + 0x010038f8: 4807 .H LDR r0,[pc,#28] ; [0x1003918] = 0x2004c + 0x010038fa: 6800 .h LDR r0,[r0,#0] + 0x010038fc: 2800 .( CMP r0,#0 + 0x010038fe: d003 .. BEQ 0x1003908 ; rt_console_set_device + 44 + 0x01003900: 4805 .H LDR r0,[pc,#20] ; [0x1003918] = 0x2004c + 0x01003902: 6800 .h LDR r0,[r0,#0] + 0x01003904: f000f86a ..j. BL rt_device_close ; 0x10039dc + 0x01003908: 2143 C! MOVS r1,#0x43 + 0x0100390a: 4620 F MOV r0,r4 + 0x0100390c: f000f8ca .... BL rt_device_open ; 0x1003aa4 + 0x01003910: 4801 .H LDR r0,[pc,#4] ; [0x1003918] = 0x2004c + 0x01003912: 6004 .` STR r4,[r0,#0] + 0x01003914: 4628 (F MOV r0,r5 + 0x01003916: e7ec .. B 0x10038f2 ; rt_console_set_device + 22 + $d + 0x01003918: 0002004c L... DCD 131148 + $t + i.rt_defunct_execute + rt_defunct_execute + 0x0100391c: b5f8 .. PUSH {r3-r7,lr} + 0x0100391e: e041 A. B 0x10039a4 ; rt_defunct_execute + 136 + 0x01003920: bf00 .. NOP + 0x01003922: f7fcfdcd .... BL rt_hw_interrupt_disable ; 0x10004c0 + 0x01003926: 4607 .F MOV r7,r0 + 0x01003928: f000fda8 .... BL rt_interrupt_get_nest ; 0x100447c + 0x0100392c: 2800 .( CMP r0,#0 + 0x0100392e: d008 .. BEQ 0x1003942 ; rt_defunct_execute + 38 + 0x01003930: 491e .I LDR r1,[pc,#120] ; [0x10039ac] = 0x10075e6 + 0x01003932: a01f .. ADR r0,{pc}+0x7e ; 0x10039b0 + 0x01003934: f000fdcc .... BL rt_kprintf ; 0x10044d0 + 0x01003938: 22cb ." MOVS r2,#0xcb + 0x0100393a: 491c .I LDR r1,[pc,#112] ; [0x10039ac] = 0x10075e6 + 0x0100393c: a026 &. ADR r0,{pc}+0x9c ; 0x10039d8 + 0x0100393e: f7fffe5f .._. BL rt_assert_handler ; 0x1003600 + 0x01003942: 4638 8F MOV r0,r7 + 0x01003944: f7fcfdc0 .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x01003948: bf00 .. NOP + 0x0100394a: f7fcfdb9 .... BL rt_hw_interrupt_disable ; 0x10004c0 + 0x0100394e: 4606 .F MOV r6,r0 + 0x01003950: f002fa20 .. . BL rt_thread_defunct_dequeue ; 0x1005d94 + 0x01003954: 4604 .F MOV r4,r0 + 0x01003956: 2c00 ., CMP r4,#0 + 0x01003958: d103 .. BNE 0x1003962 ; rt_defunct_execute + 70 + 0x0100395a: 4630 0F MOV r0,r6 + 0x0100395c: f7fcfdb4 .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x01003960: e021 !. B 0x10039a6 ; rt_defunct_execute + 138 + 0x01003962: 6fa5 .o LDR r5,[r4,#0x78] + 0x01003964: 2d00 .- CMP r5,#0 + 0x01003966: d007 .. BEQ 0x1003978 ; rt_defunct_execute + 92 + 0x01003968: 4630 0F MOV r0,r6 + 0x0100396a: f7fcfdad .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x0100396e: 4620 F MOV r0,r4 + 0x01003970: 47a8 .G BLX r5 + 0x01003972: f7fcfda5 .... BL rt_hw_interrupt_disable ; 0x10004c0 + 0x01003976: 4606 .F MOV r6,r0 + 0x01003978: 4620 F MOV r0,r4 + 0x0100397a: f001faf3 .... BL rt_object_is_systemobject ; 0x1004f64 + 0x0100397e: 2801 .( CMP r0,#1 + 0x01003980: d106 .. BNE 0x1003990 ; rt_defunct_execute + 116 + 0x01003982: 4620 F MOV r0,r4 + 0x01003984: f001f98e .... BL rt_object_detach ; 0x1004ca4 + 0x01003988: 4630 0F MOV r0,r6 + 0x0100398a: f7fcfd9d .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x0100398e: e008 .. B 0x10039a2 ; rt_defunct_execute + 134 + 0x01003990: 4630 0F MOV r0,r6 + 0x01003992: f7fcfd99 .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x01003996: 6aa0 .j LDR r0,[r4,#0x28] + 0x01003998: f000fa9a .... BL rt_free ; 0x1003ed0 + 0x0100399c: 4620 F MOV r0,r4 + 0x0100399e: f001f92d ..-. BL rt_object_delete ; 0x1004bfc + 0x010039a2: bf00 .. NOP + 0x010039a4: e7bc .. B 0x1003920 ; rt_defunct_execute + 4 + 0x010039a6: bf00 .. NOP + 0x010039a8: bdf8 .. POP {r3-r7,pc} + $d + 0x010039aa: 0000 .. DCW 0 + 0x010039ac: 010075e6 .u.. DCD 16807398 + 0x010039b0: 636e7546 Func DCD 1668183366 + 0x010039b4: 6e6f6974 tion DCD 1852795252 + 0x010039b8: 5d73255b [%s] DCD 1567827291 + 0x010039bc: 61687320 sha DCD 1634235168 + 0x010039c0: 6e206c6c ll n DCD 1847618668 + 0x010039c4: 6220746f ot b DCD 1646294127 + 0x010039c8: 73752065 e us DCD 1937055845 + 0x010039cc: 69206465 ed i DCD 1763730533 + 0x010039d0: 5349206e n IS DCD 1397301358 + 0x010039d4: 00000a52 R... DCD 2642 + 0x010039d8: 00000030 0... DCD 48 + $t + i.rt_device_close + rt_device_close + 0x010039dc: b570 p. PUSH {r4-r6,lr} + 0x010039de: 4604 .F MOV r4,r0 + 0x010039e0: 2500 .% MOVS r5,#0 + 0x010039e2: 2c00 ., CMP r4,#0 + 0x010039e4: d105 .. BNE 0x10039f2 ; rt_device_close + 22 + 0x010039e6: 22ff ." MOVS r2,#0xff + 0x010039e8: 320b .2 ADDS r2,r2,#0xb + 0x010039ea: 4916 .I LDR r1,[pc,#88] ; [0x1003a44] = 0x100763e + 0x010039ec: a016 .. ADR r0,{pc}+0x5c ; 0x1003a48 + 0x010039ee: f7fffe07 .... BL rt_assert_handler ; 0x1003600 + 0x010039f2: 4620 F MOV r0,r4 + 0x010039f4: f001fa3a ..:. BL rt_object_get_type ; 0x1004e6c + 0x010039f8: 2809 .( CMP r0,#9 + 0x010039fa: d005 .. BEQ 0x1003a08 ; rt_device_close + 44 + 0x010039fc: 22ff ." MOVS r2,#0xff + 0x010039fe: 320c .2 ADDS r2,r2,#0xc + 0x01003a00: 4910 .I LDR r1,[pc,#64] ; [0x1003a44] = 0x100763e + 0x01003a02: a015 .. ADR r0,{pc}+0x56 ; 0x1003a58 + 0x01003a04: f7fffdfc .... BL rt_assert_handler ; 0x1003600 + 0x01003a08: 7ea0 .~ LDRB r0,[r4,#0x1a] + 0x01003a0a: 2800 .( CMP r0,#0 + 0x01003a0c: d101 .. BNE 0x1003a12 ; rt_device_close + 54 + 0x01003a0e: 1e40 @. SUBS r0,r0,#1 + 0x01003a10: bd70 p. POP {r4-r6,pc} + 0x01003a12: 7ea0 .~ LDRB r0,[r4,#0x1a] + 0x01003a14: 1e40 @. SUBS r0,r0,#1 + 0x01003a16: 76a0 .v STRB r0,[r4,#0x1a] + 0x01003a18: 7ea0 .~ LDRB r0,[r4,#0x1a] + 0x01003a1a: 2800 .( CMP r0,#0 + 0x01003a1c: d001 .. BEQ 0x1003a22 ; rt_device_close + 70 + 0x01003a1e: 2000 . MOVS r0,#0 + 0x01003a20: e7f6 .. B 0x1003a10 ; rt_device_close + 52 + 0x01003a22: 6ae0 .j LDR r0,[r4,#0x2c] + 0x01003a24: 2800 .( CMP r0,#0 + 0x01003a26: d003 .. BEQ 0x1003a30 ; rt_device_close + 84 + 0x01003a28: 4620 F MOV r0,r4 + 0x01003a2a: 6ae1 .j LDR r1,[r4,#0x2c] + 0x01003a2c: 4788 .G BLX r1 + 0x01003a2e: 4605 .F MOV r5,r0 + 0x01003a30: 2d00 .- CMP r5,#0 + 0x01003a32: d002 .. BEQ 0x1003a3a ; rt_device_close + 94 + 0x01003a34: 1da8 .. ADDS r0,r5,#6 + 0x01003a36: 2800 .( CMP r0,#0 + 0x01003a38: d101 .. BNE 0x1003a3e ; rt_device_close + 98 + 0x01003a3a: 2000 . MOVS r0,#0 + 0x01003a3c: 8320 . STRH r0,[r4,#0x18] + 0x01003a3e: 4628 (F MOV r0,r5 + 0x01003a40: e7e6 .. B 0x1003a10 ; rt_device_close + 52 + $d + 0x01003a42: 0000 .. DCW 0 + 0x01003a44: 0100763e >v.. DCD 16807486 + 0x01003a48: 20766564 dev DCD 544630116 + 0x01003a4c: 52203d21 != R DCD 1377844513 + 0x01003a50: 554e5f54 T_NU DCD 1431199572 + 0x01003a54: 00004c4c LL.. DCD 19532 + 0x01003a58: 6f5f7472 rt_o DCD 1868526706 + 0x01003a5c: 63656a62 bjec DCD 1667590754 + 0x01003a60: 65675f74 t_ge DCD 1701273460 + 0x01003a64: 79745f74 t_ty DCD 2037669748 + 0x01003a68: 26286570 pe(& DCD 640181616 + 0x01003a6c: 2d766564 dev- DCD 762733924 + 0x01003a70: 7261703e >par DCD 1918988350 + 0x01003a74: 29746e65 ent) DCD 695496293 + 0x01003a78: 203d3d20 == DCD 540884256 + 0x01003a7c: 4f5f5452 RT_O DCD 1331647570 + 0x01003a80: 63656a62 bjec DCD 1667590754 + 0x01003a84: 6c435f74 t_Cl DCD 1816354676 + 0x01003a88: 5f737361 ass_ DCD 1601401697 + 0x01003a8c: 69766544 Devi DCD 1769366852 + 0x01003a90: 00006563 ce.. DCD 25955 + $t + i.rt_device_find + rt_device_find + 0x01003a94: b510 .. PUSH {r4,lr} + 0x01003a96: 4604 .F MOV r4,r0 + 0x01003a98: 2109 .! MOVS r1,#9 + 0x01003a9a: 4620 F MOV r0,r4 + 0x01003a9c: f001f932 ..2. BL rt_object_find ; 0x1004d04 + 0x01003aa0: bd10 .. POP {r4,pc} + 0x01003aa2: 0000 .. MOVS r0,r0 + i.rt_device_open + rt_device_open + 0x01003aa4: b570 p. PUSH {r4-r6,lr} + 0x01003aa6: 4604 .F MOV r4,r0 + 0x01003aa8: 460e .F MOV r6,r1 + 0x01003aaa: 2500 .% MOVS r5,#0 + 0x01003aac: 2c00 ., CMP r4,#0 + 0x01003aae: d104 .. BNE 0x1003aba ; rt_device_open + 22 + 0x01003ab0: 22c9 ." MOVS r2,#0xc9 + 0x01003ab2: 492a *I LDR r1,[pc,#168] ; [0x1003b5c] = 0x100762f + 0x01003ab4: a02a *. ADR r0,{pc}+0xac ; 0x1003b60 + 0x01003ab6: f7fffda3 .... BL rt_assert_handler ; 0x1003600 + 0x01003aba: 4620 F MOV r0,r4 + 0x01003abc: f001f9d6 .... BL rt_object_get_type ; 0x1004e6c + 0x01003ac0: 2809 .( CMP r0,#9 + 0x01003ac2: d004 .. BEQ 0x1003ace ; rt_device_open + 42 + 0x01003ac4: 22ca ." MOVS r2,#0xca + 0x01003ac6: 4925 %I LDR r1,[pc,#148] ; [0x1003b5c] = 0x100762f + 0x01003ac8: a029 ). ADR r0,{pc}+0xa8 ; 0x1003b70 + 0x01003aca: f7fffd99 .... BL rt_assert_handler ; 0x1003600 + 0x01003ace: 8ae0 .. LDRH r0,[r4,#0x16] + 0x01003ad0: 2110 .! MOVS r1,#0x10 + 0x01003ad2: 4008 .@ ANDS r0,r0,r1 + 0x01003ad4: 2800 .( CMP r0,#0 + 0x01003ad6: d113 .. BNE 0x1003b00 ; rt_device_open + 92 + 0x01003ad8: 6a60 `j LDR r0,[r4,#0x24] + 0x01003ada: 2800 .( CMP r0,#0 + 0x01003adc: d00c .. BEQ 0x1003af8 ; rt_device_open + 84 + 0x01003ade: 4620 F MOV r0,r4 + 0x01003ae0: 6a61 aj LDR r1,[r4,#0x24] + 0x01003ae2: 4788 .G BLX r1 + 0x01003ae4: 4605 .F MOV r5,r0 + 0x01003ae6: 2d00 .- CMP r5,#0 + 0x01003ae8: d006 .. BEQ 0x1003af8 ; rt_device_open + 84 + 0x01003aea: 462a *F MOV r2,r5 + 0x01003aec: 4621 !F MOV r1,r4 + 0x01003aee: a02f /. ADR r0,{pc}+0xbe ; 0x1003bac + 0x01003af0: f000fcee .... BL rt_kprintf ; 0x10044d0 + 0x01003af4: 4628 (F MOV r0,r5 + 0x01003af6: bd70 p. POP {r4-r6,pc} + 0x01003af8: 8ae0 .. LDRH r0,[r4,#0x16] + 0x01003afa: 2110 .! MOVS r1,#0x10 + 0x01003afc: 4308 .C ORRS r0,r0,r1 + 0x01003afe: 82e0 .. STRH r0,[r4,#0x16] + 0x01003b00: 8ae0 .. LDRH r0,[r4,#0x16] + 0x01003b02: 2108 .! MOVS r1,#8 + 0x01003b04: 4008 .@ ANDS r0,r0,r1 + 0x01003b06: 2800 .( CMP r0,#0 + 0x01003b08: d006 .. BEQ 0x1003b18 ; rt_device_open + 116 + 0x01003b0a: 8b20 . LDRH r0,[r4,#0x18] + 0x01003b0c: 4008 .@ ANDS r0,r0,r1 + 0x01003b0e: 2800 .( CMP r0,#0 + 0x01003b10: d002 .. BEQ 0x1003b18 ; rt_device_open + 116 + 0x01003b12: 2006 . MOVS r0,#6 + 0x01003b14: 43c0 .C MVNS r0,r0 + 0x01003b16: e7ee .. B 0x1003af6 ; rt_device_open + 82 + 0x01003b18: 6aa0 .j LDR r0,[r4,#0x28] + 0x01003b1a: 2800 .( CMP r0,#0 + 0x01003b1c: d005 .. BEQ 0x1003b2a ; rt_device_open + 134 + 0x01003b1e: 4631 1F MOV r1,r6 + 0x01003b20: 4620 F MOV r0,r4 + 0x01003b22: 6aa2 .j LDR r2,[r4,#0x28] + 0x01003b24: 4790 .G BLX r2 + 0x01003b26: 4605 .F MOV r5,r0 + 0x01003b28: e002 .. B 0x1003b30 ; rt_device_open + 140 + 0x01003b2a: 482e .H LDR r0,[pc,#184] ; [0x1003be4] = 0xf0f + 0x01003b2c: 4030 0@ ANDS r0,r0,r6 + 0x01003b2e: 8320 . STRH r0,[r4,#0x18] + 0x01003b30: 2d00 .- CMP r5,#0 + 0x01003b32: d002 .. BEQ 0x1003b3a ; rt_device_open + 150 + 0x01003b34: 1da8 .. ADDS r0,r5,#6 + 0x01003b36: 2800 .( CMP r0,#0 + 0x01003b38: d10e .. BNE 0x1003b58 ; rt_device_open + 180 + 0x01003b3a: 8b20 . LDRH r0,[r4,#0x18] + 0x01003b3c: 2108 .! MOVS r1,#8 + 0x01003b3e: 4308 .C ORRS r0,r0,r1 + 0x01003b40: 8320 . STRH r0,[r4,#0x18] + 0x01003b42: 7ea0 .~ LDRB r0,[r4,#0x1a] + 0x01003b44: 1c40 @. ADDS r0,r0,#1 + 0x01003b46: 76a0 .v STRB r0,[r4,#0x1a] + 0x01003b48: 7ea0 .~ LDRB r0,[r4,#0x1a] + 0x01003b4a: 2800 .( CMP r0,#0 + 0x01003b4c: d104 .. BNE 0x1003b58 ; rt_device_open + 180 + 0x01003b4e: 22f8 ." MOVS r2,#0xf8 + 0x01003b50: 4902 .I LDR r1,[pc,#8] ; [0x1003b5c] = 0x100762f + 0x01003b52: a025 %. ADR r0,{pc}+0x96 ; 0x1003be8 + 0x01003b54: f7fffd54 ..T. BL rt_assert_handler ; 0x1003600 + 0x01003b58: 4628 (F MOV r0,r5 + 0x01003b5a: e7cc .. B 0x1003af6 ; rt_device_open + 82 + $d + 0x01003b5c: 0100762f /v.. DCD 16807471 + 0x01003b60: 20766564 dev DCD 544630116 + 0x01003b64: 52203d21 != R DCD 1377844513 + 0x01003b68: 554e5f54 T_NU DCD 1431199572 + 0x01003b6c: 00004c4c LL.. DCD 19532 + 0x01003b70: 6f5f7472 rt_o DCD 1868526706 + 0x01003b74: 63656a62 bjec DCD 1667590754 + 0x01003b78: 65675f74 t_ge DCD 1701273460 + 0x01003b7c: 79745f74 t_ty DCD 2037669748 + 0x01003b80: 26286570 pe(& DCD 640181616 + 0x01003b84: 2d766564 dev- DCD 762733924 + 0x01003b88: 7261703e >par DCD 1918988350 + 0x01003b8c: 29746e65 ent) DCD 695496293 + 0x01003b90: 203d3d20 == DCD 540884256 + 0x01003b94: 4f5f5452 RT_O DCD 1331647570 + 0x01003b98: 63656a62 bjec DCD 1667590754 + 0x01003b9c: 6c435f74 t_Cl DCD 1816354676 + 0x01003ba0: 5f737361 ass_ DCD 1601401697 + 0x01003ba4: 69766544 Devi DCD 1769366852 + 0x01003ba8: 00006563 ce.. DCD 25955 + 0x01003bac: 69206f54 To i DCD 1763733332 + 0x01003bb0: 6974696e niti DCD 1769236846 + 0x01003bb4: 7a696c61 aliz DCD 2053729377 + 0x01003bb8: 65642065 e de DCD 1701060709 + 0x01003bbc: 65636976 vice DCD 1701013878 + 0x01003bc0: 2073253a :%s DCD 544417082 + 0x01003bc4: 6c696166 fail DCD 1818845542 + 0x01003bc8: 202e6465 ed. DCD 539911269 + 0x01003bcc: 20656854 The DCD 543516756 + 0x01003bd0: 6f727265 erro DCD 1869771365 + 0x01003bd4: 6f632072 r co DCD 1868767346 + 0x01003bd8: 69206564 de i DCD 1763730788 + 0x01003bdc: 64252073 s %d DCD 1680154739 + 0x01003be0: 0000000a .... DCD 10 + 0x01003be4: 00000f0f .... DCD 3855 + 0x01003be8: 2d766564 dev- DCD 762733924 + 0x01003bec: 6665723e >ref DCD 1717924414 + 0x01003bf0: 756f635f _cou DCD 1970234207 + 0x01003bf4: 2120746e nt ! DCD 555775086 + 0x01003bf8: 0030203d = 0. DCD 3153981 + $t + i.rt_device_pin_register + rt_device_pin_register + 0x01003bfc: b570 p. PUSH {r4-r6,lr} + 0x01003bfe: 4604 .F MOV r4,r0 + 0x01003c00: 460e .F MOV r6,r1 + 0x01003c02: 4615 .F MOV r5,r2 + 0x01003c04: 2013 . MOVS r0,#0x13 + 0x01003c06: 490b .I LDR r1,[pc,#44] ; [0x1003c34] = 0x20158 + 0x01003c08: 7508 .u STRB r0,[r1,#0x14] + 0x01003c0a: 2000 . MOVS r0,#0 + 0x01003c0c: 61c8 .a STR r0,[r1,#0x1c] + 0x01003c0e: 6208 .b STR r0,[r1,#0x20] + 0x01003c10: 6248 Hb STR r0,[r1,#0x24] + 0x01003c12: 6288 .b STR r0,[r1,#0x28] + 0x01003c14: 62c8 .b STR r0,[r1,#0x2c] + 0x01003c16: 4808 .H LDR r0,[pc,#32] ; [0x1003c38] = 0x1001201 + 0x01003c18: 6308 .c STR r0,[r1,#0x30] + 0x01003c1a: 4808 .H LDR r0,[pc,#32] ; [0x1003c3c] = 0x1001251 + 0x01003c1c: 6348 Hc STR r0,[r1,#0x34] + 0x01003c1e: 4808 .H LDR r0,[pc,#32] ; [0x1003c40] = 0x10011bd + 0x01003c20: 6388 .c STR r0,[r1,#0x38] + 0x01003c22: 4608 .F MOV r0,r1 + 0x01003c24: 6406 .d STR r6,[r0,#0x40] + 0x01003c26: 63c5 .c STR r5,[r0,#0x3c] + 0x01003c28: 2203 ." MOVS r2,#3 + 0x01003c2a: 4621 !F MOV r1,r4 + 0x01003c2c: f000f864 ..d. BL rt_device_register ; 0x1003cf8 + 0x01003c30: 2000 . MOVS r0,#0 + 0x01003c32: bd70 p. POP {r4-r6,pc} + $d + 0x01003c34: 00020158 X... DCD 131416 + 0x01003c38: 01001201 .... DCD 16781825 + 0x01003c3c: 01001251 Q... DCD 16781905 + 0x01003c40: 010011bd .... DCD 16781757 + $t + i.rt_device_read + rt_device_read + 0x01003c44: b5ff .. PUSH {r0-r7,lr} + 0x01003c46: b081 .. SUB sp,sp,#4 + 0x01003c48: 4604 .F MOV r4,r0 + 0x01003c4a: 460d .F MOV r5,r1 + 0x01003c4c: 4616 .F MOV r6,r2 + 0x01003c4e: 2c00 ., CMP r4,#0 + 0x01003c50: d105 .. BNE 0x1003c5e ; rt_device_read + 26 + 0x01003c52: 22ff ." MOVS r2,#0xff + 0x01003c54: 3235 52 ADDS r2,r2,#0x35 + 0x01003c56: 4914 .I LDR r1,[pc,#80] ; [0x1003ca8] = 0x100764e + 0x01003c58: a014 .. ADR r0,{pc}+0x54 ; 0x1003cac + 0x01003c5a: f7fffcd1 .... BL rt_assert_handler ; 0x1003600 + 0x01003c5e: 4620 F MOV r0,r4 + 0x01003c60: f001f904 .... BL rt_object_get_type ; 0x1004e6c + 0x01003c64: 2809 .( CMP r0,#9 + 0x01003c66: d005 .. BEQ 0x1003c74 ; rt_device_read + 48 + 0x01003c68: 22ff ." MOVS r2,#0xff + 0x01003c6a: 3236 62 ADDS r2,r2,#0x36 + 0x01003c6c: 490e .I LDR r1,[pc,#56] ; [0x1003ca8] = 0x100764e + 0x01003c6e: a013 .. ADR r0,{pc}+0x4e ; 0x1003cbc + 0x01003c70: f7fffcc6 .... BL rt_assert_handler ; 0x1003600 + 0x01003c74: 7ea0 .~ LDRB r0,[r4,#0x1a] + 0x01003c76: 2800 .( CMP r0,#0 + 0x01003c78: d105 .. BNE 0x1003c86 ; rt_device_read + 66 + 0x01003c7a: 1e40 @. SUBS r0,r0,#1 + 0x01003c7c: f001fec8 .... BL rt_set_errno ; 0x1005a10 + 0x01003c80: 2000 . MOVS r0,#0 + 0x01003c82: b005 .. ADD sp,sp,#0x14 + 0x01003c84: bdf0 .. POP {r4-r7,pc} + 0x01003c86: 6b20 k LDR r0,[r4,#0x30] + 0x01003c88: 2800 .( CMP r0,#0 + 0x01003c8a: d006 .. BEQ 0x1003c9a ; rt_device_read + 86 + 0x01003c8c: 6b27 'k LDR r7,[r4,#0x30] + 0x01003c8e: 4632 2F MOV r2,r6 + 0x01003c90: 4629 )F MOV r1,r5 + 0x01003c92: 4620 F MOV r0,r4 + 0x01003c94: 9b04 .. LDR r3,[sp,#0x10] + 0x01003c96: 47b8 .G BLX r7 + 0x01003c98: e7f3 .. B 0x1003c82 ; rt_device_read + 62 + 0x01003c9a: 2005 . MOVS r0,#5 + 0x01003c9c: 43c0 .C MVNS r0,r0 + 0x01003c9e: f001feb7 .... BL rt_set_errno ; 0x1005a10 + 0x01003ca2: 2000 . MOVS r0,#0 + 0x01003ca4: e7ed .. B 0x1003c82 ; rt_device_read + 62 + $d + 0x01003ca6: 0000 .. DCW 0 + 0x01003ca8: 0100764e Nv.. DCD 16807502 + 0x01003cac: 20766564 dev DCD 544630116 + 0x01003cb0: 52203d21 != R DCD 1377844513 + 0x01003cb4: 554e5f54 T_NU DCD 1431199572 + 0x01003cb8: 00004c4c LL.. DCD 19532 + 0x01003cbc: 6f5f7472 rt_o DCD 1868526706 + 0x01003cc0: 63656a62 bjec DCD 1667590754 + 0x01003cc4: 65675f74 t_ge DCD 1701273460 + 0x01003cc8: 79745f74 t_ty DCD 2037669748 + 0x01003ccc: 26286570 pe(& DCD 640181616 + 0x01003cd0: 2d766564 dev- DCD 762733924 + 0x01003cd4: 7261703e >par DCD 1918988350 + 0x01003cd8: 29746e65 ent) DCD 695496293 + 0x01003cdc: 203d3d20 == DCD 540884256 + 0x01003ce0: 4f5f5452 RT_O DCD 1331647570 + 0x01003ce4: 63656a62 bjec DCD 1667590754 + 0x01003ce8: 6c435f74 t_Cl DCD 1816354676 + 0x01003cec: 5f737361 ass_ DCD 1601401697 + 0x01003cf0: 69766544 Devi DCD 1769366852 + 0x01003cf4: 00006563 ce.. DCD 25955 + $t + i.rt_device_register + rt_device_register + 0x01003cf8: b570 p. PUSH {r4-r6,lr} + 0x01003cfa: 4604 .F MOV r4,r0 + 0x01003cfc: 460d .F MOV r5,r1 + 0x01003cfe: 4616 .F MOV r6,r2 + 0x01003d00: 2c00 ., CMP r4,#0 + 0x01003d02: d101 .. BNE 0x1003d08 ; rt_device_register + 16 + 0x01003d04: 1e40 @. SUBS r0,r0,#1 + 0x01003d06: bd70 p. POP {r4-r6,pc} + 0x01003d08: 4628 (F MOV r0,r5 + 0x01003d0a: f7fffec3 .... BL rt_device_find ; 0x1003a94 + 0x01003d0e: 2800 .( CMP r0,#0 + 0x01003d10: d002 .. BEQ 0x1003d18 ; rt_device_register + 32 + 0x01003d12: 2000 . MOVS r0,#0 + 0x01003d14: 43c0 .C MVNS r0,r0 + 0x01003d16: e7f6 .. B 0x1003d06 ; rt_device_register + 14 + 0x01003d18: 462a *F MOV r2,r5 + 0x01003d1a: 2109 .! MOVS r1,#9 + 0x01003d1c: 4620 F MOV r0,r4 + 0x01003d1e: f001f8bf .... BL rt_object_init ; 0x1004ea0 + 0x01003d22: 82e6 .. STRH r6,[r4,#0x16] + 0x01003d24: 2000 . MOVS r0,#0 + 0x01003d26: 76a0 .v STRB r0,[r4,#0x1a] + 0x01003d28: 8320 . STRH r0,[r4,#0x18] + 0x01003d2a: bf00 .. NOP + 0x01003d2c: e7eb .. B 0x1003d06 ; rt_device_register + 14 + 0x01003d2e: 0000 .. MOVS r0,r0 + i.rt_device_set_rx_indicate + rt_device_set_rx_indicate + 0x01003d30: b570 p. PUSH {r4-r6,lr} + 0x01003d32: 4604 .F MOV r4,r0 + 0x01003d34: 460d .F MOV r5,r1 + 0x01003d36: 2c00 ., CMP r4,#0 + 0x01003d38: d105 .. BNE 0x1003d46 ; rt_device_set_rx_indicate + 22 + 0x01003d3a: 22ff ." MOVS r2,#0xff + 0x01003d3c: 3297 .2 ADDS r2,r2,#0x97 + 0x01003d3e: 4909 .I LDR r1,[pc,#36] ; [0x1003d64] = 0x100767f + 0x01003d40: a009 .. ADR r0,{pc}+0x28 ; 0x1003d68 + 0x01003d42: f7fffc5d ..]. BL rt_assert_handler ; 0x1003600 + 0x01003d46: 4620 F MOV r0,r4 + 0x01003d48: f001f890 .... BL rt_object_get_type ; 0x1004e6c + 0x01003d4c: 2809 .( CMP r0,#9 + 0x01003d4e: d005 .. BEQ 0x1003d5c ; rt_device_set_rx_indicate + 44 + 0x01003d50: 22ff ." MOVS r2,#0xff + 0x01003d52: 3298 .2 ADDS r2,r2,#0x98 + 0x01003d54: 4903 .I LDR r1,[pc,#12] ; [0x1003d64] = 0x100767f + 0x01003d56: a008 .. ADR r0,{pc}+0x22 ; 0x1003d78 + 0x01003d58: f7fffc52 ..R. BL rt_assert_handler ; 0x1003600 + 0x01003d5c: 61e5 .a STR r5,[r4,#0x1c] + 0x01003d5e: 2000 . MOVS r0,#0 + 0x01003d60: bd70 p. POP {r4-r6,pc} + $d + 0x01003d62: 0000 .. DCW 0 + 0x01003d64: 0100767f .v.. DCD 16807551 + 0x01003d68: 20766564 dev DCD 544630116 + 0x01003d6c: 52203d21 != R DCD 1377844513 + 0x01003d70: 554e5f54 T_NU DCD 1431199572 + 0x01003d74: 00004c4c LL.. DCD 19532 + 0x01003d78: 6f5f7472 rt_o DCD 1868526706 + 0x01003d7c: 63656a62 bjec DCD 1667590754 + 0x01003d80: 65675f74 t_ge DCD 1701273460 + 0x01003d84: 79745f74 t_ty DCD 2037669748 + 0x01003d88: 26286570 pe(& DCD 640181616 + 0x01003d8c: 2d766564 dev- DCD 762733924 + 0x01003d90: 7261703e >par DCD 1918988350 + 0x01003d94: 29746e65 ent) DCD 695496293 + 0x01003d98: 203d3d20 == DCD 540884256 + 0x01003d9c: 4f5f5452 RT_O DCD 1331647570 + 0x01003da0: 63656a62 bjec DCD 1667590754 + 0x01003da4: 6c435f74 t_Cl DCD 1816354676 + 0x01003da8: 5f737361 ass_ DCD 1601401697 + 0x01003dac: 69766544 Devi DCD 1769366852 + 0x01003db0: 00006563 ce.. DCD 25955 + $t + i.rt_device_write + rt_device_write + 0x01003db4: b5ff .. PUSH {r0-r7,lr} + 0x01003db6: b081 .. SUB sp,sp,#4 + 0x01003db8: 4604 .F MOV r4,r0 + 0x01003dba: 460d .F MOV r5,r1 + 0x01003dbc: 4616 .F MOV r6,r2 + 0x01003dbe: 2c00 ., CMP r4,#0 + 0x01003dc0: d105 .. BNE 0x1003dce ; rt_device_write + 26 + 0x01003dc2: 22ff ." MOVS r2,#0xff + 0x01003dc4: 325c \2 ADDS r2,r2,#0x5c + 0x01003dc6: 4914 .I LDR r1,[pc,#80] ; [0x1003e18] = 0x100765d + 0x01003dc8: a014 .. ADR r0,{pc}+0x54 ; 0x1003e1c + 0x01003dca: f7fffc19 .... BL rt_assert_handler ; 0x1003600 + 0x01003dce: 4620 F MOV r0,r4 + 0x01003dd0: f001f84c ..L. BL rt_object_get_type ; 0x1004e6c + 0x01003dd4: 2809 .( CMP r0,#9 + 0x01003dd6: d005 .. BEQ 0x1003de4 ; rt_device_write + 48 + 0x01003dd8: 22ff ." MOVS r2,#0xff + 0x01003dda: 325d ]2 ADDS r2,r2,#0x5d + 0x01003ddc: 490e .I LDR r1,[pc,#56] ; [0x1003e18] = 0x100765d + 0x01003dde: a013 .. ADR r0,{pc}+0x4e ; 0x1003e2c + 0x01003de0: f7fffc0e .... BL rt_assert_handler ; 0x1003600 + 0x01003de4: 7ea0 .~ LDRB r0,[r4,#0x1a] + 0x01003de6: 2800 .( CMP r0,#0 + 0x01003de8: d105 .. BNE 0x1003df6 ; rt_device_write + 66 + 0x01003dea: 1e40 @. SUBS r0,r0,#1 + 0x01003dec: f001fe10 .... BL rt_set_errno ; 0x1005a10 + 0x01003df0: 2000 . MOVS r0,#0 + 0x01003df2: b005 .. ADD sp,sp,#0x14 + 0x01003df4: bdf0 .. POP {r4-r7,pc} + 0x01003df6: 6b60 `k LDR r0,[r4,#0x34] + 0x01003df8: 2800 .( CMP r0,#0 + 0x01003dfa: d006 .. BEQ 0x1003e0a ; rt_device_write + 86 + 0x01003dfc: 6b67 gk LDR r7,[r4,#0x34] + 0x01003dfe: 4632 2F MOV r2,r6 + 0x01003e00: 4629 )F MOV r1,r5 + 0x01003e02: 4620 F MOV r0,r4 + 0x01003e04: 9b04 .. LDR r3,[sp,#0x10] + 0x01003e06: 47b8 .G BLX r7 + 0x01003e08: e7f3 .. B 0x1003df2 ; rt_device_write + 62 + 0x01003e0a: 2005 . MOVS r0,#5 + 0x01003e0c: 43c0 .C MVNS r0,r0 + 0x01003e0e: f001fdff .... BL rt_set_errno ; 0x1005a10 + 0x01003e12: 2000 . MOVS r0,#0 + 0x01003e14: e7ed .. B 0x1003df2 ; rt_device_write + 62 + $d + 0x01003e16: 0000 .. DCW 0 + 0x01003e18: 0100765d ]v.. DCD 16807517 + 0x01003e1c: 20766564 dev DCD 544630116 + 0x01003e20: 52203d21 != R DCD 1377844513 + 0x01003e24: 554e5f54 T_NU DCD 1431199572 + 0x01003e28: 00004c4c LL.. DCD 19532 + 0x01003e2c: 6f5f7472 rt_o DCD 1868526706 + 0x01003e30: 63656a62 bjec DCD 1667590754 + 0x01003e34: 65675f74 t_ge DCD 1701273460 + 0x01003e38: 79745f74 t_ty DCD 2037669748 + 0x01003e3c: 26286570 pe(& DCD 640181616 + 0x01003e40: 2d766564 dev- DCD 762733924 + 0x01003e44: 7261703e >par DCD 1918988350 + 0x01003e48: 29746e65 ent) DCD 695496293 + 0x01003e4c: 203d3d20 == DCD 540884256 + 0x01003e50: 4f5f5452 RT_O DCD 1331647570 + 0x01003e54: 63656a62 bjec DCD 1667590754 + 0x01003e58: 6c435f74 t_Cl DCD 1816354676 + 0x01003e5c: 5f737361 ass_ DCD 1601401697 + 0x01003e60: 69766544 Devi DCD 1769366852 + 0x01003e64: 00006563 ce.. DCD 25955 + $t + i.rt_enter_critical + rt_enter_critical + 0x01003e68: b510 .. PUSH {r4,lr} + 0x01003e6a: f7fcfb29 ..). BL rt_hw_interrupt_disable ; 0x10004c0 + 0x01003e6e: 4604 .F MOV r4,r0 + 0x01003e70: 4804 .H LDR r0,[pc,#16] ; [0x1003e84] = 0x20028 + 0x01003e72: 8800 .. LDRH r0,[r0,#0] + 0x01003e74: 1c40 @. ADDS r0,r0,#1 + 0x01003e76: b200 .. SXTH r0,r0 + 0x01003e78: 4902 .I LDR r1,[pc,#8] ; [0x1003e84] = 0x20028 + 0x01003e7a: 8008 .. STRH r0,[r1,#0] + 0x01003e7c: 4620 F MOV r0,r4 + 0x01003e7e: f7fcfb23 ..#. BL rt_hw_interrupt_enable ; 0x10004c8 + 0x01003e82: bd10 .. POP {r4,pc} + $d + 0x01003e84: 00020028 (... DCD 131112 + $t + i.rt_exit_critical + rt_exit_critical + 0x01003e88: b510 .. PUSH {r4,lr} + 0x01003e8a: f7fcfb19 .... BL rt_hw_interrupt_disable ; 0x10004c0 + 0x01003e8e: 4604 .F MOV r4,r0 + 0x01003e90: 480d .H LDR r0,[pc,#52] ; [0x1003ec8] = 0x20028 + 0x01003e92: 8800 .. LDRH r0,[r0,#0] + 0x01003e94: 1e40 @. SUBS r0,r0,#1 + 0x01003e96: b200 .. SXTH r0,r0 + 0x01003e98: 490b .I LDR r1,[pc,#44] ; [0x1003ec8] = 0x20028 + 0x01003e9a: 8008 .. STRH r0,[r1,#0] + 0x01003e9c: 4608 .F MOV r0,r1 + 0x01003e9e: 2100 .! MOVS r1,#0 + 0x01003ea0: 5e41 A^ LDRSH r1,[r0,r1] + 0x01003ea2: 2900 .) CMP r1,#0 + 0x01003ea4: dc0c .. BGT 0x1003ec0 ; rt_exit_critical + 56 + 0x01003ea6: 2000 . MOVS r0,#0 + 0x01003ea8: 4907 .I LDR r1,[pc,#28] ; [0x1003ec8] = 0x20028 + 0x01003eaa: 8008 .. STRH r0,[r1,#0] + 0x01003eac: 4620 F MOV r0,r4 + 0x01003eae: f7fcfb0b .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x01003eb2: 4806 .H LDR r0,[pc,#24] ; [0x1003ecc] = 0x2002c + 0x01003eb4: 6800 .h LDR r0,[r0,#0] + 0x01003eb6: 2800 .( CMP r0,#0 + 0x01003eb8: d005 .. BEQ 0x1003ec6 ; rt_exit_critical + 62 + 0x01003eba: f001f8bb .... BL rt_schedule ; 0x1005034 + 0x01003ebe: e002 .. B 0x1003ec6 ; rt_exit_critical + 62 + 0x01003ec0: 4620 F MOV r0,r4 + 0x01003ec2: f7fcfb01 .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x01003ec6: bd10 .. POP {r4,pc} + $d + 0x01003ec8: 00020028 (... DCD 131112 + 0x01003ecc: 0002002c ,... DCD 131116 + $t + i.rt_free + rt_free + 0x01003ed0: b570 p. PUSH {r4-r6,lr} + 0x01003ed2: 4605 .F MOV r5,r0 + 0x01003ed4: 2d00 .- CMP r5,#0 + 0x01003ed6: d100 .. BNE 0x1003eda ; rt_free + 10 + 0x01003ed8: bd70 p. POP {r4-r6,pc} + 0x01003eda: bf00 .. NOP + 0x01003edc: f7fcfaf0 .... BL rt_hw_interrupt_disable ; 0x10004c0 + 0x01003ee0: 4606 .F MOV r6,r0 + 0x01003ee2: f000facb .... BL rt_interrupt_get_nest ; 0x100447c + 0x01003ee6: 2800 .( CMP r0,#0 + 0x01003ee8: d008 .. BEQ 0x1003efc ; rt_free + 44 + 0x01003eea: 4942 BI LDR r1,[pc,#264] ; [0x1003ff4] = 0x1007c23 + 0x01003eec: a042 B. ADR r0,{pc}+0x10c ; 0x1003ff8 + 0x01003eee: f000faef .... BL rt_kprintf ; 0x10044d0 + 0x01003ef2: 4a4b KJ LDR r2,[pc,#300] ; [0x1004020] = 0x22f + 0x01003ef4: 493f ?I LDR r1,[pc,#252] ; [0x1003ff4] = 0x1007c23 + 0x01003ef6: a04b K. ADR r0,{pc}+0x12e ; 0x1004024 + 0x01003ef8: f7fffb82 .... BL rt_assert_handler ; 0x1003600 + 0x01003efc: 4630 0F MOV r0,r6 + 0x01003efe: f7fcfae3 .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x01003f02: bf00 .. NOP + 0x01003f04: 07a8 .. LSLS r0,r5,#30 + 0x01003f06: 0f80 .. LSRS r0,r0,#30 + 0x01003f08: 2800 .( CMP r0,#0 + 0x01003f0a: d005 .. BEQ 0x1003f18 ; rt_free + 72 + 0x01003f0c: 4a44 DJ LDR r2,[pc,#272] ; [0x1004020] = 0x22f + 0x01003f0e: 1c92 .. ADDS r2,r2,#2 + 0x01003f10: 4938 8I LDR r1,[pc,#224] ; [0x1003ff4] = 0x1007c23 + 0x01003f12: a045 E. ADR r0,{pc}+0x116 ; 0x1004028 + 0x01003f14: f7fffb74 ..t. BL rt_assert_handler ; 0x1003600 + 0x01003f18: 484f OH LDR r0,[pc,#316] ; [0x1004058] = 0x2013c + 0x01003f1a: 6800 .h LDR r0,[r0,#0] + 0x01003f1c: 4285 .B CMP r5,r0 + 0x01003f1e: d303 .. BCC 0x1003f28 ; rt_free + 88 + 0x01003f20: 484e NH LDR r0,[pc,#312] ; [0x100405c] = 0x20140 + 0x01003f22: 6800 .h LDR r0,[r0,#0] + 0x01003f24: 4285 .B CMP r5,r0 + 0x01003f26: d305 .. BCC 0x1003f34 ; rt_free + 100 + 0x01003f28: 4a3d =J LDR r2,[pc,#244] ; [0x1004020] = 0x22f + 0x01003f2a: 1cd2 .. ADDS r2,r2,#3 + 0x01003f2c: 4931 1I LDR r1,[pc,#196] ; [0x1003ff4] = 0x1007c23 + 0x01003f2e: 484c LH LDR r0,[pc,#304] ; [0x1004060] = 0x1007fe0 + 0x01003f30: f7fffb66 ..f. BL rt_assert_handler ; 0x1003600 + 0x01003f34: bf00 .. NOP + 0x01003f36: 484b KH LDR r0,[pc,#300] ; [0x1004064] = 0x20138 + 0x01003f38: 6800 .h LDR r0,[r0,#0] + 0x01003f3a: 2800 .( CMP r0,#0 + 0x01003f3c: d003 .. BEQ 0x1003f46 ; rt_free + 118 + 0x01003f3e: 4628 (F MOV r0,r5 + 0x01003f40: 4948 HI LDR r1,[pc,#288] ; [0x1004064] = 0x20138 + 0x01003f42: 6809 .h LDR r1,[r1,#0] + 0x01003f44: 4788 .G BLX r1 + 0x01003f46: bf00 .. NOP + 0x01003f48: 4843 CH LDR r0,[pc,#268] ; [0x1004058] = 0x2013c + 0x01003f4a: 6800 .h LDR r0,[r0,#0] + 0x01003f4c: 4285 .B CMP r5,r0 + 0x01003f4e: d303 .. BCC 0x1003f58 ; rt_free + 136 + 0x01003f50: 4842 BH LDR r0,[pc,#264] ; [0x100405c] = 0x20140 + 0x01003f52: 6800 .h LDR r0,[r0,#0] + 0x01003f54: 4285 .B CMP r5,r0 + 0x01003f56: d302 .. BCC 0x1003f5e ; rt_free + 142 + 0x01003f58: bf00 .. NOP + 0x01003f5a: bf00 .. NOP + 0x01003f5c: e7bc .. B 0x1003ed8 ; rt_free + 8 + 0x01003f5e: 462c ,F MOV r4,r5 + 0x01003f60: 3c0c .< SUBS r4,r4,#0xc + 0x01003f62: bf00 .. NOP + 0x01003f64: bf00 .. NOP + 0x01003f66: 2100 .! MOVS r1,#0 + 0x01003f68: 43c9 .C MVNS r1,r1 + 0x01003f6a: 483f ?H LDR r0,[pc,#252] ; [0x1004068] = 0x20584 + 0x01003f6c: f001fa38 ..8. BL rt_sem_take ; 0x10053e0 + 0x01003f70: 8860 `. LDRH r0,[r4,#2] + 0x01003f72: 2800 .( CMP r0,#0 + 0x01003f74: d004 .. BEQ 0x1003f80 ; rt_free + 176 + 0x01003f76: 8820 . LDRH r0,[r4,#0] + 0x01003f78: 21f5 .! MOVS r1,#0xf5 + 0x01003f7a: 0149 I. LSLS r1,r1,#5 + 0x01003f7c: 4288 .B CMP r0,r1 + 0x01003f7e: d008 .. BEQ 0x1003f92 ; rt_free + 194 + 0x01003f80: a03a :. ADR r0,{pc}+0xec ; 0x100406c + 0x01003f82: f000faa5 .... BL rt_kprintf ; 0x10044d0 + 0x01003f86: 8823 #. LDRH r3,[r4,#0] + 0x01003f88: 8862 b. LDRH r2,[r4,#2] + 0x01003f8a: 4621 !F MOV r1,r4 + 0x01003f8c: a03e >. ADR r0,{pc}+0xfc ; 0x1004088 + 0x01003f8e: f000fa9f .... BL rt_kprintf ; 0x10044d0 + 0x01003f92: 8860 `. LDRH r0,[r4,#2] + 0x01003f94: 2800 .( CMP r0,#0 + 0x01003f96: d105 .. BNE 0x1003fa4 ; rt_free + 212 + 0x01003f98: 4a21 !J LDR r2,[pc,#132] ; [0x1004020] = 0x22f + 0x01003f9a: 3222 "2 ADDS r2,r2,#0x22 + 0x01003f9c: 4915 .I LDR r1,[pc,#84] ; [0x1003ff4] = 0x1007c23 + 0x01003f9e: a046 F. ADR r0,{pc}+0x11a ; 0x10040b8 + 0x01003fa0: f7fffb2e .... BL rt_assert_handler ; 0x1003600 + 0x01003fa4: 8820 . LDRH r0,[r4,#0] + 0x01003fa6: 21f5 .! MOVS r1,#0xf5 + 0x01003fa8: 0149 I. LSLS r1,r1,#5 + 0x01003faa: 4288 .B CMP r0,r1 + 0x01003fac: d005 .. BEQ 0x1003fba ; rt_free + 234 + 0x01003fae: 4a1c .J LDR r2,[pc,#112] ; [0x1004020] = 0x22f + 0x01003fb0: 3223 #2 ADDS r2,r2,#0x23 + 0x01003fb2: 4910 .I LDR r1,[pc,#64] ; [0x1003ff4] = 0x1007c23 + 0x01003fb4: a043 C. ADR r0,{pc}+0x110 ; 0x10040c4 + 0x01003fb6: f7fffb23 ..#. BL rt_assert_handler ; 0x1003600 + 0x01003fba: 2000 . MOVS r0,#0 + 0x01003fbc: 8060 `. STRH r0,[r4,#2] + 0x01003fbe: 20f5 . MOVS r0,#0xf5 + 0x01003fc0: 0140 @. LSLS r0,r0,#5 + 0x01003fc2: 8020 . STRH r0,[r4,#0] + 0x01003fc4: 4846 FH LDR r0,[pc,#280] ; [0x10040e0] = 0x20144 + 0x01003fc6: 6800 .h LDR r0,[r0,#0] + 0x01003fc8: 4284 .B CMP r4,r0 + 0x01003fca: d201 .. BCS 0x1003fd0 ; rt_free + 256 + 0x01003fcc: 4844 DH LDR r0,[pc,#272] ; [0x10040e0] = 0x20144 + 0x01003fce: 6004 .` STR r4,[r0,#0] + 0x01003fd0: 4921 !I LDR r1,[pc,#132] ; [0x1004058] = 0x2013c + 0x01003fd2: 6860 `h LDR r0,[r4,#4] + 0x01003fd4: 6809 .h LDR r1,[r1,#0] + 0x01003fd6: 1a61 a. SUBS r1,r4,r1 + 0x01003fd8: 1a40 @. SUBS r0,r0,r1 + 0x01003fda: 4942 BI LDR r1,[pc,#264] ; [0x10040e4] = 0x2014c + 0x01003fdc: 6809 .h LDR r1,[r1,#0] + 0x01003fde: 1a08 .. SUBS r0,r1,r0 + 0x01003fe0: 4940 @I LDR r1,[pc,#256] ; [0x10040e4] = 0x2014c + 0x01003fe2: 6008 .` STR r0,[r1,#0] + 0x01003fe4: 4620 F MOV r0,r4 + 0x01003fe6: f7fff98f .... BL plug_holes ; 0x1003308 + 0x01003fea: 481f .H LDR r0,[pc,#124] ; [0x1004068] = 0x20584 + 0x01003fec: f001f99e .... BL rt_sem_release ; 0x100532c + 0x01003ff0: bf00 .. NOP + 0x01003ff2: e771 q. B 0x1003ed8 ; rt_free + 8 + $d + 0x01003ff4: 01007c23 #|.. DCD 16808995 + 0x01003ff8: 636e7546 Func DCD 1668183366 + 0x01003ffc: 6e6f6974 tion DCD 1852795252 + 0x01004000: 5d73255b [%s] DCD 1567827291 + 0x01004004: 61687320 sha DCD 1634235168 + 0x01004008: 6e206c6c ll n DCD 1847618668 + 0x0100400c: 6220746f ot b DCD 1646294127 + 0x01004010: 73752065 e us DCD 1937055845 + 0x01004014: 69206465 ed i DCD 1763730533 + 0x01004018: 5349206e n IS DCD 1397301358 + 0x0100401c: 00000a52 R... DCD 2642 + 0x01004020: 0000022f /... DCD 559 + 0x01004024: 00000030 0... DCD 48 + 0x01004028: 72282828 (((r DCD 1915234344 + 0x0100402c: 62755f74 t_ub DCD 1651859316 + 0x01004030: 5f657361 ase_ DCD 1600484193 + 0x01004034: 6d722974 t)rm DCD 1836198260 + 0x01004038: 20296d65 em) DCD 539585893 + 0x0100403c: 52282026 & (R DCD 1378361382 + 0x01004040: 4c415f54 T_AL DCD 1279352660 + 0x01004044: 5f4e4749 IGN_ DCD 1598965577 + 0x01004048: 455a4953 SIZE DCD 1163544915 + 0x0100404c: 31202d20 - 1 DCD 824192288 + 0x01004050: 3d202929 )) = DCD 1025517865 + 0x01004054: 0030203d = 0. DCD 3153981 + 0x01004058: 0002013c <... DCD 131388 + 0x0100405c: 00020140 @... DCD 131392 + 0x01004060: 01007fe0 .... DCD 16809952 + 0x01004064: 00020138 8... DCD 131384 + 0x01004068: 00020584 .... DCD 132484 + 0x0100406c: 66206f74 to f DCD 1713401716 + 0x01004070: 20656572 ree DCD 543516018 + 0x01004074: 61622061 a ba DCD 1633820769 + 0x01004078: 61642064 d da DCD 1633951844 + 0x0100407c: 62206174 ta b DCD 1646289268 + 0x01004080: 6b636f6c lock DCD 1801678700 + 0x01004084: 00000a3a :... DCD 2618 + 0x01004088: 3a6d656d mem: DCD 980247917 + 0x0100408c: 25783020 0x% DCD 628633632 + 0x01004090: 2c783830 08x, DCD 746076208 + 0x01004094: 65737520 use DCD 1702065440 + 0x01004098: 6c662064 d fl DCD 1818632292 + 0x0100409c: 203a6761 ag: DCD 540698465 + 0x010040a0: 202c6425 %d, DCD 539780133 + 0x010040a4: 6967616d magi DCD 1768382829 + 0x010040a8: 6f632063 c co DCD 1868767331 + 0x010040ac: 203a6564 de: DCD 540697956 + 0x010040b0: 30257830 0x%0 DCD 807761968 + 0x010040b4: 000a7834 4x.. DCD 686132 + 0x010040b8: 2d6d656d mem- DCD 762144109 + 0x010040bc: 6573753e >use DCD 1702065470 + 0x010040c0: 00000064 d... DCD 100 + 0x010040c4: 2d6d656d mem- DCD 762144109 + 0x010040c8: 67616d3e >mag DCD 1734438206 + 0x010040cc: 3d206369 ic = DCD 1025532777 + 0x010040d0: 4548203d = HE DCD 1162354749 + 0x010040d4: 4d5f5041 AP_M DCD 1298092097 + 0x010040d8: 43494741 AGIC DCD 1128875841 + 0x010040dc: 00000000 .... DCD 0 + 0x010040e0: 00020144 D... DCD 131396 + 0x010040e4: 0002014c L... DCD 131404 + $t + i.rt_hw_board_init + rt_hw_board_init + 0x010040e8: b510 .. PUSH {r4,lr} + 0x010040ea: f7fdfb49 ..I. BL bsp_clock_config ; 0x1001780 + 0x010040ee: 2103 .! MOVS r1,#3 + 0x010040f0: 0409 .. LSLS r1,r1,#16 + 0x010040f2: 4805 .H LDR r0,[pc,#20] ; [0x1004108] = 0x20f10 + 0x010040f4: f001fd3e ..>. BL rt_system_heap_init ; 0x1005b74 + 0x010040f8: f000f976 ..v. BL rt_hw_uart_init ; 0x10043e8 + 0x010040fc: a003 .. ADR r0,{pc}+0x10 ; 0x100410c + 0x010040fe: f7fffbed .... BL rt_console_set_device ; 0x10038dc + 0x01004102: f7fffbc9 .... BL rt_components_board_init ; 0x1003898 + 0x01004106: bd10 .. POP {r4,pc} + $d + 0x01004108: 00020f10 .... DCD 134928 + 0x0100410c: 74726175 uart DCD 1953653109 + 0x01004110: 00000030 0... DCD 48 + $t + i.rt_hw_console_output + rt_hw_console_output + 0x01004114: 4770 pG BX lr + 0x01004116: 0000 .. MOVS r0,r0 + i.rt_hw_hard_fault_exception + rt_hw_hard_fault_exception + 0x01004118: 4604 .F MOV r4,r0 + 0x0100411a: a014 .. ADR r0,{pc}+0x52 ; 0x100416c + 0x0100411c: 69e1 .i LDR r1,[r4,#0x1c] + 0x0100411e: f000f9d7 .... BL rt_kprintf ; 0x10044d0 + 0x01004122: a016 .. ADR r0,{pc}+0x5a ; 0x100417c + 0x01004124: 69a1 .i LDR r1,[r4,#0x18] + 0x01004126: f000f9d3 .... BL rt_kprintf ; 0x10044d0 + 0x0100412a: a018 .. ADR r0,{pc}+0x62 ; 0x100418c + 0x0100412c: 6961 ai LDR r1,[r4,#0x14] + 0x0100412e: f000f9cf .... BL rt_kprintf ; 0x10044d0 + 0x01004132: a01a .. ADR r0,{pc}+0x6a ; 0x100419c + 0x01004134: 6921 !i LDR r1,[r4,#0x10] + 0x01004136: f000f9cb .... BL rt_kprintf ; 0x10044d0 + 0x0100413a: a01c .. ADR r0,{pc}+0x72 ; 0x10041ac + 0x0100413c: 68e1 .h LDR r1,[r4,#0xc] + 0x0100413e: f000f9c7 .... BL rt_kprintf ; 0x10044d0 + 0x01004142: a01e .. ADR r0,{pc}+0x7a ; 0x10041bc + 0x01004144: 68a1 .h LDR r1,[r4,#8] + 0x01004146: f000f9c3 .... BL rt_kprintf ; 0x10044d0 + 0x0100414a: a020 . ADR r0,{pc}+0x82 ; 0x10041cc + 0x0100414c: 6861 ah LDR r1,[r4,#4] + 0x0100414e: f000f9bf .... BL rt_kprintf ; 0x10044d0 + 0x01004152: a022 ". ADR r0,{pc}+0x8a ; 0x10041dc + 0x01004154: 6821 !h LDR r1,[r4,#0] + 0x01004156: f000f9bb .... BL rt_kprintf ; 0x10044d0 + 0x0100415a: 4824 $H LDR r0,[pc,#144] ; [0x10041ec] = 0x2002c + 0x0100415c: 6801 .h LDR r1,[r0,#0] + 0x0100415e: a024 $. ADR r0,{pc}+0x92 ; 0x10041f0 + 0x01004160: f000f9b6 .... BL rt_kprintf ; 0x10044d0 + 0x01004164: f7fefd74 ..t. BL list_thread ; 0x1002c50 + 0x01004168: bf00 .. NOP + 0x0100416a: e7fe .. B 0x100416a ; rt_hw_hard_fault_exception + 82 + $d + 0x0100416c: 3a727370 psr: DCD 980579184 + 0x01004170: 25783020 0x% DCD 628633632 + 0x01004174: 0a783830 08x. DCD 175650864 + 0x01004178: 00000000 .... DCD 0 + 0x0100417c: 3a637020 pc: DCD 979595296 + 0x01004180: 25783020 0x% DCD 628633632 + 0x01004184: 0a783830 08x. DCD 175650864 + 0x01004188: 00000000 .... DCD 0 + 0x0100418c: 3a726c20 lr: DCD 980577312 + 0x01004190: 25783020 0x% DCD 628633632 + 0x01004194: 0a783830 08x. DCD 175650864 + 0x01004198: 00000000 .... DCD 0 + 0x0100419c: 3a323172 r12: DCD 976367986 + 0x010041a0: 25783020 0x% DCD 628633632 + 0x010041a4: 0a783830 08x. DCD 175650864 + 0x010041a8: 00000000 .... DCD 0 + 0x010041ac: 3a333072 r03: DCD 976433266 + 0x010041b0: 25783020 0x% DCD 628633632 + 0x010041b4: 0a783830 08x. DCD 175650864 + 0x010041b8: 00000000 .... DCD 0 + 0x010041bc: 3a323072 r02: DCD 976367730 + 0x010041c0: 25783020 0x% DCD 628633632 + 0x010041c4: 0a783830 08x. DCD 175650864 + 0x010041c8: 00000000 .... DCD 0 + 0x010041cc: 3a313072 r01: DCD 976302194 + 0x010041d0: 25783020 0x% DCD 628633632 + 0x010041d4: 0a783830 08x. DCD 175650864 + 0x010041d8: 00000000 .... DCD 0 + 0x010041dc: 3a303072 r00: DCD 976236658 + 0x010041e0: 25783020 0x% DCD 628633632 + 0x010041e4: 0a783830 08x. DCD 175650864 + 0x010041e8: 00000000 .... DCD 0 + 0x010041ec: 0002002c ,... DCD 131116 + 0x010041f0: 64726168 hard DCD 1685217640 + 0x010041f4: 75616620 fau DCD 1969317408 + 0x010041f8: 6f20746c lt o DCD 1864397932 + 0x010041fc: 6874206e n th DCD 1752440942 + 0x01004200: 64616572 read DCD 1684104562 + 0x01004204: 7325203a : %s DCD 1931812922 + 0x01004208: 0000000a .... DCD 10 + $t + i.rt_hw_pin_init + rt_hw_pin_init + 0x0100420c: b510 .. PUSH {r4,lr} + 0x0100420e: 2200 ." MOVS r2,#0 + 0x01004210: 4903 .I LDR r1,[pc,#12] ; [0x1004220] = 0x1007404 + 0x01004212: a004 .. ADR r0,{pc}+0x12 ; 0x1004224 + 0x01004214: f7fffcf2 .... BL rt_device_pin_register ; 0x1003bfc + 0x01004218: 4604 .F MOV r4,r0 + 0x0100421a: 4620 F MOV r0,r4 + 0x0100421c: bd10 .. POP {r4,pc} + $d + 0x0100421e: 0000 .. DCW 0 + 0x01004220: 01007404 .t.. DCD 16806916 + 0x01004224: 006e6970 pin. DCD 7235952 + $t + i.rt_hw_serial_isr + rt_hw_serial_isr + 0x01004228: b5fe .. PUSH {r1-r7,lr} + 0x0100422a: 4605 .F MOV r5,r0 + 0x0100422c: 460e .F MOV r6,r1 + 0x0100422e: b2f0 .. UXTB r0,r6 + 0x01004230: 2801 .( CMP r0,#1 + 0x01004232: d002 .. BEQ 0x100423a ; rt_hw_serial_isr + 18 + 0x01004234: 2802 .( CMP r0,#2 + 0x01004236: d164 d. BNE 0x1004302 ; rt_hw_serial_isr + 218 + 0x01004238: e05e ^. B 0x10042f8 ; rt_hw_serial_isr + 208 + 0x0100423a: 2700 .' MOVS r7,#0 + 0x0100423c: 43ff .C MVNS r7,r7 + 0x0100423e: 6cec .l LDR r4,[r5,#0x4c] + 0x01004240: 2c00 ., CMP r4,#0 + 0x01004242: d104 .. BNE 0x100424e ; rt_hw_serial_isr + 38 + 0x01004244: 4a30 0J LDR r2,[pc,#192] ; [0x1004308] = 0x50e + 0x01004246: 4931 1I LDR r1,[pc,#196] ; [0x100430c] = 0x10073b7 + 0x01004248: a031 1. ADR r0,{pc}+0xc8 ; 0x1004310 + 0x0100424a: f7fff9d9 .... BL rt_assert_handler ; 0x1003600 + 0x0100424e: e02f /. B 0x10042b0 ; rt_hw_serial_isr + 136 + 0x01004250: 6c28 (l LDR r0,[r5,#0x40] + 0x01004252: 68c1 .h LDR r1,[r0,#0xc] + 0x01004254: 4628 (F MOV r0,r5 + 0x01004256: 4788 .G BLX r1 + 0x01004258: 4607 .F MOV r7,r0 + 0x0100425a: 1c78 x. ADDS r0,r7,#1 + 0x0100425c: 2800 .( CMP r0,#0 + 0x0100425e: d100 .. BNE 0x1004262 ; rt_hw_serial_isr + 58 + 0x01004260: e027 '. B 0x10042b2 ; rt_hw_serial_isr + 138 + 0x01004262: f7fcf92d ..-. BL rt_hw_interrupt_disable ; 0x10004c0 + 0x01004266: 9001 .. STR r0,[sp,#4] + 0x01004268: 88a2 .. LDRH r2,[r4,#4] + 0x0100426a: 6821 !h LDR r1,[r4,#0] + 0x0100426c: 548f .T STRB r7,[r1,r2] + 0x0100426e: 88a0 .. LDRH r0,[r4,#4] + 0x01004270: 1c40 @. ADDS r0,r0,#1 + 0x01004272: 80a0 .. STRH r0,[r4,#4] + 0x01004274: 88a1 .. LDRH r1,[r4,#4] + 0x01004276: 6ca8 .l LDR r0,[r5,#0x48] + 0x01004278: 0180 .. LSLS r0,r0,#6 + 0x0100427a: 0c00 .. LSRS r0,r0,#16 + 0x0100427c: 4281 .B CMP r1,r0 + 0x0100427e: db01 .. BLT 0x1004284 ; rt_hw_serial_isr + 92 + 0x01004280: 2000 . MOVS r0,#0 + 0x01004282: 80a0 .. STRH r0,[r4,#4] + 0x01004284: 88a0 .. LDRH r0,[r4,#4] + 0x01004286: 88e1 .. LDRH r1,[r4,#6] + 0x01004288: 4288 .B CMP r0,r1 + 0x0100428a: d10e .. BNE 0x10042aa ; rt_hw_serial_isr + 130 + 0x0100428c: 88e0 .. LDRH r0,[r4,#6] + 0x0100428e: 1c40 @. ADDS r0,r0,#1 + 0x01004290: 80e0 .. STRH r0,[r4,#6] + 0x01004292: 2001 . MOVS r0,#1 + 0x01004294: 60a0 .` STR r0,[r4,#8] + 0x01004296: 88e1 .. LDRH r1,[r4,#6] + 0x01004298: 6ca8 .l LDR r0,[r5,#0x48] + 0x0100429a: 0180 .. LSLS r0,r0,#6 + 0x0100429c: 0c00 .. LSRS r0,r0,#16 + 0x0100429e: 4281 .B CMP r1,r0 + 0x010042a0: db01 .. BLT 0x10042a6 ; rt_hw_serial_isr + 126 + 0x010042a2: 2000 . MOVS r0,#0 + 0x010042a4: 80e0 .. STRH r0,[r4,#6] + 0x010042a6: f7fdf871 ..q. BL _serial_check_buffer_size ; 0x100138c + 0x010042aa: 9801 .. LDR r0,[sp,#4] + 0x010042ac: f7fcf90c .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x010042b0: e7ce .. B 0x1004250 ; rt_hw_serial_isr + 40 + 0x010042b2: bf00 .. NOP + 0x010042b4: 69e8 .i LDR r0,[r5,#0x1c] + 0x010042b6: 2800 .( CMP r0,#0 + 0x010042b8: d01d .. BEQ 0x10042f6 ; rt_hw_serial_isr + 206 + 0x010042ba: f7fcf901 .... BL rt_hw_interrupt_disable ; 0x10004c0 + 0x010042be: 9001 .. STR r0,[sp,#4] + 0x010042c0: 88a0 .. LDRH r0,[r4,#4] + 0x010042c2: 88e1 .. LDRH r1,[r4,#6] + 0x010042c4: 4288 .B CMP r0,r1 + 0x010042c6: db03 .. BLT 0x10042d0 ; rt_hw_serial_isr + 168 + 0x010042c8: 88a0 .. LDRH r0,[r4,#4] + 0x010042ca: 88e1 .. LDRH r1,[r4,#6] + 0x010042cc: 1a40 @. SUBS r0,r0,r1 + 0x010042ce: e006 .. B 0x10042de ; rt_hw_serial_isr + 182 + 0x010042d0: 88e0 .. LDRH r0,[r4,#6] + 0x010042d2: 88a1 .. LDRH r1,[r4,#4] + 0x010042d4: 1a41 A. SUBS r1,r0,r1 + 0x010042d6: 6ca8 .l LDR r0,[r5,#0x48] + 0x010042d8: 0180 .. LSLS r0,r0,#6 + 0x010042da: 0c00 .. LSRS r0,r0,#16 + 0x010042dc: 1a40 @. SUBS r0,r0,r1 + 0x010042de: 9000 .. STR r0,[sp,#0] + 0x010042e0: 9801 .. LDR r0,[sp,#4] + 0x010042e2: f7fcf8f1 .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x010042e6: 9800 .. LDR r0,[sp,#0] + 0x010042e8: 2800 .( CMP r0,#0 + 0x010042ea: d003 .. BEQ 0x10042f4 ; rt_hw_serial_isr + 204 + 0x010042ec: 69ea .i LDR r2,[r5,#0x1c] + 0x010042ee: 4628 (F MOV r0,r5 + 0x010042f0: 9900 .. LDR r1,[sp,#0] + 0x010042f2: 4790 .G BLX r2 + 0x010042f4: bf00 .. NOP + 0x010042f6: e004 .. B 0x1004302 ; rt_hw_serial_isr + 218 + 0x010042f8: 6d2c ,m LDR r4,[r5,#0x50] + 0x010042fa: 4620 F MOV r0,r4 + 0x010042fc: f7fff9d0 .... BL rt_completion_done ; 0x10036a0 + 0x01004300: bf00 .. NOP + 0x01004302: bf00 .. NOP + 0x01004304: bdfe .. POP {r1-r7,pc} + $d + 0x01004306: 0000 .. DCW 0 + 0x01004308: 0000050e .... DCD 1294 + 0x0100430c: 010073b7 .s.. DCD 16806839 + 0x01004310: 665f7872 rx_f DCD 1717532786 + 0x01004314: 206f6669 ifo DCD 544171625 + 0x01004318: 52203d21 != R DCD 1377844513 + 0x0100431c: 554e5f54 T_NU DCD 1431199572 + 0x01004320: 00004c4c LL.. DCD 19532 + $t + i.rt_hw_serial_register + rt_hw_serial_register + 0x01004324: b5ff .. PUSH {r0-r7,lr} + 0x01004326: b081 .. SUB sp,sp,#4 + 0x01004328: 4604 .F MOV r4,r0 + 0x0100432a: 4616 .F MOV r6,r2 + 0x0100432c: 461f .F MOV r7,r3 + 0x0100432e: 2c00 ., CMP r4,#0 + 0x01004330: d104 .. BNE 0x100433c ; rt_hw_serial_register + 24 + 0x01004332: 4a10 .J LDR r2,[pc,#64] ; [0x1004374] = 0x4e2 + 0x01004334: 4910 .I LDR r1,[pc,#64] ; [0x1004378] = 0x10073a1 + 0x01004336: a011 .. ADR r0,{pc}+0x46 ; 0x100437c + 0x01004338: f7fff962 ..b. BL rt_assert_handler ; 0x1003600 + 0x0100433c: 4625 %F MOV r5,r4 + 0x0100433e: 2000 . MOVS r0,#0 + 0x01004340: 462c ,F MOV r4,r5 + 0x01004342: 7528 (u STRB r0,[r5,#0x14] + 0x01004344: 61e8 .a STR r0,[r5,#0x1c] + 0x01004346: 6228 (b STR r0,[r5,#0x20] + 0x01004348: 4811 .H LDR r0,[pc,#68] ; [0x1004390] = 0x1005735 + 0x0100434a: 6268 hb STR r0,[r5,#0x24] + 0x0100434c: 4811 .H LDR r0,[pc,#68] ; [0x1004394] = 0x1005785 + 0x0100434e: 62a8 .b STR r0,[r5,#0x28] + 0x01004350: 4811 .H LDR r0,[pc,#68] ; [0x1004398] = 0x1005591 + 0x01004352: 62e8 .b STR r0,[r5,#0x2c] + 0x01004354: 4811 .H LDR r0,[pc,#68] ; [0x100439c] = 0x1005959 + 0x01004356: 6328 (c STR r0,[r5,#0x30] + 0x01004358: 4811 .H LDR r0,[pc,#68] ; [0x10043a0] = 0x10059b5 + 0x0100435a: 6368 hc STR r0,[r5,#0x34] + 0x0100435c: 4811 .H LDR r0,[pc,#68] ; [0x10043a4] = 0x1005689 + 0x0100435e: 63a8 .c STR r0,[r5,#0x38] + 0x01004360: 63ef .c STR r7,[r5,#0x3c] + 0x01004362: b2b2 .. UXTH r2,r6 + 0x01004364: 4628 (F MOV r0,r5 + 0x01004366: 9902 .. LDR r1,[sp,#8] + 0x01004368: f7fffcc6 .... BL rt_device_register ; 0x1003cf8 + 0x0100436c: 9000 .. STR r0,[sp,#0] + 0x0100436e: 9800 .. LDR r0,[sp,#0] + 0x01004370: b005 .. ADD sp,sp,#0x14 + 0x01004372: bdf0 .. POP {r4-r7,pc} + $d + 0x01004374: 000004e2 .... DCD 1250 + 0x01004378: 010073a1 .s.. DCD 16806817 + 0x0100437c: 69726573 seri DCD 1769104755 + 0x01004380: 21206c61 al ! DCD 555773025 + 0x01004384: 5452203d = RT DCD 1414668349 + 0x01004388: 4c554e5f _NUL DCD 1280659039 + 0x0100438c: 0000004c L... DCD 76 + 0x01004390: 01005735 5W.. DCD 16799541 + 0x01004394: 01005785 .W.. DCD 16799621 + 0x01004398: 01005591 .U.. DCD 16799121 + 0x0100439c: 01005959 YY.. DCD 16800089 + 0x010043a0: 010059b5 .Y.. DCD 16800181 + 0x010043a4: 01005689 .V.. DCD 16799369 + $t + i.rt_hw_stack_init + rt_hw_stack_init + 0x010043a8: b5ff .. PUSH {r0-r7,lr} + 0x010043aa: 460c .F MOV r4,r1 + 0x010043ac: 1d10 .. ADDS r0,r2,#4 + 0x010043ae: 08c0 .. LSRS r0,r0,#3 + 0x010043b0: 00c0 .. LSLS r0,r0,#3 + 0x010043b2: 3840 @8 SUBS r0,r0,#0x40 + 0x010043b4: 4601 .F MOV r1,r0 + 0x010043b6: 2500 .% MOVS r5,#0 + 0x010043b8: e003 .. B 0x10043c2 ; rt_hw_stack_init + 26 + 0x010043ba: 4e0a .N LDR r6,[pc,#40] ; [0x10043e4] = 0xdeadbeef + 0x010043bc: 00af .. LSLS r7,r5,#2 + 0x010043be: 51ce .Q STR r6,[r1,r7] + 0x010043c0: 1c6d m. ADDS r5,r5,#1 + 0x010043c2: 2d10 .- CMP r5,#0x10 + 0x010043c4: d3f9 .. BCC 0x10043ba ; rt_hw_stack_init + 18 + 0x010043c6: 620c .b STR r4,[r1,#0x20] + 0x010043c8: 2600 .& MOVS r6,#0 + 0x010043ca: 624e Nb STR r6,[r1,#0x24] + 0x010043cc: 628e .b STR r6,[r1,#0x28] + 0x010043ce: 62ce .b STR r6,[r1,#0x2c] + 0x010043d0: 630e .c STR r6,[r1,#0x30] + 0x010043d2: 634b Kc STR r3,[r1,#0x34] + 0x010043d4: 9e00 .. LDR r6,[sp,#0] + 0x010043d6: 638e .c STR r6,[r1,#0x38] + 0x010043d8: 2601 .& MOVS r6,#1 + 0x010043da: 0636 6. LSLS r6,r6,#24 + 0x010043dc: 63ce .c STR r6,[r1,#0x3c] + 0x010043de: b004 .. ADD sp,sp,#0x10 + 0x010043e0: bdf0 .. POP {r4-r7,pc} + $d + 0x010043e2: 0000 .. DCW 0 + 0x010043e4: deadbeef .... DCD 3735928559 + $t + i.rt_hw_uart_init + rt_hw_uart_init + 0x010043e8: b51c .. PUSH {r2-r4,lr} + 0x010043ea: 490f .I LDR r1,[pc,#60] ; [0x1004428] = 0x1007480 + 0x010043ec: c903 .. LDM r1,{r0,r1} + 0x010043ee: 9101 .. STR r1,[sp,#4] + 0x010043f0: 9000 .. STR r0,[sp,#0] + 0x010043f2: 2008 . MOVS r0,#8 + 0x010043f4: 490d .I LDR r1,[pc,#52] ; [0x100442c] = 0xf8700 + 0x010043f6: 7048 Hp STRB r0,[r1,#1] + 0x010043f8: 2009 . MOVS r0,#9 + 0x010043fa: 7008 .p STRB r0,[r1,#0] + 0x010043fc: 4c0c .L LDR r4,[pc,#48] ; [0x1004430] = 0x20010 + 0x010043fe: 2000 . MOVS r0,#0 + 0x01004400: 7020 p STRB r0,[r4,#0] + 0x01004402: 2005 . MOVS r0,#5 + 0x01004404: 7060 `p STRB r0,[r4,#1] + 0x01004406: 480b .H LDR r0,[pc,#44] ; [0x1004434] = 0x1007420 + 0x01004408: 490b .I LDR r1,[pc,#44] ; [0x1004438] = 0x2019c + 0x0100440a: 6408 .d STR r0,[r1,#0x40] + 0x0100440c: 4608 .F MOV r0,r1 + 0x0100440e: 9a01 .. LDR r2,[sp,#4] + 0x01004410: 9900 .. LDR r1,[sp,#0] + 0x01004412: 6482 .d STR r2,[r0,#0x48] + 0x01004414: 6441 Ad STR r1,[r0,#0x44] + 0x01004416: 4623 #F MOV r3,r4 + 0x01004418: 22ff ." MOVS r2,#0xff + 0x0100441a: 3204 .2 ADDS r2,#4 + 0x0100441c: a107 .. ADR r1,{pc}+0x20 ; 0x100443c + 0x0100441e: f7ffff81 .... BL rt_hw_serial_register ; 0x1004324 + 0x01004422: 2000 . MOVS r0,#0 + 0x01004424: bd1c .. POP {r2-r4,pc} + $d + 0x01004426: 0000 .. DCW 0 + 0x01004428: 01007480 .t.. DCD 16807040 + 0x0100442c: 000f8700 .... DCD 1017600 + 0x01004430: 00020010 .... DCD 131088 + 0x01004434: 01007420 t.. DCD 16806944 + 0x01004438: 0002019c .... DCD 131484 + 0x0100443c: 74726175 uart DCD 1953653109 + 0x01004440: 00000030 0... DCD 48 + $t + i.rt_interrupt_enter + rt_interrupt_enter + 0x01004444: b510 .. PUSH {r4,lr} + 0x01004446: f7fcf83b ..;. BL rt_hw_interrupt_disable ; 0x10004c0 + 0x0100444a: 4604 .F MOV r4,r0 + 0x0100444c: 4809 .H LDR r0,[pc,#36] ; [0x1004474] = 0x20124 + 0x0100444e: 7800 .x LDRB r0,[r0,#0] + 0x01004450: 1c40 @. ADDS r0,r0,#1 + 0x01004452: 4908 .I LDR r1,[pc,#32] ; [0x1004474] = 0x20124 + 0x01004454: 7008 .p STRB r0,[r1,#0] + 0x01004456: bf00 .. NOP + 0x01004458: 4807 .H LDR r0,[pc,#28] ; [0x1004478] = 0x2011c + 0x0100445a: 6800 .h LDR r0,[r0,#0] + 0x0100445c: 2800 .( CMP r0,#0 + 0x0100445e: d002 .. BEQ 0x1004466 ; rt_interrupt_enter + 34 + 0x01004460: 4805 .H LDR r0,[pc,#20] ; [0x1004478] = 0x2011c + 0x01004462: 6800 .h LDR r0,[r0,#0] + 0x01004464: 4780 .G BLX r0 + 0x01004466: bf00 .. NOP + 0x01004468: 4620 F MOV r0,r4 + 0x0100446a: f7fcf82d ..-. BL rt_hw_interrupt_enable ; 0x10004c8 + 0x0100446e: bf00 .. NOP + 0x01004470: bf00 .. NOP + 0x01004472: bd10 .. POP {r4,pc} + $d + 0x01004474: 00020124 $... DCD 131364 + 0x01004478: 0002011c .... DCD 131356 + $t + i.rt_interrupt_get_nest + rt_interrupt_get_nest + 0x0100447c: b570 p. PUSH {r4-r6,lr} + 0x0100447e: f7fcf81f .... BL rt_hw_interrupt_disable ; 0x10004c0 + 0x01004482: 4605 .F MOV r5,r0 + 0x01004484: 4803 .H LDR r0,[pc,#12] ; [0x1004494] = 0x20124 + 0x01004486: 7804 .x LDRB r4,[r0,#0] + 0x01004488: 4628 (F MOV r0,r5 + 0x0100448a: f7fcf81d .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x0100448e: 4620 F MOV r0,r4 + 0x01004490: bd70 p. POP {r4-r6,pc} + $d + 0x01004492: 0000 .. DCW 0 + 0x01004494: 00020124 $... DCD 131364 + $t + i.rt_interrupt_leave + rt_interrupt_leave + 0x01004498: b510 .. PUSH {r4,lr} + 0x0100449a: bf00 .. NOP + 0x0100449c: bf00 .. NOP + 0x0100449e: f7fcf80f .... BL rt_hw_interrupt_disable ; 0x10004c0 + 0x010044a2: 4604 .F MOV r4,r0 + 0x010044a4: bf00 .. NOP + 0x010044a6: 4808 .H LDR r0,[pc,#32] ; [0x10044c8] = 0x20120 + 0x010044a8: 6800 .h LDR r0,[r0,#0] + 0x010044aa: 2800 .( CMP r0,#0 + 0x010044ac: d002 .. BEQ 0x10044b4 ; rt_interrupt_leave + 28 + 0x010044ae: 4806 .H LDR r0,[pc,#24] ; [0x10044c8] = 0x20120 + 0x010044b0: 6800 .h LDR r0,[r0,#0] + 0x010044b2: 4780 .G BLX r0 + 0x010044b4: bf00 .. NOP + 0x010044b6: 4805 .H LDR r0,[pc,#20] ; [0x10044cc] = 0x20124 + 0x010044b8: 7800 .x LDRB r0,[r0,#0] + 0x010044ba: 1e40 @. SUBS r0,r0,#1 + 0x010044bc: 4903 .I LDR r1,[pc,#12] ; [0x10044cc] = 0x20124 + 0x010044be: 7008 .p STRB r0,[r1,#0] + 0x010044c0: 4620 F MOV r0,r4 + 0x010044c2: f7fcf801 .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x010044c6: bd10 .. POP {r4,pc} + $d + 0x010044c8: 00020120 ... DCD 131360 + 0x010044cc: 00020124 $... DCD 131364 + $t + i.rt_kprintf + rt_kprintf + 0x010044d0: b40f .. PUSH {r0-r3} + 0x010044d2: b538 8. PUSH {r3-r5,lr} + 0x010044d4: a805 .. ADD r0,sp,#0x14 + 0x010044d6: 9000 .. STR r0,[sp,#0] + 0x010044d8: 217f .! MOVS r1,#0x7f + 0x010044da: 480f .H LDR r0,[pc,#60] ; [0x1004518] = 0x20504 + 0x010044dc: 9b00 .. LDR r3,[sp,#0] + 0x010044de: 9a04 .. LDR r2,[sp,#0x10] + 0x010044e0: f002f9f4 .... BL rt_vsnprintf ; 0x10068cc + 0x010044e4: 4604 .F MOV r4,r0 + 0x010044e6: 2c7f ., CMP r4,#0x7f + 0x010044e8: d900 .. BLS 0x10044ec ; rt_kprintf + 28 + 0x010044ea: 247f .$ MOVS r4,#0x7f + 0x010044ec: 480b .H LDR r0,[pc,#44] ; [0x100451c] = 0x2004c + 0x010044ee: 6800 .h LDR r0,[r0,#0] + 0x010044f0: 2800 .( CMP r0,#0 + 0x010044f2: d103 .. BNE 0x10044fc ; rt_kprintf + 44 + 0x010044f4: 4808 .H LDR r0,[pc,#32] ; [0x1004518] = 0x20504 + 0x010044f6: f7fffe0d .... BL rt_hw_console_output ; 0x1004114 + 0x010044fa: e006 .. B 0x100450a ; rt_kprintf + 58 + 0x010044fc: 4623 #F MOV r3,r4 + 0x010044fe: 4a06 .J LDR r2,[pc,#24] ; [0x1004518] = 0x20504 + 0x01004500: 2100 .! MOVS r1,#0 + 0x01004502: 4806 .H LDR r0,[pc,#24] ; [0x100451c] = 0x2004c + 0x01004504: 6800 .h LDR r0,[r0,#0] + 0x01004506: f7fffc55 ..U. BL rt_device_write ; 0x1003db4 + 0x0100450a: 2000 . MOVS r0,#0 + 0x0100450c: 9000 .. STR r0,[sp,#0] + 0x0100450e: bc38 8. POP {r3-r5} + 0x01004510: bc08 .. POP {r3} + 0x01004512: b004 .. ADD sp,sp,#0x10 + 0x01004514: 4718 .G BX r3 + $d + 0x01004516: 0000 .. DCW 0 + 0x01004518: 00020504 .... DCD 132356 + 0x0100451c: 0002004c L... DCD 131148 + $t + i.rt_list_init + rt_list_init + 0x01004520: 6040 @` STR r0,[r0,#4] + 0x01004522: 6000 .` STR r0,[r0,#0] + 0x01004524: 4770 pG BX lr + i.rt_list_init + rt_list_init + 0x01004526: 6040 @` STR r0,[r0,#4] + 0x01004528: 6000 .` STR r0,[r0,#0] + 0x0100452a: 4770 pG BX lr + i.rt_list_insert_after + rt_list_insert_after + 0x0100452c: 6802 .h LDR r2,[r0,#0] + 0x0100452e: 6051 Q` STR r1,[r2,#4] + 0x01004530: 6802 .h LDR r2,[r0,#0] + 0x01004532: 600a .` STR r2,[r1,#0] + 0x01004534: 6001 .` STR r1,[r0,#0] + 0x01004536: 6048 H` STR r0,[r1,#4] + 0x01004538: 4770 pG BX lr + i.rt_list_insert_after + rt_list_insert_after + 0x0100453a: 6802 .h LDR r2,[r0,#0] + 0x0100453c: 6051 Q` STR r1,[r2,#4] + 0x0100453e: 6802 .h LDR r2,[r0,#0] + 0x01004540: 600a .` STR r2,[r1,#0] + 0x01004542: 6001 .` STR r1,[r0,#0] + 0x01004544: 6048 H` STR r0,[r1,#4] + 0x01004546: 4770 pG BX lr + i.rt_list_insert_before + rt_list_insert_before + 0x01004548: 6842 Bh LDR r2,[r0,#4] + 0x0100454a: 6011 .` STR r1,[r2,#0] + 0x0100454c: 6842 Bh LDR r2,[r0,#4] + 0x0100454e: 604a J` STR r2,[r1,#4] + 0x01004550: 6041 A` STR r1,[r0,#4] + 0x01004552: 6008 .` STR r0,[r1,#0] + 0x01004554: 4770 pG BX lr + i.rt_list_isempty + rt_list_isempty + 0x01004556: 4601 .F MOV r1,r0 + 0x01004558: 6808 .h LDR r0,[r1,#0] + 0x0100455a: 4288 .B CMP r0,r1 + 0x0100455c: d101 .. BNE 0x1004562 ; rt_list_isempty + 12 + 0x0100455e: 2001 . MOVS r0,#1 + 0x01004560: 4770 pG BX lr + 0x01004562: 2000 . MOVS r0,#0 + 0x01004564: e7fc .. B 0x1004560 ; rt_list_isempty + 10 + i.rt_list_isempty + rt_list_isempty + 0x01004566: 4601 .F MOV r1,r0 + 0x01004568: 6808 .h LDR r0,[r1,#0] + 0x0100456a: 4288 .B CMP r0,r1 + 0x0100456c: d101 .. BNE 0x1004572 ; rt_list_isempty + 12 + 0x0100456e: 2001 . MOVS r0,#1 + 0x01004570: 4770 pG BX lr + 0x01004572: 2000 . MOVS r0,#0 + 0x01004574: e7fc .. B 0x1004570 ; rt_list_isempty + 10 + i.rt_list_isempty + rt_list_isempty + 0x01004576: 4601 .F MOV r1,r0 + 0x01004578: 6808 .h LDR r0,[r1,#0] + 0x0100457a: 4288 .B CMP r0,r1 + 0x0100457c: d101 .. BNE 0x1004582 ; rt_list_isempty + 12 + 0x0100457e: 2001 . MOVS r0,#1 + 0x01004580: 4770 pG BX lr + 0x01004582: 2000 . MOVS r0,#0 + 0x01004584: e7fc .. B 0x1004580 ; rt_list_isempty + 10 + i.rt_list_isempty + rt_list_isempty + 0x01004586: 4601 .F MOV r1,r0 + 0x01004588: 6808 .h LDR r0,[r1,#0] + 0x0100458a: 4288 .B CMP r0,r1 + 0x0100458c: d101 .. BNE 0x1004592 ; rt_list_isempty + 12 + 0x0100458e: 2001 . MOVS r0,#1 + 0x01004590: 4770 pG BX lr + 0x01004592: 2000 . MOVS r0,#0 + 0x01004594: e7fc .. B 0x1004590 ; rt_list_isempty + 10 + i.rt_list_len + rt_list_len + 0x01004596: 4601 .F MOV r1,r0 + 0x01004598: 2000 . MOVS r0,#0 + 0x0100459a: 460a .F MOV r2,r1 + 0x0100459c: e001 .. B 0x10045a2 ; rt_list_len + 12 + 0x0100459e: 6812 .h LDR r2,[r2,#0] + 0x010045a0: 1c40 @. ADDS r0,r0,#1 + 0x010045a2: 6813 .h LDR r3,[r2,#0] + 0x010045a4: 428b .B CMP r3,r1 + 0x010045a6: d1fa .. BNE 0x100459e ; rt_list_len + 8 + 0x010045a8: 4770 pG BX lr + i.rt_list_remove + rt_list_remove + 0x010045aa: 6802 .h LDR r2,[r0,#0] + 0x010045ac: 6841 Ah LDR r1,[r0,#4] + 0x010045ae: 6051 Q` STR r1,[r2,#4] + 0x010045b0: 6842 Bh LDR r2,[r0,#4] + 0x010045b2: 6801 .h LDR r1,[r0,#0] + 0x010045b4: 6011 .` STR r1,[r2,#0] + 0x010045b6: 6040 @` STR r0,[r0,#4] + 0x010045b8: 6000 .` STR r0,[r0,#0] + 0x010045ba: 4770 pG BX lr + i.rt_list_remove + rt_list_remove + 0x010045bc: 6802 .h LDR r2,[r0,#0] + 0x010045be: 6841 Ah LDR r1,[r0,#4] + 0x010045c0: 6051 Q` STR r1,[r2,#4] + 0x010045c2: 6842 Bh LDR r2,[r0,#4] + 0x010045c4: 6801 .h LDR r1,[r0,#0] + 0x010045c6: 6011 .` STR r1,[r2,#0] + 0x010045c8: 6040 @` STR r0,[r0,#4] + 0x010045ca: 6000 .` STR r0,[r0,#0] + 0x010045cc: 4770 pG BX lr + i.rt_list_remove + rt_list_remove + 0x010045ce: 6802 .h LDR r2,[r0,#0] + 0x010045d0: 6841 Ah LDR r1,[r0,#4] + 0x010045d2: 6051 Q` STR r1,[r2,#4] + 0x010045d4: 6842 Bh LDR r2,[r0,#4] + 0x010045d6: 6801 .h LDR r1,[r0,#0] + 0x010045d8: 6011 .` STR r1,[r2,#0] + 0x010045da: 6040 @` STR r0,[r0,#4] + 0x010045dc: 6000 .` STR r0,[r0,#0] + 0x010045de: 4770 pG BX lr + i.rt_malloc + rt_malloc + 0x010045e0: b5fe .. PUSH {r1-r7,lr} + 0x010045e2: 4605 .F MOV r5,r0 + 0x010045e4: 2d00 .- CMP r5,#0 + 0x010045e6: d100 .. BNE 0x10045ea ; rt_malloc + 10 + 0x010045e8: bdfe .. POP {r1-r7,pc} + 0x010045ea: bf00 .. NOP + 0x010045ec: f7fbff68 ..h. BL rt_hw_interrupt_disable ; 0x10004c0 + 0x010045f0: 9000 .. STR r0,[sp,#0] + 0x010045f2: f7ffff43 ..C. BL rt_interrupt_get_nest ; 0x100447c + 0x010045f6: 2800 .( CMP r0,#0 + 0x010045f8: d009 .. BEQ 0x100460e ; rt_malloc + 46 + 0x010045fa: 497e ~I LDR r1,[pc,#504] ; [0x10047f4] = 0x1007c0e + 0x010045fc: a07e ~. ADR r0,{pc}+0x1fc ; 0x10047f8 + 0x010045fe: f7ffff67 ..g. BL rt_kprintf ; 0x10044d0 + 0x01004602: 22ff ." MOVS r2,#0xff + 0x01004604: 3219 .2 ADDS r2,r2,#0x19 + 0x01004606: 497b {I LDR r1,[pc,#492] ; [0x10047f4] = 0x1007c0e + 0x01004608: a085 .. ADR r0,{pc}+0x218 ; 0x1004820 + 0x0100460a: f7fefff9 .... BL rt_assert_handler ; 0x1003600 + 0x0100460e: 9800 .. LDR r0,[sp,#0] + 0x01004610: f7fbff5a ..Z. BL rt_hw_interrupt_enable ; 0x10004c8 + 0x01004614: bf00 .. NOP + 0x01004616: 1ce8 .. ADDS r0,r5,#3 + 0x01004618: 0880 .. LSRS r0,r0,#2 + 0x0100461a: 0080 .. LSLS r0,r0,#2 + 0x0100461c: 42a8 .B CMP r0,r5 + 0x0100461e: d001 .. BEQ 0x1004624 ; rt_malloc + 68 + 0x01004620: bf00 .. NOP + 0x01004622: e001 .. B 0x1004628 ; rt_malloc + 72 + 0x01004624: bf00 .. NOP + 0x01004626: bf00 .. NOP + 0x01004628: 1ce8 .. ADDS r0,r5,#3 + 0x0100462a: 0885 .. LSRS r5,r0,#2 + 0x0100462c: 00ad .. LSLS r5,r5,#2 + 0x0100462e: 487d }H LDR r0,[pc,#500] ; [0x1004824] = 0x20148 + 0x01004630: 6800 .h LDR r0,[r0,#0] + 0x01004632: 4285 .B CMP r5,r0 + 0x01004634: d903 .. BLS 0x100463e ; rt_malloc + 94 + 0x01004636: bf00 .. NOP + 0x01004638: bf00 .. NOP + 0x0100463a: 2000 . MOVS r0,#0 + 0x0100463c: e7d4 .. B 0x10045e8 ; rt_malloc + 8 + 0x0100463e: 2d0c .- CMP r5,#0xc + 0x01004640: d200 .. BCS 0x1004644 ; rt_malloc + 100 + 0x01004642: 250c .% MOVS r5,#0xc + 0x01004644: 2100 .! MOVS r1,#0 + 0x01004646: 43c9 .C MVNS r1,r1 + 0x01004648: 4877 wH LDR r0,[pc,#476] ; [0x1004828] = 0x20584 + 0x0100464a: f000fec9 .... BL rt_sem_take ; 0x10053e0 + 0x0100464e: 4877 wH LDR r0,[pc,#476] ; [0x100482c] = 0x20144 + 0x01004650: 6800 .h LDR r0,[r0,#0] + 0x01004652: 4977 wI LDR r1,[pc,#476] ; [0x1004830] = 0x2013c + 0x01004654: 6809 .h LDR r1,[r1,#0] + 0x01004656: 1a46 F. SUBS r6,r0,r1 + 0x01004658: e0c0 .. B 0x10047dc ; rt_malloc + 508 + 0x0100465a: 4875 uH LDR r0,[pc,#468] ; [0x1004830] = 0x2013c + 0x0100465c: 6800 .h LDR r0,[r0,#0] + 0x0100465e: 1984 .. ADDS r4,r0,r6 + 0x01004660: 8860 `. LDRH r0,[r4,#2] + 0x01004662: 2800 .( CMP r0,#0 + 0x01004664: d17d }. BNE 0x1004762 ; rt_malloc + 386 + 0x01004666: 4630 0F MOV r0,r6 + 0x01004668: 300c .0 ADDS r0,r0,#0xc + 0x0100466a: 6861 ah LDR r1,[r4,#4] + 0x0100466c: 1a08 .. SUBS r0,r1,r0 + 0x0100466e: 42a8 .B CMP r0,r5 + 0x01004670: d377 w. BCC 0x1004762 ; rt_malloc + 386 + 0x01004672: 4630 0F MOV r0,r6 + 0x01004674: 300c .0 ADDS r0,r0,#0xc + 0x01004676: 6861 ah LDR r1,[r4,#4] + 0x01004678: 1a09 .. SUBS r1,r1,r0 + 0x0100467a: 4628 (F MOV r0,r5 + 0x0100467c: 3018 .0 ADDS r0,r0,#0x18 + 0x0100467e: 4281 .B CMP r1,r0 + 0x01004680: d330 0. BCC 0x10046e4 ; rt_malloc + 260 + 0x01004682: 4630 0F MOV r0,r6 + 0x01004684: 300c .0 ADDS r0,r0,#0xc + 0x01004686: 1940 @. ADDS r0,r0,r5 + 0x01004688: 9001 .. STR r0,[sp,#4] + 0x0100468a: 4869 iH LDR r0,[pc,#420] ; [0x1004830] = 0x2013c + 0x0100468c: 6801 .h LDR r1,[r0,#0] + 0x0100468e: 9801 .. LDR r0,[sp,#4] + 0x01004690: 180f .. ADDS r7,r1,r0 + 0x01004692: 20f5 . MOVS r0,#0xf5 + 0x01004694: 0140 @. LSLS r0,r0,#5 + 0x01004696: 8038 8. STRH r0,[r7,#0] + 0x01004698: 2000 . MOVS r0,#0 + 0x0100469a: 8078 x. STRH r0,[r7,#2] + 0x0100469c: 6860 `h LDR r0,[r4,#4] + 0x0100469e: 6078 x` STR r0,[r7,#4] + 0x010046a0: 60be .` STR r6,[r7,#8] + 0x010046a2: 9801 .. LDR r0,[sp,#4] + 0x010046a4: 6060 `` STR r0,[r4,#4] + 0x010046a6: 2001 . MOVS r0,#1 + 0x010046a8: 8060 `. STRH r0,[r4,#2] + 0x010046aa: 485e ^H LDR r0,[pc,#376] ; [0x1004824] = 0x20148 + 0x010046ac: 6879 yh LDR r1,[r7,#4] + 0x010046ae: 6800 .h LDR r0,[r0,#0] + 0x010046b0: 300c .0 ADDS r0,r0,#0xc + 0x010046b2: 4281 .B CMP r1,r0 + 0x010046b4: d005 .. BEQ 0x10046c2 ; rt_malloc + 226 + 0x010046b6: 9801 .. LDR r0,[sp,#4] + 0x010046b8: 4a5d ]J LDR r2,[pc,#372] ; [0x1004830] = 0x2013c + 0x010046ba: 6879 yh LDR r1,[r7,#4] + 0x010046bc: 6812 .h LDR r2,[r2,#0] + 0x010046be: 1889 .. ADDS r1,r1,r2 + 0x010046c0: 6088 .` STR r0,[r1,#8] + 0x010046c2: 485c \H LDR r0,[pc,#368] ; [0x1004834] = 0x2014c + 0x010046c4: 6801 .h LDR r1,[r0,#0] + 0x010046c6: 4628 (F MOV r0,r5 + 0x010046c8: 300c .0 ADDS r0,r0,#0xc + 0x010046ca: 1808 .. ADDS r0,r1,r0 + 0x010046cc: 4959 YI LDR r1,[pc,#356] ; [0x1004834] = 0x2014c + 0x010046ce: 6008 .` STR r0,[r1,#0] + 0x010046d0: 4859 YH LDR r0,[pc,#356] ; [0x1004838] = 0x20150 + 0x010046d2: 6800 .h LDR r0,[r0,#0] + 0x010046d4: 6809 .h LDR r1,[r1,#0] + 0x010046d6: 4288 .B CMP r0,r1 + 0x010046d8: d219 .. BCS 0x100470e ; rt_malloc + 302 + 0x010046da: 4856 VH LDR r0,[pc,#344] ; [0x1004834] = 0x2014c + 0x010046dc: 6800 .h LDR r0,[r0,#0] + 0x010046de: 4956 VI LDR r1,[pc,#344] ; [0x1004838] = 0x20150 + 0x010046e0: 6008 .` STR r0,[r1,#0] + 0x010046e2: e014 .. B 0x100470e ; rt_malloc + 302 + 0x010046e4: 2001 . MOVS r0,#1 + 0x010046e6: 8060 `. STRH r0,[r4,#2] + 0x010046e8: 4951 QI LDR r1,[pc,#324] ; [0x1004830] = 0x2013c + 0x010046ea: 6860 `h LDR r0,[r4,#4] + 0x010046ec: 6809 .h LDR r1,[r1,#0] + 0x010046ee: 1a61 a. SUBS r1,r4,r1 + 0x010046f0: 1a40 @. SUBS r0,r0,r1 + 0x010046f2: 4950 PI LDR r1,[pc,#320] ; [0x1004834] = 0x2014c + 0x010046f4: 6809 .h LDR r1,[r1,#0] + 0x010046f6: 1840 @. ADDS r0,r0,r1 + 0x010046f8: 494e NI LDR r1,[pc,#312] ; [0x1004834] = 0x2014c + 0x010046fa: 6008 .` STR r0,[r1,#0] + 0x010046fc: 484e NH LDR r0,[pc,#312] ; [0x1004838] = 0x20150 + 0x010046fe: 6800 .h LDR r0,[r0,#0] + 0x01004700: 6809 .h LDR r1,[r1,#0] + 0x01004702: 4288 .B CMP r0,r1 + 0x01004704: d203 .. BCS 0x100470e ; rt_malloc + 302 + 0x01004706: 484b KH LDR r0,[pc,#300] ; [0x1004834] = 0x2014c + 0x01004708: 6800 .h LDR r0,[r0,#0] + 0x0100470a: 494b KI LDR r1,[pc,#300] ; [0x1004838] = 0x20150 + 0x0100470c: 6008 .` STR r0,[r1,#0] + 0x0100470e: 20f5 . MOVS r0,#0xf5 + 0x01004710: 0140 @. LSLS r0,r0,#5 + 0x01004712: 8020 . STRH r0,[r4,#0] + 0x01004714: 4845 EH LDR r0,[pc,#276] ; [0x100482c] = 0x20144 + 0x01004716: 6800 .h LDR r0,[r0,#0] + 0x01004718: 4284 .B CMP r4,r0 + 0x0100471a: d126 &. BNE 0x100476a ; rt_malloc + 394 + 0x0100471c: e007 .. B 0x100472e ; rt_malloc + 334 + 0x0100471e: 4843 CH LDR r0,[pc,#268] ; [0x100482c] = 0x20144 + 0x01004720: 6800 .h LDR r0,[r0,#0] + 0x01004722: 6840 @h LDR r0,[r0,#4] + 0x01004724: 4942 BI LDR r1,[pc,#264] ; [0x1004830] = 0x2013c + 0x01004726: 6809 .h LDR r1,[r1,#0] + 0x01004728: 1840 @. ADDS r0,r0,r1 + 0x0100472a: 4940 @I LDR r1,[pc,#256] ; [0x100482c] = 0x20144 + 0x0100472c: 6008 .` STR r0,[r1,#0] + 0x0100472e: 483f ?H LDR r0,[pc,#252] ; [0x100482c] = 0x20144 + 0x01004730: 6800 .h LDR r0,[r0,#0] + 0x01004732: 8840 @. LDRH r0,[r0,#2] + 0x01004734: 2800 .( CMP r0,#0 + 0x01004736: d005 .. BEQ 0x1004744 ; rt_malloc + 356 + 0x01004738: 483c use DCD 1702065470 + 0x01004864: 00292964 d)). DCD 2697572 + 0x01004868: 0100803c <... DCD 16810044 + 0x0100486c: 01007f94 .... DCD 16809876 + 0x01004870: 72282828 (((r DCD 1915234344 + 0x01004874: 62755f74 t_ub DCD 1651859316 + 0x01004878: 5f657361 ase_ DCD 1600484193 + 0x0100487c: 656d2974 t)me DCD 1701652852 + 0x01004880: 2620296d m) & DCD 639641965 + 0x01004884: 54522820 (RT DCD 1414670368 + 0x01004888: 494c415f _ALI DCD 1229734239 + 0x0100488c: 535f4e47 GN_S DCD 1398754887 + 0x01004890: 20455a49 IZE DCD 541416009 + 0x01004894: 2931202d - 1) DCD 691085357 + 0x01004898: 3d3d2029 ) == DCD 1027416105 + 0x0100489c: 00003020 0.. DCD 12320 + 0x010048a0: 00020134 4... DCD 131380 + $t + i.rt_memcpy + rt_memcpy + 0x010048a4: b5f7 .. PUSH {r0-r2,r4-r7,lr} + 0x010048a6: 4616 .F MOV r6,r2 + 0x010048a8: 9c00 .. LDR r4,[sp,#0] + 0x010048aa: 9d01 .. LDR r5,[sp,#4] + 0x010048ac: 4633 3F MOV r3,r6 + 0x010048ae: 2b10 .+ CMP r3,#0x10 + 0x010048b0: d31c .. BCC 0x10048ec ; rt_memcpy + 72 + 0x010048b2: 07a8 .. LSLS r0,r5,#30 + 0x010048b4: 0f80 .. LSRS r0,r0,#30 + 0x010048b6: 07a7 .. LSLS r7,r4,#30 + 0x010048b8: 0fbf .. LSRS r7,r7,#30 + 0x010048ba: 4338 8C ORRS r0,r0,r7 + 0x010048bc: 2800 .( CMP r0,#0 + 0x010048be: d115 .. BNE 0x10048ec ; rt_memcpy + 72 + 0x010048c0: 4621 !F MOV r1,r4 + 0x010048c2: 462a *F MOV r2,r5 + 0x010048c4: e008 .. B 0x10048d8 ; rt_memcpy + 52 + 0x010048c6: ca01 .. LDM r2!,{r0} + 0x010048c8: c101 .. STM r1!,{r0} + 0x010048ca: ca01 .. LDM r2!,{r0} + 0x010048cc: c101 .. STM r1!,{r0} + 0x010048ce: ca01 .. LDM r2!,{r0} + 0x010048d0: c101 .. STM r1!,{r0} + 0x010048d2: ca01 .. LDM r2!,{r0} + 0x010048d4: c101 .. STM r1!,{r0} + 0x010048d6: 3b10 .; SUBS r3,r3,#0x10 + 0x010048d8: 2b10 .+ CMP r3,#0x10 + 0x010048da: d2f4 .. BCS 0x10048c6 ; rt_memcpy + 34 + 0x010048dc: e002 .. B 0x10048e4 ; rt_memcpy + 64 + 0x010048de: ca01 .. LDM r2!,{r0} + 0x010048e0: c101 .. STM r1!,{r0} + 0x010048e2: 1f1b .. SUBS r3,r3,#4 + 0x010048e4: 2b04 .+ CMP r3,#4 + 0x010048e6: d2fa .. BCS 0x10048de ; rt_memcpy + 58 + 0x010048e8: 460c .F MOV r4,r1 + 0x010048ea: 4615 .F MOV r5,r2 + 0x010048ec: e003 .. B 0x10048f6 ; rt_memcpy + 82 + 0x010048ee: 7828 (x LDRB r0,[r5,#0] + 0x010048f0: 7020 p STRB r0,[r4,#0] + 0x010048f2: 1c6d m. ADDS r5,r5,#1 + 0x010048f4: 1c64 d. ADDS r4,r4,#1 + 0x010048f6: 4618 .F MOV r0,r3 + 0x010048f8: 1e5b [. SUBS r3,r3,#1 + 0x010048fa: 2800 .( CMP r0,#0 + 0x010048fc: d1f7 .. BNE 0x10048ee ; rt_memcpy + 74 + 0x010048fe: 9800 .. LDR r0,[sp,#0] + 0x01004900: bdfe .. POP {r1-r7,pc} + 0x01004902: 0000 .. MOVS r0,r0 + i.rt_memheap_dump + rt_memheap_dump + 0x01004904: b5f8 .. PUSH {r3-r7,lr} + 0x01004906: 4605 .F MOV r5,r0 + 0x01004908: 2d00 .- CMP r5,#0 + 0x0100490a: d100 .. BNE 0x100490e ; rt_memheap_dump + 10 + 0x0100490c: bdf8 .. POP {r3-r7,pc} + 0x0100490e: 4628 (F MOV r0,r5 + 0x01004910: f000faac .... BL rt_object_get_type ; 0x1004e6c + 0x01004914: 2807 .( CMP r0,#7 + 0x01004916: d004 .. BEQ 0x1004922 ; rt_memheap_dump + 30 + 0x01004918: 4a2a *J LDR r2,[pc,#168] ; [0x10049c4] = 0x2b1 + 0x0100491a: 492b +I LDR r1,[pc,#172] ; [0x10049c8] = 0x1007b22 + 0x0100491c: a02b +. ADR r0,{pc}+0xb0 ; 0x10049cc + 0x0100491e: f7fefe6f ..o. BL rt_assert_handler ; 0x1003600 + 0x01004922: 69a9 .i LDR r1,[r5,#0x18] + 0x01004924: 6968 hi LDR r0,[r5,#0x14] + 0x01004926: 1840 @. ADDS r0,r0,r1 + 0x01004928: 9000 .. STR r0,[sp,#0] + 0x0100492a: 462a *F MOV r2,r5 + 0x0100492c: 2108 .! MOVS r1,#8 + 0x0100492e: a037 7. ADR r0,{pc}+0xde ; 0x1004a0c + 0x01004930: 696b ki LDR r3,[r5,#0x14] + 0x01004932: f7fffdcd .... BL rt_kprintf ; 0x10044d0 + 0x01004936: a03d =. ADR r0,{pc}+0xf6 ; 0x1004a2c + 0x01004938: f7fffdca .... BL rt_kprintf ; 0x10044d0 + 0x0100493c: 2100 .! MOVS r1,#0 + 0x0100493e: 43c9 .C MVNS r1,r1 + 0x01004940: 4628 (F MOV r0,r5 + 0x01004942: 3044 D0 ADDS r0,r0,#0x44 + 0x01004944: f000fd4c ..L. BL rt_sem_take ; 0x10053e0 + 0x01004948: 6a6c lj LDR r4,[r5,#0x24] + 0x0100494a: 69a9 .i LDR r1,[r5,#0x18] + 0x0100494c: 6968 hi LDR r0,[r5,#0x14] + 0x0100494e: 1840 @. ADDS r0,r0,r1 + 0x01004950: 4606 .F MOV r6,r0 + 0x01004952: 3e18 .> SUBS r6,r6,#0x18 + 0x01004954: e02e .. B 0x10049b4 ; rt_memheap_dump + 176 + 0x01004956: 7820 x LDRB r0,[r4,#0] + 0x01004958: 07c0 .. LSLS r0,r0,#31 + 0x0100495a: 0fc0 .. LSRS r0,r0,#31 + 0x0100495c: 2800 .( CMP r0,#0 + 0x0100495e: d00a .. BEQ 0x1004976 ; rt_memheap_dump + 114 + 0x01004960: 6820 h LDR r0,[r4,#0] + 0x01004962: 0840 @. LSRS r0,r0,#1 + 0x01004964: 0040 @. LSLS r0,r0,#1 + 0x01004966: 4939 9I LDR r1,[pc,#228] ; [0x1004a4c] = 0x1ea01ea0 + 0x01004968: 4288 .B CMP r0,r1 + 0x0100496a: d004 .. BEQ 0x1004976 ; rt_memheap_dump + 114 + 0x0100496c: 4621 !F MOV r1,r4 + 0x0100496e: 3118 .1 ADDS r1,r1,#0x18 + 0x01004970: a037 7. ADR r0,{pc}+0xe0 ; 0x1004a50 + 0x01004972: f7fffdad .... BL rt_kprintf ; 0x10044d0 + 0x01004976: 4935 5I LDR r1,[pc,#212] ; [0x1004a4c] = 0x1ea01ea0 + 0x01004978: 1c49 I. ADDS r1,r1,#1 + 0x0100497a: 6820 h LDR r0,[r4,#0] + 0x0100497c: 4288 .B CMP r0,r1 + 0x0100497e: d10f .. BNE 0x10049a0 ; rt_memheap_dump + 156 + 0x01004980: 68a0 .h LDR r0,[r4,#8] + 0x01004982: 1b00 .. SUBS r0,r0,r4 + 0x01004984: 4602 .F MOV r2,r0 + 0x01004986: 3a18 .: SUBS r2,r2,#0x18 + 0x01004988: 4621 !F MOV r1,r4 + 0x0100498a: 3118 .1 ADDS r1,r1,#0x18 + 0x0100498c: a032 2. ADR r0,{pc}+0xcc ; 0x1004a58 + 0x0100498e: f7fffd9f .... BL rt_kprintf ; 0x10044d0 + 0x01004992: 4620 F MOV r0,r4 + 0x01004994: f7fcfbac .... BL _memheap_dump_tag ; 0x10010f0 + 0x01004998: a033 3. ADR r0,{pc}+0xd0 ; 0x1004a68 + 0x0100499a: f7fffd99 .... BL rt_kprintf ; 0x10044d0 + 0x0100499e: e008 .. B 0x10049b2 ; rt_memheap_dump + 174 + 0x010049a0: 68a0 .h LDR r0,[r4,#8] + 0x010049a2: 1b00 .. SUBS r0,r0,r4 + 0x010049a4: 4602 .F MOV r2,r0 + 0x010049a6: 3a18 .: SUBS r2,r2,#0x18 + 0x010049a8: 4621 !F MOV r1,r4 + 0x010049aa: 3118 .1 ADDS r1,r1,#0x18 + 0x010049ac: a02f /. ADR r0,{pc}+0xc0 ; 0x1004a6c + 0x010049ae: f7fffd8f .... BL rt_kprintf ; 0x10044d0 + 0x010049b2: 68a4 .h LDR r4,[r4,#8] + 0x010049b4: 42b4 .B CMP r4,r6 + 0x010049b6: d3ce .. BCC 0x1004956 ; rt_memheap_dump + 82 + 0x010049b8: 4628 (F MOV r0,r5 + 0x010049ba: 3044 D0 ADDS r0,r0,#0x44 + 0x010049bc: f000fcb6 .... BL rt_sem_release ; 0x100532c + 0x010049c0: 2000 . MOVS r0,#0 + 0x010049c2: e7a3 .. B 0x100490c ; rt_memheap_dump + 8 + $d + 0x010049c4: 000002b1 .... DCD 689 + 0x010049c8: 01007b22 "{.. DCD 16808738 + 0x010049cc: 6f5f7472 rt_o DCD 1868526706 + 0x010049d0: 63656a62 bjec DCD 1667590754 + 0x010049d4: 65675f74 t_ge DCD 1701273460 + 0x010049d8: 79745f74 t_ty DCD 2037669748 + 0x010049dc: 26286570 pe(& DCD 640181616 + 0x010049e0: 70616568 heap DCD 1885431144 + 0x010049e4: 61703e2d ->pa DCD 1634745901 + 0x010049e8: 746e6572 rent DCD 1953391986 + 0x010049ec: 3d3d2029 ) == DCD 1027416105 + 0x010049f0: 5f545220 RT_ DCD 1599361568 + 0x010049f4: 656a624f Obje DCD 1701470799 + 0x010049f8: 435f7463 ct_C DCD 1130329187 + 0x010049fc: 7373616c lass DCD 1936941420 + 0x01004a00: 6d654d5f _Mem DCD 1835355487 + 0x01004a04: 70616548 Heap DCD 1885431112 + 0x01004a08: 00000000 .... DCD 0 + 0x01004a0c: 2e255b0a .[%. DCD 774200074 + 0x01004a10: 205d732a *s] DCD 542995242 + 0x01004a14: 2578305b [0x% DCD 628633691 + 0x01004a18: 20783830 08x DCD 544749616 + 0x01004a1c: 7830202d - 0x DCD 2016419885 + 0x01004a20: 78383025 %08x DCD 2016948261 + 0x01004a24: 0a3e2d5d ]->. DCD 171847005 + 0x01004a28: 00000000 .... DCD 0 + 0x01004a2c: 2d2d2d2d ---- DCD 757935405 + 0x01004a30: 2d2d2d2d ---- DCD 757935405 + 0x01004a34: 2d2d2d2d ---- DCD 757935405 + 0x01004a38: 2d2d2d2d ---- DCD 757935405 + 0x01004a3c: 2d2d2d2d ---- DCD 757935405 + 0x01004a40: 2d2d2d2d ---- DCD 757935405 + 0x01004a44: 2d2d2d2d ---- DCD 757935405 + 0x01004a48: 000a2d2d --.. DCD 666925 + 0x01004a4c: 1ea01ea0 .... DCD 513810080 + 0x01004a50: 30257830 0x%0 DCD 807761968 + 0x01004a54: 00007838 8x.. DCD 30776 + 0x01004a58: 30257830 0x%0 DCD 807761968 + 0x01004a5c: 203a7838 8x: DCD 540702776 + 0x01004a60: 64382d25 %-8d DCD 1681403173 + 0x01004a64: 00000020 ... DCD 32 + 0x01004a68: 0000000a .... DCD 10 + 0x01004a6c: 30257830 0x%0 DCD 807761968 + 0x01004a70: 203a7838 8x: DCD 540702776 + 0x01004a74: 64382d25 %-8d DCD 1681403173 + 0x01004a78: 3e463c20 DCD 1044790304 + 0x01004a7c: 0000000a .... DCD 10 + $t + i.rt_memmove + rt_memmove + 0x01004a80: b570 p. PUSH {r4-r6,lr} + 0x01004a82: 460c .F MOV r4,r1 + 0x01004a84: 4601 .F MOV r1,r0 + 0x01004a86: 4623 #F MOV r3,r4 + 0x01004a88: 428b .B CMP r3,r1 + 0x01004a8a: d210 .. BCS 0x1004aae ; rt_memmove + 46 + 0x01004a8c: 189d .. ADDS r5,r3,r2 + 0x01004a8e: 428d .B CMP r5,r1 + 0x01004a90: d90d .. BLS 0x1004aae ; rt_memmove + 46 + 0x01004a92: 1889 .. ADDS r1,r1,r2 + 0x01004a94: 189b .. ADDS r3,r3,r2 + 0x01004a96: e005 .. B 0x1004aa4 ; rt_memmove + 36 + 0x01004a98: 1e5d ]. SUBS r5,r3,#1 + 0x01004a9a: 462b +F MOV r3,r5 + 0x01004a9c: 782e .x LDRB r6,[r5,#0] + 0x01004a9e: 1e4d M. SUBS r5,r1,#1 + 0x01004aa0: 4629 )F MOV r1,r5 + 0x01004aa2: 702e .p STRB r6,[r5,#0] + 0x01004aa4: 4615 .F MOV r5,r2 + 0x01004aa6: 1e52 R. SUBS r2,r2,#1 + 0x01004aa8: 2d00 .- CMP r5,#0 + 0x01004aaa: d1f5 .. BNE 0x1004a98 ; rt_memmove + 24 + 0x01004aac: e008 .. B 0x1004ac0 ; rt_memmove + 64 + 0x01004aae: e003 .. B 0x1004ab8 ; rt_memmove + 56 + 0x01004ab0: 781d .x LDRB r5,[r3,#0] + 0x01004ab2: 700d .p STRB r5,[r1,#0] + 0x01004ab4: 1c5b [. ADDS r3,r3,#1 + 0x01004ab6: 1c49 I. ADDS r1,r1,#1 + 0x01004ab8: 4615 .F MOV r5,r2 + 0x01004aba: 1e52 R. SUBS r2,r2,#1 + 0x01004abc: 2d00 .- CMP r5,#0 + 0x01004abe: d1f7 .. BNE 0x1004ab0 ; rt_memmove + 48 + 0x01004ac0: bd70 p. POP {r4-r6,pc} + i.rt_memset + rt_memset + 0x01004ac2: b5f7 .. PUSH {r0-r2,r4-r7,lr} + 0x01004ac4: 4605 .F MOV r5,r0 + 0x01004ac6: 9e01 .. LDR r6,[sp,#4] + 0x01004ac8: b2f4 .. UXTB r4,r6 + 0x01004aca: 2a04 .* CMP r2,#4 + 0x01004acc: d317 .. BCC 0x1004afe ; rt_memset + 60 + 0x01004ace: 0786 .. LSLS r6,r0,#30 + 0x01004ad0: 0fb6 .. LSRS r6,r6,#30 + 0x01004ad2: 2e00 .. CMP r6,#0 + 0x01004ad4: d113 .. BNE 0x1004afe ; rt_memset + 60 + 0x01004ad6: 4601 .F MOV r1,r0 + 0x01004ad8: 0226 &. LSLS r6,r4,#8 + 0x01004ada: 4326 &C ORRS r6,r6,r4 + 0x01004adc: 4633 3F MOV r3,r6 + 0x01004ade: 041e .. LSLS r6,r3,#16 + 0x01004ae0: 4333 3C ORRS r3,r3,r6 + 0x01004ae2: e004 .. B 0x1004aee ; rt_memset + 44 + 0x01004ae4: c108 .. STM r1!,{r3} + 0x01004ae6: c108 .. STM r1!,{r3} + 0x01004ae8: c108 .. STM r1!,{r3} + 0x01004aea: c108 .. STM r1!,{r3} + 0x01004aec: 3a10 .: SUBS r2,r2,#0x10 + 0x01004aee: 2a10 .* CMP r2,#0x10 + 0x01004af0: d2f8 .. BCS 0x1004ae4 ; rt_memset + 34 + 0x01004af2: e001 .. B 0x1004af8 ; rt_memset + 54 + 0x01004af4: c108 .. STM r1!,{r3} + 0x01004af6: 1f12 .. SUBS r2,r2,#4 + 0x01004af8: 2a04 .* CMP r2,#4 + 0x01004afa: d2fb .. BCS 0x1004af4 ; rt_memset + 50 + 0x01004afc: 460d .F MOV r5,r1 + 0x01004afe: e001 .. B 0x1004b04 ; rt_memset + 66 + 0x01004b00: 702c ,p STRB r4,[r5,#0] + 0x01004b02: 1c6d m. ADDS r5,r5,#1 + 0x01004b04: 4616 .F MOV r6,r2 + 0x01004b06: 1e52 R. SUBS r2,r2,#1 + 0x01004b08: 2e00 .. CMP r6,#0 + 0x01004b0a: d1f9 .. BNE 0x1004b00 ; rt_memset + 62 + 0x01004b0c: bdfe .. POP {r1-r7,pc} + 0x01004b0e: 0000 .. MOVS r0,r0 + i.rt_object_allocate + rt_object_allocate + 0x01004b10: b5fe .. PUSH {r1-r7,lr} + 0x01004b12: 4606 .F MOV r6,r0 + 0x01004b14: 460f .F MOV r7,r1 + 0x01004b16: bf00 .. NOP + 0x01004b18: f7fbfcd2 .... BL rt_hw_interrupt_disable ; 0x10004c0 + 0x01004b1c: 9000 .. STR r0,[sp,#0] + 0x01004b1e: f7fffcad .... BL rt_interrupt_get_nest ; 0x100447c + 0x01004b22: 2800 .( CMP r0,#0 + 0x01004b24: d009 .. BEQ 0x1004b3a ; rt_object_allocate + 42 + 0x01004b26: 4922 "I LDR r1,[pc,#136] ; [0x1004bb0] = 0x1007a6c + 0x01004b28: a022 ". ADR r0,{pc}+0x8c ; 0x1004bb4 + 0x01004b2a: f7fffcd1 .... BL rt_kprintf ; 0x10044d0 + 0x01004b2e: 22ff ." MOVS r2,#0xff + 0x01004b30: 329a .2 ADDS r2,r2,#0x9a + 0x01004b32: 491f .I LDR r1,[pc,#124] ; [0x1004bb0] = 0x1007a6c + 0x01004b34: a029 ). ADR r0,{pc}+0xa8 ; 0x1004bdc + 0x01004b36: f7fefd63 ..c. BL rt_assert_handler ; 0x1003600 + 0x01004b3a: 9800 .. LDR r0,[sp,#0] + 0x01004b3c: f7fbfcc4 .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x01004b40: bf00 .. NOP + 0x01004b42: 4630 0F MOV r0,r6 + 0x01004b44: f000f938 ..8. BL rt_object_get_information ; 0x1004db8 + 0x01004b48: 4605 .F MOV r5,r0 + 0x01004b4a: 2d00 .- CMP r5,#0 + 0x01004b4c: d105 .. BNE 0x1004b5a ; rt_object_allocate + 74 + 0x01004b4e: 22ff ." MOVS r2,#0xff + 0x01004b50: 329e .2 ADDS r2,r2,#0x9e + 0x01004b52: 4917 .I LDR r1,[pc,#92] ; [0x1004bb0] = 0x1007a6c + 0x01004b54: a022 ". ADR r0,{pc}+0x8c ; 0x1004be0 + 0x01004b56: f7fefd53 ..S. BL rt_assert_handler ; 0x1003600 + 0x01004b5a: 68e8 .h LDR r0,[r5,#0xc] + 0x01004b5c: f7fffd40 ..@. BL rt_malloc ; 0x10045e0 + 0x01004b60: 4604 .F MOV r4,r0 + 0x01004b62: 2c00 ., CMP r4,#0 + 0x01004b64: d100 .. BNE 0x1004b68 ; rt_object_allocate + 88 + 0x01004b66: bdfe .. POP {r1-r7,pc} + 0x01004b68: 2100 .! MOVS r1,#0 + 0x01004b6a: 4620 F MOV r0,r4 + 0x01004b6c: 68ea .h LDR r2,[r5,#0xc] + 0x01004b6e: f7ffffa8 .... BL rt_memset ; 0x1004ac2 + 0x01004b72: 7226 &r STRB r6,[r4,#8] + 0x01004b74: 2000 . MOVS r0,#0 + 0x01004b76: 7260 `r STRB r0,[r4,#9] + 0x01004b78: 2208 ." MOVS r2,#8 + 0x01004b7a: 4639 9F MOV r1,r7 + 0x01004b7c: 4620 F MOV r0,r4 + 0x01004b7e: f000ffdc .... BL rt_strncpy ; 0x1005b3a + 0x01004b82: bf00 .. NOP + 0x01004b84: 481c .H LDR r0,[pc,#112] ; [0x1004bf8] = 0x20108 + 0x01004b86: 6800 .h LDR r0,[r0,#0] + 0x01004b88: 2800 .( CMP r0,#0 + 0x01004b8a: d003 .. BEQ 0x1004b94 ; rt_object_allocate + 132 + 0x01004b8c: 4620 F MOV r0,r4 + 0x01004b8e: 491a .I LDR r1,[pc,#104] ; [0x1004bf8] = 0x20108 + 0x01004b90: 6809 .h LDR r1,[r1,#0] + 0x01004b92: 4788 .G BLX r1 + 0x01004b94: bf00 .. NOP + 0x01004b96: f7fbfc93 .... BL rt_hw_interrupt_disable ; 0x10004c0 + 0x01004b9a: 9001 .. STR r0,[sp,#4] + 0x01004b9c: 4621 !F MOV r1,r4 + 0x01004b9e: 310c .1 ADDS r1,r1,#0xc + 0x01004ba0: 1d28 (. ADDS r0,r5,#4 + 0x01004ba2: f7fffcca .... BL rt_list_insert_after ; 0x100453a + 0x01004ba6: 9801 .. LDR r0,[sp,#4] + 0x01004ba8: f7fbfc8e .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x01004bac: 4620 F MOV r0,r4 + 0x01004bae: e7da .. B 0x1004b66 ; rt_object_allocate + 86 + $d + 0x01004bb0: 01007a6c lz.. DCD 16808556 + 0x01004bb4: 636e7546 Func DCD 1668183366 + 0x01004bb8: 6e6f6974 tion DCD 1852795252 + 0x01004bbc: 5d73255b [%s] DCD 1567827291 + 0x01004bc0: 61687320 sha DCD 1634235168 + 0x01004bc4: 6e206c6c ll n DCD 1847618668 + 0x01004bc8: 6220746f ot b DCD 1646294127 + 0x01004bcc: 73752065 e us DCD 1937055845 + 0x01004bd0: 69206465 ed i DCD 1763730533 + 0x01004bd4: 5349206e n IS DCD 1397301358 + 0x01004bd8: 00000a52 R... DCD 2642 + 0x01004bdc: 00000030 0... DCD 48 + 0x01004be0: 6f666e69 info DCD 1868983913 + 0x01004be4: 74616d72 rmat DCD 1952542066 + 0x01004be8: 206e6f69 ion DCD 544108393 + 0x01004bec: 52203d21 != R DCD 1377844513 + 0x01004bf0: 554e5f54 T_NU DCD 1431199572 + 0x01004bf4: 00004c4c LL.. DCD 19532 + 0x01004bf8: 00020108 .... DCD 131336 + $t + i.rt_object_delete + rt_object_delete + 0x01004bfc: b570 p. PUSH {r4-r6,lr} + 0x01004bfe: 4604 .F MOV r4,r0 + 0x01004c00: 2c00 ., CMP r4,#0 + 0x01004c02: d105 .. BNE 0x1004c10 ; rt_object_delete + 20 + 0x01004c04: 22ff ." MOVS r2,#0xff + 0x01004c06: 32d8 .2 ADDS r2,r2,#0xd8 + 0x01004c08: 4914 .I LDR r1,[pc,#80] ; [0x1004c5c] = 0x1007a7f + 0x01004c0a: a015 .. ADR r0,{pc}+0x56 ; 0x1004c60 + 0x01004c0c: f7fefcf8 .... BL rt_assert_handler ; 0x1003600 + 0x01004c10: 7a20 z LDRB r0,[r4,#8] + 0x01004c12: 2180 .! MOVS r1,#0x80 + 0x01004c14: 4008 .@ ANDS r0,r0,r1 + 0x01004c16: 2800 .( CMP r0,#0 + 0x01004c18: d005 .. BEQ 0x1004c26 ; rt_object_delete + 42 + 0x01004c1a: 22ff ." MOVS r2,#0xff + 0x01004c1c: 32d9 .2 ADDS r2,r2,#0xd9 + 0x01004c1e: 490f .I LDR r1,[pc,#60] ; [0x1004c5c] = 0x1007a7f + 0x01004c20: a014 .. ADR r0,{pc}+0x54 ; 0x1004c74 + 0x01004c22: f7fefced .... BL rt_assert_handler ; 0x1003600 + 0x01004c26: bf00 .. NOP + 0x01004c28: 481d .H LDR r0,[pc,#116] ; [0x1004ca0] = 0x2010c + 0x01004c2a: 6800 .h LDR r0,[r0,#0] + 0x01004c2c: 2800 .( CMP r0,#0 + 0x01004c2e: d003 .. BEQ 0x1004c38 ; rt_object_delete + 60 + 0x01004c30: 4620 F MOV r0,r4 + 0x01004c32: 491b .I LDR r1,[pc,#108] ; [0x1004ca0] = 0x2010c + 0x01004c34: 6809 .h LDR r1,[r1,#0] + 0x01004c36: 4788 .G BLX r1 + 0x01004c38: bf00 .. NOP + 0x01004c3a: 2000 . MOVS r0,#0 + 0x01004c3c: 7220 r STRB r0,[r4,#8] + 0x01004c3e: f7fbfc3f ..?. BL rt_hw_interrupt_disable ; 0x10004c0 + 0x01004c42: 4605 .F MOV r5,r0 + 0x01004c44: 4620 F MOV r0,r4 + 0x01004c46: 300c .0 ADDS r0,r0,#0xc + 0x01004c48: f7fffcb8 .... BL rt_list_remove ; 0x10045bc + 0x01004c4c: 4628 (F MOV r0,r5 + 0x01004c4e: f7fbfc3b ..;. BL rt_hw_interrupt_enable ; 0x10004c8 + 0x01004c52: 4620 F MOV r0,r4 + 0x01004c54: f7fff93c ..<. BL rt_free ; 0x1003ed0 + 0x01004c58: bd70 p. POP {r4-r6,pc} + $d + 0x01004c5a: 0000 .. DCW 0 + 0x01004c5c: 01007a7f .z.. DCD 16808575 + 0x01004c60: 656a626f obje DCD 1701470831 + 0x01004c64: 21207463 ct ! DCD 555775075 + 0x01004c68: 5452203d = RT DCD 1414668349 + 0x01004c6c: 4c554e5f _NUL DCD 1280659039 + 0x01004c70: 0000004c L... DCD 76 + 0x01004c74: 626f2821 !(ob DCD 1651451937 + 0x01004c78: 7463656a ject DCD 1952671082 + 0x01004c7c: 79743e2d ->ty DCD 2037661229 + 0x01004c80: 26206570 pe & DCD 639657328 + 0x01004c84: 5f545220 RT_ DCD 1599361568 + 0x01004c88: 656a624f Obje DCD 1701470799 + 0x01004c8c: 435f7463 ct_C DCD 1130329187 + 0x01004c90: 7373616c lass DCD 1936941420 + 0x01004c94: 6174535f _Sta DCD 1635013471 + 0x01004c98: 29636974 tic) DCD 694380916 + 0x01004c9c: 00000000 .... DCD 0 + 0x01004ca0: 0002010c .... DCD 131340 + $t + i.rt_object_detach + rt_object_detach + 0x01004ca4: b570 p. PUSH {r4-r6,lr} + 0x01004ca6: 4604 .F MOV r4,r0 + 0x01004ca8: 2c00 ., CMP r4,#0 + 0x01004caa: d105 .. BNE 0x1004cb8 ; rt_object_detach + 20 + 0x01004cac: 22ff ." MOVS r2,#0xff + 0x01004cae: 3277 w2 ADDS r2,r2,#0x77 + 0x01004cb0: 490d .I LDR r1,[pc,#52] ; [0x1004ce8] = 0x1007a5b + 0x01004cb2: a00e .. ADR r0,{pc}+0x3a ; 0x1004cec + 0x01004cb4: f7fefca4 .... BL rt_assert_handler ; 0x1003600 + 0x01004cb8: bf00 .. NOP + 0x01004cba: 4811 .H LDR r0,[pc,#68] ; [0x1004d00] = 0x2010c + 0x01004cbc: 6800 .h LDR r0,[r0,#0] + 0x01004cbe: 2800 .( CMP r0,#0 + 0x01004cc0: d003 .. BEQ 0x1004cca ; rt_object_detach + 38 + 0x01004cc2: 4620 F MOV r0,r4 + 0x01004cc4: 490e .I LDR r1,[pc,#56] ; [0x1004d00] = 0x2010c + 0x01004cc6: 6809 .h LDR r1,[r1,#0] + 0x01004cc8: 4788 .G BLX r1 + 0x01004cca: bf00 .. NOP + 0x01004ccc: 2000 . MOVS r0,#0 + 0x01004cce: 7220 r STRB r0,[r4,#8] + 0x01004cd0: f7fbfbf6 .... BL rt_hw_interrupt_disable ; 0x10004c0 + 0x01004cd4: 4605 .F MOV r5,r0 + 0x01004cd6: 4620 F MOV r0,r4 + 0x01004cd8: 300c .0 ADDS r0,r0,#0xc + 0x01004cda: f7fffc6f ..o. BL rt_list_remove ; 0x10045bc + 0x01004cde: 4628 (F MOV r0,r5 + 0x01004ce0: f7fbfbf2 .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x01004ce4: bd70 p. POP {r4-r6,pc} + $d + 0x01004ce6: 0000 .. DCW 0 + 0x01004ce8: 01007a5b [z.. DCD 16808539 + 0x01004cec: 656a626f obje DCD 1701470831 + 0x01004cf0: 21207463 ct ! DCD 555775075 + 0x01004cf4: 5452203d = RT DCD 1414668349 + 0x01004cf8: 4c554e5f _NUL DCD 1280659039 + 0x01004cfc: 0000004c L... DCD 76 + 0x01004d00: 0002010c .... DCD 131340 + $t + i.rt_object_find + rt_object_find + 0x01004d04: b5fe .. PUSH {r1-r7,lr} + 0x01004d06: 4604 .F MOV r4,r0 + 0x01004d08: 460f .F MOV r7,r1 + 0x01004d0a: 2000 . MOVS r0,#0 + 0x01004d0c: 9001 .. STR r0,[sp,#4] + 0x01004d0e: 2500 .% MOVS r5,#0 + 0x01004d10: 2600 .& MOVS r6,#0 + 0x01004d12: 4638 8F MOV r0,r7 + 0x01004d14: f000f850 ..P. BL rt_object_get_information ; 0x1004db8 + 0x01004d18: 4606 .F MOV r6,r0 + 0x01004d1a: 2c00 ., CMP r4,#0 + 0x01004d1c: d001 .. BEQ 0x1004d22 ; rt_object_find + 30 + 0x01004d1e: 2e00 .. CMP r6,#0 + 0x01004d20: d101 .. BNE 0x1004d26 ; rt_object_find + 34 + 0x01004d22: 2000 . MOVS r0,#0 + 0x01004d24: bdfe .. POP {r1-r7,pc} + 0x01004d26: bf00 .. NOP + 0x01004d28: f7fbfbca .... BL rt_hw_interrupt_disable ; 0x10004c0 + 0x01004d2c: 9000 .. STR r0,[sp,#0] + 0x01004d2e: f7fffba5 .... BL rt_interrupt_get_nest ; 0x100447c + 0x01004d32: 2800 .( CMP r0,#0 + 0x01004d34: d008 .. BEQ 0x1004d48 ; rt_object_find + 68 + 0x01004d36: 4913 .I LDR r1,[pc,#76] ; [0x1004d84] = 0x1007abd + 0x01004d38: a013 .. ADR r0,{pc}+0x50 ; 0x1004d88 + 0x01004d3a: f7fffbc9 .... BL rt_kprintf ; 0x10044d0 + 0x01004d3e: 4a1c .J LDR r2,[pc,#112] ; [0x1004db0] = 0x229 + 0x01004d40: 4910 .I LDR r1,[pc,#64] ; [0x1004d84] = 0x1007abd + 0x01004d42: a01c .. ADR r0,{pc}+0x72 ; 0x1004db4 + 0x01004d44: f7fefc5c ..\. BL rt_assert_handler ; 0x1003600 + 0x01004d48: 9800 .. LDR r0,[sp,#0] + 0x01004d4a: f7fbfbbd .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x01004d4e: bf00 .. NOP + 0x01004d50: f7fff88a .... BL rt_enter_critical ; 0x1003e68 + 0x01004d54: 6875 uh LDR r5,[r6,#4] + 0x01004d56: e00e .. B 0x1004d76 ; rt_object_find + 114 + 0x01004d58: 4628 (F MOV r0,r5 + 0x01004d5a: 380c .8 SUBS r0,r0,#0xc + 0x01004d5c: 9001 .. STR r0,[sp,#4] + 0x01004d5e: 2208 ." MOVS r2,#8 + 0x01004d60: 4621 !F MOV r1,r4 + 0x01004d62: 9801 .. LDR r0,[sp,#4] + 0x01004d64: f000fed4 .... BL rt_strncmp ; 0x1005b10 + 0x01004d68: 2800 .( CMP r0,#0 + 0x01004d6a: d103 .. BNE 0x1004d74 ; rt_object_find + 112 + 0x01004d6c: f7fff88c .... BL rt_exit_critical ; 0x1003e88 + 0x01004d70: 9801 .. LDR r0,[sp,#4] + 0x01004d72: e7d7 .. B 0x1004d24 ; rt_object_find + 32 + 0x01004d74: 682d -h LDR r5,[r5,#0] + 0x01004d76: 1d30 0. ADDS r0,r6,#4 + 0x01004d78: 4285 .B CMP r5,r0 + 0x01004d7a: d1ed .. BNE 0x1004d58 ; rt_object_find + 84 + 0x01004d7c: f7fff884 .... BL rt_exit_critical ; 0x1003e88 + 0x01004d80: 2000 . MOVS r0,#0 + 0x01004d82: e7cf .. B 0x1004d24 ; rt_object_find + 32 + $d + 0x01004d84: 01007abd .z.. DCD 16808637 + 0x01004d88: 636e7546 Func DCD 1668183366 + 0x01004d8c: 6e6f6974 tion DCD 1852795252 + 0x01004d90: 5d73255b [%s] DCD 1567827291 + 0x01004d94: 61687320 sha DCD 1634235168 + 0x01004d98: 6e206c6c ll n DCD 1847618668 + 0x01004d9c: 6220746f ot b DCD 1646294127 + 0x01004da0: 73752065 e us DCD 1937055845 + 0x01004da4: 69206465 ed i DCD 1763730533 + 0x01004da8: 5349206e n IS DCD 1397301358 + 0x01004dac: 00000a52 R... DCD 2642 + 0x01004db0: 00000229 )... DCD 553 + 0x01004db4: 00000030 0... DCD 48 + $t + i.rt_object_get_information + rt_object_get_information + 0x01004db8: 4602 .F MOV r2,r0 + 0x01004dba: 2100 .! MOVS r1,#0 + 0x01004dbc: e008 .. B 0x1004dd0 ; rt_object_get_information + 24 + 0x01004dbe: 0108 .. LSLS r0,r1,#4 + 0x01004dc0: 4b05 .K LDR r3,[pc,#20] ; [0x1004dd8] = 0x20068 + 0x01004dc2: 5c18 .\ LDRB r0,[r3,r0] + 0x01004dc4: 4290 .B CMP r0,r2 + 0x01004dc6: d102 .. BNE 0x1004dce ; rt_object_get_information + 22 + 0x01004dc8: 0108 .. LSLS r0,r1,#4 + 0x01004dca: 18c0 .. ADDS r0,r0,r3 + 0x01004dcc: 4770 pG BX lr + 0x01004dce: 1c49 I. ADDS r1,r1,#1 + 0x01004dd0: 290a .) CMP r1,#0xa + 0x01004dd2: dbf4 .. BLT 0x1004dbe ; rt_object_get_information + 6 + 0x01004dd4: 2000 . MOVS r0,#0 + 0x01004dd6: e7f9 .. B 0x1004dcc ; rt_object_get_information + 20 + $d + 0x01004dd8: 00020068 h... DCD 131176 + $t + i.rt_object_get_length + rt_object_get_length + 0x01004ddc: b5f8 .. PUSH {r3-r7,lr} + 0x01004dde: 4607 .F MOV r7,r0 + 0x01004de0: 2500 .% MOVS r5,#0 + 0x01004de2: 2600 .& MOVS r6,#0 + 0x01004de4: 2400 .$ MOVS r4,#0 + 0x01004de6: 4638 8F MOV r0,r7 + 0x01004de8: f7ffffe6 .... BL rt_object_get_information ; 0x1004db8 + 0x01004dec: 4604 .F MOV r4,r0 + 0x01004dee: 2c00 ., CMP r4,#0 + 0x01004df0: d100 .. BNE 0x1004df4 ; rt_object_get_length + 24 + 0x01004df2: bdf8 .. POP {r3-r7,pc} + 0x01004df4: f7fbfb64 ..d. BL rt_hw_interrupt_disable ; 0x10004c0 + 0x01004df8: 9000 .. STR r0,[sp,#0] + 0x01004dfa: 6866 fh LDR r6,[r4,#4] + 0x01004dfc: e001 .. B 0x1004e02 ; rt_object_get_length + 38 + 0x01004dfe: 1c6d m. ADDS r5,r5,#1 + 0x01004e00: 6836 6h LDR r6,[r6,#0] + 0x01004e02: 1d20 . ADDS r0,r4,#4 + 0x01004e04: 4286 .B CMP r6,r0 + 0x01004e06: d1fa .. BNE 0x1004dfe ; rt_object_get_length + 34 + 0x01004e08: 9800 .. LDR r0,[sp,#0] + 0x01004e0a: f7fbfb5d ..]. BL rt_hw_interrupt_enable ; 0x10004c8 + 0x01004e0e: 4628 (F MOV r0,r5 + 0x01004e10: e7ef .. B 0x1004df2 ; rt_object_get_length + 22 + i.rt_object_get_pointers + rt_object_get_pointers + 0x01004e12: b5f7 .. PUSH {r0-r2,r4-r7,lr} + 0x01004e14: b082 .. SUB sp,sp,#8 + 0x01004e16: 4615 .F MOV r5,r2 + 0x01004e18: 2400 .$ MOVS r4,#0 + 0x01004e1a: 2600 .& MOVS r6,#0 + 0x01004e1c: 2700 .' MOVS r7,#0 + 0x01004e1e: 2d00 .- CMP r5,#0 + 0x01004e20: dc02 .. BGT 0x1004e28 ; rt_object_get_pointers + 22 + 0x01004e22: 2000 . MOVS r0,#0 + 0x01004e24: b005 .. ADD sp,sp,#0x14 + 0x01004e26: bdf0 .. POP {r4-r7,pc} + 0x01004e28: 9802 .. LDR r0,[sp,#8] + 0x01004e2a: f7ffffc5 .... BL rt_object_get_information ; 0x1004db8 + 0x01004e2e: 4607 .F MOV r7,r0 + 0x01004e30: 2f00 ./ CMP r7,#0 + 0x01004e32: d100 .. BNE 0x1004e36 ; rt_object_get_pointers + 36 + 0x01004e34: e7f6 .. B 0x1004e24 ; rt_object_get_pointers + 18 + 0x01004e36: f7fbfb43 ..C. BL rt_hw_interrupt_disable ; 0x10004c0 + 0x01004e3a: 9001 .. STR r0,[sp,#4] + 0x01004e3c: 687e ~h LDR r6,[r7,#4] + 0x01004e3e: e00b .. B 0x1004e58 ; rt_object_get_pointers + 70 + 0x01004e40: 4630 0F MOV r0,r6 + 0x01004e42: 380c .8 SUBS r0,r0,#0xc + 0x01004e44: 9000 .. STR r0,[sp,#0] + 0x01004e46: 00a2 .. LSLS r2,r4,#2 + 0x01004e48: 9903 .. LDR r1,[sp,#0xc] + 0x01004e4a: 9800 .. LDR r0,[sp,#0] + 0x01004e4c: 5088 .P STR r0,[r1,r2] + 0x01004e4e: 1c64 d. ADDS r4,r4,#1 + 0x01004e50: 42ac .B CMP r4,r5 + 0x01004e52: db00 .. BLT 0x1004e56 ; rt_object_get_pointers + 68 + 0x01004e54: e003 .. B 0x1004e5e ; rt_object_get_pointers + 76 + 0x01004e56: 6836 6h LDR r6,[r6,#0] + 0x01004e58: 1d38 8. ADDS r0,r7,#4 + 0x01004e5a: 4286 .B CMP r6,r0 + 0x01004e5c: d1f0 .. BNE 0x1004e40 ; rt_object_get_pointers + 46 + 0x01004e5e: bf00 .. NOP + 0x01004e60: 9801 .. LDR r0,[sp,#4] + 0x01004e62: f7fbfb31 ..1. BL rt_hw_interrupt_enable ; 0x10004c8 + 0x01004e66: 4620 F MOV r0,r4 + 0x01004e68: e7dc .. B 0x1004e24 ; rt_object_get_pointers + 18 + 0x01004e6a: 0000 .. MOVS r0,r0 + i.rt_object_get_type + rt_object_get_type + 0x01004e6c: b510 .. PUSH {r4,lr} + 0x01004e6e: 4604 .F MOV r4,r0 + 0x01004e70: 2c00 ., CMP r4,#0 + 0x01004e72: d105 .. BNE 0x1004e80 ; rt_object_get_type + 20 + 0x01004e74: 2283 ." MOVS r2,#0x83 + 0x01004e76: 0092 .. LSLS r2,r2,#2 + 0x01004e78: 4903 .I LDR r1,[pc,#12] ; [0x1004e88] = 0x1007aaa + 0x01004e7a: a004 .. ADR r0,{pc}+0x12 ; 0x1004e8c + 0x01004e7c: f7fefbc0 .... BL rt_assert_handler ; 0x1003600 + 0x01004e80: 7a20 z LDRB r0,[r4,#8] + 0x01004e82: 2180 .! MOVS r1,#0x80 + 0x01004e84: 4388 .C BICS r0,r0,r1 + 0x01004e86: bd10 .. POP {r4,pc} + $d + 0x01004e88: 01007aaa .z.. DCD 16808618 + 0x01004e8c: 656a626f obje DCD 1701470831 + 0x01004e90: 21207463 ct ! DCD 555775075 + 0x01004e94: 5452203d = RT DCD 1414668349 + 0x01004e98: 4c554e5f _NUL DCD 1280659039 + 0x01004e9c: 0000004c L... DCD 76 + $t + i.rt_object_init + rt_object_init + 0x01004ea0: b5f7 .. PUSH {r0-r2,r4-r7,lr} + 0x01004ea2: b082 .. SUB sp,sp,#8 + 0x01004ea4: 4604 .F MOV r4,r0 + 0x01004ea6: 460e .F MOV r6,r1 + 0x01004ea8: 2700 .' MOVS r7,#0 + 0x01004eaa: 4630 0F MOV r0,r6 + 0x01004eac: f7ffff84 .... BL rt_object_get_information ; 0x1004db8 + 0x01004eb0: 4605 .F MOV r5,r0 + 0x01004eb2: 2d00 .- CMP r5,#0 + 0x01004eb4: d105 .. BNE 0x1004ec2 ; rt_object_init + 34 + 0x01004eb6: 22ff ." MOVS r2,#0xff + 0x01004eb8: 323a :2 ADDS r2,r2,#0x3a + 0x01004eba: 491e .I LDR r1,[pc,#120] ; [0x1004f34] = 0x1007a4c + 0x01004ebc: a01e .. ADR r0,{pc}+0x7c ; 0x1004f38 + 0x01004ebe: f7fefb9f .... BL rt_assert_handler ; 0x1003600 + 0x01004ec2: f7feffd1 .... BL rt_enter_critical ; 0x1003e68 + 0x01004ec6: 686f oh LDR r7,[r5,#4] + 0x01004ec8: e00f .. B 0x1004eea ; rt_object_init + 74 + 0x01004eca: 4638 8F MOV r0,r7 + 0x01004ecc: 380c .8 SUBS r0,r0,#0xc + 0x01004ece: 9000 .. STR r0,[sp,#0] + 0x01004ed0: 9800 .. LDR r0,[sp,#0] + 0x01004ed2: 2800 .( CMP r0,#0 + 0x01004ed4: d008 .. BEQ 0x1004ee8 ; rt_object_init + 72 + 0x01004ed6: 9800 .. LDR r0,[sp,#0] + 0x01004ed8: 42a0 .B CMP r0,r4 + 0x01004eda: d105 .. BNE 0x1004ee8 ; rt_object_init + 72 + 0x01004edc: 22ff ." MOVS r2,#0xff + 0x01004ede: 324a J2 ADDS r2,r2,#0x4a + 0x01004ee0: 4914 .I LDR r1,[pc,#80] ; [0x1004f34] = 0x1007a4c + 0x01004ee2: a01b .. ADR r0,{pc}+0x6e ; 0x1004f50 + 0x01004ee4: f7fefb8c .... BL rt_assert_handler ; 0x1003600 + 0x01004ee8: 683f ?h LDR r7,[r7,#0] + 0x01004eea: 1d28 (. ADDS r0,r5,#4 + 0x01004eec: 4287 .B CMP r7,r0 + 0x01004eee: d1ec .. BNE 0x1004eca ; rt_object_init + 42 + 0x01004ef0: f7feffca .... BL rt_exit_critical ; 0x1003e88 + 0x01004ef4: 2080 . MOVS r0,#0x80 + 0x01004ef6: 4330 0C ORRS r0,r0,r6 + 0x01004ef8: 7220 r STRB r0,[r4,#8] + 0x01004efa: 2208 ." MOVS r2,#8 + 0x01004efc: 4620 F MOV r0,r4 + 0x01004efe: 9904 .. LDR r1,[sp,#0x10] + 0x01004f00: f000fe1b .... BL rt_strncpy ; 0x1005b3a + 0x01004f04: bf00 .. NOP + 0x01004f06: 4816 .H LDR r0,[pc,#88] ; [0x1004f60] = 0x20108 + 0x01004f08: 6800 .h LDR r0,[r0,#0] + 0x01004f0a: 2800 .( CMP r0,#0 + 0x01004f0c: d003 .. BEQ 0x1004f16 ; rt_object_init + 118 + 0x01004f0e: 4620 F MOV r0,r4 + 0x01004f10: 4913 .I LDR r1,[pc,#76] ; [0x1004f60] = 0x20108 + 0x01004f12: 6809 .h LDR r1,[r1,#0] + 0x01004f14: 4788 .G BLX r1 + 0x01004f16: bf00 .. NOP + 0x01004f18: f7fbfad2 .... BL rt_hw_interrupt_disable ; 0x10004c0 + 0x01004f1c: 9001 .. STR r0,[sp,#4] + 0x01004f1e: 4621 !F MOV r1,r4 + 0x01004f20: 310c .1 ADDS r1,r1,#0xc + 0x01004f22: 1d28 (. ADDS r0,r5,#4 + 0x01004f24: f7fffb09 .... BL rt_list_insert_after ; 0x100453a + 0x01004f28: 9801 .. LDR r0,[sp,#4] + 0x01004f2a: f7fbfacd .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x01004f2e: b005 .. ADD sp,sp,#0x14 + 0x01004f30: bdf0 .. POP {r4-r7,pc} + $d + 0x01004f32: 0000 .. DCW 0 + 0x01004f34: 01007a4c Lz.. DCD 16808524 + 0x01004f38: 6f666e69 info DCD 1868983913 + 0x01004f3c: 74616d72 rmat DCD 1952542066 + 0x01004f40: 206e6f69 ion DCD 544108393 + 0x01004f44: 52203d21 != R DCD 1377844513 + 0x01004f48: 554e5f54 T_NU DCD 1431199572 + 0x01004f4c: 00004c4c LL.. DCD 19532 + 0x01004f50: 206a626f obj DCD 543842927 + 0x01004f54: 6f203d21 != o DCD 1864383777 + 0x01004f58: 63656a62 bjec DCD 1667590754 + 0x01004f5c: 00000074 t... DCD 116 + 0x01004f60: 00020108 .... DCD 131336 + $t + i.rt_object_is_systemobject + rt_object_is_systemobject + 0x01004f64: b510 .. PUSH {r4,lr} + 0x01004f66: 4604 .F MOV r4,r0 + 0x01004f68: 2c00 ., CMP r4,#0 + 0x01004f6a: d105 .. BNE 0x1004f78 ; rt_object_is_systemobject + 20 + 0x01004f6c: 22ff ." MOVS r2,#0xff + 0x01004f6e: 32fa .2 ADDS r2,r2,#0xfa + 0x01004f70: 4906 .I LDR r1,[pc,#24] ; [0x1004f8c] = 0x1007a90 + 0x01004f72: a007 .. ADR r0,{pc}+0x1e ; 0x1004f90 + 0x01004f74: f7fefb44 ..D. BL rt_assert_handler ; 0x1003600 + 0x01004f78: 7a20 z LDRB r0,[r4,#8] + 0x01004f7a: 2180 .! MOVS r1,#0x80 + 0x01004f7c: 4008 .@ ANDS r0,r0,r1 + 0x01004f7e: 2800 .( CMP r0,#0 + 0x01004f80: d001 .. BEQ 0x1004f86 ; rt_object_is_systemobject + 34 + 0x01004f82: 2001 . MOVS r0,#1 + 0x01004f84: bd10 .. POP {r4,pc} + 0x01004f86: 2000 . MOVS r0,#0 + 0x01004f88: e7fc .. B 0x1004f84 ; rt_object_is_systemobject + 32 + $d + 0x01004f8a: 0000 .. DCW 0 + 0x01004f8c: 01007a90 .z.. DCD 16808592 + 0x01004f90: 656a626f obje DCD 1701470831 + 0x01004f94: 21207463 ct ! DCD 555775075 + 0x01004f98: 5452203d = RT DCD 1414668349 + 0x01004f9c: 4c554e5f _NUL DCD 1280659039 + 0x01004fa0: 0000004c L... DCD 76 + $t + i.rt_pin_mode + rt_pin_mode + 0x01004fa4: b570 p. PUSH {r4-r6,lr} + 0x01004fa6: 4604 .F MOV r4,r0 + 0x01004fa8: 460d .F MOV r5,r1 + 0x01004faa: 4808 .H LDR r0,[pc,#32] ; [0x1004fcc] = 0x20158 + 0x01004fac: 6c00 .l LDR r0,[r0,#0x40] + 0x01004fae: 2800 .( CMP r0,#0 + 0x01004fb0: d104 .. BNE 0x1004fbc ; rt_pin_mode + 24 + 0x01004fb2: 228a ." MOVS r2,#0x8a + 0x01004fb4: 4906 .I LDR r1,[pc,#24] ; [0x1004fd0] = 0x10072d4 + 0x01004fb6: a007 .. ADR r0,{pc}+0x1e ; 0x1004fd4 + 0x01004fb8: f7fefb22 ..". BL rt_assert_handler ; 0x1003600 + 0x01004fbc: 4803 .H LDR r0,[pc,#12] ; [0x1004fcc] = 0x20158 + 0x01004fbe: 6c00 .l LDR r0,[r0,#0x40] + 0x01004fc0: 462a *F MOV r2,r5 + 0x01004fc2: 4621 !F MOV r1,r4 + 0x01004fc4: 6803 .h LDR r3,[r0,#0] + 0x01004fc6: 4801 .H LDR r0,[pc,#4] ; [0x1004fcc] = 0x20158 + 0x01004fc8: 4798 .G BLX r3 + 0x01004fca: bd70 p. POP {r4-r6,pc} + $d + 0x01004fcc: 00020158 X... DCD 131416 + 0x01004fd0: 010072d4 .r.. DCD 16806612 + 0x01004fd4: 5f77685f _hw_ DCD 1601661023 + 0x01004fd8: 2e6e6970 pin. DCD 778987888 + 0x01004fdc: 2073706f ops DCD 544436335 + 0x01004fe0: 52203d21 != R DCD 1377844513 + 0x01004fe4: 554e5f54 T_NU DCD 1431199572 + 0x01004fe8: 00004c4c LL.. DCD 19532 + $t + i.rt_pin_write + rt_pin_write + 0x01004fec: b570 p. PUSH {r4-r6,lr} + 0x01004fee: 4604 .F MOV r4,r0 + 0x01004ff0: 460d .F MOV r5,r1 + 0x01004ff2: 4808 .H LDR r0,[pc,#32] ; [0x1005014] = 0x20158 + 0x01004ff4: 6c00 .l LDR r0,[r0,#0x40] + 0x01004ff6: 2800 .( CMP r0,#0 + 0x01004ff8: d104 .. BNE 0x1005004 ; rt_pin_write + 24 + 0x01004ffa: 2291 ." MOVS r2,#0x91 + 0x01004ffc: 4906 .I LDR r1,[pc,#24] ; [0x1005018] = 0x10072e0 + 0x01004ffe: a007 .. ADR r0,{pc}+0x1e ; 0x100501c + 0x01005000: f7fefafe .... BL rt_assert_handler ; 0x1003600 + 0x01005004: 4803 .H LDR r0,[pc,#12] ; [0x1005014] = 0x20158 + 0x01005006: 6c00 .l LDR r0,[r0,#0x40] + 0x01005008: 462a *F MOV r2,r5 + 0x0100500a: 4621 !F MOV r1,r4 + 0x0100500c: 6843 Ch LDR r3,[r0,#4] + 0x0100500e: 4801 .H LDR r0,[pc,#4] ; [0x1005014] = 0x20158 + 0x01005010: 4798 .G BLX r3 + 0x01005012: bd70 p. POP {r4-r6,pc} + $d + 0x01005014: 00020158 X... DCD 131416 + 0x01005018: 010072e0 .r.. DCD 16806624 + 0x0100501c: 5f77685f _hw_ DCD 1601661023 + 0x01005020: 2e6e6970 pin. DCD 778987888 + 0x01005024: 2073706f ops DCD 544436335 + 0x01005028: 52203d21 != R DCD 1377844513 + 0x0100502c: 554e5f54 T_NU DCD 1431199572 + 0x01005030: 00004c4c LL.. DCD 19532 + $t + i.rt_schedule + rt_schedule + 0x01005034: b5f8 .. PUSH {r3-r7,lr} + 0x01005036: f7fbfa43 ..C. BL rt_hw_interrupt_disable ; 0x10004c0 + 0x0100503a: 4606 .F MOV r6,r0 + 0x0100503c: 484f OH LDR r0,[pc,#316] ; [0x100517c] = 0x20028 + 0x0100503e: 8800 .. LDRH r0,[r0,#0] + 0x01005040: 2800 .( CMP r0,#0 + 0x01005042: d179 y. BNE 0x1005138 ; rt_schedule + 260 + 0x01005044: 484e NH LDR r0,[pc,#312] ; [0x1005180] = 0x20024 + 0x01005046: 6800 .h LDR r0,[r0,#0] + 0x01005048: 2800 .( CMP r0,#0 + 0x0100504a: d076 v. BEQ 0x100513a ; rt_schedule + 262 + 0x0100504c: 2700 .' MOVS r7,#0 + 0x0100504e: 4668 hF MOV r0,sp + 0x01005050: f7fcf988 .... BL _scheduler_get_highest_priority_thread ; 0x1001364 + 0x01005054: 4604 .F MOV r4,r0 + 0x01005056: 484b KH LDR r0,[pc,#300] ; [0x1005184] = 0x2002c + 0x01005058: 6800 .h LDR r0,[r0,#0] + 0x0100505a: 3020 0 ADDS r0,r0,#0x20 + 0x0100505c: 7d00 .} LDRB r0,[r0,#0x14] + 0x0100505e: 0740 @. LSLS r0,r0,#29 + 0x01005060: 0f40 @. LSRS r0,r0,#29 + 0x01005062: 2803 .( CMP r0,#3 + 0x01005064: d126 &. BNE 0x10050b4 ; rt_schedule + 128 + 0x01005066: 4847 GH LDR r0,[pc,#284] ; [0x1005184] = 0x2002c + 0x01005068: 6800 .h LDR r0,[r0,#0] + 0x0100506a: 3020 0 ADDS r0,r0,#0x20 + 0x0100506c: 7d40 @} LDRB r0,[r0,#0x15] + 0x0100506e: 9900 .. LDR r1,[sp,#0] + 0x01005070: 4288 .B CMP r0,r1 + 0x01005072: d202 .. BCS 0x100507a ; rt_schedule + 70 + 0x01005074: 4843 CH LDR r0,[pc,#268] ; [0x1005184] = 0x2002c + 0x01005076: 6804 .h LDR r4,[r0,#0] + 0x01005078: e012 .. B 0x10050a0 ; rt_schedule + 108 + 0x0100507a: 4842 BH LDR r0,[pc,#264] ; [0x1005184] = 0x2002c + 0x0100507c: 6800 .h LDR r0,[r0,#0] + 0x0100507e: 3020 0 ADDS r0,r0,#0x20 + 0x01005080: 7d40 @} LDRB r0,[r0,#0x15] + 0x01005082: 9900 .. LDR r1,[sp,#0] + 0x01005084: 4288 .B CMP r0,r1 + 0x01005086: d10a .. BNE 0x100509e ; rt_schedule + 106 + 0x01005088: 483e >H LDR r0,[pc,#248] ; [0x1005184] = 0x2002c + 0x0100508a: 6800 .h LDR r0,[r0,#0] + 0x0100508c: 3020 0 ADDS r0,r0,#0x20 + 0x0100508e: 7d00 .} LDRB r0,[r0,#0x14] + 0x01005090: 2108 .! MOVS r1,#8 + 0x01005092: 4008 .@ ANDS r0,r0,r1 + 0x01005094: 2800 .( CMP r0,#0 + 0x01005096: d102 .. BNE 0x100509e ; rt_schedule + 106 + 0x01005098: 483a :H LDR r0,[pc,#232] ; [0x1005184] = 0x2002c + 0x0100509a: 6804 .h LDR r4,[r0,#0] + 0x0100509c: e000 .. B 0x10050a0 ; rt_schedule + 108 + 0x0100509e: 2701 .' MOVS r7,#1 + 0x010050a0: 4838 8H LDR r0,[pc,#224] ; [0x1005184] = 0x2002c + 0x010050a2: 6800 .h LDR r0,[r0,#0] + 0x010050a4: 3020 0 ADDS r0,r0,#0x20 + 0x010050a6: 7d00 .} LDRB r0,[r0,#0x14] + 0x010050a8: 2108 .! MOVS r1,#8 + 0x010050aa: 4388 .C BICS r0,r0,r1 + 0x010050ac: 4935 5I LDR r1,[pc,#212] ; [0x1005184] = 0x2002c + 0x010050ae: 6809 .h LDR r1,[r1,#0] + 0x010050b0: 3120 1 ADDS r1,r1,#0x20 + 0x010050b2: 7508 .u STRB r0,[r1,#0x14] + 0x010050b4: 4833 3H LDR r0,[pc,#204] ; [0x1005184] = 0x2002c + 0x010050b6: 6800 .h LDR r0,[r0,#0] + 0x010050b8: 4284 .B CMP r4,r0 + 0x010050ba: d048 H. BEQ 0x100514e ; rt_schedule + 282 + 0x010050bc: 4932 2I LDR r1,[pc,#200] ; [0x1005188] = 0x20030 + 0x010050be: 9800 .. LDR r0,[sp,#0] + 0x010050c0: 7008 .p STRB r0,[r1,#0] + 0x010050c2: 4830 0H LDR r0,[pc,#192] ; [0x1005184] = 0x2002c + 0x010050c4: 6805 .h LDR r5,[r0,#0] + 0x010050c6: 6004 .` STR r4,[r0,#0] + 0x010050c8: bf00 .. NOP + 0x010050ca: 4830 0H LDR r0,[pc,#192] ; [0x100518c] = 0x20034 + 0x010050cc: 6800 .h LDR r0,[r0,#0] + 0x010050ce: 2800 .( CMP r0,#0 + 0x010050d0: d004 .. BEQ 0x10050dc ; rt_schedule + 168 + 0x010050d2: 4621 !F MOV r1,r4 + 0x010050d4: 4628 (F MOV r0,r5 + 0x010050d6: 4a2d -J LDR r2,[pc,#180] ; [0x100518c] = 0x20034 + 0x010050d8: 6812 .h LDR r2,[r2,#0] + 0x010050da: 4790 .G BLX r2 + 0x010050dc: bf00 .. NOP + 0x010050de: 2f00 ./ CMP r7,#0 + 0x010050e0: d002 .. BEQ 0x10050e8 ; rt_schedule + 180 + 0x010050e2: 4628 (F MOV r0,r5 + 0x010050e4: f000f858 ..X. BL rt_schedule_insert_thread ; 0x1005198 + 0x010050e8: 4620 F MOV r0,r4 + 0x010050ea: f000f8a5 .... BL rt_schedule_remove_thread ; 0x1005238 + 0x010050ee: 2034 4 MOVS r0,#0x34 + 0x010050f0: 5d00 .] LDRB r0,[r0,r4] + 0x010050f2: 08c0 .. LSRS r0,r0,#3 + 0x010050f4: 00c0 .. LSLS r0,r0,#3 + 0x010050f6: 2103 .! MOVS r1,#3 + 0x010050f8: 4308 .C ORRS r0,r0,r1 + 0x010050fa: 2134 4! MOVS r1,#0x34 + 0x010050fc: 5508 .U STRB r0,[r1,r4] + 0x010050fe: bf00 .. NOP + 0x01005100: bf00 .. NOP + 0x01005102: 4620 F MOV r0,r4 + 0x01005104: f7fcf8cc .... BL _rt_scheduler_stack_check ; 0x10012a0 + 0x01005108: 4821 !H LDR r0,[pc,#132] ; [0x1005190] = 0x20124 + 0x0100510a: 7800 .x LDRB r0,[r0,#0] + 0x0100510c: 2800 .( CMP r0,#0 + 0x0100510e: d115 .. BNE 0x100513c ; rt_schedule + 264 + 0x01005110: bf00 .. NOP + 0x01005112: 4820 H LDR r0,[pc,#128] ; [0x1005194] = 0x20038 + 0x01005114: 6800 .h LDR r0,[r0,#0] + 0x01005116: 2800 .( CMP r0,#0 + 0x01005118: d003 .. BEQ 0x1005122 ; rt_schedule + 238 + 0x0100511a: 4628 (F MOV r0,r5 + 0x0100511c: 491d .I LDR r1,[pc,#116] ; [0x1005194] = 0x20038 + 0x0100511e: 6809 .h LDR r1,[r1,#0] + 0x01005120: 4788 .G BLX r1 + 0x01005122: bf00 .. NOP + 0x01005124: 4621 !F MOV r1,r4 + 0x01005126: 311c .1 ADDS r1,r1,#0x1c + 0x01005128: 4628 (F MOV r0,r5 + 0x0100512a: 301c .0 ADDS r0,r0,#0x1c + 0x0100512c: f7fbf9cf .... BL rt_hw_context_switch ; 0x10004ce + 0x01005130: 4630 0F MOV r0,r6 + 0x01005132: f7fbf9c9 .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x01005136: e020 . B 0x100517a ; rt_schedule + 326 + 0x01005138: e01b .. B 0x1005172 ; rt_schedule + 318 + 0x0100513a: e019 .. B 0x1005170 ; rt_schedule + 316 + 0x0100513c: bf00 .. NOP + 0x0100513e: bf00 .. NOP + 0x01005140: 4621 !F MOV r1,r4 + 0x01005142: 311c .1 ADDS r1,r1,#0x1c + 0x01005144: 4628 (F MOV r0,r5 + 0x01005146: 301c .0 ADDS r0,r0,#0x1c + 0x01005148: f7fbf9c1 .... BL rt_hw_context_switch ; 0x10004ce + 0x0100514c: e00f .. B 0x100516e ; rt_schedule + 314 + 0x0100514e: 480d .H LDR r0,[pc,#52] ; [0x1005184] = 0x2002c + 0x01005150: 6800 .h LDR r0,[r0,#0] + 0x01005152: f000f871 ..q. BL rt_schedule_remove_thread ; 0x1005238 + 0x01005156: 480b .H LDR r0,[pc,#44] ; [0x1005184] = 0x2002c + 0x01005158: 6800 .h LDR r0,[r0,#0] + 0x0100515a: 3020 0 ADDS r0,r0,#0x20 + 0x0100515c: 7d00 .} LDRB r0,[r0,#0x14] + 0x0100515e: 08c0 .. LSRS r0,r0,#3 + 0x01005160: 00c0 .. LSLS r0,r0,#3 + 0x01005162: 2103 .! MOVS r1,#3 + 0x01005164: 4308 .C ORRS r0,r0,r1 + 0x01005166: 4907 .I LDR r1,[pc,#28] ; [0x1005184] = 0x2002c + 0x01005168: 6809 .h LDR r1,[r1,#0] + 0x0100516a: 3120 1 ADDS r1,r1,#0x20 + 0x0100516c: 7508 .u STRB r0,[r1,#0x14] + 0x0100516e: bf00 .. NOP + 0x01005170: bf00 .. NOP + 0x01005172: 4630 0F MOV r0,r6 + 0x01005174: f7fbf9a8 .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x01005178: bf00 .. NOP + 0x0100517a: bdf8 .. POP {r3-r7,pc} + $d + 0x0100517c: 00020028 (... DCD 131112 + 0x01005180: 00020024 $... DCD 131108 + 0x01005184: 0002002c ,... DCD 131116 + 0x01005188: 00020030 0... DCD 131120 + 0x0100518c: 00020034 4... DCD 131124 + 0x01005190: 00020124 $... DCD 131364 + 0x01005194: 00020038 8... DCD 131128 + $t + i.rt_schedule_insert_thread + rt_schedule_insert_thread + 0x01005198: b570 p. PUSH {r4-r6,lr} + 0x0100519a: 4604 .F MOV r4,r0 + 0x0100519c: 2c00 ., CMP r4,#0 + 0x0100519e: d104 .. BNE 0x10051aa ; rt_schedule_insert_thread + 18 + 0x010051a0: 4a1b .J LDR r2,[pc,#108] ; [0x1005210] = 0x2c7 + 0x010051a2: 491c .I LDR r1,[pc,#112] ; [0x1005214] = 0x10075b2 + 0x010051a4: a01c .. ADR r0,{pc}+0x74 ; 0x1005218 + 0x010051a6: f7fefa2b ..+. BL rt_assert_handler ; 0x1003600 + 0x010051aa: f7fbf989 .... BL rt_hw_interrupt_disable ; 0x10004c0 + 0x010051ae: 4605 .F MOV r5,r0 + 0x010051b0: 481e .H LDR r0,[pc,#120] ; [0x100522c] = 0x2002c + 0x010051b2: 6800 .h LDR r0,[r0,#0] + 0x010051b4: 4284 .B CMP r4,r0 + 0x010051b6: d108 .. BNE 0x10051ca ; rt_schedule_insert_thread + 50 + 0x010051b8: 2034 4 MOVS r0,#0x34 + 0x010051ba: 5d00 .] LDRB r0,[r0,r4] + 0x010051bc: 08c0 .. LSRS r0,r0,#3 + 0x010051be: 00c0 .. LSLS r0,r0,#3 + 0x010051c0: 2103 .! MOVS r1,#3 + 0x010051c2: 4308 .C ORRS r0,r0,r1 + 0x010051c4: 2134 4! MOVS r1,#0x34 + 0x010051c6: 5508 .U STRB r0,[r1,r4] + 0x010051c8: e01e .. B 0x1005208 ; rt_schedule_insert_thread + 112 + 0x010051ca: 2034 4 MOVS r0,#0x34 + 0x010051cc: 5d00 .] LDRB r0,[r0,r4] + 0x010051ce: 08c0 .. LSRS r0,r0,#3 + 0x010051d0: 00c0 .. LSLS r0,r0,#3 + 0x010051d2: 2101 .! MOVS r1,#1 + 0x010051d4: 4308 .C ORRS r0,r0,r1 + 0x010051d6: 2134 4! MOVS r1,#0x34 + 0x010051d8: 5508 .U STRB r0,[r1,r4] + 0x010051da: 2235 5" MOVS r2,#0x35 + 0x010051dc: 5d12 .] LDRB r2,[r2,r4] + 0x010051de: 00d2 .. LSLS r2,r2,#3 + 0x010051e0: 4b13 .K LDR r3,[pc,#76] ; [0x1005230] = 0x20274 + 0x010051e2: 18d0 .. ADDS r0,r2,r3 + 0x010051e4: 4621 !F MOV r1,r4 + 0x010051e6: 3114 .1 ADDS r1,r1,#0x14 + 0x010051e8: 6842 Bh LDR r2,[r0,#4] + 0x010051ea: 6011 .` STR r1,[r2,#0] + 0x010051ec: 6842 Bh LDR r2,[r0,#4] + 0x010051ee: 604a J` STR r2,[r1,#4] + 0x010051f0: 6041 A` STR r1,[r0,#4] + 0x010051f2: 6008 .` STR r0,[r1,#0] + 0x010051f4: bf00 .. NOP + 0x010051f6: bf00 .. NOP + 0x010051f8: bf00 .. NOP + 0x010051fa: 490e .I LDR r1,[pc,#56] ; [0x1005234] = 0x20024 + 0x010051fc: 6ba0 .k LDR r0,[r4,#0x38] + 0x010051fe: 6809 .h LDR r1,[r1,#0] + 0x01005200: 4308 .C ORRS r0,r0,r1 + 0x01005202: 490c .I LDR r1,[pc,#48] ; [0x1005234] = 0x20024 + 0x01005204: 6008 .` STR r0,[r1,#0] + 0x01005206: bf00 .. NOP + 0x01005208: 4628 (F MOV r0,r5 + 0x0100520a: f7fbf95d ..]. BL rt_hw_interrupt_enable ; 0x10004c8 + 0x0100520e: bd70 p. POP {r4-r6,pc} + $d + 0x01005210: 000002c7 .... DCD 711 + 0x01005214: 010075b2 .u.. DCD 16807346 + 0x01005218: 65726874 thre DCD 1701996660 + 0x0100521c: 21206461 ad ! DCD 555770977 + 0x01005220: 5452203d = RT DCD 1414668349 + 0x01005224: 4c554e5f _NUL DCD 1280659039 + 0x01005228: 0000004c L... DCD 76 + 0x0100522c: 0002002c ,... DCD 131116 + 0x01005230: 00020274 t... DCD 131700 + 0x01005234: 00020024 $... DCD 131108 + $t + i.rt_schedule_remove_thread + rt_schedule_remove_thread + 0x01005238: b570 p. PUSH {r4-r6,lr} + 0x0100523a: 4604 .F MOV r4,r0 + 0x0100523c: 2c00 ., CMP r4,#0 + 0x0100523e: d105 .. BNE 0x100524c ; rt_schedule_remove_thread + 20 + 0x01005240: 2265 e" MOVS r2,#0x65 + 0x01005242: 00d2 .. LSLS r2,r2,#3 + 0x01005244: 4915 .I LDR r1,[pc,#84] ; [0x100529c] = 0x10075cc + 0x01005246: a016 .. ADR r0,{pc}+0x5a ; 0x10052a0 + 0x01005248: f7fef9da .... BL rt_assert_handler ; 0x1003600 + 0x0100524c: f7fbf938 ..8. BL rt_hw_interrupt_disable ; 0x10004c0 + 0x01005250: 4605 .F MOV r5,r0 + 0x01005252: bf00 .. NOP + 0x01005254: bf00 .. NOP + 0x01005256: 4620 F MOV r0,r4 + 0x01005258: 3014 .0 ADDS r0,r0,#0x14 + 0x0100525a: 6802 .h LDR r2,[r0,#0] + 0x0100525c: 6841 Ah LDR r1,[r0,#4] + 0x0100525e: 6051 Q` STR r1,[r2,#4] + 0x01005260: 6842 Bh LDR r2,[r0,#4] + 0x01005262: 6801 .h LDR r1,[r0,#0] + 0x01005264: 6011 .` STR r1,[r2,#0] + 0x01005266: 6040 @` STR r0,[r0,#4] + 0x01005268: 6000 .` STR r0,[r0,#0] + 0x0100526a: bf00 .. NOP + 0x0100526c: 2135 5! MOVS r1,#0x35 + 0x0100526e: 5d09 .] LDRB r1,[r1,r4] + 0x01005270: 00c9 .. LSLS r1,r1,#3 + 0x01005272: 4a10 .J LDR r2,[pc,#64] ; [0x10052b4] = 0x20274 + 0x01005274: 1888 .. ADDS r0,r1,r2 + 0x01005276: 6801 .h LDR r1,[r0,#0] + 0x01005278: 4281 .B CMP r1,r0 + 0x0100527a: d101 .. BNE 0x1005280 ; rt_schedule_remove_thread + 72 + 0x0100527c: 2101 .! MOVS r1,#1 + 0x0100527e: e000 .. B 0x1005282 ; rt_schedule_remove_thread + 74 + 0x01005280: 2100 .! MOVS r1,#0 + 0x01005282: 2900 .) CMP r1,#0 + 0x01005284: d005 .. BEQ 0x1005292 ; rt_schedule_remove_thread + 90 + 0x01005286: 480c .H LDR r0,[pc,#48] ; [0x10052b8] = 0x20024 + 0x01005288: 6ba1 .k LDR r1,[r4,#0x38] + 0x0100528a: 6800 .h LDR r0,[r0,#0] + 0x0100528c: 4388 .C BICS r0,r0,r1 + 0x0100528e: 490a .I LDR r1,[pc,#40] ; [0x10052b8] = 0x20024 + 0x01005290: 6008 .` STR r0,[r1,#0] + 0x01005292: 4628 (F MOV r0,r5 + 0x01005294: f7fbf918 .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x01005298: bd70 p. POP {r4-r6,pc} + $d + 0x0100529a: 0000 .. DCW 0 + 0x0100529c: 010075cc .u.. DCD 16807372 + 0x010052a0: 65726874 thre DCD 1701996660 + 0x010052a4: 21206461 ad ! DCD 555770977 + 0x010052a8: 5452203d = RT DCD 1414668349 + 0x010052ac: 4c554e5f _NUL DCD 1280659039 + 0x010052b0: 0000004c L... DCD 76 + 0x010052b4: 00020274 t... DCD 131700 + 0x010052b8: 00020024 $... DCD 131108 + $t + i.rt_sem_init + rt_sem_init + 0x010052bc: b5f8 .. PUSH {r3-r7,lr} + 0x010052be: 4604 .F MOV r4,r0 + 0x010052c0: 460e .F MOV r6,r1 + 0x010052c2: 4615 .F MOV r5,r2 + 0x010052c4: 461f .F MOV r7,r3 + 0x010052c6: 2c00 ., CMP r4,#0 + 0x010052c8: d105 .. BNE 0x10052d6 ; rt_sem_init + 26 + 0x010052ca: 22ff ." MOVS r2,#0xff + 0x010052cc: 3221 !2 ADDS r2,r2,#0x21 + 0x010052ce: 490d .I LDR r1,[pc,#52] ; [0x1005304] = 0x10077e7 + 0x010052d0: a00d .. ADR r0,{pc}+0x38 ; 0x1005308 + 0x010052d2: f7fef995 .... BL rt_assert_handler ; 0x1003600 + 0x010052d6: 2001 . MOVS r0,#1 + 0x010052d8: 0400 .. LSLS r0,r0,#16 + 0x010052da: 4285 .B CMP r5,r0 + 0x010052dc: d305 .. BCC 0x10052ea ; rt_sem_init + 46 + 0x010052de: 22ff ." MOVS r2,#0xff + 0x010052e0: 3222 "2 ADDS r2,r2,#0x22 + 0x010052e2: 4908 .I LDR r1,[pc,#32] ; [0x1005304] = 0x10077e7 + 0x010052e4: a00c .. ADR r0,{pc}+0x34 ; 0x1005318 + 0x010052e6: f7fef98b .... BL rt_assert_handler ; 0x1003600 + 0x010052ea: 4632 2F MOV r2,r6 + 0x010052ec: 2102 .! MOVS r1,#2 + 0x010052ee: 4620 F MOV r0,r4 + 0x010052f0: f7fffdd6 .... BL rt_object_init ; 0x1004ea0 + 0x010052f4: 4620 F MOV r0,r4 + 0x010052f6: f7fbfef3 .... BL _ipc_object_init ; 0x10010e0 + 0x010052fa: 83a5 .. STRH r5,[r4,#0x1c] + 0x010052fc: 7267 gr STRB r7,[r4,#9] + 0x010052fe: 2000 . MOVS r0,#0 + 0x01005300: bdf8 .. POP {r3-r7,pc} + $d + 0x01005302: 0000 .. DCW 0 + 0x01005304: 010077e7 .w.. DCD 16807911 + 0x01005308: 206d6573 sem DCD 544040307 + 0x0100530c: 52203d21 != R DCD 1377844513 + 0x01005310: 554e5f54 T_NU DCD 1431199572 + 0x01005314: 00004c4c LL.. DCD 19532 + 0x01005318: 756c6176 valu DCD 1970037110 + 0x0100531c: 203c2065 e < DCD 540811365 + 0x01005320: 30317830 0x10 DCD 808548400 + 0x01005324: 55303030 000U DCD 1429221424 + 0x01005328: 00000000 .... DCD 0 + $t + i.rt_sem_release + rt_sem_release + 0x0100532c: b570 p. PUSH {r4-r6,lr} + 0x0100532e: 4604 .F MOV r4,r0 + 0x01005330: 2c00 ., CMP r4,#0 + 0x01005332: d105 .. BNE 0x1005340 ; rt_sem_release + 20 + 0x01005334: 2225 %" MOVS r2,#0x25 + 0x01005336: 0112 .. LSLS r2,r2,#4 + 0x01005338: 4920 I LDR r1,[pc,#128] ; [0x10053bc] = 0x1007829 + 0x0100533a: a021 !. ADR r0,{pc}+0x86 ; 0x10053c0 + 0x0100533c: f7fef960 ..`. BL rt_assert_handler ; 0x1003600 + 0x01005340: 4620 F MOV r0,r4 + 0x01005342: f7fffd93 .... BL rt_object_get_type ; 0x1004e6c + 0x01005346: 2802 .( CMP r0,#2 + 0x01005348: d004 .. BEQ 0x1005354 ; rt_sem_release + 40 + 0x0100534a: 4a21 !J LDR r2,[pc,#132] ; [0x10053d0] = 0x251 + 0x0100534c: 491b .I LDR r1,[pc,#108] ; [0x10053bc] = 0x1007829 + 0x0100534e: 4821 !H LDR r0,[pc,#132] ; [0x10053d4] = 0x1007f08 + 0x01005350: f7fef956 ..V. BL rt_assert_handler ; 0x1003600 + 0x01005354: bf00 .. NOP + 0x01005356: 4820 H LDR r0,[pc,#128] ; [0x10053d8] = 0x20118 + 0x01005358: 6800 .h LDR r0,[r0,#0] + 0x0100535a: 2800 .( CMP r0,#0 + 0x0100535c: d003 .. BEQ 0x1005366 ; rt_sem_release + 58 + 0x0100535e: 4620 F MOV r0,r4 + 0x01005360: 491d .I LDR r1,[pc,#116] ; [0x10053d8] = 0x20118 + 0x01005362: 6809 .h LDR r1,[r1,#0] + 0x01005364: 4788 .G BLX r1 + 0x01005366: bf00 .. NOP + 0x01005368: 2500 .% MOVS r5,#0 + 0x0100536a: f7fbf8a9 .... BL rt_hw_interrupt_disable ; 0x10004c0 + 0x0100536e: 4606 .F MOV r6,r0 + 0x01005370: bf00 .. NOP + 0x01005372: bf00 .. NOP + 0x01005374: 4620 F MOV r0,r4 + 0x01005376: 3014 .0 ADDS r0,r0,#0x14 + 0x01005378: f7fff8fd .... BL rt_list_isempty ; 0x1004576 + 0x0100537c: 2800 .( CMP r0,#0 + 0x0100537e: d105 .. BNE 0x100538c ; rt_sem_release + 96 + 0x01005380: 4620 F MOV r0,r4 + 0x01005382: 3014 .0 ADDS r0,r0,#0x14 + 0x01005384: f7fbfe64 ..d. BL _ipc_list_resume ; 0x1001050 + 0x01005388: 2501 .% MOVS r5,#1 + 0x0100538a: e00d .. B 0x10053a8 ; rt_sem_release + 124 + 0x0100538c: 8ba0 .. LDRH r0,[r4,#0x1c] + 0x0100538e: 4913 .I LDR r1,[pc,#76] ; [0x10053dc] = 0xffff + 0x01005390: 4288 .B CMP r0,r1 + 0x01005392: da03 .. BGE 0x100539c ; rt_sem_release + 112 + 0x01005394: 8ba0 .. LDRH r0,[r4,#0x1c] + 0x01005396: 1c40 @. ADDS r0,r0,#1 + 0x01005398: 83a0 .. STRH r0,[r4,#0x1c] + 0x0100539a: e005 .. B 0x10053a8 ; rt_sem_release + 124 + 0x0100539c: 4630 0F MOV r0,r6 + 0x0100539e: f7fbf893 .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x010053a2: 2002 . MOVS r0,#2 + 0x010053a4: 43c0 .C MVNS r0,r0 + 0x010053a6: bd70 p. POP {r4-r6,pc} + 0x010053a8: 4630 0F MOV r0,r6 + 0x010053aa: f7fbf88d .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x010053ae: 2d01 .- CMP r5,#1 + 0x010053b0: d101 .. BNE 0x10053b6 ; rt_sem_release + 138 + 0x010053b2: f7fffe3f ..?. BL rt_schedule ; 0x1005034 + 0x010053b6: 2000 . MOVS r0,#0 + 0x010053b8: e7f5 .. B 0x10053a6 ; rt_sem_release + 122 + $d + 0x010053ba: 0000 .. DCW 0 + 0x010053bc: 01007829 )x.. DCD 16807977 + 0x010053c0: 206d6573 sem DCD 544040307 + 0x010053c4: 52203d21 != R DCD 1377844513 + 0x010053c8: 554e5f54 T_NU DCD 1431199572 + 0x010053cc: 00004c4c LL.. DCD 19532 + 0x010053d0: 00000251 Q... DCD 593 + 0x010053d4: 01007f08 .... DCD 16809736 + 0x010053d8: 00020118 .... DCD 131352 + 0x010053dc: 0000ffff .... DCD 65535 + $t + i.rt_sem_take + rt_sem_take + 0x010053e0: b5f3 .. PUSH {r0,r1,r4-r7,lr} + 0x010053e2: b081 .. SUB sp,sp,#4 + 0x010053e4: 4605 .F MOV r5,r0 + 0x010053e6: 2d00 .- CMP r5,#0 + 0x010053e8: d105 .. BNE 0x10053f6 ; rt_sem_take + 22 + 0x010053ea: 22ff ." MOVS r2,#0xff + 0x010053ec: 32d7 .2 ADDS r2,r2,#0xd7 + 0x010053ee: 4947 GI LDR r1,[pc,#284] ; [0x100550c] = 0x100781d + 0x010053f0: a047 G. ADR r0,{pc}+0x120 ; 0x1005510 + 0x010053f2: f7fef905 .... BL rt_assert_handler ; 0x1003600 + 0x010053f6: 4628 (F MOV r0,r5 + 0x010053f8: f7fffd38 ..8. BL rt_object_get_type ; 0x1004e6c + 0x010053fc: 2802 .( CMP r0,#2 + 0x010053fe: d005 .. BEQ 0x100540c ; rt_sem_take + 44 + 0x01005400: 22ff ." MOVS r2,#0xff + 0x01005402: 32d8 .2 ADDS r2,r2,#0xd8 + 0x01005404: 4941 AI LDR r1,[pc,#260] ; [0x100550c] = 0x100781d + 0x01005406: 4846 FH LDR r0,[pc,#280] ; [0x1005520] = 0x1007f08 + 0x01005408: f7fef8fa .... BL rt_assert_handler ; 0x1003600 + 0x0100540c: bf00 .. NOP + 0x0100540e: 4845 EH LDR r0,[pc,#276] ; [0x1005524] = 0x20110 + 0x01005410: 6800 .h LDR r0,[r0,#0] + 0x01005412: 2800 .( CMP r0,#0 + 0x01005414: d003 .. BEQ 0x100541e ; rt_sem_take + 62 + 0x01005416: 4628 (F MOV r0,r5 + 0x01005418: 4942 BI LDR r1,[pc,#264] ; [0x1005524] = 0x20110 + 0x0100541a: 6809 .h LDR r1,[r1,#0] + 0x0100541c: 4788 .G BLX r1 + 0x0100541e: bf00 .. NOP + 0x01005420: f7fbf84e ..N. BL rt_hw_interrupt_disable ; 0x10004c0 + 0x01005424: 4606 .F MOV r6,r0 + 0x01005426: bf00 .. NOP + 0x01005428: bf00 .. NOP + 0x0100542a: 8ba8 .. LDRH r0,[r5,#0x1c] + 0x0100542c: 2800 .( CMP r0,#0 + 0x0100542e: dd06 .. BLE 0x100543e ; rt_sem_take + 94 + 0x01005430: 8ba8 .. LDRH r0,[r5,#0x1c] + 0x01005432: 1e40 @. SUBS r0,r0,#1 + 0x01005434: 83a8 .. STRH r0,[r5,#0x1c] + 0x01005436: 4630 0F MOV r0,r6 + 0x01005438: f7fbf846 ..F. BL rt_hw_interrupt_enable ; 0x10004c8 + 0x0100543c: e05a Z. B 0x10054f4 ; rt_sem_take + 276 + 0x0100543e: 9802 .. LDR r0,[sp,#8] + 0x01005440: 2800 .( CMP r0,#0 + 0x01005442: d105 .. BNE 0x1005450 ; rt_sem_take + 112 + 0x01005444: 4630 0F MOV r0,r6 + 0x01005446: f7fbf83f ..?. BL rt_hw_interrupt_enable ; 0x10004c8 + 0x0100544a: 2001 . MOVS r0,#1 + 0x0100544c: 43c0 .C MVNS r0,r0 + 0x0100544e: bdfe .. POP {r1-r7,pc} + 0x01005450: bf00 .. NOP + 0x01005452: f7fbf835 ..5. BL rt_hw_interrupt_disable ; 0x10004c0 + 0x01005456: 9000 .. STR r0,[sp,#0] + 0x01005458: f000fda2 .... BL rt_thread_self ; 0x1005fa0 + 0x0100545c: 2800 .( CMP r0,#0 + 0x0100545e: d109 .. BNE 0x1005474 ; rt_sem_take + 148 + 0x01005460: 492a *I LDR r1,[pc,#168] ; [0x100550c] = 0x100781d + 0x01005462: a031 1. ADR r0,{pc}+0xc6 ; 0x1005528 + 0x01005464: f7fff834 ..4. BL rt_kprintf ; 0x10044d0 + 0x01005468: 22ff ." MOVS r2,#0xff + 0x0100546a: 32f8 .2 ADDS r2,r2,#0xf8 + 0x0100546c: 4927 'I LDR r1,[pc,#156] ; [0x100550c] = 0x100781d + 0x0100546e: a03c <. ADR r0,{pc}+0xf2 ; 0x1005560 + 0x01005470: f7fef8c6 .... BL rt_assert_handler ; 0x1003600 + 0x01005474: bf00 .. NOP + 0x01005476: f7fbf823 ..#. BL rt_hw_interrupt_disable ; 0x10004c0 + 0x0100547a: 4607 .F MOV r7,r0 + 0x0100547c: f7fefffe .... BL rt_interrupt_get_nest ; 0x100447c + 0x01005480: 2800 .( CMP r0,#0 + 0x01005482: d009 .. BEQ 0x1005498 ; rt_sem_take + 184 + 0x01005484: 4921 !I LDR r1,[pc,#132] ; [0x100550c] = 0x100781d + 0x01005486: a037 7. ADR r0,{pc}+0xde ; 0x1005564 + 0x01005488: f7fff822 ..". BL rt_kprintf ; 0x10044d0 + 0x0100548c: 22ff ." MOVS r2,#0xff + 0x0100548e: 32f8 .2 ADDS r2,r2,#0xf8 + 0x01005490: 491e .I LDR r1,[pc,#120] ; [0x100550c] = 0x100781d + 0x01005492: a033 3. ADR r0,{pc}+0xce ; 0x1005560 + 0x01005494: f7fef8b4 .... BL rt_assert_handler ; 0x1003600 + 0x01005498: 4638 8F MOV r0,r7 + 0x0100549a: f7fbf815 .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x0100549e: bf00 .. NOP + 0x010054a0: 9800 .. LDR r0,[sp,#0] + 0x010054a2: f7fbf811 .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x010054a6: bf00 .. NOP + 0x010054a8: f000fd7a ..z. BL rt_thread_self ; 0x1005fa0 + 0x010054ac: 4604 .F MOV r4,r0 + 0x010054ae: 2100 .! MOVS r1,#0 + 0x010054b0: 6321 !c STR r1,[r4,#0x30] + 0x010054b2: bf00 .. NOP + 0x010054b4: bf00 .. NOP + 0x010054b6: 7a6a jz LDRB r2,[r5,#9] + 0x010054b8: 4621 !F MOV r1,r4 + 0x010054ba: 4628 (F MOV r0,r5 + 0x010054bc: 3014 .0 ADDS r0,r0,#0x14 + 0x010054be: f7fbfdd3 .... BL _ipc_list_suspend ; 0x1001068 + 0x010054c2: 9802 .. LDR r0,[sp,#8] + 0x010054c4: 2800 .( CMP r0,#0 + 0x010054c6: dd0b .. BLE 0x10054e0 ; rt_sem_take + 256 + 0x010054c8: bf00 .. NOP + 0x010054ca: bf00 .. NOP + 0x010054cc: aa02 .. ADD r2,sp,#8 + 0x010054ce: 2100 .! MOVS r1,#0 + 0x010054d0: 4620 F MOV r0,r4 + 0x010054d2: 304c L0 ADDS r0,r0,#0x4c + 0x010054d4: f000ffa8 .... BL rt_timer_control ; 0x1006428 + 0x010054d8: 4620 F MOV r0,r4 + 0x010054da: 304c L0 ADDS r0,r0,#0x4c + 0x010054dc: f001f8aa .... BL rt_timer_start ; 0x1006634 + 0x010054e0: 4630 0F MOV r0,r6 + 0x010054e2: f7fafff1 .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x010054e6: f7fffda5 .... BL rt_schedule ; 0x1005034 + 0x010054ea: 6b20 k LDR r0,[r4,#0x30] + 0x010054ec: 2800 .( CMP r0,#0 + 0x010054ee: d001 .. BEQ 0x10054f4 ; rt_sem_take + 276 + 0x010054f0: 6b20 k LDR r0,[r4,#0x30] + 0x010054f2: e7ac .. B 0x100544e ; rt_sem_take + 110 + 0x010054f4: bf00 .. NOP + 0x010054f6: 4825 %H LDR r0,[pc,#148] ; [0x100558c] = 0x20114 + 0x010054f8: 6800 .h LDR r0,[r0,#0] + 0x010054fa: 2800 .( CMP r0,#0 + 0x010054fc: d003 .. BEQ 0x1005506 ; rt_sem_take + 294 + 0x010054fe: 4628 (F MOV r0,r5 + 0x01005500: 4922 "I LDR r1,[pc,#136] ; [0x100558c] = 0x20114 + 0x01005502: 6809 .h LDR r1,[r1,#0] + 0x01005504: 4788 .G BLX r1 + 0x01005506: bf00 .. NOP + 0x01005508: 2000 . MOVS r0,#0 + 0x0100550a: e7a0 .. B 0x100544e ; rt_sem_take + 110 + $d + 0x0100550c: 0100781d .x.. DCD 16807965 + 0x01005510: 206d6573 sem DCD 544040307 + 0x01005514: 52203d21 != R DCD 1377844513 + 0x01005518: 554e5f54 T_NU DCD 1431199572 + 0x0100551c: 00004c4c LL.. DCD 19532 + 0x01005520: 01007f08 .... DCD 16809736 + 0x01005524: 00020110 .... DCD 131344 + 0x01005528: 636e7546 Func DCD 1668183366 + 0x0100552c: 6e6f6974 tion DCD 1852795252 + 0x01005530: 5d73255b [%s] DCD 1567827291 + 0x01005534: 61687320 sha DCD 1634235168 + 0x01005538: 6e206c6c ll n DCD 1847618668 + 0x0100553c: 6220746f ot b DCD 1646294127 + 0x01005540: 73752065 e us DCD 1937055845 + 0x01005544: 62206465 ed b DCD 1646290021 + 0x01005548: 726f6665 efor DCD 1919903333 + 0x0100554c: 63732065 e sc DCD 1668489317 + 0x01005550: 75646568 hedu DCD 1969513832 + 0x01005554: 2072656c ler DCD 544367980 + 0x01005558: 72617473 star DCD 1918989427 + 0x0100555c: 00000a74 t... DCD 2676 + 0x01005560: 00000030 0... DCD 48 + 0x01005564: 636e7546 Func DCD 1668183366 + 0x01005568: 6e6f6974 tion DCD 1852795252 + 0x0100556c: 5d73255b [%s] DCD 1567827291 + 0x01005570: 61687320 sha DCD 1634235168 + 0x01005574: 6e206c6c ll n DCD 1847618668 + 0x01005578: 6220746f ot b DCD 1646294127 + 0x0100557c: 73752065 e us DCD 1937055845 + 0x01005580: 69206465 ed i DCD 1763730533 + 0x01005584: 5349206e n IS DCD 1397301358 + 0x01005588: 00000a52 R... DCD 2642 + 0x0100558c: 00020114 .... DCD 131348 + $t + i.rt_serial_close + rt_serial_close + 0x01005590: b570 p. PUSH {r4-r6,lr} + 0x01005592: 4604 .F MOV r4,r0 + 0x01005594: 2c00 ., CMP r4,#0 + 0x01005596: d104 .. BNE 0x10055a2 ; rt_serial_close + 18 + 0x01005598: 4a2b +J LDR r2,[pc,#172] ; [0x1005648] = 0x2e5 + 0x0100559a: 492c ,I LDR r1,[pc,#176] ; [0x100564c] = 0x1007360 + 0x0100559c: a02c ,. ADR r0,{pc}+0xb4 ; 0x1005650 + 0x0100559e: f7fef82f ../. BL rt_assert_handler ; 0x1003600 + 0x010055a2: 4625 %F MOV r5,r4 + 0x010055a4: 7ea0 .~ LDRB r0,[r4,#0x1a] + 0x010055a6: 2801 .( CMP r0,#1 + 0x010055a8: dd01 .. BLE 0x10055ae ; rt_serial_close + 30 + 0x010055aa: 2000 . MOVS r0,#0 + 0x010055ac: bd70 p. POP {r4-r6,pc} + 0x010055ae: 8b20 . LDRH r0,[r4,#0x18] + 0x010055b0: 21ff .! MOVS r1,#0xff + 0x010055b2: 3101 .1 ADDS r1,#1 + 0x010055b4: 4008 .@ ANDS r0,r0,r1 + 0x010055b6: 2800 .( CMP r0,#0 + 0x010055b8: d019 .. BEQ 0x10055ee ; rt_serial_close + 94 + 0x010055ba: 6c28 (l LDR r0,[r5,#0x40] + 0x010055bc: 460a .F MOV r2,r1 + 0x010055be: 2111 .! MOVS r1,#0x11 + 0x010055c0: 6843 Ch LDR r3,[r0,#4] + 0x010055c2: 4628 (F MOV r0,r5 + 0x010055c4: 4798 .G BLX r3 + 0x010055c6: 8b20 . LDRH r0,[r4,#0x18] + 0x010055c8: 21ff .! MOVS r1,#0xff + 0x010055ca: 3101 .1 ADDS r1,#1 + 0x010055cc: 4388 .C BICS r0,r0,r1 + 0x010055ce: 8320 . STRH r0,[r4,#0x18] + 0x010055d0: 6cee .l LDR r6,[r5,#0x4c] + 0x010055d2: 2e00 .. CMP r6,#0 + 0x010055d4: d105 .. BNE 0x10055e2 ; rt_serial_close + 82 + 0x010055d6: 22bd ." MOVS r2,#0xbd + 0x010055d8: 0092 .. LSLS r2,r2,#2 + 0x010055da: 491c .I LDR r1,[pc,#112] ; [0x100564c] = 0x1007360 + 0x010055dc: a020 . ADR r0,{pc}+0x84 ; 0x1005660 + 0x010055de: f7fef80f .... BL rt_assert_handler ; 0x1003600 + 0x010055e2: 4630 0F MOV r0,r6 + 0x010055e4: f7fefc74 ..t. BL rt_free ; 0x1003ed0 + 0x010055e8: 2000 . MOVS r0,#0 + 0x010055ea: 64e8 .d STR r0,[r5,#0x4c] + 0x010055ec: bf00 .. NOP + 0x010055ee: 8b20 . LDRH r0,[r4,#0x18] + 0x010055f0: 2101 .! MOVS r1,#1 + 0x010055f2: 0289 .. LSLS r1,r1,#10 + 0x010055f4: 4008 .@ ANDS r0,r0,r1 + 0x010055f6: 2800 .( CMP r0,#0 + 0x010055f8: d019 .. BEQ 0x100562e ; rt_serial_close + 158 + 0x010055fa: 6c28 (l LDR r0,[r5,#0x40] + 0x010055fc: 460a .F MOV r2,r1 + 0x010055fe: 2111 .! MOVS r1,#0x11 + 0x01005600: 6843 Ch LDR r3,[r0,#4] + 0x01005602: 4628 (F MOV r0,r5 + 0x01005604: 4798 .G BLX r3 + 0x01005606: 8b20 . LDRH r0,[r4,#0x18] + 0x01005608: 2101 .! MOVS r1,#1 + 0x0100560a: 0289 .. LSLS r1,r1,#10 + 0x0100560c: 4388 .C BICS r0,r0,r1 + 0x0100560e: 8320 . STRH r0,[r4,#0x18] + 0x01005610: 6d2e .m LDR r6,[r5,#0x50] + 0x01005612: 2e00 .. CMP r6,#0 + 0x01005614: d105 .. BNE 0x1005622 ; rt_serial_close + 146 + 0x01005616: 2219 ." MOVS r2,#0x19 + 0x01005618: 0152 R. LSLS r2,r2,#5 + 0x0100561a: 490c .I LDR r1,[pc,#48] ; [0x100564c] = 0x1007360 + 0x0100561c: a015 .. ADR r0,{pc}+0x58 ; 0x1005674 + 0x0100561e: f7fdffef .... BL rt_assert_handler ; 0x1003600 + 0x01005622: 4630 0F MOV r0,r6 + 0x01005624: f7fefc54 ..T. BL rt_free ; 0x1003ed0 + 0x01005628: 2000 . MOVS r0,#0 + 0x0100562a: 6528 (e STR r0,[r5,#0x50] + 0x0100562c: bf00 .. NOP + 0x0100562e: 6c28 (l LDR r0,[r5,#0x40] + 0x01005630: 2200 ." MOVS r2,#0 + 0x01005632: 2104 .! MOVS r1,#4 + 0x01005634: 6843 Ch LDR r3,[r0,#4] + 0x01005636: 4628 (F MOV r0,r5 + 0x01005638: 4798 .G BLX r3 + 0x0100563a: 8ae0 .. LDRH r0,[r4,#0x16] + 0x0100563c: 2110 .! MOVS r1,#0x10 + 0x0100563e: 4388 .C BICS r0,r0,r1 + 0x01005640: 82e0 .. STRH r0,[r4,#0x16] + 0x01005642: 2000 . MOVS r0,#0 + 0x01005644: e7b2 .. B 0x10055ac ; rt_serial_close + 28 + $d + 0x01005646: 0000 .. DCW 0 + 0x01005648: 000002e5 .... DCD 741 + 0x0100564c: 01007360 `s.. DCD 16806752 + 0x01005650: 20766564 dev DCD 544630116 + 0x01005654: 52203d21 != R DCD 1377844513 + 0x01005658: 554e5f54 T_NU DCD 1431199572 + 0x0100565c: 00004c4c LL.. DCD 19532 + 0x01005660: 665f7872 rx_f DCD 1717532786 + 0x01005664: 206f6669 ifo DCD 544171625 + 0x01005668: 52203d21 != R DCD 1377844513 + 0x0100566c: 554e5f54 T_NU DCD 1431199572 + 0x01005670: 00004c4c LL.. DCD 19532 + 0x01005674: 665f7874 tx_f DCD 1717532788 + 0x01005678: 206f6669 ifo DCD 544171625 + 0x0100567c: 52203d21 != R DCD 1377844513 + 0x01005680: 554e5f54 T_NU DCD 1431199572 + 0x01005684: 00004c4c LL.. DCD 19532 + $t + i.rt_serial_control + rt_serial_control + 0x01005688: b5f7 .. PUSH {r0-r2,r4-r7,lr} + 0x0100568a: b082 .. SUB sp,sp,#8 + 0x0100568c: 4605 .F MOV r5,r0 + 0x0100568e: 4616 .F MOV r6,r2 + 0x01005690: 2000 . MOVS r0,#0 + 0x01005692: 9001 .. STR r0,[sp,#4] + 0x01005694: 2d00 .- CMP r5,#0 + 0x01005696: d104 .. BNE 0x10056a2 ; rt_serial_control + 26 + 0x01005698: 4a20 J LDR r2,[pc,#128] ; [0x100571c] = 0x3dd + 0x0100569a: 4921 !I LDR r1,[pc,#132] ; [0x1005720] = 0x100738f + 0x0100569c: a021 !. ADR r0,{pc}+0x88 ; 0x1005724 + 0x0100569e: f7fdffaf .... BL rt_assert_handler ; 0x1003600 + 0x010056a2: 462c ,F MOV r4,r5 + 0x010056a4: 9803 .. LDR r0,[sp,#0xc] + 0x010056a6: 2801 .( CMP r0,#1 + 0x010056a8: d009 .. BEQ 0x10056be ; rt_serial_control + 54 + 0x010056aa: 2802 .( CMP r0,#2 + 0x010056ac: d002 .. BEQ 0x10056b4 ; rt_serial_control + 44 + 0x010056ae: 2803 .( CMP r0,#3 + 0x010056b0: d129 ). BNE 0x1005706 ; rt_serial_control + 126 + 0x010056b2: e009 .. B 0x10056c8 ; rt_serial_control + 64 + 0x010056b4: 8ae8 .. LDRH r0,[r5,#0x16] + 0x010056b6: 2120 ! MOVS r1,#0x20 + 0x010056b8: 4308 .C ORRS r0,r0,r1 + 0x010056ba: 82e8 .. STRH r0,[r5,#0x16] + 0x010056bc: e02b +. B 0x1005716 ; rt_serial_control + 142 + 0x010056be: 8ae8 .. LDRH r0,[r5,#0x16] + 0x010056c0: 2120 ! MOVS r1,#0x20 + 0x010056c2: 4388 .C BICS r0,r0,r1 + 0x010056c4: 82e8 .. STRH r0,[r5,#0x16] + 0x010056c6: e026 &. B 0x1005716 ; rt_serial_control + 142 + 0x010056c8: 2e00 .. CMP r6,#0 + 0x010056ca: d01b .. BEQ 0x1005704 ; rt_serial_control + 124 + 0x010056cc: 4637 7F MOV r7,r6 + 0x010056ce: 6878 xh LDR r0,[r7,#4] + 0x010056d0: 0180 .. LSLS r0,r0,#6 + 0x010056d2: 0c01 .. LSRS r1,r0,#16 + 0x010056d4: 6ca0 .l LDR r0,[r4,#0x48] + 0x010056d6: 0180 .. LSLS r0,r0,#6 + 0x010056d8: 0c00 .. LSRS r0,r0,#16 + 0x010056da: 4281 .B CMP r1,r0 + 0x010056dc: d005 .. BEQ 0x10056ea ; rt_serial_control + 98 + 0x010056de: 7ea0 .~ LDRB r0,[r4,#0x1a] + 0x010056e0: 2800 .( CMP r0,#0 + 0x010056e2: d002 .. BEQ 0x10056ea ; rt_serial_control + 98 + 0x010056e4: 2007 . MOVS r0,#7 + 0x010056e6: b005 .. ADD sp,sp,#0x14 + 0x010056e8: bdf0 .. POP {r4-r7,pc} + 0x010056ea: 687a zh LDR r2,[r7,#4] + 0x010056ec: 6839 9h LDR r1,[r7,#0] + 0x010056ee: 64a2 .d STR r2,[r4,#0x48] + 0x010056f0: 6461 ad STR r1,[r4,#0x44] + 0x010056f2: 7ea0 .~ LDRB r0,[r4,#0x1a] + 0x010056f4: 2800 .( CMP r0,#0 + 0x010056f6: d004 .. BEQ 0x1005702 ; rt_serial_control + 122 + 0x010056f8: 6c20 l LDR r0,[r4,#0x40] + 0x010056fa: 4631 1F MOV r1,r6 + 0x010056fc: 6802 .h LDR r2,[r0,#0] + 0x010056fe: 4620 F MOV r0,r4 + 0x01005700: 4790 .G BLX r2 + 0x01005702: bf00 .. NOP + 0x01005704: e007 .. B 0x1005716 ; rt_serial_control + 142 + 0x01005706: 6c20 l LDR r0,[r4,#0x40] + 0x01005708: 4632 2F MOV r2,r6 + 0x0100570a: 6843 Ch LDR r3,[r0,#4] + 0x0100570c: 4620 F MOV r0,r4 + 0x0100570e: 9903 .. LDR r1,[sp,#0xc] + 0x01005710: 4798 .G BLX r3 + 0x01005712: 9001 .. STR r0,[sp,#4] + 0x01005714: bf00 .. NOP + 0x01005716: bf00 .. NOP + 0x01005718: 9801 .. LDR r0,[sp,#4] + 0x0100571a: e7e4 .. B 0x10056e6 ; rt_serial_control + 94 + $d + 0x0100571c: 000003dd .... DCD 989 + 0x01005720: 0100738f .s.. DCD 16806799 + 0x01005724: 20766564 dev DCD 544630116 + 0x01005728: 52203d21 != R DCD 1377844513 + 0x0100572c: 554e5f54 T_NU DCD 1431199572 + 0x01005730: 00004c4c LL.. DCD 19532 + $t + i.rt_serial_init + rt_serial_init + 0x01005734: b570 p. PUSH {r4-r6,lr} + 0x01005736: 4605 .F MOV r5,r0 + 0x01005738: 2600 .& MOVS r6,#0 + 0x0100573a: 2d00 .- CMP r5,#0 + 0x0100573c: d104 .. BNE 0x1005748 ; rt_serial_init + 20 + 0x0100573e: 4a0b .J LDR r2,[pc,#44] ; [0x100576c] = 0x241 + 0x01005740: 490b .I LDR r1,[pc,#44] ; [0x1005770] = 0x1007342 + 0x01005742: a00c .. ADR r0,{pc}+0x32 ; 0x1005774 + 0x01005744: f7fdff5c ..\. BL rt_assert_handler ; 0x1003600 + 0x01005748: 462c ,F MOV r4,r5 + 0x0100574a: 2000 . MOVS r0,#0 + 0x0100574c: 64e0 .d STR r0,[r4,#0x4c] + 0x0100574e: 6520 e STR r0,[r4,#0x50] + 0x01005750: 6c20 l LDR r0,[r4,#0x40] + 0x01005752: 6800 .h LDR r0,[r0,#0] + 0x01005754: 2800 .( CMP r0,#0 + 0x01005756: d006 .. BEQ 0x1005766 ; rt_serial_init + 50 + 0x01005758: 6c20 l LDR r0,[r4,#0x40] + 0x0100575a: 4621 !F MOV r1,r4 + 0x0100575c: 3144 D1 ADDS r1,r1,#0x44 + 0x0100575e: 6802 .h LDR r2,[r0,#0] + 0x01005760: 4620 F MOV r0,r4 + 0x01005762: 4790 .G BLX r2 + 0x01005764: 4606 .F MOV r6,r0 + 0x01005766: 4630 0F MOV r0,r6 + 0x01005768: bd70 p. POP {r4-r6,pc} + $d + 0x0100576a: 0000 .. DCW 0 + 0x0100576c: 00000241 A... DCD 577 + 0x01005770: 01007342 Bs.. DCD 16806722 + 0x01005774: 20766564 dev DCD 544630116 + 0x01005778: 52203d21 != R DCD 1377844513 + 0x0100577c: 554e5f54 T_NU DCD 1431199572 + 0x01005780: 00004c4c LL.. DCD 19532 + $t + i.rt_serial_open + rt_serial_open + 0x01005784: b5f8 .. PUSH {r3-r7,lr} + 0x01005786: 4604 .F MOV r4,r0 + 0x01005788: 460e .F MOV r6,r1 + 0x0100578a: 2000 . MOVS r0,#0 + 0x0100578c: 9000 .. STR r0,[sp,#0] + 0x0100578e: 2c00 ., CMP r4,#0 + 0x01005790: d105 .. BNE 0x100579e ; rt_serial_open + 26 + 0x01005792: 2295 ." MOVS r2,#0x95 + 0x01005794: 0092 .. LSLS r2,r2,#2 + 0x01005796: 4960 `I LDR r1,[pc,#384] ; [0x1005918] = 0x1007351 + 0x01005798: a060 `. ADR r0,{pc}+0x184 ; 0x100591c + 0x0100579a: f7fdff31 ..1. BL rt_assert_handler ; 0x1003600 + 0x0100579e: 4625 %F MOV r5,r4 + 0x010057a0: 2001 . MOVS r0,#1 + 0x010057a2: 0240 @. LSLS r0,r0,#9 + 0x010057a4: 4030 0@ ANDS r0,r0,r6 + 0x010057a6: 2800 .( CMP r0,#0 + 0x010057a8: d008 .. BEQ 0x10057bc ; rt_serial_open + 56 + 0x010057aa: 8ae0 .. LDRH r0,[r4,#0x16] + 0x010057ac: 2101 .! MOVS r1,#1 + 0x010057ae: 0249 I. LSLS r1,r1,#9 + 0x010057b0: 4008 .@ ANDS r0,r0,r1 + 0x010057b2: 2800 .( CMP r0,#0 + 0x010057b4: d102 .. BNE 0x10057bc ; rt_serial_open + 56 + 0x010057b6: 2007 . MOVS r0,#7 + 0x010057b8: 43c0 .C MVNS r0,r0 + 0x010057ba: bdf8 .. POP {r3-r7,pc} + 0x010057bc: 2001 . MOVS r0,#1 + 0x010057be: 02c0 .. LSLS r0,r0,#11 + 0x010057c0: 4030 0@ ANDS r0,r0,r6 + 0x010057c2: 2800 .( CMP r0,#0 + 0x010057c4: d008 .. BEQ 0x10057d8 ; rt_serial_open + 84 + 0x010057c6: 8ae0 .. LDRH r0,[r4,#0x16] + 0x010057c8: 2101 .! MOVS r1,#1 + 0x010057ca: 02c9 .. LSLS r1,r1,#11 + 0x010057cc: 4008 .@ ANDS r0,r0,r1 + 0x010057ce: 2800 .( CMP r0,#0 + 0x010057d0: d102 .. BNE 0x10057d8 ; rt_serial_open + 84 + 0x010057d2: 2007 . MOVS r0,#7 + 0x010057d4: 43c0 .C MVNS r0,r0 + 0x010057d6: e7f0 .. B 0x10057ba ; rt_serial_open + 54 + 0x010057d8: 20ff . MOVS r0,#0xff + 0x010057da: 3001 .0 ADDS r0,#1 + 0x010057dc: 4030 0@ ANDS r0,r0,r6 + 0x010057de: 2800 .( CMP r0,#0 + 0x010057e0: d008 .. BEQ 0x10057f4 ; rt_serial_open + 112 + 0x010057e2: 8ae0 .. LDRH r0,[r4,#0x16] + 0x010057e4: 21ff .! MOVS r1,#0xff + 0x010057e6: 3101 .1 ADDS r1,#1 + 0x010057e8: 4008 .@ ANDS r0,r0,r1 + 0x010057ea: 2800 .( CMP r0,#0 + 0x010057ec: d102 .. BNE 0x10057f4 ; rt_serial_open + 112 + 0x010057ee: 2007 . MOVS r0,#7 + 0x010057f0: 43c0 .C MVNS r0,r0 + 0x010057f2: e7e2 .. B 0x10057ba ; rt_serial_open + 54 + 0x010057f4: 2001 . MOVS r0,#1 + 0x010057f6: 0280 .. LSLS r0,r0,#10 + 0x010057f8: 4030 0@ ANDS r0,r0,r6 + 0x010057fa: 2800 .( CMP r0,#0 + 0x010057fc: d008 .. BEQ 0x1005810 ; rt_serial_open + 140 + 0x010057fe: 8ae0 .. LDRH r0,[r4,#0x16] + 0x01005800: 2101 .! MOVS r1,#1 + 0x01005802: 0289 .. LSLS r1,r1,#10 + 0x01005804: 4008 .@ ANDS r0,r0,r1 + 0x01005806: 2800 .( CMP r0,#0 + 0x01005808: d102 .. BNE 0x1005810 ; rt_serial_open + 140 + 0x0100580a: 2007 . MOVS r0,#7 + 0x0100580c: 43c0 .C MVNS r0,r0 + 0x0100580e: e7d4 .. B 0x10057ba ; rt_serial_open + 54 + 0x01005810: 2040 @ MOVS r0,#0x40 + 0x01005812: 4030 0@ ANDS r0,r0,r6 + 0x01005814: 2800 .( CMP r0,#0 + 0x01005816: d104 .. BNE 0x1005822 ; rt_serial_open + 158 + 0x01005818: 8b20 . LDRH r0,[r4,#0x18] + 0x0100581a: 2140 @! MOVS r1,#0x40 + 0x0100581c: 4008 .@ ANDS r0,r0,r1 + 0x0100581e: 2800 .( CMP r0,#0 + 0x01005820: d001 .. BEQ 0x1005826 ; rt_serial_open + 162 + 0x01005822: 2040 @ MOVS r0,#0x40 + 0x01005824: 9000 .. STR r0,[sp,#0] + 0x01005826: b2f0 .. UXTB r0,r6 + 0x01005828: 8320 . STRH r0,[r4,#0x18] + 0x0100582a: 6ce8 .l LDR r0,[r5,#0x4c] + 0x0100582c: 2800 .( CMP r0,#0 + 0x0100582e: d131 1. BNE 0x1005894 ; rt_serial_open + 272 + 0x01005830: 20ff . MOVS r0,#0xff + 0x01005832: 3001 .0 ADDS r0,#1 + 0x01005834: 4030 0@ ANDS r0,r0,r6 + 0x01005836: 2800 .( CMP r0,#0 + 0x01005838: d029 ). BEQ 0x100588e ; rt_serial_open + 266 + 0x0100583a: 6ca9 .l LDR r1,[r5,#0x48] + 0x0100583c: 0189 .. LSLS r1,r1,#6 + 0x0100583e: 0c09 .. LSRS r1,r1,#16 + 0x01005840: 4608 .F MOV r0,r1 + 0x01005842: 300c .0 ADDS r0,r0,#0xc + 0x01005844: f7fefecc .... BL rt_malloc ; 0x10045e0 + 0x01005848: 4607 .F MOV r7,r0 + 0x0100584a: 2f00 ./ CMP r7,#0 + 0x0100584c: d104 .. BNE 0x1005858 ; rt_serial_open + 212 + 0x0100584e: 4a37 7J LDR r2,[pc,#220] ; [0x100592c] = 0x273 + 0x01005850: 4931 1I LDR r1,[pc,#196] ; [0x1005918] = 0x1007351 + 0x01005852: a037 7. ADR r0,{pc}+0xde ; 0x1005930 + 0x01005854: f7fdfed4 .... BL rt_assert_handler ; 0x1003600 + 0x01005858: 4638 8F MOV r0,r7 + 0x0100585a: 300c .0 ADDS r0,r0,#0xc + 0x0100585c: 6038 8` STR r0,[r7,#0] + 0x0100585e: 6ca9 .l LDR r1,[r5,#0x48] + 0x01005860: 0189 .. LSLS r1,r1,#6 + 0x01005862: 0c0a .. LSRS r2,r1,#16 + 0x01005864: 2100 .! MOVS r1,#0 + 0x01005866: 6838 8h LDR r0,[r7,#0] + 0x01005868: f7fff92b ..+. BL rt_memset ; 0x1004ac2 + 0x0100586c: 2000 . MOVS r0,#0 + 0x0100586e: 80b8 .. STRH r0,[r7,#4] + 0x01005870: 80f8 .. STRH r0,[r7,#6] + 0x01005872: 60b8 .` STR r0,[r7,#8] + 0x01005874: 64ef .d STR r7,[r5,#0x4c] + 0x01005876: 8b20 . LDRH r0,[r4,#0x18] + 0x01005878: 21ff .! MOVS r1,#0xff + 0x0100587a: 3101 .1 ADDS r1,#1 + 0x0100587c: 4308 .C ORRS r0,r0,r1 + 0x0100587e: 8320 . STRH r0,[r4,#0x18] + 0x01005880: 6c28 (l LDR r0,[r5,#0x40] + 0x01005882: 460a .F MOV r2,r1 + 0x01005884: 2110 .! MOVS r1,#0x10 + 0x01005886: 6843 Ch LDR r3,[r0,#4] + 0x01005888: 4628 (F MOV r0,r5 + 0x0100588a: 4798 .G BLX r3 + 0x0100588c: e00c .. B 0x10058a8 ; rt_serial_open + 292 + 0x0100588e: 2000 . MOVS r0,#0 + 0x01005890: 64e8 .d STR r0,[r5,#0x4c] + 0x01005892: e009 .. B 0x10058a8 ; rt_serial_open + 292 + 0x01005894: 20ff . MOVS r0,#0xff + 0x01005896: 3001 .0 ADDS r0,#1 + 0x01005898: 4030 0@ ANDS r0,r0,r6 + 0x0100589a: 2800 .( CMP r0,#0 + 0x0100589c: d004 .. BEQ 0x10058a8 ; rt_serial_open + 292 + 0x0100589e: 8b20 . LDRH r0,[r4,#0x18] + 0x010058a0: 21ff .! MOVS r1,#0xff + 0x010058a2: 3101 .1 ADDS r1,#1 + 0x010058a4: 4308 .C ORRS r0,r0,r1 + 0x010058a6: 8320 . STRH r0,[r4,#0x18] + 0x010058a8: 6d28 (m LDR r0,[r5,#0x50] + 0x010058aa: 2800 .( CMP r0,#0 + 0x010058ac: d123 #. BNE 0x10058f6 ; rt_serial_open + 370 + 0x010058ae: 2001 . MOVS r0,#1 + 0x010058b0: 0280 .. LSLS r0,r0,#10 + 0x010058b2: 4030 0@ ANDS r0,r0,r6 + 0x010058b4: 2800 .( CMP r0,#0 + 0x010058b6: d01b .. BEQ 0x10058f0 ; rt_serial_open + 364 + 0x010058b8: 200c . MOVS r0,#0xc + 0x010058ba: f7fefe91 .... BL rt_malloc ; 0x10045e0 + 0x010058be: 4607 .F MOV r7,r0 + 0x010058c0: 2f00 ./ CMP r7,#0 + 0x010058c2: d105 .. BNE 0x10058d0 ; rt_serial_open + 332 + 0x010058c4: 4a19 .J LDR r2,[pc,#100] ; [0x100592c] = 0x273 + 0x010058c6: 323f ?2 ADDS r2,r2,#0x3f + 0x010058c8: 4913 .I LDR r1,[pc,#76] ; [0x1005918] = 0x1007351 + 0x010058ca: a01e .. ADR r0,{pc}+0x7a ; 0x1005944 + 0x010058cc: f7fdfe98 .... BL rt_assert_handler ; 0x1003600 + 0x010058d0: 4638 8F MOV r0,r7 + 0x010058d2: f7fdff1b .... BL rt_completion_init ; 0x100370c + 0x010058d6: 652f /e STR r7,[r5,#0x50] + 0x010058d8: 8b20 . LDRH r0,[r4,#0x18] + 0x010058da: 2101 .! MOVS r1,#1 + 0x010058dc: 0289 .. LSLS r1,r1,#10 + 0x010058de: 4308 .C ORRS r0,r0,r1 + 0x010058e0: 8320 . STRH r0,[r4,#0x18] + 0x010058e2: 6c28 (l LDR r0,[r5,#0x40] + 0x010058e4: 460a .F MOV r2,r1 + 0x010058e6: 2110 .! MOVS r1,#0x10 + 0x010058e8: 6843 Ch LDR r3,[r0,#4] + 0x010058ea: 4628 (F MOV r0,r5 + 0x010058ec: 4798 .G BLX r3 + 0x010058ee: e00c .. B 0x100590a ; rt_serial_open + 390 + 0x010058f0: 2000 . MOVS r0,#0 + 0x010058f2: 6528 (e STR r0,[r5,#0x50] + 0x010058f4: e009 .. B 0x100590a ; rt_serial_open + 390 + 0x010058f6: 2001 . MOVS r0,#1 + 0x010058f8: 0280 .. LSLS r0,r0,#10 + 0x010058fa: 4030 0@ ANDS r0,r0,r6 + 0x010058fc: 2800 .( CMP r0,#0 + 0x010058fe: d004 .. BEQ 0x100590a ; rt_serial_open + 390 + 0x01005900: 8b20 . LDRH r0,[r4,#0x18] + 0x01005902: 2101 .! MOVS r1,#1 + 0x01005904: 0289 .. LSLS r1,r1,#10 + 0x01005906: 4308 .C ORRS r0,r0,r1 + 0x01005908: 8320 . STRH r0,[r4,#0x18] + 0x0100590a: 8b20 . LDRH r0,[r4,#0x18] + 0x0100590c: 9900 .. LDR r1,[sp,#0] + 0x0100590e: 4308 .C ORRS r0,r0,r1 + 0x01005910: 8320 . STRH r0,[r4,#0x18] + 0x01005912: 2000 . MOVS r0,#0 + 0x01005914: e751 Q. B 0x10057ba ; rt_serial_open + 54 + $d + 0x01005916: 0000 .. DCW 0 + 0x01005918: 01007351 Qs.. DCD 16806737 + 0x0100591c: 20766564 dev DCD 544630116 + 0x01005920: 52203d21 != R DCD 1377844513 + 0x01005924: 554e5f54 T_NU DCD 1431199572 + 0x01005928: 00004c4c LL.. DCD 19532 + 0x0100592c: 00000273 s... DCD 627 + 0x01005930: 665f7872 rx_f DCD 1717532786 + 0x01005934: 206f6669 ifo DCD 544171625 + 0x01005938: 52203d21 != R DCD 1377844513 + 0x0100593c: 554e5f54 T_NU DCD 1431199572 + 0x01005940: 00004c4c LL.. DCD 19532 + 0x01005944: 665f7874 tx_f DCD 1717532788 + 0x01005948: 206f6669 ifo DCD 544171625 + 0x0100594c: 52203d21 != R DCD 1377844513 + 0x01005950: 554e5f54 T_NU DCD 1431199572 + 0x01005954: 00004c4c LL.. DCD 19532 + $t + i.rt_serial_read + rt_serial_read + 0x01005958: b5f8 .. PUSH {r3-r7,lr} + 0x0100595a: 4604 .F MOV r4,r0 + 0x0100595c: 4617 .F MOV r7,r2 + 0x0100595e: 461d .F MOV r5,r3 + 0x01005960: 2c00 ., CMP r4,#0 + 0x01005962: d105 .. BNE 0x1005970 ; rt_serial_read + 24 + 0x01005964: 2269 i" MOVS r2,#0x69 + 0x01005966: 00d2 .. LSLS r2,r2,#3 + 0x01005968: 490d .I LDR r1,[pc,#52] ; [0x10059a0] = 0x1007370 + 0x0100596a: a00e .. ADR r0,{pc}+0x3a ; 0x10059a4 + 0x0100596c: f7fdfe48 ..H. BL rt_assert_handler ; 0x1003600 + 0x01005970: 2d00 .- CMP r5,#0 + 0x01005972: d101 .. BNE 0x1005978 ; rt_serial_read + 32 + 0x01005974: 2000 . MOVS r0,#0 + 0x01005976: bdf8 .. POP {r3-r7,pc} + 0x01005978: 4626 &F MOV r6,r4 + 0x0100597a: 8b20 . LDRH r0,[r4,#0x18] + 0x0100597c: 21ff .! MOVS r1,#0xff + 0x0100597e: 3101 .1 ADDS r1,#1 + 0x01005980: 4008 .@ ANDS r0,r0,r1 + 0x01005982: 2800 .( CMP r0,#0 + 0x01005984: d005 .. BEQ 0x1005992 ; rt_serial_read + 58 + 0x01005986: 462a *F MOV r2,r5 + 0x01005988: 4639 9F MOV r1,r7 + 0x0100598a: 4630 0F MOV r0,r6 + 0x0100598c: f7fbfd22 ..". BL _serial_int_rx ; 0x10013d4 + 0x01005990: e7f1 .. B 0x1005976 ; rt_serial_read + 30 + 0x01005992: 462a *F MOV r2,r5 + 0x01005994: 4639 9F MOV r1,r7 + 0x01005996: 4630 0F MOV r0,r6 + 0x01005998: f7fbfdc8 .... BL _serial_poll_rx ; 0x100152c + 0x0100599c: e7eb .. B 0x1005976 ; rt_serial_read + 30 + $d + 0x0100599e: 0000 .. DCW 0 + 0x010059a0: 01007370 ps.. DCD 16806768 + 0x010059a4: 20766564 dev DCD 544630116 + 0x010059a8: 52203d21 != R DCD 1377844513 + 0x010059ac: 554e5f54 T_NU DCD 1431199572 + 0x010059b0: 00004c4c LL.. DCD 19532 + $t + i.rt_serial_write + rt_serial_write + 0x010059b4: b5f8 .. PUSH {r3-r7,lr} + 0x010059b6: 4604 .F MOV r4,r0 + 0x010059b8: 4617 .F MOV r7,r2 + 0x010059ba: 461d .F MOV r5,r3 + 0x010059bc: 2c00 ., CMP r4,#0 + 0x010059be: d104 .. BNE 0x10059ca ; rt_serial_write + 22 + 0x010059c0: 4a0d .J LDR r2,[pc,#52] ; [0x10059f8] = 0x362 + 0x010059c2: 490e .I LDR r1,[pc,#56] ; [0x10059fc] = 0x100737f + 0x010059c4: a00e .. ADR r0,{pc}+0x3c ; 0x1005a00 + 0x010059c6: f7fdfe1b .... BL rt_assert_handler ; 0x1003600 + 0x010059ca: 2d00 .- CMP r5,#0 + 0x010059cc: d101 .. BNE 0x10059d2 ; rt_serial_write + 30 + 0x010059ce: 2000 . MOVS r0,#0 + 0x010059d0: bdf8 .. POP {r3-r7,pc} + 0x010059d2: 4626 &F MOV r6,r4 + 0x010059d4: 8b20 . LDRH r0,[r4,#0x18] + 0x010059d6: 2101 .! MOVS r1,#1 + 0x010059d8: 0289 .. LSLS r1,r1,#10 + 0x010059da: 4008 .@ ANDS r0,r0,r1 + 0x010059dc: 2800 .( CMP r0,#0 + 0x010059de: d005 .. BEQ 0x10059ec ; rt_serial_write + 56 + 0x010059e0: 462a *F MOV r2,r5 + 0x010059e2: 4639 9F MOV r1,r7 + 0x010059e4: 4630 0F MOV r0,r6 + 0x010059e6: f7fbfd53 ..S. BL _serial_int_tx ; 0x1001490 + 0x010059ea: e7f1 .. B 0x10059d0 ; rt_serial_write + 28 + 0x010059ec: 462a *F MOV r2,r5 + 0x010059ee: 4639 9F MOV r1,r7 + 0x010059f0: 4630 0F MOV r0,r6 + 0x010059f2: f7fbfdcf .... BL _serial_poll_tx ; 0x1001594 + 0x010059f6: e7eb .. B 0x10059d0 ; rt_serial_write + 28 + $d + 0x010059f8: 00000362 b... DCD 866 + 0x010059fc: 0100737f .s.. DCD 16806783 + 0x01005a00: 20766564 dev DCD 544630116 + 0x01005a04: 52203d21 != R DCD 1377844513 + 0x01005a08: 554e5f54 T_NU DCD 1431199572 + 0x01005a0c: 00004c4c LL.. DCD 19532 + $t + i.rt_set_errno + rt_set_errno + 0x01005a10: b570 p. PUSH {r4-r6,lr} + 0x01005a12: 4604 .F MOV r4,r0 + 0x01005a14: f7fefd32 ..2. BL rt_interrupt_get_nest ; 0x100447c + 0x01005a18: 2800 .( CMP r0,#0 + 0x01005a1a: d002 .. BEQ 0x1005a22 ; rt_set_errno + 18 + 0x01005a1c: 4806 .H LDR r0,[pc,#24] ; [0x1005a38] = 0x20048 + 0x01005a1e: 6004 .` STR r4,[r0,#0] + 0x01005a20: bd70 p. POP {r4-r6,pc} + 0x01005a22: f000fabd .... BL rt_thread_self ; 0x1005fa0 + 0x01005a26: 4605 .F MOV r5,r0 + 0x01005a28: 2d00 .- CMP r5,#0 + 0x01005a2a: d102 .. BNE 0x1005a32 ; rt_set_errno + 34 + 0x01005a2c: 4802 .H LDR r0,[pc,#8] ; [0x1005a38] = 0x20048 + 0x01005a2e: 6004 .` STR r4,[r0,#0] + 0x01005a30: e7f6 .. B 0x1005a20 ; rt_set_errno + 16 + 0x01005a32: 632c ,c STR r4,[r5,#0x30] + 0x01005a34: bf00 .. NOP + 0x01005a36: e7f3 .. B 0x1005a20 ; rt_set_errno + 16 + $d + 0x01005a38: 00020048 H... DCD 131144 + $t + i.rt_show_version + rt_show_version + 0x01005a3c: b508 .. PUSH {r3,lr} + 0x01005a3e: a009 .. ADR r0,{pc}+0x26 ; 0x1005a64 + 0x01005a40: f7fefd46 ..F. BL rt_kprintf ; 0x10044d0 + 0x01005a44: a00a .. ADR r0,{pc}+0x2c ; 0x1005a70 + 0x01005a46: f7fefd43 ..C. BL rt_kprintf ; 0x10044d0 + 0x01005a4a: a012 .. ADR r0,{pc}+0x4a ; 0x1005a94 + 0x01005a4c: 2304 .# MOVS r3,#4 + 0x01005a4e: 2200 ." MOVS r2,#0 + 0x01005a50: 4619 .F MOV r1,r3 + 0x01005a52: 9000 .. STR r0,[sp,#0] + 0x01005a54: a012 .. ADR r0,{pc}+0x4c ; 0x1005aa0 + 0x01005a56: f7fefd3b ..;. BL rt_kprintf ; 0x10044d0 + 0x01005a5a: a019 .. ADR r0,{pc}+0x66 ; 0x1005ac0 + 0x01005a5c: f7fefd38 ..8. BL rt_kprintf ; 0x10044d0 + 0x01005a60: bd08 .. POP {r3,pc} + $d + 0x01005a62: 0000 .. DCW 0 + 0x01005a64: 205c200a . \ DCD 542908426 + 0x01005a68: 0a2f207c | /. DCD 170860668 + 0x01005a6c: 00000000 .... DCD 0 + 0x01005a70: 5452202d - RT DCD 1414668333 + 0x01005a74: 20202d20 - DCD 538979616 + 0x01005a78: 54202020 T DCD 1411391520 + 0x01005a7c: 61657268 hrea DCD 1634038376 + 0x01005a80: 704f2064 d Op DCD 1884233828 + 0x01005a84: 74617265 erat DCD 1952543333 + 0x01005a88: 20676e69 ing DCD 543649385 + 0x01005a8c: 74737953 Syst DCD 1953724755 + 0x01005a90: 000a6d65 em.. DCD 683365 + 0x01005a94: 20706553 Sep DCD 544236883 + 0x01005a98: 32203920 9 2 DCD 840972576 + 0x01005a9c: 00313230 021. DCD 3224112 + 0x01005aa0: 7c202f20 / | DCD 2082484000 + 0x01005aa4: 20205c20 \ DCD 538991648 + 0x01005aa8: 25202020 % DCD 622862368 + 0x01005aac: 64252e64 d.%d DCD 1680158308 + 0x01005ab0: 2064252e .%d DCD 543434030 + 0x01005ab4: 6c697562 buil DCD 1818850658 + 0x01005ab8: 73252064 d %s DCD 1931812964 + 0x01005abc: 0000000a .... DCD 10 + 0x01005ac0: 30303220 200 DCD 808464928 + 0x01005ac4: 202d2036 6 - DCD 539828278 + 0x01005ac8: 31323032 2021 DCD 825372722 + 0x01005acc: 706f4320 Cop DCD 1886339872 + 0x01005ad0: 67697279 yrig DCD 1734963833 + 0x01005ad4: 62207468 ht b DCD 1646294120 + 0x01005ad8: 74722079 y rt DCD 1953636473 + 0x01005adc: 7268742d -thr DCD 1919448109 + 0x01005ae0: 20646165 ead DCD 543449445 + 0x01005ae4: 6d616574 team DCD 1835099508 + 0x01005ae8: 0000000a .... DCD 10 + $t + i.rt_sprintf + rt_sprintf + 0x01005aec: b40f .. PUSH {r0-r3} + 0x01005aee: b538 8. PUSH {r3-r5,lr} + 0x01005af0: 4604 .F MOV r4,r0 + 0x01005af2: a806 .. ADD r0,sp,#0x18 + 0x01005af4: 9000 .. STR r0,[sp,#0] + 0x01005af6: 4620 F MOV r0,r4 + 0x01005af8: 9a00 .. LDR r2,[sp,#0] + 0x01005afa: 9905 .. LDR r1,[sp,#0x14] + 0x01005afc: f001f8a4 .... BL rt_vsprintf ; 0x1006c48 + 0x01005b00: 4605 .F MOV r5,r0 + 0x01005b02: 2000 . MOVS r0,#0 + 0x01005b04: 9000 .. STR r0,[sp,#0] + 0x01005b06: 4628 (F MOV r0,r5 + 0x01005b08: bc38 8. POP {r3-r5} + 0x01005b0a: bc08 .. POP {r3} + 0x01005b0c: b004 .. ADD sp,sp,#0x10 + 0x01005b0e: 4718 .G BX r3 + i.rt_strncmp + rt_strncmp + 0x01005b10: b530 0. PUSH {r4,r5,lr} + 0x01005b12: 4603 .F MOV r3,r0 + 0x01005b14: 2000 . MOVS r0,#0 + 0x01005b16: e00c .. B 0x1005b32 ; rt_strncmp + 34 + 0x01005b18: 780d .x LDRB r5,[r1,#0] + 0x01005b1a: 1c49 I. ADDS r1,r1,#1 + 0x01005b1c: 781c .x LDRB r4,[r3,#0] + 0x01005b1e: 1b64 d. SUBS r4,r4,r5 + 0x01005b20: b264 d. SXTB r4,r4 + 0x01005b22: 1e20 . SUBS r0,r4,#0 + 0x01005b24: d103 .. BNE 0x1005b2e ; rt_strncmp + 30 + 0x01005b26: 781d .x LDRB r5,[r3,#0] + 0x01005b28: 1c5b [. ADDS r3,r3,#1 + 0x01005b2a: 2d00 .- CMP r5,#0 + 0x01005b2c: d100 .. BNE 0x1005b30 ; rt_strncmp + 32 + 0x01005b2e: e002 .. B 0x1005b36 ; rt_strncmp + 38 + 0x01005b30: 1e52 R. SUBS r2,r2,#1 + 0x01005b32: 2a00 .* CMP r2,#0 + 0x01005b34: d1f0 .. BNE 0x1005b18 ; rt_strncmp + 8 + 0x01005b36: bf00 .. NOP + 0x01005b38: bd30 0. POP {r4,r5,pc} + i.rt_strncpy + rt_strncpy + 0x01005b3a: b570 p. PUSH {r4-r6,lr} + 0x01005b3c: 4603 .F MOV r3,r0 + 0x01005b3e: 2a00 .* CMP r2,#0 + 0x01005b40: d015 .. BEQ 0x1005b6e ; rt_strncpy + 52 + 0x01005b42: 4618 .F MOV r0,r3 + 0x01005b44: 460c .F MOV r4,r1 + 0x01005b46: bf00 .. NOP + 0x01005b48: 7825 %x LDRB r5,[r4,#0] + 0x01005b4a: 7005 .p STRB r5,[r0,#0] + 0x01005b4c: 1c64 d. ADDS r4,r4,#1 + 0x01005b4e: 1c40 @. ADDS r0,r0,#1 + 0x01005b50: 2d00 .- CMP r5,#0 + 0x01005b52: d107 .. BNE 0x1005b64 ; rt_strncpy + 42 + 0x01005b54: e002 .. B 0x1005b5c ; rt_strncpy + 34 + 0x01005b56: 2500 .% MOVS r5,#0 + 0x01005b58: 7005 .p STRB r5,[r0,#0] + 0x01005b5a: 1c40 @. ADDS r0,r0,#1 + 0x01005b5c: 1e55 U. SUBS r5,r2,#1 + 0x01005b5e: 1e2a *. SUBS r2,r5,#0 + 0x01005b60: d1f9 .. BNE 0x1005b56 ; rt_strncpy + 28 + 0x01005b62: e002 .. B 0x1005b6a ; rt_strncpy + 48 + 0x01005b64: 1e55 U. SUBS r5,r2,#1 + 0x01005b66: 1e2a *. SUBS r2,r5,#0 + 0x01005b68: d1ee .. BNE 0x1005b48 ; rt_strncpy + 14 + 0x01005b6a: bf00 .. NOP + 0x01005b6c: bf00 .. NOP + 0x01005b6e: 4618 .F MOV r0,r3 + 0x01005b70: bd70 p. POP {r4-r6,pc} + 0x01005b72: 0000 .. MOVS r0,r0 + i.rt_system_heap_init + rt_system_heap_init + 0x01005b74: b5f3 .. PUSH {r0,r1,r4-r7,lr} + 0x01005b76: b081 .. SUB sp,sp,#4 + 0x01005b78: 4605 .F MOV r5,r0 + 0x01005b7a: 1ce8 .. ADDS r0,r5,#3 + 0x01005b7c: 0886 .. LSRS r6,r0,#2 + 0x01005b7e: 00b6 .. LSLS r6,r6,#2 + 0x01005b80: 9802 .. LDR r0,[sp,#8] + 0x01005b82: 0887 .. LSRS r7,r0,#2 + 0x01005b84: 00bf .. LSLS r7,r7,#2 + 0x01005b86: bf00 .. NOP + 0x01005b88: f7fafc9a .... BL rt_hw_interrupt_disable ; 0x10004c0 + 0x01005b8c: 9000 .. STR r0,[sp,#0] + 0x01005b8e: f7fefc75 ..u. BL rt_interrupt_get_nest ; 0x100447c + 0x01005b92: 2800 .( CMP r0,#0 + 0x01005b94: d008 .. BEQ 0x1005ba8 ; rt_system_heap_init + 52 + 0x01005b96: 4929 )I LDR r1,[pc,#164] ; [0x1005c3c] = 0x1007bfa + 0x01005b98: a029 ). ADR r0,{pc}+0xa8 ; 0x1005c40 + 0x01005b9a: f7fefc99 .... BL rt_kprintf ; 0x10044d0 + 0x01005b9e: 22d2 ." MOVS r2,#0xd2 + 0x01005ba0: 4926 &I LDR r1,[pc,#152] ; [0x1005c3c] = 0x1007bfa + 0x01005ba2: a031 1. ADR r0,{pc}+0xc6 ; 0x1005c68 + 0x01005ba4: f7fdfd2c ..,. BL rt_assert_handler ; 0x1003600 + 0x01005ba8: 9800 .. LDR r0,[sp,#0] + 0x01005baa: f7fafc8d .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x01005bae: bf00 .. NOP + 0x01005bb0: 2f18 ./ CMP r7,#0x18 + 0x01005bb2: d908 .. BLS 0x1005bc6 ; rt_system_heap_init + 82 + 0x01005bb4: 4638 8F MOV r0,r7 + 0x01005bb6: 3818 .8 SUBS r0,r0,#0x18 + 0x01005bb8: 42b0 .B CMP r0,r6 + 0x01005bba: d304 .. BCC 0x1005bc6 ; rt_system_heap_init + 82 + 0x01005bbc: 1bb8 .. SUBS r0,r7,r6 + 0x01005bbe: 3818 .8 SUBS r0,r0,#0x18 + 0x01005bc0: 492a *I LDR r1,[pc,#168] ; [0x1005c6c] = 0x20148 + 0x01005bc2: 6008 .` STR r0,[r1,#0] + 0x01005bc4: e005 .. B 0x1005bd2 ; rt_system_heap_init + 94 + 0x01005bc6: 4629 )F MOV r1,r5 + 0x01005bc8: a029 ). ADR r0,{pc}+0xa8 ; 0x1005c70 + 0x01005bca: 9a02 .. LDR r2,[sp,#8] + 0x01005bcc: f7fefc80 .... BL rt_kprintf ; 0x10044d0 + 0x01005bd0: bdfe .. POP {r1-r7,pc} + 0x01005bd2: 4836 6H LDR r0,[pc,#216] ; [0x1005cac] = 0x2013c + 0x01005bd4: 6006 .` STR r6,[r0,#0] + 0x01005bd6: bf00 .. NOP + 0x01005bd8: bf00 .. NOP + 0x01005bda: 6804 .h LDR r4,[r0,#0] + 0x01005bdc: 20f5 . MOVS r0,#0xf5 + 0x01005bde: 0140 @. LSLS r0,r0,#5 + 0x01005be0: 8020 . STRH r0,[r4,#0] + 0x01005be2: 4822 "H LDR r0,[pc,#136] ; [0x1005c6c] = 0x20148 + 0x01005be4: 6800 .h LDR r0,[r0,#0] + 0x01005be6: 300c .0 ADDS r0,r0,#0xc + 0x01005be8: 6060 `` STR r0,[r4,#4] + 0x01005bea: 2000 . MOVS r0,#0 + 0x01005bec: 60a0 .` STR r0,[r4,#8] + 0x01005bee: 8060 `. STRH r0,[r4,#2] + 0x01005bf0: 492e .I LDR r1,[pc,#184] ; [0x1005cac] = 0x2013c + 0x01005bf2: 6860 `h LDR r0,[r4,#4] + 0x01005bf4: 6809 .h LDR r1,[r1,#0] + 0x01005bf6: 1840 @. ADDS r0,r0,r1 + 0x01005bf8: 492d -I LDR r1,[pc,#180] ; [0x1005cb0] = 0x20140 + 0x01005bfa: 6008 .` STR r0,[r1,#0] + 0x01005bfc: 20f5 . MOVS r0,#0xf5 + 0x01005bfe: 0140 @. LSLS r0,r0,#5 + 0x01005c00: 6809 .h LDR r1,[r1,#0] + 0x01005c02: 8008 .. STRH r0,[r1,#0] + 0x01005c04: 2001 . MOVS r0,#1 + 0x01005c06: 492a *I LDR r1,[pc,#168] ; [0x1005cb0] = 0x20140 + 0x01005c08: 6809 .h LDR r1,[r1,#0] + 0x01005c0a: 8048 H. STRH r0,[r1,#2] + 0x01005c0c: 4817 .H LDR r0,[pc,#92] ; [0x1005c6c] = 0x20148 + 0x01005c0e: 6800 .h LDR r0,[r0,#0] + 0x01005c10: 300c .0 ADDS r0,r0,#0xc + 0x01005c12: 4927 'I LDR r1,[pc,#156] ; [0x1005cb0] = 0x20140 + 0x01005c14: 6809 .h LDR r1,[r1,#0] + 0x01005c16: 6048 H` STR r0,[r1,#4] + 0x01005c18: 4814 .H LDR r0,[pc,#80] ; [0x1005c6c] = 0x20148 + 0x01005c1a: 6800 .h LDR r0,[r0,#0] + 0x01005c1c: 300c .0 ADDS r0,r0,#0xc + 0x01005c1e: 4924 $I LDR r1,[pc,#144] ; [0x1005cb0] = 0x20140 + 0x01005c20: 6809 .h LDR r1,[r1,#0] + 0x01005c22: 6088 .` STR r0,[r1,#8] + 0x01005c24: 2301 .# MOVS r3,#1 + 0x01005c26: 461a .F MOV r2,r3 + 0x01005c28: a122 ". ADR r1,{pc}+0x8c ; 0x1005cb4 + 0x01005c2a: 4824 $H LDR r0,[pc,#144] ; [0x1005cbc] = 0x20584 + 0x01005c2c: f7fffb46 ..F. BL rt_sem_init ; 0x10052bc + 0x01005c30: 481e .H LDR r0,[pc,#120] ; [0x1005cac] = 0x2013c + 0x01005c32: 6800 .h LDR r0,[r0,#0] + 0x01005c34: 4922 "I LDR r1,[pc,#136] ; [0x1005cc0] = 0x20144 + 0x01005c36: 6008 .` STR r0,[r1,#0] + 0x01005c38: bf00 .. NOP + 0x01005c3a: e7c9 .. B 0x1005bd0 ; rt_system_heap_init + 92 + $d + 0x01005c3c: 01007bfa .{.. DCD 16808954 + 0x01005c40: 636e7546 Func DCD 1668183366 + 0x01005c44: 6e6f6974 tion DCD 1852795252 + 0x01005c48: 5d73255b [%s] DCD 1567827291 + 0x01005c4c: 61687320 sha DCD 1634235168 + 0x01005c50: 6e206c6c ll n DCD 1847618668 + 0x01005c54: 6220746f ot b DCD 1646294127 + 0x01005c58: 73752065 e us DCD 1937055845 + 0x01005c5c: 69206465 ed i DCD 1763730533 + 0x01005c60: 5349206e n IS DCD 1397301358 + 0x01005c64: 00000a52 R... DCD 2642 + 0x01005c68: 00000030 0... DCD 48 + 0x01005c6c: 00020148 H... DCD 131400 + 0x01005c70: 206d656d mem DCD 544040301 + 0x01005c74: 74696e69 init DCD 1953066601 + 0x01005c78: 7265202c , er DCD 1919229996 + 0x01005c7c: 20726f72 ror DCD 544370546 + 0x01005c80: 69676562 begi DCD 1768383842 + 0x01005c84: 6461206e n ad DCD 1684086894 + 0x01005c88: 73657264 dres DCD 1936028260 + 0x01005c8c: 78302073 s 0x DCD 2016419955 + 0x01005c90: 202c7825 %x, DCD 539785253 + 0x01005c94: 20646e61 and DCD 543452769 + 0x01005c98: 20646e65 end DCD 543452773 + 0x01005c9c: 72646461 addr DCD 1919181921 + 0x01005ca0: 20737365 ess DCD 544437093 + 0x01005ca4: 78257830 0x%x DCD 2015721520 + 0x01005ca8: 0000000a .... DCD 10 + 0x01005cac: 0002013c <... DCD 131388 + 0x01005cb0: 00020140 @... DCD 131392 + 0x01005cb4: 70616568 heap DCD 1885431144 + 0x01005cb8: 00000000 .... DCD 0 + 0x01005cbc: 00020584 .... DCD 132484 + 0x01005cc0: 00020144 D... DCD 131396 + $t + i.rt_system_scheduler_init + rt_system_scheduler_init + 0x01005cc4: 2100 .! MOVS r1,#0 + 0x01005cc6: 4a0a .J LDR r2,[pc,#40] ; [0x1005cf0] = 0x20028 + 0x01005cc8: 8011 .. STRH r1,[r2,#0] + 0x01005cca: bf00 .. NOP + 0x01005ccc: bf00 .. NOP + 0x01005cce: 2000 . MOVS r0,#0 + 0x01005cd0: e007 .. B 0x1005ce2 ; rt_system_scheduler_init + 30 + 0x01005cd2: 00c2 .. LSLS r2,r0,#3 + 0x01005cd4: 4b07 .K LDR r3,[pc,#28] ; [0x1005cf4] = 0x20274 + 0x01005cd6: 18d1 .. ADDS r1,r2,r3 + 0x01005cd8: 6049 I` STR r1,[r1,#4] + 0x01005cda: 6009 .` STR r1,[r1,#0] + 0x01005cdc: bf00 .. NOP + 0x01005cde: 1c41 A. ADDS r1,r0,#1 + 0x01005ce0: 4608 .F MOV r0,r1 + 0x01005ce2: 2820 ( CMP r0,#0x20 + 0x01005ce4: dbf5 .. BLT 0x1005cd2 ; rt_system_scheduler_init + 14 + 0x01005ce6: 2100 .! MOVS r1,#0 + 0x01005ce8: 4a03 .J LDR r2,[pc,#12] ; [0x1005cf8] = 0x20024 + 0x01005cea: 6011 .` STR r1,[r2,#0] + 0x01005cec: 4770 pG BX lr + $d + 0x01005cee: 0000 .. DCW 0 + 0x01005cf0: 00020028 (... DCD 131112 + 0x01005cf4: 00020274 t... DCD 131700 + 0x01005cf8: 00020024 $... DCD 131108 + $t + i.rt_system_scheduler_start + rt_system_scheduler_start + 0x01005cfc: b538 8. PUSH {r3-r5,lr} + 0x01005cfe: 4668 hF MOV r0,sp + 0x01005d00: f7fbfb30 ..0. BL _scheduler_get_highest_priority_thread ; 0x1001364 + 0x01005d04: 4604 .F MOV r4,r0 + 0x01005d06: 4806 .H LDR r0,[pc,#24] ; [0x1005d20] = 0x2002c + 0x01005d08: 6004 .` STR r4,[r0,#0] + 0x01005d0a: 4620 F MOV r0,r4 + 0x01005d0c: f7fffa94 .... BL rt_schedule_remove_thread ; 0x1005238 + 0x01005d10: 2103 .! MOVS r1,#3 + 0x01005d12: 2034 4 MOVS r0,#0x34 + 0x01005d14: 5501 .U STRB r1,[r0,r4] + 0x01005d16: 4620 F MOV r0,r4 + 0x01005d18: 301c .0 ADDS r0,r0,#0x1c + 0x01005d1a: f7fafc10 .... BL rt_hw_context_switch_to ; 0x100053e + 0x01005d1e: bd38 8. POP {r3-r5,pc} + $d + 0x01005d20: 0002002c ,... DCD 131116 + $t + i.rt_system_timer_init + rt_system_timer_init + 0x01005d24: b510 .. PUSH {r4,lr} + 0x01005d26: 2400 .$ MOVS r4,#0 + 0x01005d28: e005 .. B 0x1005d36 ; rt_system_timer_init + 18 + 0x01005d2a: 00e1 .. LSLS r1,r4,#3 + 0x01005d2c: 4a03 .J LDR r2,[pc,#12] ; [0x1005d3c] = 0x20054 + 0x01005d2e: 1888 .. ADDS r0,r1,r2 + 0x01005d30: f7fefbf9 .... BL rt_list_init ; 0x1004526 + 0x01005d34: 1c64 d. ADDS r4,r4,#1 + 0x01005d36: 2c00 ., CMP r4,#0 + 0x01005d38: d0f7 .. BEQ 0x1005d2a ; rt_system_timer_init + 6 + 0x01005d3a: bd10 .. POP {r4,pc} + $d + 0x01005d3c: 00020054 T... DCD 131156 + $t + i.rt_system_timer_thread_init + rt_system_timer_thread_init + 0x01005d40: 4770 pG BX lr + i.rt_thread_create + rt_thread_create + 0x01005d42: b5ff .. PUSH {r0-r7,lr} + 0x01005d44: b085 .. SUB sp,sp,#0x14 + 0x01005d46: 4606 .F MOV r6,r0 + 0x01005d48: 460f .F MOV r7,r1 + 0x01005d4a: 461d .F MOV r5,r3 + 0x01005d4c: 4631 1F MOV r1,r6 + 0x01005d4e: 2001 . MOVS r0,#1 + 0x01005d50: f7fefede .... BL rt_object_allocate ; 0x1004b10 + 0x01005d54: 9004 .. STR r0,[sp,#0x10] + 0x01005d56: 9804 .. LDR r0,[sp,#0x10] + 0x01005d58: 2800 .( CMP r0,#0 + 0x01005d5a: d101 .. BNE 0x1005d60 ; rt_thread_create + 30 + 0x01005d5c: b009 .. ADD sp,sp,#0x24 + 0x01005d5e: bdf0 .. POP {r4-r7,pc} + 0x01005d60: 4628 (F MOV r0,r5 + 0x01005d62: f7fefc3d ..=. BL rt_malloc ; 0x10045e0 + 0x01005d66: 4604 .F MOV r4,r0 + 0x01005d68: 2c00 ., CMP r4,#0 + 0x01005d6a: d104 .. BNE 0x1005d76 ; rt_thread_create + 52 + 0x01005d6c: 9804 .. LDR r0,[sp,#0x10] + 0x01005d6e: f7feff45 ..E. BL rt_object_delete ; 0x1004bfc + 0x01005d72: 2000 . MOVS r0,#0 + 0x01005d74: e7f2 .. B 0x1005d5c ; rt_thread_create + 26 + 0x01005d76: 990e .. LDR r1,[sp,#0x38] + 0x01005d78: 980f .. LDR r0,[sp,#0x3c] + 0x01005d7a: 9501 .. STR r5,[sp,#4] + 0x01005d7c: 9400 .. STR r4,[sp,#0] + 0x01005d7e: 9102 .. STR r1,[sp,#8] + 0x01005d80: 9003 .. STR r0,[sp,#0xc] + 0x01005d82: 463a :F MOV r2,r7 + 0x01005d84: 4631 1F MOV r1,r6 + 0x01005d86: 9b07 .. LDR r3,[sp,#0x1c] + 0x01005d88: 9804 .. LDR r0,[sp,#0x10] + 0x01005d8a: f7fbfc63 ..c. BL _thread_init ; 0x1001654 + 0x01005d8e: 9804 .. LDR r0,[sp,#0x10] + 0x01005d90: e7e4 .. B 0x1005d5c ; rt_thread_create + 26 + 0x01005d92: 0000 .. MOVS r0,r0 + i.rt_thread_defunct_dequeue + rt_thread_defunct_dequeue + 0x01005d94: b510 .. PUSH {r4,lr} + 0x01005d96: 2200 ." MOVS r2,#0 + 0x01005d98: 490a .I LDR r1,[pc,#40] ; [0x1005dc4] = 0x2003c + 0x01005d9a: 6808 .h LDR r0,[r1,#0] + 0x01005d9c: 4288 .B CMP r0,r1 + 0x01005d9e: d00e .. BEQ 0x1005dbe ; rt_thread_defunct_dequeue + 42 + 0x01005da0: 6808 .h LDR r0,[r1,#0] + 0x01005da2: 4602 .F MOV r2,r0 + 0x01005da4: 3a14 .: SUBS r2,r2,#0x14 + 0x01005da6: 4610 .F MOV r0,r2 + 0x01005da8: 3014 .0 ADDS r0,r0,#0x14 + 0x01005daa: 6804 .h LDR r4,[r0,#0] + 0x01005dac: 6843 Ch LDR r3,[r0,#4] + 0x01005dae: 6063 c` STR r3,[r4,#4] + 0x01005db0: 6844 Dh LDR r4,[r0,#4] + 0x01005db2: 6803 .h LDR r3,[r0,#0] + 0x01005db4: 6023 #` STR r3,[r4,#0] + 0x01005db6: 6040 @` STR r0,[r0,#4] + 0x01005db8: 6000 .` STR r0,[r0,#0] + 0x01005dba: bf00 .. NOP + 0x01005dbc: bf00 .. NOP + 0x01005dbe: 4610 .F MOV r0,r2 + 0x01005dc0: bd10 .. POP {r4,pc} + $d + 0x01005dc2: 0000 .. DCW 0 + 0x01005dc4: 0002003c <... DCD 131132 + $t + i.rt_thread_defunct_enqueue + rt_thread_defunct_enqueue + 0x01005dc8: 4602 .F MOV r2,r0 + 0x01005dca: 4805 .H LDR r0,[pc,#20] ; [0x1005de0] = 0x2003c + 0x01005dcc: 4611 .F MOV r1,r2 + 0x01005dce: 3114 .1 ADDS r1,r1,#0x14 + 0x01005dd0: 6803 .h LDR r3,[r0,#0] + 0x01005dd2: 6059 Y` STR r1,[r3,#4] + 0x01005dd4: 6803 .h LDR r3,[r0,#0] + 0x01005dd6: 600b .` STR r3,[r1,#0] + 0x01005dd8: 6001 .` STR r1,[r0,#0] + 0x01005dda: 6048 H` STR r0,[r1,#4] + 0x01005ddc: bf00 .. NOP + 0x01005dde: 4770 pG BX lr + $d + 0x01005de0: 0002003c <... DCD 131132 + $t + i.rt_thread_idle_entry + rt_thread_idle_entry + 0x01005de4: e00d .. B 0x1005e02 ; rt_thread_idle_entry + 30 + 0x01005de6: 2400 .$ MOVS r4,#0 + 0x01005de8: e006 .. B 0x1005df8 ; rt_thread_idle_entry + 20 + 0x01005dea: 00a0 .. LSLS r0,r4,#2 + 0x01005dec: 4905 .I LDR r1,[pc,#20] ; [0x1005e04] = 0x204f4 + 0x01005dee: 580d .X LDR r5,[r1,r0] + 0x01005df0: 2d00 .- CMP r5,#0 + 0x01005df2: d000 .. BEQ 0x1005df6 ; rt_thread_idle_entry + 18 + 0x01005df4: 47a8 .G BLX r5 + 0x01005df6: 1c64 d. ADDS r4,r4,#1 + 0x01005df8: 2c04 ., CMP r4,#4 + 0x01005dfa: d3f6 .. BCC 0x1005dea ; rt_thread_idle_entry + 6 + 0x01005dfc: f7fdfd8e .... BL rt_defunct_execute ; 0x100391c + 0x01005e00: bf00 .. NOP + 0x01005e02: e7f0 .. B 0x1005de6 ; rt_thread_idle_entry + 2 + $d + 0x01005e04: 000204f4 .... DCD 132340 + $t + i.rt_thread_idle_init + rt_thread_idle_init + 0x01005e08: b530 0. PUSH {r4,r5,lr} + 0x01005e0a: b087 .. SUB sp,sp,#0x1c + 0x01005e0c: 2400 .$ MOVS r4,#0 + 0x01005e0e: e01c .. B 0x1005e4a ; rt_thread_idle_init + 66 + 0x01005e10: 4622 "F MOV r2,r4 + 0x01005e12: a110 .. ADR r1,{pc}+0x42 ; 0x1005e54 + 0x01005e14: a805 .. ADD r0,sp,#0x14 + 0x01005e16: f7fffe69 ..i. BL rt_sprintf ; 0x1005aec + 0x01005e1a: 2120 ! MOVS r1,#0x20 + 0x01005e1c: 221f ." MOVS r2,#0x1f + 0x01005e1e: 00cb .. LSLS r3,r1,#3 + 0x01005e20: 0220 . LSLS r0,r4,#8 + 0x01005e22: 4d0e .M LDR r5,[pc,#56] ; [0x1005e5c] = 0x203f4 + 0x01005e24: 1940 @. ADDS r0,r0,r5 + 0x01005e26: 9301 .. STR r3,[sp,#4] + 0x01005e28: 9202 .. STR r2,[sp,#8] + 0x01005e2a: 9103 .. STR r1,[sp,#0xc] + 0x01005e2c: 9000 .. STR r0,[sp,#0] + 0x01005e2e: 01e1 .. LSLS r1,r4,#7 + 0x01005e30: 4a0b .J LDR r2,[pc,#44] ; [0x1005e60] = 0x20374 + 0x01005e32: 1888 .. ADDS r0,r1,r2 + 0x01005e34: 2300 .# MOVS r3,#0 + 0x01005e36: 4a0b .J LDR r2,[pc,#44] ; [0x1005e64] = 0x1005de5 + 0x01005e38: a905 .. ADD r1,sp,#0x14 + 0x01005e3a: f000f815 .... BL rt_thread_init ; 0x1005e68 + 0x01005e3e: 01e1 .. LSLS r1,r4,#7 + 0x01005e40: 4a07 .J LDR r2,[pc,#28] ; [0x1005e60] = 0x20374 + 0x01005e42: 1888 .. ADDS r0,r1,r2 + 0x01005e44: f000f8f4 .... BL rt_thread_startup ; 0x1006030 + 0x01005e48: 1c64 d. ADDS r4,r4,#1 + 0x01005e4a: 2c00 ., CMP r4,#0 + 0x01005e4c: d0e0 .. BEQ 0x1005e10 ; rt_thread_idle_init + 8 + 0x01005e4e: b007 .. ADD sp,sp,#0x1c + 0x01005e50: bd30 0. POP {r4,r5,pc} + $d + 0x01005e52: 0000 .. DCW 0 + 0x01005e54: 6c646974 tidl DCD 1818519924 + 0x01005e58: 00642565 e%d. DCD 6563173 + 0x01005e5c: 000203f4 .... DCD 132084 + 0x01005e60: 00020374 t... DCD 131956 + 0x01005e64: 01005de5 .].. DCD 16801253 + $t + i.rt_thread_init + rt_thread_init + 0x01005e68: b5ff .. PUSH {r0-r7,lr} + 0x01005e6a: b085 .. SUB sp,sp,#0x14 + 0x01005e6c: 4604 .F MOV r4,r0 + 0x01005e6e: 460d .F MOV r5,r1 + 0x01005e70: 9f0f .. LDR r7,[sp,#0x3c] + 0x01005e72: 9e0e .. LDR r6,[sp,#0x38] + 0x01005e74: 2c00 ., CMP r4,#0 + 0x01005e76: d105 .. BNE 0x1005e84 ; rt_thread_init + 28 + 0x01005e78: 22ff ." MOVS r2,#0xff + 0x01005e7a: 3210 .2 ADDS r2,r2,#0x10 + 0x01005e7c: 490f .I LDR r1,[pc,#60] ; [0x1005ebc] = 0x1007b3f + 0x01005e7e: a010 .. ADR r0,{pc}+0x42 ; 0x1005ec0 + 0x01005e80: f7fdfbbe .... BL rt_assert_handler ; 0x1003600 + 0x01005e84: 2e00 .. CMP r6,#0 + 0x01005e86: d105 .. BNE 0x1005e94 ; rt_thread_init + 44 + 0x01005e88: 22ff ." MOVS r2,#0xff + 0x01005e8a: 3211 .2 ADDS r2,r2,#0x11 + 0x01005e8c: 490b .I LDR r1,[pc,#44] ; [0x1005ebc] = 0x1007b3f + 0x01005e8e: a011 .. ADR r0,{pc}+0x46 ; 0x1005ed4 + 0x01005e90: f7fdfbb6 .... BL rt_assert_handler ; 0x1003600 + 0x01005e94: 462a *F MOV r2,r5 + 0x01005e96: 2101 .! MOVS r1,#1 + 0x01005e98: 4620 F MOV r0,r4 + 0x01005e9a: f7fff801 .... BL rt_object_init ; 0x1004ea0 + 0x01005e9e: 9910 .. LDR r1,[sp,#0x40] + 0x01005ea0: 9811 .. LDR r0,[sp,#0x44] + 0x01005ea2: 9701 .. STR r7,[sp,#4] + 0x01005ea4: 9600 .. STR r6,[sp,#0] + 0x01005ea6: 9102 .. STR r1,[sp,#8] + 0x01005ea8: 9003 .. STR r0,[sp,#0xc] + 0x01005eaa: 4629 )F MOV r1,r5 + 0x01005eac: 4620 F MOV r0,r4 + 0x01005eae: 9b08 .. LDR r3,[sp,#0x20] + 0x01005eb0: 9a07 .. LDR r2,[sp,#0x1c] + 0x01005eb2: f7fbfbcf .... BL _thread_init ; 0x1001654 + 0x01005eb6: b009 .. ADD sp,sp,#0x24 + 0x01005eb8: bdf0 .. POP {r4-r7,pc} + $d + 0x01005eba: 0000 .. DCW 0 + 0x01005ebc: 01007b3f ?{.. DCD 16808767 + 0x01005ec0: 65726874 thre DCD 1701996660 + 0x01005ec4: 21206461 ad ! DCD 555770977 + 0x01005ec8: 5452203d = RT DCD 1414668349 + 0x01005ecc: 4c554e5f _NUL DCD 1280659039 + 0x01005ed0: 0000004c L... DCD 76 + 0x01005ed4: 63617473 stac DCD 1667331187 + 0x01005ed8: 74735f6b k_st DCD 1953718123 + 0x01005edc: 20747261 art DCD 544502369 + 0x01005ee0: 52203d21 != R DCD 1377844513 + 0x01005ee4: 554e5f54 T_NU DCD 1431199572 + 0x01005ee8: 00004c4c LL.. DCD 19532 + $t + i.rt_thread_mdelay + rt_thread_mdelay + 0x01005eec: b570 p. PUSH {r4-r6,lr} + 0x01005eee: 4604 .F MOV r4,r0 + 0x01005ef0: 4620 F MOV r0,r4 + 0x01005ef2: f000f9d3 .... BL rt_tick_from_millisecond ; 0x100629c + 0x01005ef6: 4605 .F MOV r5,r0 + 0x01005ef8: 4628 (F MOV r0,r5 + 0x01005efa: f000f857 ..W. BL rt_thread_sleep ; 0x1005fac + 0x01005efe: bd70 p. POP {r4-r6,pc} + i.rt_thread_resume + rt_thread_resume + 0x01005f00: b570 p. PUSH {r4-r6,lr} + 0x01005f02: 4604 .F MOV r4,r0 + 0x01005f04: 2c00 ., CMP r4,#0 + 0x01005f06: d105 .. BNE 0x1005f14 ; rt_thread_resume + 20 + 0x01005f08: 22d1 ." MOVS r2,#0xd1 + 0x01005f0a: 0092 .. LSLS r2,r2,#2 + 0x01005f0c: 491b .I LDR r1,[pc,#108] ; [0x1005f7c] = 0x1007bcc + 0x01005f0e: a01c .. ADR r0,{pc}+0x72 ; 0x1005f80 + 0x01005f10: f7fdfb76 ..v. BL rt_assert_handler ; 0x1003600 + 0x01005f14: 4620 F MOV r0,r4 + 0x01005f16: f7feffa9 .... BL rt_object_get_type ; 0x1004e6c + 0x01005f1a: 2801 .( CMP r0,#1 + 0x01005f1c: d004 .. BEQ 0x1005f28 ; rt_thread_resume + 40 + 0x01005f1e: 4a1d .J LDR r2,[pc,#116] ; [0x1005f94] = 0x345 + 0x01005f20: 4916 .I LDR r1,[pc,#88] ; [0x1005f7c] = 0x1007bcc + 0x01005f22: 481d .H LDR r0,[pc,#116] ; [0x1005f98] = 0x1007f50 + 0x01005f24: f7fdfb6c ..l. BL rt_assert_handler ; 0x1003600 + 0x01005f28: bf00 .. NOP + 0x01005f2a: bf00 .. NOP + 0x01005f2c: 2034 4 MOVS r0,#0x34 + 0x01005f2e: 5d00 .] LDRB r0,[r0,r4] + 0x01005f30: 0740 @. LSLS r0,r0,#29 + 0x01005f32: 0f40 @. LSRS r0,r0,#29 + 0x01005f34: 2802 .( CMP r0,#2 + 0x01005f36: d004 .. BEQ 0x1005f42 ; rt_thread_resume + 66 + 0x01005f38: bf00 .. NOP + 0x01005f3a: bf00 .. NOP + 0x01005f3c: 2000 . MOVS r0,#0 + 0x01005f3e: 43c0 .C MVNS r0,r0 + 0x01005f40: bd70 p. POP {r4-r6,pc} + 0x01005f42: f7fafabd .... BL rt_hw_interrupt_disable ; 0x10004c0 + 0x01005f46: 4605 .F MOV r5,r0 + 0x01005f48: 4620 F MOV r0,r4 + 0x01005f4a: 3014 .0 ADDS r0,r0,#0x14 + 0x01005f4c: f7fefb3f ..?. BL rt_list_remove ; 0x10045ce + 0x01005f50: 4620 F MOV r0,r4 + 0x01005f52: 304c L0 ADDS r0,r0,#0x4c + 0x01005f54: f000fc58 ..X. BL rt_timer_stop ; 0x1006808 + 0x01005f58: 4620 F MOV r0,r4 + 0x01005f5a: f7fff91d .... BL rt_schedule_insert_thread ; 0x1005198 + 0x01005f5e: 4628 (F MOV r0,r5 + 0x01005f60: f7fafab2 .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x01005f64: bf00 .. NOP + 0x01005f66: 480d .H LDR r0,[pc,#52] ; [0x1005f9c] = 0x2012c + 0x01005f68: 6800 .h LDR r0,[r0,#0] + 0x01005f6a: 2800 .( CMP r0,#0 + 0x01005f6c: d003 .. BEQ 0x1005f76 ; rt_thread_resume + 118 + 0x01005f6e: 4620 F MOV r0,r4 + 0x01005f70: 490a .I LDR r1,[pc,#40] ; [0x1005f9c] = 0x2012c + 0x01005f72: 6809 .h LDR r1,[r1,#0] + 0x01005f74: 4788 .G BLX r1 + 0x01005f76: bf00 .. NOP + 0x01005f78: 2000 . MOVS r0,#0 + 0x01005f7a: e7e1 .. B 0x1005f40 ; rt_thread_resume + 64 + $d + 0x01005f7c: 01007bcc .{.. DCD 16808908 + 0x01005f80: 65726874 thre DCD 1701996660 + 0x01005f84: 21206461 ad ! DCD 555770977 + 0x01005f88: 5452203d = RT DCD 1414668349 + 0x01005f8c: 4c554e5f _NUL DCD 1280659039 + 0x01005f90: 0000004c L... DCD 76 + 0x01005f94: 00000345 E... DCD 837 + 0x01005f98: 01007f50 P... DCD 16809808 + 0x01005f9c: 0002012c ,... DCD 131372 + $t + i.rt_thread_self + rt_thread_self + 0x01005fa0: 4801 .H LDR r0,[pc,#4] ; [0x1005fa8] = 0x2002c + 0x01005fa2: 6800 .h LDR r0,[r0,#0] + 0x01005fa4: 4770 pG BX lr + $d + 0x01005fa6: 0000 .. DCW 0 + 0x01005fa8: 0002002c ,... DCD 131116 + $t + i.rt_thread_sleep + rt_thread_sleep + 0x01005fac: b531 1. PUSH {r0,r4,r5,lr} + 0x01005fae: f7fffff7 .... BL rt_thread_self ; 0x1005fa0 + 0x01005fb2: 4604 .F MOV r4,r0 + 0x01005fb4: 2c00 ., CMP r4,#0 + 0x01005fb6: d104 .. BNE 0x1005fc2 ; rt_thread_sleep + 22 + 0x01005fb8: 4a15 .J LDR r2,[pc,#84] ; [0x1006010] = 0x21d + 0x01005fba: 4916 .I LDR r1,[pc,#88] ; [0x1006014] = 0x1007b82 + 0x01005fbc: a016 .. ADR r0,{pc}+0x5c ; 0x1006018 + 0x01005fbe: f7fdfb1f .... BL rt_assert_handler ; 0x1003600 + 0x01005fc2: 4620 F MOV r0,r4 + 0x01005fc4: f7feff52 ..R. BL rt_object_get_type ; 0x1004e6c + 0x01005fc8: 2801 .( CMP r0,#1 + 0x01005fca: d005 .. BEQ 0x1005fd8 ; rt_thread_sleep + 44 + 0x01005fcc: 4a10 .J LDR r2,[pc,#64] ; [0x1006010] = 0x21d + 0x01005fce: 1c52 R. ADDS r2,r2,#1 + 0x01005fd0: 4910 .I LDR r1,[pc,#64] ; [0x1006014] = 0x1007b82 + 0x01005fd2: 4816 .H LDR r0,[pc,#88] ; [0x100602c] = 0x1007f50 + 0x01005fd4: f7fdfb14 .... BL rt_assert_handler ; 0x1003600 + 0x01005fd8: f7fafa72 ..r. BL rt_hw_interrupt_disable ; 0x10004c0 + 0x01005fdc: 4605 .F MOV r5,r0 + 0x01005fde: 4620 F MOV r0,r4 + 0x01005fe0: f000f88a .... BL rt_thread_suspend ; 0x10060f8 + 0x01005fe4: 466a jF MOV r2,sp + 0x01005fe6: 2100 .! MOVS r1,#0 + 0x01005fe8: 4620 F MOV r0,r4 + 0x01005fea: 304c L0 ADDS r0,r0,#0x4c + 0x01005fec: f000fa1c .... BL rt_timer_control ; 0x1006428 + 0x01005ff0: 4620 F MOV r0,r4 + 0x01005ff2: 304c L0 ADDS r0,r0,#0x4c + 0x01005ff4: f000fb1e .... BL rt_timer_start ; 0x1006634 + 0x01005ff8: 4628 (F MOV r0,r5 + 0x01005ffa: f7fafa65 ..e. BL rt_hw_interrupt_enable ; 0x10004c8 + 0x01005ffe: f7fff819 .... BL rt_schedule ; 0x1005034 + 0x01006002: 6b20 k LDR r0,[r4,#0x30] + 0x01006004: 1c80 .. ADDS r0,r0,#2 + 0x01006006: 2800 .( CMP r0,#0 + 0x01006008: d100 .. BNE 0x100600c ; rt_thread_sleep + 96 + 0x0100600a: 6320 c STR r0,[r4,#0x30] + 0x0100600c: 2000 . MOVS r0,#0 + 0x0100600e: bd38 8. POP {r3-r5,pc} + $d + 0x01006010: 0000021d .... DCD 541 + 0x01006014: 01007b82 .{.. DCD 16808834 + 0x01006018: 65726874 thre DCD 1701996660 + 0x0100601c: 21206461 ad ! DCD 555770977 + 0x01006020: 5452203d = RT DCD 1414668349 + 0x01006024: 4c554e5f _NUL DCD 1280659039 + 0x01006028: 0000004c L... DCD 76 + 0x0100602c: 01007f50 P... DCD 16809808 + $t + i.rt_thread_startup + rt_thread_startup + 0x01006030: b510 .. PUSH {r4,lr} + 0x01006032: 4604 .F MOV r4,r0 + 0x01006034: 2c00 ., CMP r4,#0 + 0x01006036: d105 .. BNE 0x1006044 ; rt_thread_startup + 20 + 0x01006038: 22ff ." MOVS r2,#0xff + 0x0100603a: 3242 B2 ADDS r2,r2,#0x42 + 0x0100603c: 4919 .I LDR r1,[pc,#100] ; [0x10060a4] = 0x1007b4e + 0x0100603e: a01a .. ADR r0,{pc}+0x6a ; 0x10060a8 + 0x01006040: f7fdfade .... BL rt_assert_handler ; 0x1003600 + 0x01006044: 2034 4 MOVS r0,#0x34 + 0x01006046: 5d00 .] LDRB r0,[r0,r4] + 0x01006048: 0740 @. LSLS r0,r0,#29 + 0x0100604a: 0f40 @. LSRS r0,r0,#29 + 0x0100604c: 2800 .( CMP r0,#0 + 0x0100604e: d005 .. BEQ 0x100605c ; rt_thread_startup + 44 + 0x01006050: 22ff ." MOVS r2,#0xff + 0x01006052: 3243 C2 ADDS r2,r2,#0x43 + 0x01006054: 4913 .I LDR r1,[pc,#76] ; [0x10060a4] = 0x1007b4e + 0x01006056: a019 .. ADR r0,{pc}+0x66 ; 0x10060bc + 0x01006058: f7fdfad2 .... BL rt_assert_handler ; 0x1003600 + 0x0100605c: 4620 F MOV r0,r4 + 0x0100605e: f7feff05 .... BL rt_object_get_type ; 0x1004e6c + 0x01006062: 2801 .( CMP r0,#1 + 0x01006064: d005 .. BEQ 0x1006072 ; rt_thread_startup + 66 + 0x01006066: 22ff ." MOVS r2,#0xff + 0x01006068: 3244 D2 ADDS r2,r2,#0x44 + 0x0100606a: 490e .I LDR r1,[pc,#56] ; [0x10060a4] = 0x1007b4e + 0x0100606c: 4821 !H LDR r0,[pc,#132] ; [0x10060f4] = 0x1007f50 + 0x0100606e: f7fdfac7 .... BL rt_assert_handler ; 0x1003600 + 0x01006072: 2036 6 MOVS r0,#0x36 + 0x01006074: 5d01 .] LDRB r1,[r0,r4] + 0x01006076: 2035 5 MOVS r0,#0x35 + 0x01006078: 5501 .U STRB r1,[r0,r4] + 0x0100607a: 5d01 .] LDRB r1,[r0,r4] + 0x0100607c: 2001 . MOVS r0,#1 + 0x0100607e: 4088 .@ LSLS r0,r0,r1 + 0x01006080: 63a0 .c STR r0,[r4,#0x38] + 0x01006082: bf00 .. NOP + 0x01006084: bf00 .. NOP + 0x01006086: 2102 .! MOVS r1,#2 + 0x01006088: 2034 4 MOVS r0,#0x34 + 0x0100608a: 5501 .U STRB r1,[r0,r4] + 0x0100608c: 4620 F MOV r0,r4 + 0x0100608e: f7ffff37 ..7. BL rt_thread_resume ; 0x1005f00 + 0x01006092: f7ffff85 .... BL rt_thread_self ; 0x1005fa0 + 0x01006096: 2800 .( CMP r0,#0 + 0x01006098: d001 .. BEQ 0x100609e ; rt_thread_startup + 110 + 0x0100609a: f7feffcb .... BL rt_schedule ; 0x1005034 + 0x0100609e: 2000 . MOVS r0,#0 + 0x010060a0: bd10 .. POP {r4,pc} + $d + 0x010060a2: 0000 .. DCW 0 + 0x010060a4: 01007b4e N{.. DCD 16808782 + 0x010060a8: 65726874 thre DCD 1701996660 + 0x010060ac: 21206461 ad ! DCD 555770977 + 0x010060b0: 5452203d = RT DCD 1414668349 + 0x010060b4: 4c554e5f _NUL DCD 1280659039 + 0x010060b8: 0000004c L... DCD 76 + 0x010060bc: 72687428 (thr DCD 1919448104 + 0x010060c0: 2d646165 ead- DCD 761553253 + 0x010060c4: 6174733e >sta DCD 1635021630 + 0x010060c8: 20262074 t & DCD 539369588 + 0x010060cc: 545f5452 RT_T DCD 1415533650 + 0x010060d0: 41455248 HREA DCD 1095062088 + 0x010060d4: 54535f44 D_ST DCD 1414750020 + 0x010060d8: 4d5f5441 AT_M DCD 1298093121 + 0x010060dc: 294b5341 ASK) DCD 692802369 + 0x010060e0: 203d3d20 == DCD 540884256 + 0x010060e4: 545f5452 RT_T DCD 1415533650 + 0x010060e8: 41455248 HREA DCD 1095062088 + 0x010060ec: 4e495f44 D_IN DCD 1313431364 + 0x010060f0: 00005449 IT.. DCD 21577 + 0x010060f4: 01007f50 P... DCD 16809808 + $t + i.rt_thread_suspend + rt_thread_suspend + 0x010060f8: b570 p. PUSH {r4-r6,lr} + 0x010060fa: 4604 .F MOV r4,r0 + 0x010060fc: 2c00 ., CMP r4,#0 + 0x010060fe: d105 .. BNE 0x100610c ; rt_thread_suspend + 20 + 0x01006100: 22c5 ." MOVS r2,#0xc5 + 0x01006102: 0092 .. LSLS r2,r2,#2 + 0x01006104: 4924 $I LDR r1,[pc,#144] ; [0x1006198] = 0x1007bba + 0x01006106: a025 %. ADR r0,{pc}+0x96 ; 0x100619c + 0x01006108: f7fdfa7a ..z. BL rt_assert_handler ; 0x1003600 + 0x0100610c: 4620 F MOV r0,r4 + 0x0100610e: f7fefead .... BL rt_object_get_type ; 0x1004e6c + 0x01006112: 2801 .( CMP r0,#1 + 0x01006114: d004 .. BEQ 0x1006120 ; rt_thread_suspend + 40 + 0x01006116: 4a26 &J LDR r2,[pc,#152] ; [0x10061b0] = 0x315 + 0x01006118: 491f .I LDR r1,[pc,#124] ; [0x1006198] = 0x1007bba + 0x0100611a: 4826 &H LDR r0,[pc,#152] ; [0x10061b4] = 0x1007f50 + 0x0100611c: f7fdfa70 ..p. BL rt_assert_handler ; 0x1003600 + 0x01006120: bf00 .. NOP + 0x01006122: bf00 .. NOP + 0x01006124: 2034 4 MOVS r0,#0x34 + 0x01006126: 5d00 .] LDRB r0,[r0,r4] + 0x01006128: 0745 E. LSLS r5,r0,#29 + 0x0100612a: 0f6d m. LSRS r5,r5,#29 + 0x0100612c: 2d01 .- CMP r5,#1 + 0x0100612e: d006 .. BEQ 0x100613e ; rt_thread_suspend + 70 + 0x01006130: 2d03 .- CMP r5,#3 + 0x01006132: d004 .. BEQ 0x100613e ; rt_thread_suspend + 70 + 0x01006134: bf00 .. NOP + 0x01006136: bf00 .. NOP + 0x01006138: 2000 . MOVS r0,#0 + 0x0100613a: 43c0 .C MVNS r0,r0 + 0x0100613c: bd70 p. POP {r4-r6,pc} + 0x0100613e: f7faf9bf .... BL rt_hw_interrupt_disable ; 0x10004c0 + 0x01006142: 4606 .F MOV r6,r0 + 0x01006144: 2d03 .- CMP r5,#3 + 0x01006146: d109 .. BNE 0x100615c ; rt_thread_suspend + 100 + 0x01006148: f7ffff2a ..*. BL rt_thread_self ; 0x1005fa0 + 0x0100614c: 42a0 .B CMP r0,r4 + 0x0100614e: d005 .. BEQ 0x100615c ; rt_thread_suspend + 100 + 0x01006150: 4a17 .J LDR r2,[pc,#92] ; [0x10061b0] = 0x315 + 0x01006152: 3211 .2 ADDS r2,r2,#0x11 + 0x01006154: 4910 .I LDR r1,[pc,#64] ; [0x1006198] = 0x1007bba + 0x01006156: a018 .. ADR r0,{pc}+0x62 ; 0x10061b8 + 0x01006158: f7fdfa52 ..R. BL rt_assert_handler ; 0x1003600 + 0x0100615c: 4620 F MOV r0,r4 + 0x0100615e: f7fff86b ..k. BL rt_schedule_remove_thread ; 0x1005238 + 0x01006162: 2034 4 MOVS r0,#0x34 + 0x01006164: 5d00 .] LDRB r0,[r0,r4] + 0x01006166: 08c0 .. LSRS r0,r0,#3 + 0x01006168: 00c0 .. LSLS r0,r0,#3 + 0x0100616a: 2102 .! MOVS r1,#2 + 0x0100616c: 4308 .C ORRS r0,r0,r1 + 0x0100616e: 2134 4! MOVS r1,#0x34 + 0x01006170: 5508 .U STRB r0,[r1,r4] + 0x01006172: 4620 F MOV r0,r4 + 0x01006174: 304c L0 ADDS r0,r0,#0x4c + 0x01006176: f000fb47 ..G. BL rt_timer_stop ; 0x1006808 + 0x0100617a: 4630 0F MOV r0,r6 + 0x0100617c: f7faf9a4 .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x01006180: bf00 .. NOP + 0x01006182: 4814 .H LDR r0,[pc,#80] ; [0x10061d4] = 0x20128 + 0x01006184: 6800 .h LDR r0,[r0,#0] + 0x01006186: 2800 .( CMP r0,#0 + 0x01006188: d003 .. BEQ 0x1006192 ; rt_thread_suspend + 154 + 0x0100618a: 4620 F MOV r0,r4 + 0x0100618c: 4911 .I LDR r1,[pc,#68] ; [0x10061d4] = 0x20128 + 0x0100618e: 6809 .h LDR r1,[r1,#0] + 0x01006190: 4788 .G BLX r1 + 0x01006192: bf00 .. NOP + 0x01006194: 2000 . MOVS r0,#0 + 0x01006196: e7d1 .. B 0x100613c ; rt_thread_suspend + 68 + $d + 0x01006198: 01007bba .{.. DCD 16808890 + 0x0100619c: 65726874 thre DCD 1701996660 + 0x010061a0: 21206461 ad ! DCD 555770977 + 0x010061a4: 5452203d = RT DCD 1414668349 + 0x010061a8: 4c554e5f _NUL DCD 1280659039 + 0x010061ac: 0000004c L... DCD 76 + 0x010061b0: 00000315 .... DCD 789 + 0x010061b4: 01007f50 P... DCD 16809808 + 0x010061b8: 65726874 thre DCD 1701996660 + 0x010061bc: 3d206461 ad = DCD 1025533025 + 0x010061c0: 7472203d = rt DCD 1953636413 + 0x010061c4: 7268745f _thr DCD 1919448159 + 0x010061c8: 5f646165 ead_ DCD 1600414053 + 0x010061cc: 666c6573 self DCD 1718379891 + 0x010061d0: 00002928 ().. DCD 10536 + 0x010061d4: 00020128 (... DCD 131368 + $t + i.rt_thread_timeout + rt_thread_timeout + 0x010061d8: b570 p. PUSH {r4-r6,lr} + 0x010061da: 4605 .F MOV r5,r0 + 0x010061dc: 462c ,F MOV r4,r5 + 0x010061de: 2c00 ., CMP r4,#0 + 0x010061e0: d104 .. BNE 0x10061ec ; rt_thread_timeout + 20 + 0x010061e2: 4a17 .J LDR r2,[pc,#92] ; [0x1006240] = 0x372 + 0x010061e4: 4917 .I LDR r1,[pc,#92] ; [0x1006244] = 0x1007bdd + 0x010061e6: a018 .. ADR r0,{pc}+0x62 ; 0x1006248 + 0x010061e8: f7fdfa0a .... BL rt_assert_handler ; 0x1003600 + 0x010061ec: 2034 4 MOVS r0,#0x34 + 0x010061ee: 5d00 .] LDRB r0,[r0,r4] + 0x010061f0: 0740 @. LSLS r0,r0,#29 + 0x010061f2: 0f40 @. LSRS r0,r0,#29 + 0x010061f4: 2802 .( CMP r0,#2 + 0x010061f6: d005 .. BEQ 0x1006204 ; rt_thread_timeout + 44 + 0x010061f8: 4a11 .J LDR r2,[pc,#68] ; [0x1006240] = 0x372 + 0x010061fa: 1c52 R. ADDS r2,r2,#1 + 0x010061fc: 4911 .I LDR r1,[pc,#68] ; [0x1006244] = 0x1007bdd + 0x010061fe: a017 .. ADR r0,{pc}+0x5e ; 0x100625c + 0x01006200: f7fdf9fe .... BL rt_assert_handler ; 0x1003600 + 0x01006204: 4620 F MOV r0,r4 + 0x01006206: f7fefe31 ..1. BL rt_object_get_type ; 0x1004e6c + 0x0100620a: 2801 .( CMP r0,#1 + 0x0100620c: d005 .. BEQ 0x100621a ; rt_thread_timeout + 66 + 0x0100620e: 22dd ." MOVS r2,#0xdd + 0x01006210: 0092 .. LSLS r2,r2,#2 + 0x01006212: 490c .I LDR r1,[pc,#48] ; [0x1006244] = 0x1007bdd + 0x01006214: 4820 H LDR r0,[pc,#128] ; [0x1006298] = 0x1007f50 + 0x01006216: f7fdf9f3 .... BL rt_assert_handler ; 0x1003600 + 0x0100621a: f7faf951 ..Q. BL rt_hw_interrupt_disable ; 0x10004c0 + 0x0100621e: 4606 .F MOV r6,r0 + 0x01006220: 2001 . MOVS r0,#1 + 0x01006222: 43c0 .C MVNS r0,r0 + 0x01006224: 6320 c STR r0,[r4,#0x30] + 0x01006226: 4620 F MOV r0,r4 + 0x01006228: 3014 .0 ADDS r0,r0,#0x14 + 0x0100622a: f7fef9d0 .... BL rt_list_remove ; 0x10045ce + 0x0100622e: 4620 F MOV r0,r4 + 0x01006230: f7feffb2 .... BL rt_schedule_insert_thread ; 0x1005198 + 0x01006234: 4630 0F MOV r0,r6 + 0x01006236: f7faf947 ..G. BL rt_hw_interrupt_enable ; 0x10004c8 + 0x0100623a: f7fefefb .... BL rt_schedule ; 0x1005034 + 0x0100623e: bd70 p. POP {r4-r6,pc} + $d + 0x01006240: 00000372 r... DCD 882 + 0x01006244: 01007bdd .{.. DCD 16808925 + 0x01006248: 65726874 thre DCD 1701996660 + 0x0100624c: 21206461 ad ! DCD 555770977 + 0x01006250: 5452203d = RT DCD 1414668349 + 0x01006254: 4c554e5f _NUL DCD 1280659039 + 0x01006258: 0000004c L... DCD 76 + 0x0100625c: 72687428 (thr DCD 1919448104 + 0x01006260: 2d646165 ead- DCD 761553253 + 0x01006264: 6174733e >sta DCD 1635021630 + 0x01006268: 20262074 t & DCD 539369588 + 0x0100626c: 545f5452 RT_T DCD 1415533650 + 0x01006270: 41455248 HREA DCD 1095062088 + 0x01006274: 54535f44 D_ST DCD 1414750020 + 0x01006278: 4d5f5441 AT_M DCD 1298093121 + 0x0100627c: 294b5341 ASK) DCD 692802369 + 0x01006280: 203d3d20 == DCD 540884256 + 0x01006284: 545f5452 RT_T DCD 1415533650 + 0x01006288: 41455248 HREA DCD 1095062088 + 0x0100628c: 55535f44 D_SU DCD 1431527236 + 0x01006290: 4e455053 SPEN DCD 1313165395 + 0x01006294: 00000044 D... DCD 68 + 0x01006298: 01007f50 P... DCD 16809808 + $t + i.rt_tick_from_millisecond + rt_tick_from_millisecond + 0x0100629c: b570 p. PUSH {r4-r6,lr} + 0x0100629e: 4605 .F MOV r5,r0 + 0x010062a0: 2d00 .- CMP r5,#0 + 0x010062a2: da02 .. BGE 0x10062aa ; rt_tick_from_millisecond + 14 + 0x010062a4: 2400 .$ MOVS r4,#0 + 0x010062a6: 43e4 .C MVNS r4,r4 + 0x010062a8: e015 .. B 0x10062d6 ; rt_tick_from_millisecond + 58 + 0x010062aa: 217d }! MOVS r1,#0x7d + 0x010062ac: 00c9 .. LSLS r1,r1,#3 + 0x010062ae: 4628 (F MOV r0,r5 + 0x010062b0: f7fafae6 .... BL __aeabi_idiv ; 0x1000880 + 0x010062b4: 2164 d! MOVS r1,#0x64 + 0x010062b6: 4348 HC MULS r0,r1,r0 + 0x010062b8: 4604 .F MOV r4,r0 + 0x010062ba: 217d }! MOVS r1,#0x7d + 0x010062bc: 00c9 .. LSLS r1,r1,#3 + 0x010062be: 4628 (F MOV r0,r5 + 0x010062c0: f7fafade .... BL __aeabi_idiv ; 0x1000880 + 0x010062c4: 2064 d MOVS r0,#0x64 + 0x010062c6: 4341 AC MULS r1,r0,r1 + 0x010062c8: 4804 .H LDR r0,[pc,#16] ; [0x10062dc] = 0x3e7 + 0x010062ca: 180e .. ADDS r6,r1,r0 + 0x010062cc: 1c41 A. ADDS r1,r0,#1 + 0x010062ce: 4630 0F MOV r0,r6 + 0x010062d0: f7fafad6 .... BL __aeabi_idiv ; 0x1000880 + 0x010062d4: 1904 .. ADDS r4,r0,r4 + 0x010062d6: 4620 F MOV r0,r4 + 0x010062d8: bd70 p. POP {r4-r6,pc} + $d + 0x010062da: 0000 .. DCW 0 + 0x010062dc: 000003e7 .... DCD 999 + $t + i.rt_tick_get + rt_tick_get + 0x010062e0: 4801 .H LDR r0,[pc,#4] ; [0x10062e8] = 0x20044 + 0x010062e2: 6800 .h LDR r0,[r0,#0] + 0x010062e4: 4770 pG BX lr + $d + 0x010062e6: 0000 .. DCW 0 + 0x010062e8: 00020044 D... DCD 131140 + $t + i.rt_tick_increase + rt_tick_increase + 0x010062ec: b570 p. PUSH {r4-r6,lr} + 0x010062ee: f7faf8e7 .... BL rt_hw_interrupt_disable ; 0x10004c0 + 0x010062f2: 4605 .F MOV r5,r0 + 0x010062f4: 4810 .H LDR r0,[pc,#64] ; [0x1006338] = 0x20044 + 0x010062f6: 6800 .h LDR r0,[r0,#0] + 0x010062f8: 1c40 @. ADDS r0,r0,#1 + 0x010062fa: 490f .I LDR r1,[pc,#60] ; [0x1006338] = 0x20044 + 0x010062fc: 6008 .` STR r0,[r1,#0] + 0x010062fe: f7fffe4f ..O. BL rt_thread_self ; 0x1005fa0 + 0x01006302: 4604 .F MOV r4,r0 + 0x01006304: 6ca0 .l LDR r0,[r4,#0x48] + 0x01006306: 1e40 @. SUBS r0,r0,#1 + 0x01006308: 64a0 .d STR r0,[r4,#0x48] + 0x0100630a: 6ca0 .l LDR r0,[r4,#0x48] + 0x0100630c: 2800 .( CMP r0,#0 + 0x0100630e: d10d .. BNE 0x100632c ; rt_tick_increase + 64 + 0x01006310: 6c60 `l LDR r0,[r4,#0x44] + 0x01006312: 64a0 .d STR r0,[r4,#0x48] + 0x01006314: 2034 4 MOVS r0,#0x34 + 0x01006316: 5d00 .] LDRB r0,[r0,r4] + 0x01006318: 2108 .! MOVS r1,#8 + 0x0100631a: 4308 .C ORRS r0,r0,r1 + 0x0100631c: 2134 4! MOVS r1,#0x34 + 0x0100631e: 5508 .U STRB r0,[r1,r4] + 0x01006320: 4628 (F MOV r0,r5 + 0x01006322: f7faf8d1 .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x01006326: f7fefe85 .... BL rt_schedule ; 0x1005034 + 0x0100632a: e002 .. B 0x1006332 ; rt_tick_increase + 70 + 0x0100632c: 4628 (F MOV r0,r5 + 0x0100632e: f7faf8cb .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x01006332: f000f803 .... BL rt_timer_check ; 0x100633c + 0x01006336: bd70 p. POP {r4-r6,pc} + $d + 0x01006338: 00020044 D... DCD 131140 + $t + i.rt_timer_check + rt_timer_check + 0x0100633c: b57c |. PUSH {r2-r6,lr} + 0x0100633e: 4668 hF MOV r0,sp + 0x01006340: f7fef8f1 .... BL rt_list_init ; 0x1004526 + 0x01006344: bf00 .. NOP + 0x01006346: bf00 .. NOP + 0x01006348: f7ffffca .... BL rt_tick_get ; 0x10062e0 + 0x0100634c: 4605 .F MOV r5,r0 + 0x0100634e: f7faf8b7 .... BL rt_hw_interrupt_disable ; 0x10004c0 + 0x01006352: 4606 .F MOV r6,r0 + 0x01006354: e053 S. B 0x10063fe ; rt_timer_check + 194 + 0x01006356: 4830 0H LDR r0,[pc,#192] ; [0x1006418] = 0x20054 + 0x01006358: 6800 .h LDR r0,[r0,#0] + 0x0100635a: 4604 .F MOV r4,r0 + 0x0100635c: 3c14 .< SUBS r4,r4,#0x14 + 0x0100635e: 6aa0 .j LDR r0,[r4,#0x28] + 0x01006360: 1a28 (. SUBS r0,r5,r0 + 0x01006362: 492e .I LDR r1,[pc,#184] ; [0x100641c] = 0x7fffffff + 0x01006364: 4288 .B CMP r0,r1 + 0x01006366: d248 H. BCS 0x10063fa ; rt_timer_check + 190 + 0x01006368: bf00 .. NOP + 0x0100636a: 482d -H LDR r0,[pc,#180] ; [0x1006420] = 0x2005c + 0x0100636c: 6800 .h LDR r0,[r0,#0] + 0x0100636e: 2800 .( CMP r0,#0 + 0x01006370: d003 .. BEQ 0x100637a ; rt_timer_check + 62 + 0x01006372: 4620 F MOV r0,r4 + 0x01006374: 492a *I LDR r1,[pc,#168] ; [0x1006420] = 0x2005c + 0x01006376: 6809 .h LDR r1,[r1,#0] + 0x01006378: 4788 .G BLX r1 + 0x0100637a: bf00 .. NOP + 0x0100637c: 4620 F MOV r0,r4 + 0x0100637e: f7fbf9f1 .... BL _timer_remove ; 0x1001764 + 0x01006382: 7a60 `z LDRB r0,[r4,#9] + 0x01006384: 2102 .! MOVS r1,#2 + 0x01006386: 4008 .@ ANDS r0,r0,r1 + 0x01006388: 2800 .( CMP r0,#0 + 0x0100638a: d103 .. BNE 0x1006394 ; rt_timer_check + 88 + 0x0100638c: 7a60 `z LDRB r0,[r4,#9] + 0x0100638e: 0840 @. LSRS r0,r0,#1 + 0x01006390: 0040 @. LSLS r0,r0,#1 + 0x01006392: 7260 `r STRB r0,[r4,#9] + 0x01006394: 4621 !F MOV r1,r4 + 0x01006396: 3114 .1 ADDS r1,r1,#0x14 + 0x01006398: 4668 hF MOV r0,sp + 0x0100639a: f7fef8c7 .... BL rt_list_insert_after ; 0x100452c + 0x0100639e: 69e1 .i LDR r1,[r4,#0x1c] + 0x010063a0: 6a20 j LDR r0,[r4,#0x20] + 0x010063a2: 4788 .G BLX r1 + 0x010063a4: f7ffff9c .... BL rt_tick_get ; 0x10062e0 + 0x010063a8: 4605 .F MOV r5,r0 + 0x010063aa: bf00 .. NOP + 0x010063ac: 481d .H LDR r0,[pc,#116] ; [0x1006424] = 0x20060 + 0x010063ae: 6800 .h LDR r0,[r0,#0] + 0x010063b0: 2800 .( CMP r0,#0 + 0x010063b2: d003 .. BEQ 0x10063bc ; rt_timer_check + 128 + 0x010063b4: 4620 F MOV r0,r4 + 0x010063b6: 491b .I LDR r1,[pc,#108] ; [0x1006424] = 0x20060 + 0x010063b8: 6809 .h LDR r1,[r1,#0] + 0x010063ba: 4788 .G BLX r1 + 0x010063bc: bf00 .. NOP + 0x010063be: bf00 .. NOP + 0x010063c0: bf00 .. NOP + 0x010063c2: 4668 hF MOV r0,sp + 0x010063c4: f7fef8df .... BL rt_list_isempty ; 0x1004586 + 0x010063c8: 2800 .( CMP r0,#0 + 0x010063ca: d000 .. BEQ 0x10063ce ; rt_timer_check + 146 + 0x010063cc: e017 .. B 0x10063fe ; rt_timer_check + 194 + 0x010063ce: 4620 F MOV r0,r4 + 0x010063d0: 3014 .0 ADDS r0,r0,#0x14 + 0x010063d2: f7fef8ea .... BL rt_list_remove ; 0x10045aa + 0x010063d6: 7a60 `z LDRB r0,[r4,#9] + 0x010063d8: 2102 .! MOVS r1,#2 + 0x010063da: 4008 .@ ANDS r0,r0,r1 + 0x010063dc: 2800 .( CMP r0,#0 + 0x010063de: d00d .. BEQ 0x10063fc ; rt_timer_check + 192 + 0x010063e0: 7a60 `z LDRB r0,[r4,#9] + 0x010063e2: 07c0 .. LSLS r0,r0,#31 + 0x010063e4: 0fc0 .. LSRS r0,r0,#31 + 0x010063e6: 2800 .( CMP r0,#0 + 0x010063e8: d008 .. BEQ 0x10063fc ; rt_timer_check + 192 + 0x010063ea: 7a60 `z LDRB r0,[r4,#9] + 0x010063ec: 0840 @. LSRS r0,r0,#1 + 0x010063ee: 0040 @. LSLS r0,r0,#1 + 0x010063f0: 7260 `r STRB r0,[r4,#9] + 0x010063f2: 4620 F MOV r0,r4 + 0x010063f4: f000f91e .... BL rt_timer_start ; 0x1006634 + 0x010063f8: e000 .. B 0x10063fc ; rt_timer_check + 192 + 0x010063fa: e005 .. B 0x1006408 ; rt_timer_check + 204 + 0x010063fc: bf00 .. NOP + 0x010063fe: 4806 .H LDR r0,[pc,#24] ; [0x1006418] = 0x20054 + 0x01006400: f7fef8c1 .... BL rt_list_isempty ; 0x1004586 + 0x01006404: 2800 .( CMP r0,#0 + 0x01006406: d0a6 .. BEQ 0x1006356 ; rt_timer_check + 26 + 0x01006408: bf00 .. NOP + 0x0100640a: 4630 0F MOV r0,r6 + 0x0100640c: f7faf85c ..\. BL rt_hw_interrupt_enable ; 0x10004c8 + 0x01006410: bf00 .. NOP + 0x01006412: bf00 .. NOP + 0x01006414: bd7c |. POP {r2-r6,pc} + $d + 0x01006416: 0000 .. DCW 0 + 0x01006418: 00020054 T... DCD 131156 + 0x0100641c: 7fffffff .... DCD 2147483647 + 0x01006420: 0002005c \... DCD 131164 + 0x01006424: 00020060 `... DCD 131168 + $t + i.rt_timer_control + rt_timer_control + 0x01006428: b5f8 .. PUSH {r3-r7,lr} + 0x0100642a: 4604 .F MOV r4,r0 + 0x0100642c: 460e .F MOV r6,r1 + 0x0100642e: 4615 .F MOV r5,r2 + 0x01006430: 2c00 ., CMP r4,#0 + 0x01006432: d104 .. BNE 0x100643e ; rt_timer_control + 22 + 0x01006434: 4a1d .J LDR r2,[pc,#116] ; [0x10064ac] = 0x219 + 0x01006436: 491e .I LDR r1,[pc,#120] ; [0x10064b0] = 0x1007a3b + 0x01006438: a01e .. ADR r0,{pc}+0x7c ; 0x10064b4 + 0x0100643a: f7fdf8e1 .... BL rt_assert_handler ; 0x1003600 + 0x0100643e: 4620 F MOV r0,r4 + 0x01006440: f7fefd14 .... BL rt_object_get_type ; 0x1004e6c + 0x01006444: 280a .( CMP r0,#0xa + 0x01006446: d005 .. BEQ 0x1006454 ; rt_timer_control + 44 + 0x01006448: 4a18 .J LDR r2,[pc,#96] ; [0x10064ac] = 0x219 + 0x0100644a: 1c52 R. ADDS r2,r2,#1 + 0x0100644c: 4918 .I LDR r1,[pc,#96] ; [0x10064b0] = 0x1007a3b + 0x0100644e: a01e .. ADR r0,{pc}+0x7a ; 0x10064c8 + 0x01006450: f7fdf8d6 .... BL rt_assert_handler ; 0x1003600 + 0x01006454: f7faf834 ..4. BL rt_hw_interrupt_disable ; 0x10004c0 + 0x01006458: 4607 .F MOV r7,r0 + 0x0100645a: 0033 3. MOVS r3,r6 + 0x0100645c: f7fafdba .... BL __ARM_common_switch8 ; 0x1000fd4 + $d + 0x01006460: 0a040705 .... DCD 168036101 + 0x01006464: 001f140f .... DCD 2036751 + $t + 0x01006468: 6a60 `j LDR r0,[r4,#0x24] + 0x0100646a: 6028 (` STR r0,[r5,#0] + 0x0100646c: e018 .. B 0x10064a0 ; rt_timer_control + 120 + 0x0100646e: 6828 (h LDR r0,[r5,#0] + 0x01006470: 6260 `b STR r0,[r4,#0x24] + 0x01006472: e015 .. B 0x10064a0 ; rt_timer_control + 120 + 0x01006474: 7a60 `z LDRB r0,[r4,#9] + 0x01006476: 2102 .! MOVS r1,#2 + 0x01006478: 4388 .C BICS r0,r0,r1 + 0x0100647a: 7260 `r STRB r0,[r4,#9] + 0x0100647c: e010 .. B 0x10064a0 ; rt_timer_control + 120 + 0x0100647e: 7a60 `z LDRB r0,[r4,#9] + 0x01006480: 2102 .! MOVS r1,#2 + 0x01006482: 4308 .C ORRS r0,r0,r1 + 0x01006484: 7260 `r STRB r0,[r4,#9] + 0x01006486: e00b .. B 0x10064a0 ; rt_timer_control + 120 + 0x01006488: 7a60 `z LDRB r0,[r4,#9] + 0x0100648a: 07c0 .. LSLS r0,r0,#31 + 0x0100648c: 0fc0 .. LSRS r0,r0,#31 + 0x0100648e: 2800 .( CMP r0,#0 + 0x01006490: d002 .. BEQ 0x1006498 ; rt_timer_control + 112 + 0x01006492: 2001 . MOVS r0,#1 + 0x01006494: 6028 (` STR r0,[r5,#0] + 0x01006496: e001 .. B 0x100649c ; rt_timer_control + 116 + 0x01006498: 2000 . MOVS r0,#0 + 0x0100649a: 6028 (` STR r0,[r5,#0] + 0x0100649c: e000 .. B 0x10064a0 ; rt_timer_control + 120 + 0x0100649e: bf00 .. NOP + 0x010064a0: bf00 .. NOP + 0x010064a2: 4638 8F MOV r0,r7 + 0x010064a4: f7faf810 .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x010064a8: 2000 . MOVS r0,#0 + 0x010064aa: bdf8 .. POP {r3-r7,pc} + $d + 0x010064ac: 00000219 .... DCD 537 + 0x010064b0: 01007a3b ;z.. DCD 16808507 + 0x010064b4: 656d6974 time DCD 1701669236 + 0x010064b8: 3d212072 r != DCD 1025581170 + 0x010064bc: 5f545220 RT_ DCD 1599361568 + 0x010064c0: 4c4c554e NULL DCD 1280070990 + 0x010064c4: 00000000 .... DCD 0 + 0x010064c8: 6f5f7472 rt_o DCD 1868526706 + 0x010064cc: 63656a62 bjec DCD 1667590754 + 0x010064d0: 65675f74 t_ge DCD 1701273460 + 0x010064d4: 79745f74 t_ty DCD 2037669748 + 0x010064d8: 26286570 pe(& DCD 640181616 + 0x010064dc: 656d6974 time DCD 1701669236 + 0x010064e0: 703e2d72 r->p DCD 1883123058 + 0x010064e4: 6e657261 aren DCD 1852142177 + 0x010064e8: 3d202974 t) = DCD 1025517940 + 0x010064ec: 5452203d = RT DCD 1414668349 + 0x010064f0: 6a624f5f _Obj DCD 1784827743 + 0x010064f4: 5f746365 ect_ DCD 1601463141 + 0x010064f8: 73616c43 Clas DCD 1935764547 + 0x010064fc: 69545f73 s_Ti DCD 1767137139 + 0x01006500: 0072656d mer. DCD 7497069 + $t + i.rt_timer_detach + rt_timer_detach + 0x01006504: b570 p. PUSH {r4-r6,lr} + 0x01006506: 4604 .F MOV r4,r0 + 0x01006508: 2c00 ., CMP r4,#0 + 0x0100650a: d105 .. BNE 0x1006518 ; rt_timer_detach + 20 + 0x0100650c: 22ff ." MOVS r2,#0xff + 0x0100650e: 320d .2 ADDS r2,r2,#0xd + 0x01006510: 4915 .I LDR r1,[pc,#84] ; [0x1006568] = 0x10079fe + 0x01006512: a016 .. ADR r0,{pc}+0x5a ; 0x100656c + 0x01006514: f7fdf874 ..t. BL rt_assert_handler ; 0x1003600 + 0x01006518: 4620 F MOV r0,r4 + 0x0100651a: f7fefca7 .... BL rt_object_get_type ; 0x1004e6c + 0x0100651e: 280a .( CMP r0,#0xa + 0x01006520: d005 .. BEQ 0x100652e ; rt_timer_detach + 42 + 0x01006522: 22ff ." MOVS r2,#0xff + 0x01006524: 320e .2 ADDS r2,r2,#0xe + 0x01006526: 4910 .I LDR r1,[pc,#64] ; [0x1006568] = 0x10079fe + 0x01006528: a015 .. ADR r0,{pc}+0x58 ; 0x1006580 + 0x0100652a: f7fdf869 ..i. BL rt_assert_handler ; 0x1003600 + 0x0100652e: 4620 F MOV r0,r4 + 0x01006530: f7fefd18 .... BL rt_object_is_systemobject ; 0x1004f64 + 0x01006534: 2800 .( CMP r0,#0 + 0x01006536: d105 .. BNE 0x1006544 ; rt_timer_detach + 64 + 0x01006538: 22ff ." MOVS r2,#0xff + 0x0100653a: 320f .2 ADDS r2,r2,#0xf + 0x0100653c: 490a .I LDR r1,[pc,#40] ; [0x1006568] = 0x10079fe + 0x0100653e: a01f .. ADR r0,{pc}+0x7e ; 0x10065bc + 0x01006540: f7fdf85e ..^. BL rt_assert_handler ; 0x1003600 + 0x01006544: f7f9ffbc .... BL rt_hw_interrupt_disable ; 0x10004c0 + 0x01006548: 4605 .F MOV r5,r0 + 0x0100654a: 4620 F MOV r0,r4 + 0x0100654c: f7fbf90a .... BL _timer_remove ; 0x1001764 + 0x01006550: 7a60 `z LDRB r0,[r4,#9] + 0x01006552: 0840 @. LSRS r0,r0,#1 + 0x01006554: 0040 @. LSLS r0,r0,#1 + 0x01006556: 7260 `r STRB r0,[r4,#9] + 0x01006558: 4628 (F MOV r0,r5 + 0x0100655a: f7f9ffb5 .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x0100655e: 4620 F MOV r0,r4 + 0x01006560: f7fefba0 .... BL rt_object_detach ; 0x1004ca4 + 0x01006564: 2000 . MOVS r0,#0 + 0x01006566: bd70 p. POP {r4-r6,pc} + $d + 0x01006568: 010079fe .y.. DCD 16808446 + 0x0100656c: 656d6974 time DCD 1701669236 + 0x01006570: 3d212072 r != DCD 1025581170 + 0x01006574: 5f545220 RT_ DCD 1599361568 + 0x01006578: 4c4c554e NULL DCD 1280070990 + 0x0100657c: 00000000 .... DCD 0 + 0x01006580: 6f5f7472 rt_o DCD 1868526706 + 0x01006584: 63656a62 bjec DCD 1667590754 + 0x01006588: 65675f74 t_ge DCD 1701273460 + 0x0100658c: 79745f74 t_ty DCD 2037669748 + 0x01006590: 26286570 pe(& DCD 640181616 + 0x01006594: 656d6974 time DCD 1701669236 + 0x01006598: 703e2d72 r->p DCD 1883123058 + 0x0100659c: 6e657261 aren DCD 1852142177 + 0x010065a0: 3d202974 t) = DCD 1025517940 + 0x010065a4: 5452203d = RT DCD 1414668349 + 0x010065a8: 6a624f5f _Obj DCD 1784827743 + 0x010065ac: 5f746365 ect_ DCD 1601463141 + 0x010065b0: 73616c43 Clas DCD 1935764547 + 0x010065b4: 69545f73 s_Ti DCD 1767137139 + 0x010065b8: 0072656d mer. DCD 7497069 + 0x010065bc: 6f5f7472 rt_o DCD 1868526706 + 0x010065c0: 63656a62 bjec DCD 1667590754 + 0x010065c4: 73695f74 t_is DCD 1936285556 + 0x010065c8: 7379735f _sys DCD 1937339231 + 0x010065cc: 6f6d6574 temo DCD 1869440372 + 0x010065d0: 63656a62 bjec DCD 1667590754 + 0x010065d4: 74262874 t(&t DCD 1948657780 + 0x010065d8: 72656d69 imer DCD 1919249769 + 0x010065dc: 61703e2d ->pa DCD 1634745901 + 0x010065e0: 746e6572 rent DCD 1953391986 + 0x010065e4: 00000029 )... DCD 41 + $t + i.rt_timer_init + rt_timer_init + 0x010065e8: b5f8 .. PUSH {r3-r7,lr} + 0x010065ea: 4604 .F MOV r4,r0 + 0x010065ec: 460d .F MOV r5,r1 + 0x010065ee: 4616 .F MOV r6,r2 + 0x010065f0: 461f .F MOV r7,r3 + 0x010065f2: 2c00 ., CMP r4,#0 + 0x010065f4: d104 .. BNE 0x1006600 ; rt_timer_init + 24 + 0x010065f6: 22f7 ." MOVS r2,#0xf7 + 0x010065f8: 4908 .I LDR r1,[pc,#32] ; [0x100661c] = 0x10079f0 + 0x010065fa: a009 .. ADR r0,{pc}+0x26 ; 0x1006620 + 0x010065fc: f7fdf800 .... BL rt_assert_handler ; 0x1003600 + 0x01006600: 462a *F MOV r2,r5 + 0x01006602: 210a .! MOVS r1,#0xa + 0x01006604: 4620 F MOV r0,r4 + 0x01006606: f7fefc4b ..K. BL rt_object_init ; 0x1004ea0 + 0x0100660a: 9807 .. LDR r0,[sp,#0x1c] + 0x0100660c: 9000 .. STR r0,[sp,#0] + 0x0100660e: 463a :F MOV r2,r7 + 0x01006610: 4631 1F MOV r1,r6 + 0x01006612: 4620 F MOV r0,r4 + 0x01006614: 9b06 .. LDR r3,[sp,#0x18] + 0x01006616: f7fbf887 .... BL _timer_init ; 0x1001728 + 0x0100661a: bdf8 .. POP {r3-r7,pc} + $d + 0x0100661c: 010079f0 .y.. DCD 16808432 + 0x01006620: 656d6974 time DCD 1701669236 + 0x01006624: 3d212072 r != DCD 1025581170 + 0x01006628: 5f545220 RT_ DCD 1599361568 + 0x0100662c: 4c4c554e NULL DCD 1280070990 + 0x01006630: 00000000 .... DCD 0 + $t + i.rt_timer_start + rt_timer_start + 0x01006634: b5fe .. PUSH {r1-r7,lr} + 0x01006636: 4605 .F MOV r5,r0 + 0x01006638: 2d00 .- CMP r5,#0 + 0x0100663a: d105 .. BNE 0x1006648 ; rt_timer_start + 20 + 0x0100663c: 22ff ." MOVS r2,#0xff + 0x0100663e: 3279 y2 ADDS r2,r2,#0x79 + 0x01006640: 494f OI LDR r1,[pc,#316] ; [0x1006780] = 0x1007a1e + 0x01006642: a050 P. ADR r0,{pc}+0x142 ; 0x1006784 + 0x01006644: f7fcffdc .... BL rt_assert_handler ; 0x1003600 + 0x01006648: 4628 (F MOV r0,r5 + 0x0100664a: f7fefc0f .... BL rt_object_get_type ; 0x1004e6c + 0x0100664e: 280a .( CMP r0,#0xa + 0x01006650: d005 .. BEQ 0x100665e ; rt_timer_start + 42 + 0x01006652: 22ff ." MOVS r2,#0xff + 0x01006654: 327a z2 ADDS r2,r2,#0x7a + 0x01006656: 494a JI LDR r1,[pc,#296] ; [0x1006780] = 0x1007a1e + 0x01006658: a04f O. ADR r0,{pc}+0x140 ; 0x1006798 + 0x0100665a: f7fcffd1 .... BL rt_assert_handler ; 0x1003600 + 0x0100665e: 2000 . MOVS r0,#0 + 0x01006660: 9001 .. STR r0,[sp,#4] + 0x01006662: f7f9ff2d ..-. BL rt_hw_interrupt_disable ; 0x10004c0 + 0x01006666: 9002 .. STR r0,[sp,#8] + 0x01006668: 4628 (F MOV r0,r5 + 0x0100666a: f7fbf87b ..{. BL _timer_remove ; 0x1001764 + 0x0100666e: 7a68 hz LDRB r0,[r5,#9] + 0x01006670: 0840 @. LSRS r0,r0,#1 + 0x01006672: 0040 @. LSLS r0,r0,#1 + 0x01006674: 7268 hr STRB r0,[r5,#9] + 0x01006676: bf00 .. NOP + 0x01006678: 4856 VH LDR r0,[pc,#344] ; [0x10067d4] = 0x20114 + 0x0100667a: 6800 .h LDR r0,[r0,#0] + 0x0100667c: 2800 .( CMP r0,#0 + 0x0100667e: d003 .. BEQ 0x1006688 ; rt_timer_start + 84 + 0x01006680: 4628 (F MOV r0,r5 + 0x01006682: 4954 TI LDR r1,[pc,#336] ; [0x10067d4] = 0x20114 + 0x01006684: 6809 .h LDR r1,[r1,#0] + 0x01006686: 4788 .G BLX r1 + 0x01006688: bf00 .. NOP + 0x0100668a: 4953 SI LDR r1,[pc,#332] ; [0x10067d8] = 0x7fffffff + 0x0100668c: 6a68 hj LDR r0,[r5,#0x24] + 0x0100668e: 4288 .B CMP r0,r1 + 0x01006690: d305 .. BCC 0x100669e ; rt_timer_start + 106 + 0x01006692: 22ff ." MOVS r2,#0xff + 0x01006694: 328b .2 ADDS r2,r2,#0x8b + 0x01006696: 493a :I LDR r1,[pc,#232] ; [0x1006780] = 0x1007a1e + 0x01006698: a050 P. ADR r0,{pc}+0x144 ; 0x10067dc + 0x0100669a: f7fcffb1 .... BL rt_assert_handler ; 0x1003600 + 0x0100669e: f7fffe1f .... BL rt_tick_get ; 0x10062e0 + 0x010066a2: 6a69 ij LDR r1,[r5,#0x24] + 0x010066a4: 1840 @. ADDS r0,r0,r1 + 0x010066a6: 62a8 .b STR r0,[r5,#0x28] + 0x010066a8: 4e55 UN LDR r6,[pc,#340] ; [0x1006800] = 0x20054 + 0x010066aa: 9600 .. STR r6,[sp,#0] + 0x010066ac: 2400 .$ MOVS r4,#0 + 0x010066ae: e030 0. B 0x1006712 ; rt_timer_start + 222 + 0x010066b0: e01b .. B 0x10066ea ; rt_timer_start + 182 + 0x010066b2: 00a2 .. LSLS r2,r4,#2 + 0x010066b4: 466b kF MOV r3,sp + 0x010066b6: 589a .X LDR r2,[r3,r2] + 0x010066b8: 6811 .h LDR r1,[r2,#0] + 0x010066ba: 2214 ." MOVS r2,#0x14 + 0x010066bc: 00e3 .. LSLS r3,r4,#3 + 0x010066be: 18d2 .. ADDS r2,r2,r3 + 0x010066c0: 1a88 .. SUBS r0,r1,r2 + 0x010066c2: 6a82 .j LDR r2,[r0,#0x28] + 0x010066c4: 6aab .j LDR r3,[r5,#0x28] + 0x010066c6: 1ad2 .. SUBS r2,r2,r3 + 0x010066c8: d100 .. BNE 0x10066cc ; rt_timer_start + 152 + 0x010066ca: e007 .. B 0x10066dc ; rt_timer_start + 168 + 0x010066cc: 6a82 .j LDR r2,[r0,#0x28] + 0x010066ce: 6aab .j LDR r3,[r5,#0x28] + 0x010066d0: 1ad2 .. SUBS r2,r2,r3 + 0x010066d2: 4b41 AK LDR r3,[pc,#260] ; [0x10067d8] = 0x7fffffff + 0x010066d4: 429a .B CMP r2,r3 + 0x010066d6: d200 .. BCS 0x10066da ; rt_timer_start + 166 + 0x010066d8: e00f .. B 0x10066fa ; rt_timer_start + 198 + 0x010066da: bf00 .. NOP + 0x010066dc: 00a0 .. LSLS r0,r4,#2 + 0x010066de: 4669 iF MOV r1,sp + 0x010066e0: 5808 .X LDR r0,[r1,r0] + 0x010066e2: 6800 .h LDR r0,[r0,#0] + 0x010066e4: 00a1 .. LSLS r1,r4,#2 + 0x010066e6: 466a jF MOV r2,sp + 0x010066e8: 5050 PP STR r0,[r2,r1] + 0x010066ea: 00a0 .. LSLS r0,r4,#2 + 0x010066ec: 4669 iF MOV r1,sp + 0x010066ee: 5808 .X LDR r0,[r1,r0] + 0x010066f0: 00e1 .. LSLS r1,r4,#3 + 0x010066f2: 1989 .. ADDS r1,r1,r6 + 0x010066f4: 6849 Ih LDR r1,[r1,#4] + 0x010066f6: 4288 .B CMP r0,r1 + 0x010066f8: d1db .. BNE 0x10066b2 ; rt_timer_start + 126 + 0x010066fa: bf00 .. NOP + 0x010066fc: 2c00 ., CMP r4,#0 + 0x010066fe: d007 .. BEQ 0x1006710 ; rt_timer_start + 220 + 0x01006700: 00a0 .. LSLS r0,r4,#2 + 0x01006702: 4669 iF MOV r1,sp + 0x01006704: 5808 .X LDR r0,[r1,r0] + 0x01006706: 3008 .0 ADDS r0,r0,#8 + 0x01006708: 1c61 a. ADDS r1,r4,#1 + 0x0100670a: 0089 .. LSLS r1,r1,#2 + 0x0100670c: 466a jF MOV r2,sp + 0x0100670e: 5050 PP STR r0,[r2,r1] + 0x01006710: 1c64 d. ADDS r4,r4,#1 + 0x01006712: 2c00 ., CMP r4,#0 + 0x01006714: d0cc .. BEQ 0x10066b0 ; rt_timer_start + 124 + 0x01006716: 483b ;H LDR r0,[pc,#236] ; [0x1006804] = 0x20064 + 0x01006718: 6800 .h LDR r0,[r0,#0] + 0x0100671a: 1c40 @. ADDS r0,r0,#1 + 0x0100671c: 4939 9I LDR r1,[pc,#228] ; [0x1006804] = 0x20064 + 0x0100671e: 6008 .` STR r0,[r1,#0] + 0x01006720: 4608 .F MOV r0,r1 + 0x01006722: 6807 .h LDR r7,[r0,#0] + 0x01006724: 4629 )F MOV r1,r5 + 0x01006726: 3114 .1 ADDS r1,r1,#0x14 + 0x01006728: 9800 .. LDR r0,[sp,#0] + 0x0100672a: f7fdfeff .... BL rt_list_insert_after ; 0x100452c + 0x0100672e: 2402 .$ MOVS r4,#2 + 0x01006730: e014 .. B 0x100675c ; rt_timer_start + 296 + 0x01006732: 07b8 .. LSLS r0,r7,#30 + 0x01006734: 0f80 .. LSRS r0,r0,#30 + 0x01006736: 2800 .( CMP r0,#0 + 0x01006738: d10d .. BNE 0x1006756 ; rt_timer_start + 290 + 0x0100673a: 2201 ." MOVS r2,#1 + 0x0100673c: 1b12 .. SUBS r2,r2,r4 + 0x0100673e: 00d2 .. LSLS r2,r2,#3 + 0x01006740: 462b +F MOV r3,r5 + 0x01006742: 3314 .3 ADDS r3,r3,#0x14 + 0x01006744: 18d1 .. ADDS r1,r2,r3 + 0x01006746: 2201 ." MOVS r2,#1 + 0x01006748: 1b12 .. SUBS r2,r2,r4 + 0x0100674a: 0092 .. LSLS r2,r2,#2 + 0x0100674c: 466b kF MOV r3,sp + 0x0100674e: 5898 .X LDR r0,[r3,r2] + 0x01006750: f7fdfeec .... BL rt_list_insert_after ; 0x100452c + 0x01006754: e000 .. B 0x1006758 ; rt_timer_start + 292 + 0x01006756: e003 .. B 0x1006760 ; rt_timer_start + 300 + 0x01006758: 08bf .. LSRS r7,r7,#2 + 0x0100675a: 1c64 d. ADDS r4,r4,#1 + 0x0100675c: 2c01 ., CMP r4,#1 + 0x0100675e: d9e8 .. BLS 0x1006732 ; rt_timer_start + 254 + 0x01006760: bf00 .. NOP + 0x01006762: 7a68 hz LDRB r0,[r5,#9] + 0x01006764: 2101 .! MOVS r1,#1 + 0x01006766: 4308 .C ORRS r0,r0,r1 + 0x01006768: 7268 hr STRB r0,[r5,#9] + 0x0100676a: 9802 .. LDR r0,[sp,#8] + 0x0100676c: f7f9feac .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x01006770: 9801 .. LDR r0,[sp,#4] + 0x01006772: 2800 .( CMP r0,#0 + 0x01006774: d001 .. BEQ 0x100677a ; rt_timer_start + 326 + 0x01006776: f7fefc5d ..]. BL rt_schedule ; 0x1005034 + 0x0100677a: 2000 . MOVS r0,#0 + 0x0100677c: bdfe .. POP {r1-r7,pc} + $d + 0x0100677e: 0000 .. DCW 0 + 0x01006780: 01007a1e .z.. DCD 16808478 + 0x01006784: 656d6974 time DCD 1701669236 + 0x01006788: 3d212072 r != DCD 1025581170 + 0x0100678c: 5f545220 RT_ DCD 1599361568 + 0x01006790: 4c4c554e NULL DCD 1280070990 + 0x01006794: 00000000 .... DCD 0 + 0x01006798: 6f5f7472 rt_o DCD 1868526706 + 0x0100679c: 63656a62 bjec DCD 1667590754 + 0x010067a0: 65675f74 t_ge DCD 1701273460 + 0x010067a4: 79745f74 t_ty DCD 2037669748 + 0x010067a8: 26286570 pe(& DCD 640181616 + 0x010067ac: 656d6974 time DCD 1701669236 + 0x010067b0: 703e2d72 r->p DCD 1883123058 + 0x010067b4: 6e657261 aren DCD 1852142177 + 0x010067b8: 3d202974 t) = DCD 1025517940 + 0x010067bc: 5452203d = RT DCD 1414668349 + 0x010067c0: 6a624f5f _Obj DCD 1784827743 + 0x010067c4: 5f746365 ect_ DCD 1601463141 + 0x010067c8: 73616c43 Clas DCD 1935764547 + 0x010067cc: 69545f73 s_Ti DCD 1767137139 + 0x010067d0: 0072656d mer. DCD 7497069 + 0x010067d4: 00020114 .... DCD 131348 + 0x010067d8: 7fffffff .... DCD 2147483647 + 0x010067dc: 656d6974 time DCD 1701669236 + 0x010067e0: 693e2d72 r->i DCD 1765682546 + 0x010067e4: 5f74696e nit_ DCD 1601464686 + 0x010067e8: 6b636974 tick DCD 1801677172 + 0x010067ec: 52203c20 < R DCD 1377844256 + 0x010067f0: 49545f54 T_TI DCD 1230266196 + 0x010067f4: 4d5f4b43 CK_M DCD 1298090819 + 0x010067f8: 2f205841 AX / DCD 790648897 + 0x010067fc: 00003220 2.. DCD 12832 + 0x01006800: 00020054 T... DCD 131156 + 0x01006804: 00020064 d... DCD 131172 + $t + i.rt_timer_stop + rt_timer_stop + 0x01006808: b570 p. PUSH {r4-r6,lr} + 0x0100680a: 4604 .F MOV r4,r0 + 0x0100680c: 2c00 ., CMP r4,#0 + 0x0100680e: d105 .. BNE 0x100681c ; rt_timer_stop + 20 + 0x01006810: 22ff ." MOVS r2,#0xff + 0x01006812: 32f6 .2 ADDS r2,r2,#0xf6 + 0x01006814: 4917 .I LDR r1,[pc,#92] ; [0x1006874] = 0x1007a2d + 0x01006816: a018 .. ADR r0,{pc}+0x62 ; 0x1006878 + 0x01006818: f7fcfef2 .... BL rt_assert_handler ; 0x1003600 + 0x0100681c: 4620 F MOV r0,r4 + 0x0100681e: f7fefb25 ..%. BL rt_object_get_type ; 0x1004e6c + 0x01006822: 280a .( CMP r0,#0xa + 0x01006824: d005 .. BEQ 0x1006832 ; rt_timer_stop + 42 + 0x01006826: 22ff ." MOVS r2,#0xff + 0x01006828: 32f7 .2 ADDS r2,r2,#0xf7 + 0x0100682a: 4912 .I LDR r1,[pc,#72] ; [0x1006874] = 0x1007a2d + 0x0100682c: a017 .. ADR r0,{pc}+0x60 ; 0x100688c + 0x0100682e: f7fcfee7 .... BL rt_assert_handler ; 0x1003600 + 0x01006832: 7a60 `z LDRB r0,[r4,#9] + 0x01006834: 07c0 .. LSLS r0,r0,#31 + 0x01006836: 0fc0 .. LSRS r0,r0,#31 + 0x01006838: 2800 .( CMP r0,#0 + 0x0100683a: d101 .. BNE 0x1006840 ; rt_timer_stop + 56 + 0x0100683c: 1e40 @. SUBS r0,r0,#1 + 0x0100683e: bd70 p. POP {r4-r6,pc} + 0x01006840: bf00 .. NOP + 0x01006842: 4821 !H LDR r0,[pc,#132] ; [0x10068c8] = 0x20118 + 0x01006844: 6800 .h LDR r0,[r0,#0] + 0x01006846: 2800 .( CMP r0,#0 + 0x01006848: d003 .. BEQ 0x1006852 ; rt_timer_stop + 74 + 0x0100684a: 4620 F MOV r0,r4 + 0x0100684c: 491e .I LDR r1,[pc,#120] ; [0x10068c8] = 0x20118 + 0x0100684e: 6809 .h LDR r1,[r1,#0] + 0x01006850: 4788 .G BLX r1 + 0x01006852: bf00 .. NOP + 0x01006854: f7f9fe34 ..4. BL rt_hw_interrupt_disable ; 0x10004c0 + 0x01006858: 4605 .F MOV r5,r0 + 0x0100685a: 4620 F MOV r0,r4 + 0x0100685c: f7faff82 .... BL _timer_remove ; 0x1001764 + 0x01006860: 7a60 `z LDRB r0,[r4,#9] + 0x01006862: 0840 @. LSRS r0,r0,#1 + 0x01006864: 0040 @. LSLS r0,r0,#1 + 0x01006866: 7260 `r STRB r0,[r4,#9] + 0x01006868: 4628 (F MOV r0,r5 + 0x0100686a: f7f9fe2d ..-. BL rt_hw_interrupt_enable ; 0x10004c8 + 0x0100686e: 2000 . MOVS r0,#0 + 0x01006870: e7e5 .. B 0x100683e ; rt_timer_stop + 54 + $d + 0x01006872: 0000 .. DCW 0 + 0x01006874: 01007a2d -z.. DCD 16808493 + 0x01006878: 656d6974 time DCD 1701669236 + 0x0100687c: 3d212072 r != DCD 1025581170 + 0x01006880: 5f545220 RT_ DCD 1599361568 + 0x01006884: 4c4c554e NULL DCD 1280070990 + 0x01006888: 00000000 .... DCD 0 + 0x0100688c: 6f5f7472 rt_o DCD 1868526706 + 0x01006890: 63656a62 bjec DCD 1667590754 + 0x01006894: 65675f74 t_ge DCD 1701273460 + 0x01006898: 79745f74 t_ty DCD 2037669748 + 0x0100689c: 26286570 pe(& DCD 640181616 + 0x010068a0: 656d6974 time DCD 1701669236 + 0x010068a4: 703e2d72 r->p DCD 1883123058 + 0x010068a8: 6e657261 aren DCD 1852142177 + 0x010068ac: 3d202974 t) = DCD 1025517940 + 0x010068b0: 5452203d = RT DCD 1414668349 + 0x010068b4: 6a624f5f _Obj DCD 1784827743 + 0x010068b8: 5f746365 ect_ DCD 1601463141 + 0x010068bc: 73616c43 Clas DCD 1935764547 + 0x010068c0: 69545f73 s_Ti DCD 1767137139 + 0x010068c4: 0072656d mer. DCD 7497069 + 0x010068c8: 00020118 .... DCD 131352 + $t + i.rt_vsnprintf + rt_vsnprintf + 0x010068cc: b5ff .. PUSH {r0-r7,lr} + 0x010068ce: b08b .. SUB sp,sp,#0x2c + 0x010068d0: 9c0b .. LDR r4,[sp,#0x2c] + 0x010068d2: 9c0b .. LDR r4,[sp,#0x2c] + 0x010068d4: 980c .. LDR r0,[sp,#0x30] + 0x010068d6: 1826 &. ADDS r6,r4,r0 + 0x010068d8: 9c0b .. LDR r4,[sp,#0x2c] + 0x010068da: 42a6 .B CMP r6,r4 + 0x010068dc: d204 .. BCS 0x10068e8 ; rt_vsnprintf + 28 + 0x010068de: 2600 .& MOVS r6,#0 + 0x010068e0: 43f6 .C MVNS r6,r6 + 0x010068e2: 980b .. LDR r0,[sp,#0x2c] + 0x010068e4: 1a30 0. SUBS r0,r6,r0 + 0x010068e6: 900c .. STR r0,[sp,#0x30] + 0x010068e8: e194 .. B 0x1006c14 ; rt_vsnprintf + 840 + 0x010068ea: 980d .. LDR r0,[sp,#0x34] + 0x010068ec: 7800 .x LDRB r0,[r0,#0] + 0x010068ee: 2825 %( CMP r0,#0x25 + 0x010068f0: d006 .. BEQ 0x1006900 ; rt_vsnprintf + 52 + 0x010068f2: 42b4 .B CMP r4,r6 + 0x010068f4: d202 .. BCS 0x10068fc ; rt_vsnprintf + 48 + 0x010068f6: 980d .. LDR r0,[sp,#0x34] + 0x010068f8: 7800 .x LDRB r0,[r0,#0] + 0x010068fa: 7020 p STRB r0,[r4,#0] + 0x010068fc: 1c64 d. ADDS r4,r4,#1 + 0x010068fe: e186 .. B 0x1006c0e ; rt_vsnprintf + 834 + 0x01006900: 2500 .% MOVS r5,#0 + 0x01006902: e026 &. B 0x1006952 ; rt_vsnprintf + 134 + 0x01006904: 980d .. LDR r0,[sp,#0x34] + 0x01006906: 1c40 @. ADDS r0,r0,#1 + 0x01006908: 900d .. STR r0,[sp,#0x34] + 0x0100690a: 980d .. LDR r0,[sp,#0x34] + 0x0100690c: 7800 .x LDRB r0,[r0,#0] + 0x0100690e: 282d -( CMP r0,#0x2d + 0x01006910: d102 .. BNE 0x1006918 ; rt_vsnprintf + 76 + 0x01006912: 2010 . MOVS r0,#0x10 + 0x01006914: 4305 .C ORRS r5,r5,r0 + 0x01006916: e01c .. B 0x1006952 ; rt_vsnprintf + 134 + 0x01006918: 980d .. LDR r0,[sp,#0x34] + 0x0100691a: 7800 .x LDRB r0,[r0,#0] + 0x0100691c: 282b +( CMP r0,#0x2b + 0x0100691e: d102 .. BNE 0x1006926 ; rt_vsnprintf + 90 + 0x01006920: 2004 . MOVS r0,#4 + 0x01006922: 4305 .C ORRS r5,r5,r0 + 0x01006924: e015 .. B 0x1006952 ; rt_vsnprintf + 134 + 0x01006926: 980d .. LDR r0,[sp,#0x34] + 0x01006928: 7800 .x LDRB r0,[r0,#0] + 0x0100692a: 2820 ( CMP r0,#0x20 + 0x0100692c: d102 .. BNE 0x1006934 ; rt_vsnprintf + 104 + 0x0100692e: 2008 . MOVS r0,#8 + 0x01006930: 4305 .C ORRS r5,r5,r0 + 0x01006932: e00e .. B 0x1006952 ; rt_vsnprintf + 134 + 0x01006934: 980d .. LDR r0,[sp,#0x34] + 0x01006936: 7800 .x LDRB r0,[r0,#0] + 0x01006938: 2823 #( CMP r0,#0x23 + 0x0100693a: d102 .. BNE 0x1006942 ; rt_vsnprintf + 118 + 0x0100693c: 2020 MOVS r0,#0x20 + 0x0100693e: 4305 .C ORRS r5,r5,r0 + 0x01006940: e007 .. B 0x1006952 ; rt_vsnprintf + 134 + 0x01006942: 980d .. LDR r0,[sp,#0x34] + 0x01006944: 7800 .x LDRB r0,[r0,#0] + 0x01006946: 2830 0( CMP r0,#0x30 + 0x01006948: d102 .. BNE 0x1006950 ; rt_vsnprintf + 132 + 0x0100694a: 2001 . MOVS r0,#1 + 0x0100694c: 4305 .C ORRS r5,r5,r0 + 0x0100694e: e000 .. B 0x1006952 ; rt_vsnprintf + 134 + 0x01006950: e000 .. B 0x1006954 ; rt_vsnprintf + 136 + 0x01006952: e7d7 .. B 0x1006904 ; rt_vsnprintf + 56 + 0x01006954: bf00 .. NOP + 0x01006956: 2700 .' MOVS r7,#0 + 0x01006958: 43ff .C MVNS r7,r7 + 0x0100695a: 980d .. LDR r0,[sp,#0x34] + 0x0100695c: 7800 .x LDRB r0,[r0,#0] + 0x0100695e: 3830 08 SUBS r0,r0,#0x30 + 0x01006960: 280a .( CMP r0,#0xa + 0x01006962: d204 .. BCS 0x100696e ; rt_vsnprintf + 162 + 0x01006964: a80d .. ADD r0,sp,#0x34 + 0x01006966: f000fa53 ..S. BL skip_atoi ; 0x1006e10 + 0x0100696a: 4607 .F MOV r7,r0 + 0x0100696c: e00e .. B 0x100698c ; rt_vsnprintf + 192 + 0x0100696e: 980d .. LDR r0,[sp,#0x34] + 0x01006970: 7800 .x LDRB r0,[r0,#0] + 0x01006972: 282a *( CMP r0,#0x2a + 0x01006974: d10a .. BNE 0x100698c ; rt_vsnprintf + 192 + 0x01006976: 980d .. LDR r0,[sp,#0x34] + 0x01006978: 1c40 @. ADDS r0,r0,#1 + 0x0100697a: 900d .. STR r0,[sp,#0x34] + 0x0100697c: 980e .. LDR r0,[sp,#0x38] + 0x0100697e: c880 .. LDM r0!,{r7} + 0x01006980: 900e .. STR r0,[sp,#0x38] + 0x01006982: 2f00 ./ CMP r7,#0 + 0x01006984: da02 .. BGE 0x100698c ; rt_vsnprintf + 192 + 0x01006986: 427f .B RSBS r7,r7,#0 + 0x01006988: 2010 . MOVS r0,#0x10 + 0x0100698a: 4305 .C ORRS r5,r5,r0 + 0x0100698c: 2000 . MOVS r0,#0 + 0x0100698e: 43c0 .C MVNS r0,r0 + 0x01006990: 9003 .. STR r0,[sp,#0xc] + 0x01006992: 980d .. LDR r0,[sp,#0x34] + 0x01006994: 7800 .x LDRB r0,[r0,#0] + 0x01006996: 282e .( CMP r0,#0x2e + 0x01006998: d11e .. BNE 0x10069d8 ; rt_vsnprintf + 268 + 0x0100699a: 980d .. LDR r0,[sp,#0x34] + 0x0100699c: 1c40 @. ADDS r0,r0,#1 + 0x0100699e: 900d .. STR r0,[sp,#0x34] + 0x010069a0: 980d .. LDR r0,[sp,#0x34] + 0x010069a2: 7800 .x LDRB r0,[r0,#0] + 0x010069a4: 3830 08 SUBS r0,r0,#0x30 + 0x010069a6: 280a .( CMP r0,#0xa + 0x010069a8: d204 .. BCS 0x10069b4 ; rt_vsnprintf + 232 + 0x010069aa: a80d .. ADD r0,sp,#0x34 + 0x010069ac: f000fa30 ..0. BL skip_atoi ; 0x1006e10 + 0x010069b0: 9003 .. STR r0,[sp,#0xc] + 0x010069b2: e00c .. B 0x10069ce ; rt_vsnprintf + 258 + 0x010069b4: 980d .. LDR r0,[sp,#0x34] + 0x010069b6: 7800 .x LDRB r0,[r0,#0] + 0x010069b8: 282a *( CMP r0,#0x2a + 0x010069ba: d108 .. BNE 0x10069ce ; rt_vsnprintf + 258 + 0x010069bc: 980d .. LDR r0,[sp,#0x34] + 0x010069be: 1c40 @. ADDS r0,r0,#1 + 0x010069c0: 900d .. STR r0,[sp,#0x34] + 0x010069c2: 980e .. LDR r0,[sp,#0x38] + 0x010069c4: 6800 .h LDR r0,[r0,#0] + 0x010069c6: 9003 .. STR r0,[sp,#0xc] + 0x010069c8: 980e .. LDR r0,[sp,#0x38] + 0x010069ca: 1d00 .. ADDS r0,r0,#4 + 0x010069cc: 900e .. STR r0,[sp,#0x38] + 0x010069ce: 9803 .. LDR r0,[sp,#0xc] + 0x010069d0: 2800 .( CMP r0,#0 + 0x010069d2: da01 .. BGE 0x10069d8 ; rt_vsnprintf + 268 + 0x010069d4: 2000 . MOVS r0,#0 + 0x010069d6: 9003 .. STR r0,[sp,#0xc] + 0x010069d8: 2000 . MOVS r0,#0 + 0x010069da: 9004 .. STR r0,[sp,#0x10] + 0x010069dc: 980d .. LDR r0,[sp,#0x34] + 0x010069de: 7800 .x LDRB r0,[r0,#0] + 0x010069e0: 2868 h( CMP r0,#0x68 + 0x010069e2: d003 .. BEQ 0x10069ec ; rt_vsnprintf + 288 + 0x010069e4: 980d .. LDR r0,[sp,#0x34] + 0x010069e6: 7800 .x LDRB r0,[r0,#0] + 0x010069e8: 286c l( CMP r0,#0x6c + 0x010069ea: d105 .. BNE 0x10069f8 ; rt_vsnprintf + 300 + 0x010069ec: 980d .. LDR r0,[sp,#0x34] + 0x010069ee: 7800 .x LDRB r0,[r0,#0] + 0x010069f0: 9004 .. STR r0,[sp,#0x10] + 0x010069f2: 980d .. LDR r0,[sp,#0x34] + 0x010069f4: 1c40 @. ADDS r0,r0,#1 + 0x010069f6: 900d .. STR r0,[sp,#0x34] + 0x010069f8: 200a . MOVS r0,#0xa + 0x010069fa: 9005 .. STR r0,[sp,#0x14] + 0x010069fc: 980d .. LDR r0,[sp,#0x34] + 0x010069fe: 7800 .x LDRB r0,[r0,#0] + 0x01006a00: 286f o( CMP r0,#0x6f + 0x01006a02: d07d }. BEQ 0x1006b00 ; rt_vsnprintf + 564 + 0x01006a04: dc0c .. BGT 0x1006a20 ; rt_vsnprintf + 340 + 0x01006a06: 2863 c( CMP r0,#0x63 + 0x01006a08: d013 .. BEQ 0x1006a32 ; rt_vsnprintf + 358 + 0x01006a0a: dc04 .. BGT 0x1006a16 ; rt_vsnprintf + 330 + 0x01006a0c: 2825 %( CMP r0,#0x25 + 0x01006a0e: d078 x. BEQ 0x1006b02 ; rt_vsnprintf + 566 + 0x01006a10: 2858 X( CMP r0,#0x58 + 0x01006a12: d177 w. BNE 0x1006b04 ; rt_vsnprintf + 568 + 0x01006a14: e0a2 .. B 0x1006b5c ; rt_vsnprintf + 656 + 0x01006a16: 2864 d( CMP r0,#0x64 + 0x01006a18: d075 u. BEQ 0x1006b06 ; rt_vsnprintf + 570 + 0x01006a1a: 2869 i( CMP r0,#0x69 + 0x01006a1c: d1f9 .. BNE 0x1006a12 ; rt_vsnprintf + 326 + 0x01006a1e: e0a4 .. B 0x1006b6a ; rt_vsnprintf + 670 + 0x01006a20: 2870 p( CMP r0,#0x70 + 0x01006a22: d07e ~. BEQ 0x1006b22 ; rt_vsnprintf + 598 + 0x01006a24: 2873 s( CMP r0,#0x73 + 0x01006a26: d026 &. BEQ 0x1006a76 ; rt_vsnprintf + 426 + 0x01006a28: 2875 u( CMP r0,#0x75 + 0x01006a2a: d06e n. BEQ 0x1006b0a ; rt_vsnprintf + 574 + 0x01006a2c: 2878 x( CMP r0,#0x78 + 0x01006a2e: d1f0 .. BNE 0x1006a12 ; rt_vsnprintf + 326 + 0x01006a30: e097 .. B 0x1006b62 ; rt_vsnprintf + 662 + 0x01006a32: 2010 . MOVS r0,#0x10 + 0x01006a34: 4028 (@ ANDS r0,r0,r5 + 0x01006a36: 2800 .( CMP r0,#0 + 0x01006a38: d108 .. BNE 0x1006a4c ; rt_vsnprintf + 384 + 0x01006a3a: e004 .. B 0x1006a46 ; rt_vsnprintf + 378 + 0x01006a3c: 42b4 .B CMP r4,r6 + 0x01006a3e: d201 .. BCS 0x1006a44 ; rt_vsnprintf + 376 + 0x01006a40: 2020 MOVS r0,#0x20 + 0x01006a42: 7020 p STRB r0,[r4,#0] + 0x01006a44: 1c64 d. ADDS r4,r4,#1 + 0x01006a46: 1e78 x. SUBS r0,r7,#1 + 0x01006a48: 1e07 .. SUBS r7,r0,#0 + 0x01006a4a: dcf7 .. BGT 0x1006a3c ; rt_vsnprintf + 368 + 0x01006a4c: 980e .. LDR r0,[sp,#0x38] + 0x01006a4e: 7801 .x LDRB r1,[r0,#0] + 0x01006a50: 1d00 .. ADDS r0,r0,#4 + 0x01006a52: 900e .. STR r0,[sp,#0x38] + 0x01006a54: b2c8 .. UXTB r0,r1 + 0x01006a56: 9007 .. STR r0,[sp,#0x1c] + 0x01006a58: 42b4 .B CMP r4,r6 + 0x01006a5a: d201 .. BCS 0x1006a60 ; rt_vsnprintf + 404 + 0x01006a5c: 9807 .. LDR r0,[sp,#0x1c] + 0x01006a5e: 7020 p STRB r0,[r4,#0] + 0x01006a60: 1c64 d. ADDS r4,r4,#1 + 0x01006a62: e004 .. B 0x1006a6e ; rt_vsnprintf + 418 + 0x01006a64: 42b4 .B CMP r4,r6 + 0x01006a66: d201 .. BCS 0x1006a6c ; rt_vsnprintf + 416 + 0x01006a68: 2020 MOVS r0,#0x20 + 0x01006a6a: 7020 p STRB r0,[r4,#0] + 0x01006a6c: 1c64 d. ADDS r4,r4,#1 + 0x01006a6e: 1e78 x. SUBS r0,r7,#1 + 0x01006a70: 1e07 .. SUBS r7,r0,#0 + 0x01006a72: dcf7 .. BGT 0x1006a64 ; rt_vsnprintf + 408 + 0x01006a74: e0cb .. B 0x1006c0e ; rt_vsnprintf + 834 + 0x01006a76: 980e .. LDR r0,[sp,#0x38] + 0x01006a78: 6800 .h LDR r0,[r0,#0] + 0x01006a7a: 9006 .. STR r0,[sp,#0x18] + 0x01006a7c: 980e .. LDR r0,[sp,#0x38] + 0x01006a7e: 1d00 .. ADDS r0,r0,#4 + 0x01006a80: 900e .. STR r0,[sp,#0x38] + 0x01006a82: 9806 .. LDR r0,[sp,#0x18] + 0x01006a84: 2800 .( CMP r0,#0 + 0x01006a86: d101 .. BNE 0x1006a8c ; rt_vsnprintf + 448 + 0x01006a88: a06d m. ADR r0,{pc}+0x1b8 ; 0x1006c40 + 0x01006a8a: 9006 .. STR r0,[sp,#0x18] + 0x01006a8c: 2000 . MOVS r0,#0 + 0x01006a8e: 9008 .. STR r0,[sp,#0x20] + 0x01006a90: e002 .. B 0x1006a98 ; rt_vsnprintf + 460 + 0x01006a92: 9808 .. LDR r0,[sp,#0x20] + 0x01006a94: 1c40 @. ADDS r0,r0,#1 + 0x01006a96: 9008 .. STR r0,[sp,#0x20] + 0x01006a98: 9808 .. LDR r0,[sp,#0x20] + 0x01006a9a: 42b8 .B CMP r0,r7 + 0x01006a9c: d004 .. BEQ 0x1006aa8 ; rt_vsnprintf + 476 + 0x01006a9e: 9908 .. LDR r1,[sp,#0x20] + 0x01006aa0: 9806 .. LDR r0,[sp,#0x18] + 0x01006aa2: 5c40 @\ LDRB r0,[r0,r1] + 0x01006aa4: 2800 .( CMP r0,#0 + 0x01006aa6: d1f4 .. BNE 0x1006a92 ; rt_vsnprintf + 454 + 0x01006aa8: 9803 .. LDR r0,[sp,#0xc] + 0x01006aaa: 2800 .( CMP r0,#0 + 0x01006aac: dd05 .. BLE 0x1006aba ; rt_vsnprintf + 494 + 0x01006aae: 9903 .. LDR r1,[sp,#0xc] + 0x01006ab0: 9808 .. LDR r0,[sp,#0x20] + 0x01006ab2: 4288 .B CMP r0,r1 + 0x01006ab4: dd01 .. BLE 0x1006aba ; rt_vsnprintf + 494 + 0x01006ab6: 9803 .. LDR r0,[sp,#0xc] + 0x01006ab8: 9008 .. STR r0,[sp,#0x20] + 0x01006aba: 2010 . MOVS r0,#0x10 + 0x01006abc: 4028 (@ ANDS r0,r0,r5 + 0x01006abe: 2800 .( CMP r0,#0 + 0x01006ac0: d10a .. BNE 0x1006ad8 ; rt_vsnprintf + 524 + 0x01006ac2: e004 .. B 0x1006ace ; rt_vsnprintf + 514 + 0x01006ac4: 42b4 .B CMP r4,r6 + 0x01006ac6: d201 .. BCS 0x1006acc ; rt_vsnprintf + 512 + 0x01006ac8: 2020 MOVS r0,#0x20 + 0x01006aca: 7020 p STRB r0,[r4,#0] + 0x01006acc: 1c64 d. ADDS r4,r4,#1 + 0x01006ace: 4638 8F MOV r0,r7 + 0x01006ad0: 1e7f .. SUBS r7,r7,#1 + 0x01006ad2: 9908 .. LDR r1,[sp,#0x20] + 0x01006ad4: 4288 .B CMP r0,r1 + 0x01006ad6: dcf5 .. BGT 0x1006ac4 ; rt_vsnprintf + 504 + 0x01006ad8: 2000 . MOVS r0,#0 + 0x01006ada: 9009 .. STR r0,[sp,#0x24] + 0x01006adc: e00b .. B 0x1006af6 ; rt_vsnprintf + 554 + 0x01006ade: 42b4 .B CMP r4,r6 + 0x01006ae0: d202 .. BCS 0x1006ae8 ; rt_vsnprintf + 540 + 0x01006ae2: 9806 .. LDR r0,[sp,#0x18] + 0x01006ae4: 7800 .x LDRB r0,[r0,#0] + 0x01006ae6: 7020 p STRB r0,[r4,#0] + 0x01006ae8: 1c64 d. ADDS r4,r4,#1 + 0x01006aea: 9806 .. LDR r0,[sp,#0x18] + 0x01006aec: 1c40 @. ADDS r0,r0,#1 + 0x01006aee: 9006 .. STR r0,[sp,#0x18] + 0x01006af0: 9809 .. LDR r0,[sp,#0x24] + 0x01006af2: 1c40 @. ADDS r0,r0,#1 + 0x01006af4: 9009 .. STR r0,[sp,#0x24] + 0x01006af6: 9908 .. LDR r1,[sp,#0x20] + 0x01006af8: 9809 .. LDR r0,[sp,#0x24] + 0x01006afa: 4288 .B CMP r0,r1 + 0x01006afc: dbef .. BLT 0x1006ade ; rt_vsnprintf + 530 + 0x01006afe: e00a .. B 0x1006b16 ; rt_vsnprintf + 586 + 0x01006b00: e029 ). B 0x1006b56 ; rt_vsnprintf + 650 + 0x01006b02: e022 ". B 0x1006b4a ; rt_vsnprintf + 638 + 0x01006b04: e035 5. B 0x1006b72 ; rt_vsnprintf + 678 + 0x01006b06: e02f /. B 0x1006b68 ; rt_vsnprintf + 668 + 0x01006b08: e00b .. B 0x1006b22 ; rt_vsnprintf + 598 + 0x01006b0a: e031 1. B 0x1006b70 ; rt_vsnprintf + 676 + 0x01006b0c: 42b4 .B CMP r4,r6 + 0x01006b0e: d201 .. BCS 0x1006b14 ; rt_vsnprintf + 584 + 0x01006b10: 2020 MOVS r0,#0x20 + 0x01006b12: 7020 p STRB r0,[r4,#0] + 0x01006b14: 1c64 d. ADDS r4,r4,#1 + 0x01006b16: 4638 8F MOV r0,r7 + 0x01006b18: 1e7f .. SUBS r7,r7,#1 + 0x01006b1a: 9908 .. LDR r1,[sp,#0x20] + 0x01006b1c: 4288 .B CMP r0,r1 + 0x01006b1e: dcf5 .. BGT 0x1006b0c ; rt_vsnprintf + 576 + 0x01006b20: e075 u. B 0x1006c0e ; rt_vsnprintf + 834 + 0x01006b22: 1c78 x. ADDS r0,r7,#1 + 0x01006b24: 2800 .( CMP r0,#0 + 0x01006b26: d102 .. BNE 0x1006b2e ; rt_vsnprintf + 610 + 0x01006b28: 2708 .' MOVS r7,#8 + 0x01006b2a: 2001 . MOVS r0,#1 + 0x01006b2c: 4305 .C ORRS r5,r5,r0 + 0x01006b2e: 9803 .. LDR r0,[sp,#0xc] + 0x01006b30: 9700 .. STR r7,[sp,#0] + 0x01006b32: 9502 .. STR r5,[sp,#8] + 0x01006b34: 9001 .. STR r0,[sp,#4] + 0x01006b36: 980e .. LDR r0,[sp,#0x38] + 0x01006b38: c804 .. LDM r0!,{r2} + 0x01006b3a: 2310 .# MOVS r3,#0x10 + 0x01006b3c: 4631 1F MOV r1,r6 + 0x01006b3e: 900e .. STR r0,[sp,#0x38] + 0x01006b40: 4620 F MOV r0,r4 + 0x01006b42: f7fcfc6b ..k. BL print_number ; 0x100341c + 0x01006b46: 4604 .F MOV r4,r0 + 0x01006b48: e061 a. B 0x1006c0e ; rt_vsnprintf + 834 + 0x01006b4a: 42b4 .B CMP r4,r6 + 0x01006b4c: d201 .. BCS 0x1006b52 ; rt_vsnprintf + 646 + 0x01006b4e: 2025 % MOVS r0,#0x25 + 0x01006b50: 7020 p STRB r0,[r4,#0] + 0x01006b52: 1c64 d. ADDS r4,r4,#1 + 0x01006b54: e05b [. B 0x1006c0e ; rt_vsnprintf + 834 + 0x01006b56: 2008 . MOVS r0,#8 + 0x01006b58: 9005 .. STR r0,[sp,#0x14] + 0x01006b5a: e01e .. B 0x1006b9a ; rt_vsnprintf + 718 + 0x01006b5c: 2040 @ MOVS r0,#0x40 + 0x01006b5e: 4305 .C ORRS r5,r5,r0 + 0x01006b60: bf00 .. NOP + 0x01006b62: 2010 . MOVS r0,#0x10 + 0x01006b64: 9005 .. STR r0,[sp,#0x14] + 0x01006b66: e018 .. B 0x1006b9a ; rt_vsnprintf + 718 + 0x01006b68: bf00 .. NOP + 0x01006b6a: 2002 . MOVS r0,#2 + 0x01006b6c: 4305 .C ORRS r5,r5,r0 + 0x01006b6e: bf00 .. NOP + 0x01006b70: e013 .. B 0x1006b9a ; rt_vsnprintf + 718 + 0x01006b72: 42b4 .B CMP r4,r6 + 0x01006b74: d201 .. BCS 0x1006b7a ; rt_vsnprintf + 686 + 0x01006b76: 2025 % MOVS r0,#0x25 + 0x01006b78: 7020 p STRB r0,[r4,#0] + 0x01006b7a: 1c64 d. ADDS r4,r4,#1 + 0x01006b7c: 980d .. LDR r0,[sp,#0x34] + 0x01006b7e: 7800 .x LDRB r0,[r0,#0] + 0x01006b80: 2800 .( CMP r0,#0 + 0x01006b82: d006 .. BEQ 0x1006b92 ; rt_vsnprintf + 710 + 0x01006b84: 42b4 .B CMP r4,r6 + 0x01006b86: d202 .. BCS 0x1006b8e ; rt_vsnprintf + 706 + 0x01006b88: 980d .. LDR r0,[sp,#0x34] + 0x01006b8a: 7800 .x LDRB r0,[r0,#0] + 0x01006b8c: 7020 p STRB r0,[r4,#0] + 0x01006b8e: 1c64 d. ADDS r4,r4,#1 + 0x01006b90: e002 .. B 0x1006b98 ; rt_vsnprintf + 716 + 0x01006b92: 980d .. LDR r0,[sp,#0x34] + 0x01006b94: 1e40 @. SUBS r0,r0,#1 + 0x01006b96: 900d .. STR r0,[sp,#0x34] + 0x01006b98: e039 9. B 0x1006c0e ; rt_vsnprintf + 834 + 0x01006b9a: bf00 .. NOP + 0x01006b9c: 9804 .. LDR r0,[sp,#0x10] + 0x01006b9e: 286c l( CMP r0,#0x6c + 0x01006ba0: d10c .. BNE 0x1006bbc ; rt_vsnprintf + 752 + 0x01006ba2: 980e .. LDR r0,[sp,#0x38] + 0x01006ba4: 6800 .h LDR r0,[r0,#0] + 0x01006ba6: 900a .. STR r0,[sp,#0x28] + 0x01006ba8: 980e .. LDR r0,[sp,#0x38] + 0x01006baa: 1d00 .. ADDS r0,r0,#4 + 0x01006bac: 900e .. STR r0,[sp,#0x38] + 0x01006bae: 2002 . MOVS r0,#2 + 0x01006bb0: 4028 (@ ANDS r0,r0,r5 + 0x01006bb2: 2800 .( CMP r0,#0 + 0x01006bb4: d01f .. BEQ 0x1006bf6 ; rt_vsnprintf + 810 + 0x01006bb6: 980a .. LDR r0,[sp,#0x28] + 0x01006bb8: 900a .. STR r0,[sp,#0x28] + 0x01006bba: e01c .. B 0x1006bf6 ; rt_vsnprintf + 810 + 0x01006bbc: 9804 .. LDR r0,[sp,#0x10] + 0x01006bbe: 2868 h( CMP r0,#0x68 + 0x01006bc0: d10d .. BNE 0x1006bde ; rt_vsnprintf + 786 + 0x01006bc2: 980e .. LDR r0,[sp,#0x38] + 0x01006bc4: 8801 .. LDRH r1,[r0,#0] + 0x01006bc6: 1d00 .. ADDS r0,r0,#4 + 0x01006bc8: 900e .. STR r0,[sp,#0x38] + 0x01006bca: b288 .. UXTH r0,r1 + 0x01006bcc: 900a .. STR r0,[sp,#0x28] + 0x01006bce: 2002 . MOVS r0,#2 + 0x01006bd0: 4028 (@ ANDS r0,r0,r5 + 0x01006bd2: 2800 .( CMP r0,#0 + 0x01006bd4: d00f .. BEQ 0x1006bf6 ; rt_vsnprintf + 810 + 0x01006bd6: 980a .. LDR r0,[sp,#0x28] + 0x01006bd8: b200 .. SXTH r0,r0 + 0x01006bda: 900a .. STR r0,[sp,#0x28] + 0x01006bdc: e00b .. B 0x1006bf6 ; rt_vsnprintf + 810 + 0x01006bde: 980e .. LDR r0,[sp,#0x38] + 0x01006be0: 6800 .h LDR r0,[r0,#0] + 0x01006be2: 900a .. STR r0,[sp,#0x28] + 0x01006be4: 980e .. LDR r0,[sp,#0x38] + 0x01006be6: 1d00 .. ADDS r0,r0,#4 + 0x01006be8: 900e .. STR r0,[sp,#0x38] + 0x01006bea: 2002 . MOVS r0,#2 + 0x01006bec: 4028 (@ ANDS r0,r0,r5 + 0x01006bee: 2800 .( CMP r0,#0 + 0x01006bf0: d001 .. BEQ 0x1006bf6 ; rt_vsnprintf + 810 + 0x01006bf2: 980a .. LDR r0,[sp,#0x28] + 0x01006bf4: 900a .. STR r0,[sp,#0x28] + 0x01006bf6: 9803 .. LDR r0,[sp,#0xc] + 0x01006bf8: 9700 .. STR r7,[sp,#0] + 0x01006bfa: 9502 .. STR r5,[sp,#8] + 0x01006bfc: 9001 .. STR r0,[sp,#4] + 0x01006bfe: 4631 1F MOV r1,r6 + 0x01006c00: 4620 F MOV r0,r4 + 0x01006c02: 9b05 .. LDR r3,[sp,#0x14] + 0x01006c04: 9a0a .. LDR r2,[sp,#0x28] + 0x01006c06: f7fcfc09 .... BL print_number ; 0x100341c + 0x01006c0a: 4604 .F MOV r4,r0 + 0x01006c0c: bf00 .. NOP + 0x01006c0e: 980d .. LDR r0,[sp,#0x34] + 0x01006c10: 1c40 @. ADDS r0,r0,#1 + 0x01006c12: 900d .. STR r0,[sp,#0x34] + 0x01006c14: 980d .. LDR r0,[sp,#0x34] + 0x01006c16: 7800 .x LDRB r0,[r0,#0] + 0x01006c18: 2800 .( CMP r0,#0 + 0x01006c1a: d000 .. BEQ 0x1006c1e ; rt_vsnprintf + 850 + 0x01006c1c: e665 e. B 0x10068ea ; rt_vsnprintf + 30 + 0x01006c1e: 980c .. LDR r0,[sp,#0x30] + 0x01006c20: 2800 .( CMP r0,#0 + 0x01006c22: d008 .. BEQ 0x1006c36 ; rt_vsnprintf + 874 + 0x01006c24: 42b4 .B CMP r4,r6 + 0x01006c26: d202 .. BCS 0x1006c2e ; rt_vsnprintf + 866 + 0x01006c28: 2000 . MOVS r0,#0 + 0x01006c2a: 7020 p STRB r0,[r4,#0] + 0x01006c2c: e003 .. B 0x1006c36 ; rt_vsnprintf + 874 + 0x01006c2e: 2100 .! MOVS r1,#0 + 0x01006c30: 4630 0F MOV r0,r6 + 0x01006c32: 3820 8 SUBS r0,r0,#0x20 + 0x01006c34: 77c1 .w STRB r1,[r0,#0x1f] + 0x01006c36: 980b .. LDR r0,[sp,#0x2c] + 0x01006c38: 1a20 . SUBS r0,r4,r0 + 0x01006c3a: b00f .. ADD sp,sp,#0x3c + 0x01006c3c: bdf0 .. POP {r4-r7,pc} + $d + 0x01006c3e: 0000 .. DCW 0 + 0x01006c40: 4c554e28 (NUL DCD 1280658984 + 0x01006c44: 0000294c L).. DCD 10572 + $t + i.rt_vsprintf + rt_vsprintf + 0x01006c48: b537 7. PUSH {r0-r2,r4,r5,lr} + 0x01006c4a: 4605 .F MOV r5,r0 + 0x01006c4c: 460c .F MOV r4,r1 + 0x01006c4e: 4622 "F MOV r2,r4 + 0x01006c50: 2100 .! MOVS r1,#0 + 0x01006c52: 43c9 .C MVNS r1,r1 + 0x01006c54: 4628 (F MOV r0,r5 + 0x01006c56: 9b02 .. LDR r3,[sp,#8] + 0x01006c58: f7fffe38 ..8. BL rt_vsnprintf ; 0x10068cc + 0x01006c5c: bd3e >. POP {r1-r5,pc} + i.rti_board_end + rti_board_end + 0x01006c5e: 2000 . MOVS r0,#0 + 0x01006c60: 4770 pG BX lr + i.rti_board_start + rti_board_start + 0x01006c62: 2000 . MOVS r0,#0 + 0x01006c64: 4770 pG BX lr + i.rti_end + rti_end + 0x01006c66: 2000 . MOVS r0,#0 + 0x01006c68: 4770 pG BX lr + i.rti_start + rti_start + 0x01006c6a: 2000 . MOVS r0,#0 + 0x01006c6c: 4770 pG BX lr + i.rtthread_startup + rtthread_startup + 0x01006c6e: b510 .. PUSH {r4,lr} + 0x01006c70: f7f9fc26 ..&. BL rt_hw_interrupt_disable ; 0x10004c0 + 0x01006c74: f7fdfa38 ..8. BL rt_hw_board_init ; 0x10040e8 + 0x01006c78: f7fefee0 .... BL rt_show_version ; 0x1005a3c + 0x01006c7c: f7fff852 ..R. BL rt_system_timer_init ; 0x1005d24 + 0x01006c80: f7fff820 .. . BL rt_system_scheduler_init ; 0x1005cc4 + 0x01006c84: f7fcfc94 .... BL rt_application_init ; 0x10035b0 + 0x01006c88: f7fff85a ..Z. BL rt_system_timer_thread_init ; 0x1005d40 + 0x01006c8c: f7fff8bc .... BL rt_thread_idle_init ; 0x1005e08 + 0x01006c90: f7fff834 ..4. BL rt_system_scheduler_start ; 0x1005cfc + 0x01006c94: 2000 . MOVS r0,#0 + 0x01006c96: bd10 .. POP {r4,pc} + i.shell_auto_complete + shell_auto_complete + 0x01006c98: b570 p. PUSH {r4-r6,lr} + 0x01006c9a: 4604 .F MOV r4,r0 + 0x01006c9c: a007 .. ADR r0,{pc}+0x20 ; 0x1006cbc + 0x01006c9e: f7fdfc17 .... BL rt_kprintf ; 0x10044d0 + 0x01006ca2: 4620 F MOV r0,r4 + 0x01006ca4: f7fcf9d4 .... BL msh_auto_complete ; 0x1003050 + 0x01006ca8: f7fafd8a .... BL finsh_get_prompt ; 0x10017c0 + 0x01006cac: 4605 .F MOV r5,r0 + 0x01006cae: 4622 "F MOV r2,r4 + 0x01006cb0: 4629 )F MOV r1,r5 + 0x01006cb2: a003 .. ADR r0,{pc}+0xe ; 0x1006cc0 + 0x01006cb4: f7fdfc0c .... BL rt_kprintf ; 0x10044d0 + 0x01006cb8: bd70 p. POP {r4-r6,pc} + $d + 0x01006cba: 0000 .. DCW 0 + 0x01006cbc: 0000000a .... DCD 10 + 0x01006cc0: 73257325 %s%s DCD 1931834149 + 0x01006cc4: 00000000 .... DCD 0 + $t + i.shell_handle_history + shell_handle_history + 0x01006cc8: b570 p. PUSH {r4-r6,lr} + 0x01006cca: 4604 .F MOV r4,r0 + 0x01006ccc: a007 .. ADR r0,{pc}+0x20 ; 0x1006cec + 0x01006cce: f7fdfbff .... BL rt_kprintf ; 0x10044d0 + 0x01006cd2: f7fafd75 ..u. BL finsh_get_prompt ; 0x10017c0 + 0x01006cd6: 4605 .F MOV r5,r0 + 0x01006cd8: 4622 "F MOV r2,r4 + 0x01006cda: 32ff .2 ADDS r2,r2,#0xff + 0x01006cdc: 32b7 .2 ADDS r2,r2,#0xb7 + 0x01006cde: 4629 )F MOV r1,r5 + 0x01006ce0: a004 .. ADR r0,{pc}+0x14 ; 0x1006cf4 + 0x01006ce2: f7fdfbf5 .... BL rt_kprintf ; 0x10044d0 + 0x01006ce6: 2000 . MOVS r0,#0 + 0x01006ce8: bd70 p. POP {r4-r6,pc} + $d + 0x01006cea: 0000 .. DCW 0 + 0x01006cec: 4b325b1b .[2K DCD 1261591323 + 0x01006cf0: 0000000d .... DCD 13 + 0x01006cf4: 73257325 %s%s DCD 1931834149 + 0x01006cf8: 00000000 .... DCD 0 + $t + i.shell_push_history + shell_push_history + 0x01006cfc: b570 p. PUSH {r4-r6,lr} + 0x01006cfe: 4604 .F MOV r4,r0 + 0x01006d00: 2041 A MOVS r0,#0x41 + 0x01006d02: 00c0 .. LSLS r0,r0,#3 + 0x01006d04: 5b00 .[ LDRH r0,[r0,r4] + 0x01006d06: 2800 .( CMP r0,#0 + 0x01006d08: d063 c. BEQ 0x1006dd2 ; shell_push_history + 214 + 0x01006d0a: 8ca0 .. LDRH r0,[r4,#0x24] + 0x01006d0c: 2805 .( CMP r0,#5 + 0x01006d0e: db32 2. BLT 0x1006d76 ; shell_push_history + 122 + 0x01006d10: 2250 P" MOVS r2,#0x50 + 0x01006d12: 4621 !F MOV r1,r4 + 0x01006d14: 31ff .1 ADDS r1,r1,#0xff + 0x01006d16: 31b7 .1 ADDS r1,r1,#0xb7 + 0x01006d18: 4608 .F MOV r0,r1 + 0x01006d1a: 3850 P8 SUBS r0,r0,#0x50 + 0x01006d1c: f7f9fc3c ..<. BL memcmp ; 0x1000598 + 0x01006d20: 2800 .( CMP r0,#0 + 0x01006d22: d056 V. BEQ 0x1006dd2 ; shell_push_history + 214 + 0x01006d24: 2500 .% MOVS r5,#0 + 0x01006d26: e00c .. B 0x1006d42 ; shell_push_history + 70 + 0x01006d28: 1c6a j. ADDS r2,r5,#1 + 0x01006d2a: 2350 P# MOVS r3,#0x50 + 0x01006d2c: 435a ZC MULS r2,r3,r2 + 0x01006d2e: 4623 #F MOV r3,r4 + 0x01006d30: 3326 &3 ADDS r3,r3,#0x26 + 0x01006d32: 18d1 .. ADDS r1,r2,r3 + 0x01006d34: 2250 P" MOVS r2,#0x50 + 0x01006d36: 436a jC MULS r2,r5,r2 + 0x01006d38: 18d0 .. ADDS r0,r2,r3 + 0x01006d3a: 2250 P" MOVS r2,#0x50 + 0x01006d3c: f7f9fcfe .... BL __aeabi_memcpy ; 0x100073c + 0x01006d40: 1c6d m. ADDS r5,r5,#1 + 0x01006d42: 2d04 .- CMP r5,#4 + 0x01006d44: dbf0 .. BLT 0x1006d28 ; shell_push_history + 44 + 0x01006d46: 2150 P! MOVS r1,#0x50 + 0x01006d48: 4369 iC MULS r1,r5,r1 + 0x01006d4a: 4622 "F MOV r2,r4 + 0x01006d4c: 3226 &2 ADDS r2,r2,#0x26 + 0x01006d4e: 1888 .. ADDS r0,r1,r2 + 0x01006d50: 2150 P! MOVS r1,#0x50 + 0x01006d52: f7f9fd50 ..P. BL __aeabi_memclr ; 0x10007f6 + 0x01006d56: 2141 A! MOVS r1,#0x41 + 0x01006d58: 00c9 .. LSLS r1,r1,#3 + 0x01006d5a: 5b0a .[ LDRH r2,[r1,r4] + 0x01006d5c: 2150 P! MOVS r1,#0x50 + 0x01006d5e: 4369 iC MULS r1,r5,r1 + 0x01006d60: 4623 #F MOV r3,r4 + 0x01006d62: 3326 &3 ADDS r3,r3,#0x26 + 0x01006d64: 18c8 .. ADDS r0,r1,r3 + 0x01006d66: 4621 !F MOV r1,r4 + 0x01006d68: 31ff .1 ADDS r1,r1,#0xff + 0x01006d6a: 31b7 .1 ADDS r1,r1,#0xb7 + 0x01006d6c: f7f9fce6 .... BL __aeabi_memcpy ; 0x100073c + 0x01006d70: 2005 . MOVS r0,#5 + 0x01006d72: 84a0 .. STRH r0,[r4,#0x24] + 0x01006d74: e02d -. B 0x1006dd2 ; shell_push_history + 214 + 0x01006d76: 8ca0 .. LDRH r0,[r4,#0x24] + 0x01006d78: 2800 .( CMP r0,#0 + 0x01006d7a: d00e .. BEQ 0x1006d9a ; shell_push_history + 158 + 0x01006d7c: 8ca1 .. LDRH r1,[r4,#0x24] + 0x01006d7e: 1e49 I. SUBS r1,r1,#1 + 0x01006d80: 2250 P" MOVS r2,#0x50 + 0x01006d82: 4351 QC MULS r1,r2,r1 + 0x01006d84: 4622 "F MOV r2,r4 + 0x01006d86: 3226 &2 ADDS r2,r2,#0x26 + 0x01006d88: 1888 .. ADDS r0,r1,r2 + 0x01006d8a: 2250 P" MOVS r2,#0x50 + 0x01006d8c: 4621 !F MOV r1,r4 + 0x01006d8e: 31ff .1 ADDS r1,r1,#0xff + 0x01006d90: 31b7 .1 ADDS r1,r1,#0xb7 + 0x01006d92: f7f9fc01 .... BL memcmp ; 0x1000598 + 0x01006d96: 2800 .( CMP r0,#0 + 0x01006d98: d01b .. BEQ 0x1006dd2 ; shell_push_history + 214 + 0x01006d9a: 8ca0 .. LDRH r0,[r4,#0x24] + 0x01006d9c: 8460 `. STRH r0,[r4,#0x22] + 0x01006d9e: 8ca1 .. LDRH r1,[r4,#0x24] + 0x01006da0: 2250 P" MOVS r2,#0x50 + 0x01006da2: 4351 QC MULS r1,r2,r1 + 0x01006da4: 4622 "F MOV r2,r4 + 0x01006da6: 3226 &2 ADDS r2,r2,#0x26 + 0x01006da8: 1888 .. ADDS r0,r1,r2 + 0x01006daa: 2150 P! MOVS r1,#0x50 + 0x01006dac: f7f9fd23 ..#. BL __aeabi_memclr ; 0x10007f6 + 0x01006db0: 2141 A! MOVS r1,#0x41 + 0x01006db2: 00c9 .. LSLS r1,r1,#3 + 0x01006db4: 5b0a .[ LDRH r2,[r1,r4] + 0x01006db6: 8ca1 .. LDRH r1,[r4,#0x24] + 0x01006db8: 2350 P# MOVS r3,#0x50 + 0x01006dba: 4359 YC MULS r1,r3,r1 + 0x01006dbc: 4623 #F MOV r3,r4 + 0x01006dbe: 3326 &3 ADDS r3,r3,#0x26 + 0x01006dc0: 18c8 .. ADDS r0,r1,r3 + 0x01006dc2: 4621 !F MOV r1,r4 + 0x01006dc4: 31ff .1 ADDS r1,r1,#0xff + 0x01006dc6: 31b7 .1 ADDS r1,r1,#0xb7 + 0x01006dc8: f7f9fcb8 .... BL __aeabi_memcpy ; 0x100073c + 0x01006dcc: 8ca0 .. LDRH r0,[r4,#0x24] + 0x01006dce: 1c40 @. ADDS r0,r0,#1 + 0x01006dd0: 84a0 .. STRH r0,[r4,#0x24] + 0x01006dd2: 8ca0 .. LDRH r0,[r4,#0x24] + 0x01006dd4: 8460 `. STRH r0,[r4,#0x22] + 0x01006dd6: bd70 p. POP {r4-r6,pc} + i.show_wait_queue + show_wait_queue + 0x01006dd8: b570 p. PUSH {r4-r6,lr} + 0x01006dda: 4604 .F MOV r4,r0 + 0x01006ddc: 6825 %h LDR r5,[r4,#0] + 0x01006dde: e00d .. B 0x1006dfc ; show_wait_queue + 36 + 0x01006de0: 462e .F MOV r6,r5 + 0x01006de2: 3e14 .> SUBS r6,r6,#0x14 + 0x01006de4: 4632 2F MOV r2,r6 + 0x01006de6: 2108 .! MOVS r1,#8 + 0x01006de8: a006 .. ADR r0,{pc}+0x1c ; 0x1006e04 + 0x01006dea: f7fdfb71 ..q. BL rt_kprintf ; 0x10044d0 + 0x01006dee: 6828 (h LDR r0,[r5,#0] + 0x01006df0: 42a0 .B CMP r0,r4 + 0x01006df2: d002 .. BEQ 0x1006dfa ; show_wait_queue + 34 + 0x01006df4: a005 .. ADR r0,{pc}+0x18 ; 0x1006e0c + 0x01006df6: f7fdfb6b ..k. BL rt_kprintf ; 0x10044d0 + 0x01006dfa: 682d -h LDR r5,[r5,#0] + 0x01006dfc: 42a5 .B CMP r5,r4 + 0x01006dfe: d1ef .. BNE 0x1006de0 ; show_wait_queue + 8 + 0x01006e00: bd70 p. POP {r4-r6,pc} + $d + 0x01006e02: 0000 .. DCW 0 + 0x01006e04: 732a2e25 %.*s DCD 1932144165 + 0x01006e08: 00000000 .... DCD 0 + 0x01006e0c: 0000002f /... DCD 47 + $t + i.skip_atoi + skip_atoi + 0x01006e10: 4601 .F MOV r1,r0 + 0x01006e12: 2000 . MOVS r0,#0 + 0x01006e14: e008 .. B 0x1006e28 ; skip_atoi + 24 + 0x01006e16: 680b .h LDR r3,[r1,#0] + 0x01006e18: 1c5a Z. ADDS r2,r3,#1 + 0x01006e1a: 600a .` STR r2,[r1,#0] + 0x01006e1c: 781b .x LDRB r3,[r3,#0] + 0x01006e1e: 220a ." MOVS r2,#0xa + 0x01006e20: 4342 BC MULS r2,r0,r2 + 0x01006e22: 189a .. ADDS r2,r3,r2 + 0x01006e24: 4610 .F MOV r0,r2 + 0x01006e26: 3830 08 SUBS r0,r0,#0x30 + 0x01006e28: 680a .h LDR r2,[r1,#0] + 0x01006e2a: 7812 .x LDRB r2,[r2,#0] + 0x01006e2c: 3a30 0: SUBS r2,r2,#0x30 + 0x01006e2e: 2a0a .* CMP r2,#0xa + 0x01006e30: d3f1 .. BCC 0x1006e16 ; skip_atoi + 6 + 0x01006e32: 4770 pG BX lr + i.str_common + str_common + 0x01006e34: b510 .. PUSH {r4,lr} + 0x01006e36: 4603 .F MOV r3,r0 + 0x01006e38: 461a .F MOV r2,r3 + 0x01006e3a: e001 .. B 0x1006e40 ; str_common + 12 + 0x01006e3c: 1c52 R. ADDS r2,r2,#1 + 0x01006e3e: 1c49 I. ADDS r1,r1,#1 + 0x01006e40: 7810 .x LDRB r0,[r2,#0] + 0x01006e42: 2800 .( CMP r0,#0 + 0x01006e44: d006 .. BEQ 0x1006e54 ; str_common + 32 + 0x01006e46: 7808 .x LDRB r0,[r1,#0] + 0x01006e48: 2800 .( CMP r0,#0 + 0x01006e4a: d003 .. BEQ 0x1006e54 ; str_common + 32 + 0x01006e4c: 7810 .x LDRB r0,[r2,#0] + 0x01006e4e: 780c .x LDRB r4,[r1,#0] + 0x01006e50: 42a0 .B CMP r0,r4 + 0x01006e52: d0f3 .. BEQ 0x1006e3c ; str_common + 8 + 0x01006e54: 1ad0 .. SUBS r0,r2,r3 + 0x01006e56: bd10 .. POP {r4,pc} + i.version + version + 0x01006e58: b510 .. PUSH {r4,lr} + 0x01006e5a: f7fefdef .... BL rt_show_version ; 0x1005a3c + 0x01006e5e: 2000 . MOVS r0,#0 + 0x01006e60: bd10 .. POP {r4,pc} + 0x01006e62: 0000 .. MOVS r0,r0 + i.yc3121_uart_configure + yc3121_uart_configure + 0x01006e64: b57f .. PUSH {r0-r6,lr} + 0x01006e66: 4605 .F MOV r5,r0 + 0x01006e68: 460c .F MOV r4,r1 + 0x01006e6a: 2d00 .- CMP r5,#0 + 0x01006e6c: d104 .. BNE 0x1006e78 ; yc3121_uart_configure + 20 + 0x01006e6e: 221a ." MOVS r2,#0x1a + 0x01006e70: 4926 &I LDR r1,[pc,#152] ; [0x1006f0c] = 0x1007434 + 0x01006e72: a027 '. ADR r0,{pc}+0x9e ; 0x1006f10 + 0x01006e74: f7fcfbc4 .... BL rt_assert_handler ; 0x1003600 + 0x01006e78: 2c00 ., CMP r4,#0 + 0x01006e7a: d104 .. BNE 0x1006e86 ; yc3121_uart_configure + 34 + 0x01006e7c: 221b ." MOVS r2,#0x1b + 0x01006e7e: 4923 #I LDR r1,[pc,#140] ; [0x1006f0c] = 0x1007434 + 0x01006e80: a028 (. ADR r0,{pc}+0xa4 ; 0x1006f24 + 0x01006e82: f7fcfbbd .... BL rt_assert_handler ; 0x1003600 + 0x01006e86: 6bee .k LDR r6,[r5,#0x3c] + 0x01006e88: 2001 . MOVS r0,#1 + 0x01006e8a: 5630 0V LDRSB r0,[r6,r0] + 0x01006e8c: f7f9fe02 .... BL NVIC_DisableIRQ ; 0x1000a94 + 0x01006e90: 6820 h LDR r0,[r4,#0] + 0x01006e92: 9001 .. STR r0,[sp,#4] + 0x01006e94: 2100 .! MOVS r1,#0 + 0x01006e96: 4668 hF MOV r0,sp + 0x01006e98: 72c1 .r STRB r1,[r0,#0xb] + 0x01006e9a: 7001 .p STRB r1,[r0,#0] + 0x01006e9c: 7920 y LDRB r0,[r4,#4] + 0x01006e9e: 0700 .. LSLS r0,r0,#28 + 0x01006ea0: 0f00 .. LSRS r0,r0,#28 + 0x01006ea2: 2809 .( CMP r0,#9 + 0x01006ea4: d103 .. BNE 0x1006eae ; yc3121_uart_configure + 74 + 0x01006ea6: 2004 . MOVS r0,#4 + 0x01006ea8: 4669 iF MOV r1,sp + 0x01006eaa: 7208 .r STRB r0,[r1,#8] + 0x01006eac: e003 .. B 0x1006eb6 ; yc3121_uart_configure + 82 + 0x01006eae: 2000 . MOVS r0,#0 + 0x01006eb0: 4669 iF MOV r1,sp + 0x01006eb2: 7208 .r STRB r0,[r1,#8] + 0x01006eb4: bf00 .. NOP + 0x01006eb6: bf00 .. NOP + 0x01006eb8: 7920 y LDRB r0,[r4,#4] + 0x01006eba: 0680 .. LSLS r0,r0,#26 + 0x01006ebc: 0f80 .. LSRS r0,r0,#30 + 0x01006ebe: 2801 .( CMP r0,#1 + 0x01006ec0: d103 .. BNE 0x1006eca ; yc3121_uart_configure + 102 + 0x01006ec2: 2008 . MOVS r0,#8 + 0x01006ec4: 4669 iF MOV r1,sp + 0x01006ec6: 7248 Hr STRB r0,[r1,#9] + 0x01006ec8: e003 .. B 0x1006ed2 ; yc3121_uart_configure + 110 + 0x01006eca: 2000 . MOVS r0,#0 + 0x01006ecc: 4669 iF MOV r1,sp + 0x01006ece: 7248 Hr STRB r0,[r1,#9] + 0x01006ed0: bf00 .. NOP + 0x01006ed2: bf00 .. NOP + 0x01006ed4: 7920 y LDRB r0,[r4,#4] + 0x01006ed6: 0600 .. LSLS r0,r0,#24 + 0x01006ed8: 0f80 .. LSRS r0,r0,#30 + 0x01006eda: 2801 .( CMP r0,#1 + 0x01006edc: d002 .. BEQ 0x1006ee4 ; yc3121_uart_configure + 128 + 0x01006ede: 2802 .( CMP r0,#2 + 0x01006ee0: d108 .. BNE 0x1006ef4 ; yc3121_uart_configure + 144 + 0x01006ee2: e003 .. B 0x1006eec ; yc3121_uart_configure + 136 + 0x01006ee4: 2002 . MOVS r0,#2 + 0x01006ee6: 4669 iF MOV r1,sp + 0x01006ee8: 7288 .r STRB r0,[r1,#0xa] + 0x01006eea: e007 .. B 0x1006efc ; yc3121_uart_configure + 152 + 0x01006eec: 2000 . MOVS r0,#0 + 0x01006eee: 4669 iF MOV r1,sp + 0x01006ef0: 7288 .r STRB r0,[r1,#0xa] + 0x01006ef2: e003 .. B 0x1006efc ; yc3121_uart_configure + 152 + 0x01006ef4: 2000 . MOVS r0,#0 + 0x01006ef6: 4669 iF MOV r1,sp + 0x01006ef8: 7288 .r STRB r0,[r1,#0xa] + 0x01006efa: bf00 .. NOP + 0x01006efc: bf00 .. NOP + 0x01006efe: 7830 0x LDRB r0,[r6,#0] + 0x01006f00: 4669 iF MOV r1,sp + 0x01006f02: f7f9fecf .... BL UART_Init ; 0x1000ca4 + 0x01006f06: 2000 . MOVS r0,#0 + 0x01006f08: b004 .. ADD sp,sp,#0x10 + 0x01006f0a: bd70 p. POP {r4-r6,pc} + $d + 0x01006f0c: 01007434 4t.. DCD 16806964 + 0x01006f10: 69726573 seri DCD 1769104755 + 0x01006f14: 21206c61 al ! DCD 555773025 + 0x01006f18: 5452203d = RT DCD 1414668349 + 0x01006f1c: 4c554e5f _NUL DCD 1280659039 + 0x01006f20: 0000004c L... DCD 76 + 0x01006f24: 20676663 cfg DCD 543647331 + 0x01006f28: 52203d21 != R DCD 1377844513 + 0x01006f2c: 554e5f54 T_NU DCD 1431199572 + 0x01006f30: 00004c4c LL.. DCD 19532 + $t + i.yc3121_uart_control + yc3121_uart_control + 0x01006f34: b5f8 .. PUSH {r3-r7,lr} + 0x01006f36: 4605 .F MOV r5,r0 + 0x01006f38: 460e .F MOV r6,r1 + 0x01006f3a: 4617 .F MOV r7,r2 + 0x01006f3c: 2d00 .- CMP r5,#0 + 0x01006f3e: d104 .. BNE 0x1006f4a ; yc3121_uart_control + 22 + 0x01006f40: 2248 H" MOVS r2,#0x48 + 0x01006f42: 4911 .I LDR r1,[pc,#68] ; [0x1006f88] = 0x100744a + 0x01006f44: a011 .. ADR r0,{pc}+0x48 ; 0x1006f8c + 0x01006f46: f7fcfb5b ..[. BL rt_assert_handler ; 0x1003600 + 0x01006f4a: 6bec .k LDR r4,[r5,#0x3c] + 0x01006f4c: 2e10 .. CMP r6,#0x10 + 0x01006f4e: d00a .. BEQ 0x1006f66 ; yc3121_uart_control + 50 + 0x01006f50: 2e11 .. CMP r6,#0x11 + 0x01006f52: d116 .. BNE 0x1006f82 ; yc3121_uart_control + 78 + 0x01006f54: 7820 x LDRB r0,[r4,#0] + 0x01006f56: 2100 .! MOVS r1,#0 + 0x01006f58: f7faf804 .... BL UART_SetRxITNum ; 0x1000f64 + 0x01006f5c: 2001 . MOVS r0,#1 + 0x01006f5e: 5620 V LDRSB r0,[r4,r0] + 0x01006f60: f7f9fd98 .... BL NVIC_DisableIRQ ; 0x1000a94 + 0x01006f64: e00d .. B 0x1006f82 ; yc3121_uart_control + 78 + 0x01006f66: 7820 x LDRB r0,[r4,#0] + 0x01006f68: 2101 .! MOVS r1,#1 + 0x01006f6a: f7f9fffb .... BL UART_SetRxITNum ; 0x1000f64 + 0x01006f6e: 7820 x LDRB r0,[r4,#0] + 0x01006f70: 2201 ." MOVS r2,#1 + 0x01006f72: 2102 .! MOVS r1,#2 + 0x01006f74: f7f9fe22 ..". BL UART_ITConfig ; 0x1000bbc + 0x01006f78: 2001 . MOVS r0,#1 + 0x01006f7a: 5620 V LDRSB r0,[r4,r0] + 0x01006f7c: f7f9fd94 .... BL NVIC_EnableIRQ ; 0x1000aa8 + 0x01006f80: bf00 .. NOP + 0x01006f82: bf00 .. NOP + 0x01006f84: 2000 . MOVS r0,#0 + 0x01006f86: bdf8 .. POP {r3-r7,pc} + $d + 0x01006f88: 0100744a Jt.. DCD 16806986 + 0x01006f8c: 69726573 seri DCD 1769104755 + 0x01006f90: 21206c61 al ! DCD 555773025 + 0x01006f94: 5452203d = RT DCD 1414668349 + 0x01006f98: 4c554e5f _NUL DCD 1280659039 + 0x01006f9c: 0000004c L... DCD 76 + $t + i.yc3121_uart_getc + yc3121_uart_getc + 0x01006fa0: b570 p. PUSH {r4-r6,lr} + 0x01006fa2: 4604 .F MOV r4,r0 + 0x01006fa4: 2c00 ., CMP r4,#0 + 0x01006fa6: d104 .. BNE 0x1006fb2 ; yc3121_uart_getc + 18 + 0x01006fa8: 2269 i" MOVS r2,#0x69 + 0x01006faa: 4909 .I LDR r1,[pc,#36] ; [0x1006fd0] = 0x100746f + 0x01006fac: a009 .. ADR r0,{pc}+0x28 ; 0x1006fd4 + 0x01006fae: f7fcfb27 ..'. BL rt_assert_handler ; 0x1003600 + 0x01006fb2: 6be5 .k LDR r5,[r4,#0x3c] + 0x01006fb4: 2600 .& MOVS r6,#0 + 0x01006fb6: 43f6 .C MVNS r6,r6 + 0x01006fb8: 7828 (x LDRB r0,[r5,#0] + 0x01006fba: f7f9ff79 ..y. BL UART_ReceiveDataLen ; 0x1000eb0 + 0x01006fbe: 2800 .( CMP r0,#0 + 0x01006fc0: d003 .. BEQ 0x1006fca ; yc3121_uart_getc + 42 + 0x01006fc2: 7828 (x LDRB r0,[r5,#0] + 0x01006fc4: f7f9ff4e ..N. BL UART_ReceiveData ; 0x1000e64 + 0x01006fc8: 4606 .F MOV r6,r0 + 0x01006fca: 4630 0F MOV r0,r6 + 0x01006fcc: bd70 p. POP {r4-r6,pc} + $d + 0x01006fce: 0000 .. DCW 0 + 0x01006fd0: 0100746f ot.. DCD 16807023 + 0x01006fd4: 69726573 seri DCD 1769104755 + 0x01006fd8: 21206c61 al ! DCD 555773025 + 0x01006fdc: 5452203d = RT DCD 1414668349 + 0x01006fe0: 4c554e5f _NUL DCD 1280659039 + 0x01006fe4: 0000004c L... DCD 76 + $t + i.yc3121_uart_putc + yc3121_uart_putc + 0x01006fe8: b570 p. PUSH {r4-r6,lr} + 0x01006fea: 4604 .F MOV r4,r0 + 0x01006fec: 460e .F MOV r6,r1 + 0x01006fee: 2c00 ., CMP r4,#0 + 0x01006ff0: d104 .. BNE 0x1006ffc ; yc3121_uart_putc + 20 + 0x01006ff2: 225e ^" MOVS r2,#0x5e + 0x01006ff4: 4908 .I LDR r1,[pc,#32] ; [0x1007018] = 0x100745e + 0x01006ff6: a009 .. ADR r0,{pc}+0x26 ; 0x100701c + 0x01006ff8: f7fcfb02 .... BL rt_assert_handler ; 0x1003600 + 0x01006ffc: 6be5 .k LDR r5,[r4,#0x3c] + 0x01006ffe: bf00 .. NOP + 0x01007000: 7828 (x LDRB r0,[r5,#0] + 0x01007002: f7f9ff01 .... BL UART_IsUARTBusy ; 0x1000e08 + 0x01007006: 2800 .( CMP r0,#0 + 0x01007008: d1fa .. BNE 0x1007000 ; yc3121_uart_putc + 24 + 0x0100700a: 7828 (x LDRB r0,[r5,#0] + 0x0100700c: 4631 1F MOV r1,r6 + 0x0100700e: f7f9ff77 ..w. BL UART_SendData ; 0x1000f00 + 0x01007012: 2001 . MOVS r0,#1 + 0x01007014: bd70 p. POP {r4-r6,pc} + $d + 0x01007016: 0000 .. DCW 0 + 0x01007018: 0100745e ^t.. DCD 16807006 + 0x0100701c: 69726573 seri DCD 1769104755 + 0x01007020: 21206c61 al ! DCD 555773025 + 0x01007024: 5452203d = RT DCD 1414668349 + 0x01007028: 4c554e5f _NUL DCD 1280659039 + 0x0100702c: 0000004c L... DCD 76 + $t + i.yc_pin_attach_irq + yc_pin_attach_irq + 0x01007030: b5f8 .. PUSH {r3-r7,lr} + 0x01007032: 4615 .F MOV r5,r2 + 0x01007034: 461e .F MOV r6,r3 + 0x01007036: 9f06 .. LDR r7,[sp,#0x18] + 0x01007038: 2c00 ., CMP r4,#0 + 0x0100703a: d101 .. BNE 0x1007040 ; yc_pin_attach_irq + 16 + 0x0100703c: 200a . MOVS r0,#0xa + 0x0100703e: bdf8 .. POP {r3-r7,pc} + 0x01007040: f7f9fa3e ..>. BL rt_hw_interrupt_disable ; 0x10004c0 + 0x01007044: 9000 .. STR r0,[sp,#0] + 0x01007046: 6126 &a STR r6,[r4,#0x10] + 0x01007048: 6167 ga STR r7,[r4,#0x14] + 0x0100704a: 60e5 .` STR r5,[r4,#0xc] + 0x0100704c: 9800 .. LDR r0,[sp,#0] + 0x0100704e: f7f9fa3b ..;. BL rt_hw_interrupt_enable ; 0x10004c8 + 0x01007052: 2000 . MOVS r0,#0 + 0x01007054: e7f3 .. B 0x100703e ; yc_pin_attach_irq + 14 + i.yc_pin_detach_irq + yc_pin_detach_irq + 0x01007056: b5e0 .. PUSH {r5-r7,lr} + 0x01007058: 4606 .F MOV r6,r0 + 0x0100705a: 460f .F MOV r7,r1 + 0x0100705c: 2c00 ., CMP r4,#0 + 0x0100705e: d101 .. BNE 0x1007064 ; yc_pin_detach_irq + 14 + 0x01007060: 200a . MOVS r0,#0xa + 0x01007062: bde0 .. POP {r5-r7,pc} + 0x01007064: f7f9fa2c ..,. BL rt_hw_interrupt_disable ; 0x10004c0 + 0x01007068: 4605 .F MOV r5,r0 + 0x0100706a: 2000 . MOVS r0,#0 + 0x0100706c: 6120 a STR r0,[r4,#0x10] + 0x0100706e: 6160 `a STR r0,[r4,#0x14] + 0x01007070: 60e0 .` STR r0,[r4,#0xc] + 0x01007072: 4628 (F MOV r0,r5 + 0x01007074: f7f9fa28 ..(. BL rt_hw_interrupt_enable ; 0x10004c8 + 0x01007078: 2000 . MOVS r0,#0 + 0x0100707a: e7f2 .. B 0x1007062 ; yc_pin_detach_irq + 12 + i.yc_pin_irq_enable + yc_pin_irq_enable + 0x0100707c: b5f8 .. PUSH {r3-r7,lr} + 0x0100707e: 460c .F MOV r4,r1 + 0x01007080: 4616 .F MOV r6,r2 + 0x01007082: 2000 . MOVS r0,#0 + 0x01007084: 9000 .. STR r0,[sp,#0] + 0x01007086: 2d00 .- CMP r5,#0 + 0x01007088: d101 .. BNE 0x100708e ; yc_pin_irq_enable + 18 + 0x0100708a: 200a . MOVS r0,#0xa + 0x0100708c: bdf8 .. POP {r3-r7,pc} + 0x0100708e: 2e01 .. CMP r6,#1 + 0x01007090: d177 w. BNE 0x1007182 ; yc_pin_irq_enable + 262 + 0x01007092: 68e8 .h LDR r0,[r5,#0xc] + 0x01007094: 0003 .. MOVS r3,r0 + 0x01007096: f7f9ff9d .... BL __ARM_common_switch8 ; 0x1000fd4 + $d + 0x0100709a: 0405 .. DCW 1029 + 0x0100709c: 27070605 ...' DCD 654771717 + 0x010070a0: 0047 G. DCW 71 + $t + 0x010070a2: e046 F. B 0x1007132 ; yc_pin_irq_enable + 182 + 0x010070a4: e045 E. B 0x1007132 ; yc_pin_irq_enable + 182 + 0x010070a6: e044 D. B 0x1007132 ; yc_pin_irq_enable + 182 + 0x010070a8: 2080 . MOVS r0,#0x80 + 0x010070aa: 4949 II LDR r1,[pc,#292] ; [0x10071d0] = 0xf8700 + 0x010070ac: 1861 a. ADDS r1,r4,r1 + 0x010070ae: 7008 .p STRB r0,[r1,#0] + 0x010070b0: 4620 F MOV r0,r4 + 0x010070b2: 17e2 .. ASRS r2,r4,#31 + 0x010070b4: 0f12 .. LSRS r2,r2,#28 + 0x010070b6: 1812 .. ADDS r2,r2,r0 + 0x010070b8: 1112 .. ASRS r2,r2,#4 + 0x010070ba: 0052 R. LSLS r2,r2,#1 + 0x010070bc: 4b44 DK LDR r3,[pc,#272] ; [0x10071d0] = 0xf8700 + 0x010070be: 18d2 .. ADDS r2,r2,r3 + 0x010070c0: 8ed2 .. LDRH r2,[r2,#0x36] + 0x010070c2: 4621 !F MOV r1,r4 + 0x010070c4: 17e3 .. ASRS r3,r4,#31 + 0x010070c6: 0f1b .. LSRS r3,r3,#28 + 0x010070c8: 185b [. ADDS r3,r3,r1 + 0x010070ca: 111b .. ASRS r3,r3,#4 + 0x010070cc: 011b .. LSLS r3,r3,#4 + 0x010070ce: 1ae7 .. SUBS r7,r4,r3 + 0x010070d0: 2301 .# MOVS r3,#1 + 0x010070d2: 40bb .@ LSLS r3,r3,r7 + 0x010070d4: 401a .@ ANDS r2,r2,r3 + 0x010070d6: 17e3 .. ASRS r3,r4,#31 + 0x010070d8: 0f1b .. LSRS r3,r3,#28 + 0x010070da: 181b .. ADDS r3,r3,r0 + 0x010070dc: 111b .. ASRS r3,r3,#4 + 0x010070de: 005b [. LSLS r3,r3,#1 + 0x010070e0: 4f3b ;O LDR r7,[pc,#236] ; [0x10071d0] = 0xf8700 + 0x010070e2: 19db .. ADDS r3,r3,r7 + 0x010070e4: 86da .. STRH r2,[r3,#0x36] + 0x010070e6: e024 $. B 0x1007132 ; yc_pin_irq_enable + 182 + 0x010070e8: 2040 @ MOVS r0,#0x40 + 0x010070ea: 4939 9I LDR r1,[pc,#228] ; [0x10071d0] = 0xf8700 + 0x010070ec: 1861 a. ADDS r1,r4,r1 + 0x010070ee: 7008 .p STRB r0,[r1,#0] + 0x010070f0: 4620 F MOV r0,r4 + 0x010070f2: 17e2 .. ASRS r2,r4,#31 + 0x010070f4: 0f12 .. LSRS r2,r2,#28 + 0x010070f6: 1812 .. ADDS r2,r2,r0 + 0x010070f8: 1112 .. ASRS r2,r2,#4 + 0x010070fa: 0052 R. LSLS r2,r2,#1 + 0x010070fc: 4b34 4K LDR r3,[pc,#208] ; [0x10071d0] = 0xf8700 + 0x010070fe: 18d2 .. ADDS r2,r2,r3 + 0x01007100: 8ed2 .. LDRH r2,[r2,#0x36] + 0x01007102: 4621 !F MOV r1,r4 + 0x01007104: 17e3 .. ASRS r3,r4,#31 + 0x01007106: 0f1b .. LSRS r3,r3,#28 + 0x01007108: 185b [. ADDS r3,r3,r1 + 0x0100710a: 111b .. ASRS r3,r3,#4 + 0x0100710c: 011b .. LSLS r3,r3,#4 + 0x0100710e: 1ae7 .. SUBS r7,r4,r3 + 0x01007110: 2301 .# MOVS r3,#1 + 0x01007112: 40bb .@ LSLS r3,r3,r7 + 0x01007114: 431a .C ORRS r2,r2,r3 + 0x01007116: 17e3 .. ASRS r3,r4,#31 + 0x01007118: 0f1b .. LSRS r3,r3,#28 + 0x0100711a: 181b .. ADDS r3,r3,r0 + 0x0100711c: 111b .. ASRS r3,r3,#4 + 0x0100711e: 005b [. LSLS r3,r3,#1 + 0x01007120: 4f2b +O LDR r7,[pc,#172] ; [0x10071d0] = 0xf8700 + 0x01007122: 19db .. ADDS r3,r3,r7 + 0x01007124: 86da .. STRH r2,[r3,#0x36] + 0x01007126: e004 .. B 0x1007132 ; yc_pin_irq_enable + 182 + 0x01007128: 9800 .. LDR r0,[sp,#0] + 0x0100712a: f7f9f9cd .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x0100712e: 200a . MOVS r0,#0xa + 0x01007130: e7ac .. B 0x100708c ; yc_pin_irq_enable + 16 + 0x01007132: bf00 .. NOP + 0x01007134: f7f9f9c4 .... BL rt_hw_interrupt_disable ; 0x10004c0 + 0x01007138: 9000 .. STR r0,[sp,#0] + 0x0100713a: 2008 . MOVS r0,#8 + 0x0100713c: 5628 (V LDRSB r0,[r5,r0] + 0x0100713e: f7f9fcb3 .... BL NVIC_EnableIRQ ; 0x1000aa8 + 0x01007142: 4620 F MOV r0,r4 + 0x01007144: 17e2 .. ASRS r2,r4,#31 + 0x01007146: 0f12 .. LSRS r2,r2,#28 + 0x01007148: 1812 .. ADDS r2,r2,r0 + 0x0100714a: 1112 .. ASRS r2,r2,#4 + 0x0100714c: 0052 R. LSLS r2,r2,#1 + 0x0100714e: 4b20 K LDR r3,[pc,#128] ; [0x10071d0] = 0xf8700 + 0x01007150: 18d2 .. ADDS r2,r2,r3 + 0x01007152: 8e12 .. LDRH r2,[r2,#0x30] + 0x01007154: 4621 !F MOV r1,r4 + 0x01007156: 17e3 .. ASRS r3,r4,#31 + 0x01007158: 0f1b .. LSRS r3,r3,#28 + 0x0100715a: 185b [. ADDS r3,r3,r1 + 0x0100715c: 111b .. ASRS r3,r3,#4 + 0x0100715e: 011b .. LSLS r3,r3,#4 + 0x01007160: 1ae7 .. SUBS r7,r4,r3 + 0x01007162: 2301 .# MOVS r3,#1 + 0x01007164: 40bb .@ LSLS r3,r3,r7 + 0x01007166: 431a .C ORRS r2,r2,r3 + 0x01007168: 17e3 .. ASRS r3,r4,#31 + 0x0100716a: 0f1b .. LSRS r3,r3,#28 + 0x0100716c: 181b .. ADDS r3,r3,r0 + 0x0100716e: 111b .. ASRS r3,r3,#4 + 0x01007170: 005b [. LSLS r3,r3,#1 + 0x01007172: 4f17 .O LDR r7,[pc,#92] ; [0x10071d0] = 0xf8700 + 0x01007174: 19db .. ADDS r3,r3,r7 + 0x01007176: 861a .. STRH r2,[r3,#0x30] + 0x01007178: 9800 .. LDR r0,[sp,#0] + 0x0100717a: f7f9f9a5 .... BL rt_hw_interrupt_enable ; 0x10004c8 + 0x0100717e: e024 $. B 0x10071ca ; yc_pin_irq_enable + 334 + 0x01007180: e7ff .. B 0x1007182 ; yc_pin_irq_enable + 262 + 0x01007182: 2e00 .. CMP r6,#0 + 0x01007184: d11f .. BNE 0x10071c6 ; yc_pin_irq_enable + 330 + 0x01007186: 2008 . MOVS r0,#8 + 0x01007188: 5628 (V LDRSB r0,[r5,r0] + 0x0100718a: f7f9fc83 .... BL NVIC_DisableIRQ ; 0x1000a94 + 0x0100718e: 4620 F MOV r0,r4 + 0x01007190: 17e2 .. ASRS r2,r4,#31 + 0x01007192: 0f12 .. LSRS r2,r2,#28 + 0x01007194: 1812 .. ADDS r2,r2,r0 + 0x01007196: 1112 .. ASRS r2,r2,#4 + 0x01007198: 0052 R. LSLS r2,r2,#1 + 0x0100719a: 4b0d .K LDR r3,[pc,#52] ; [0x10071d0] = 0xf8700 + 0x0100719c: 18d2 .. ADDS r2,r2,r3 + 0x0100719e: 8e12 .. LDRH r2,[r2,#0x30] + 0x010071a0: 4621 !F MOV r1,r4 + 0x010071a2: 17e3 .. ASRS r3,r4,#31 + 0x010071a4: 0f1b .. LSRS r3,r3,#28 + 0x010071a6: 185b [. ADDS r3,r3,r1 + 0x010071a8: 111b .. ASRS r3,r3,#4 + 0x010071aa: 011b .. LSLS r3,r3,#4 + 0x010071ac: 1ae7 .. SUBS r7,r4,r3 + 0x010071ae: 2301 .# MOVS r3,#1 + 0x010071b0: 40bb .@ LSLS r3,r3,r7 + 0x010071b2: 439a .C BICS r2,r2,r3 + 0x010071b4: 17e3 .. ASRS r3,r4,#31 + 0x010071b6: 0f1b .. LSRS r3,r3,#28 + 0x010071b8: 181b .. ADDS r3,r3,r0 + 0x010071ba: 111b .. ASRS r3,r3,#4 + 0x010071bc: 005b [. LSLS r3,r3,#1 + 0x010071be: 4f04 .O LDR r7,[pc,#16] ; [0x10071d0] = 0xf8700 + 0x010071c0: 19db .. ADDS r3,r3,r7 + 0x010071c2: 861a .. STRH r2,[r3,#0x30] + 0x010071c4: e001 .. B 0x10071ca ; yc_pin_irq_enable + 334 + 0x010071c6: 2006 . MOVS r0,#6 + 0x010071c8: e760 `. B 0x100708c ; yc_pin_irq_enable + 16 + 0x010071ca: 2000 . MOVS r0,#0 + 0x010071cc: e75e ^. B 0x100708c ; yc_pin_irq_enable + 16 + $d + 0x010071ce: 0000 .. DCW 0 + 0x010071d0: 000f8700 .... DCD 1017600 + $t + i.yc_pin_mode + yc_pin_mode + 0x010071d4: b510 .. PUSH {r4,lr} + 0x010071d6: 2a00 .* CMP r2,#0 + 0x010071d8: d104 .. BNE 0x10071e4 ; yc_pin_mode + 16 + 0x010071da: 233e ># MOVS r3,#0x3e + 0x010071dc: 4c0f .L LDR r4,[pc,#60] ; [0x100721c] = 0xf8700 + 0x010071de: 190c .. ADDS r4,r1,r4 + 0x010071e0: 7023 #p STRB r3,[r4,#0] + 0x010071e2: e01a .. B 0x100721a ; yc_pin_mode + 70 + 0x010071e4: 2a01 .* CMP r2,#1 + 0x010071e6: d104 .. BNE 0x10071f2 ; yc_pin_mode + 30 + 0x010071e8: 2300 .# MOVS r3,#0 + 0x010071ea: 4c0c .L LDR r4,[pc,#48] ; [0x100721c] = 0xf8700 + 0x010071ec: 190c .. ADDS r4,r1,r4 + 0x010071ee: 7023 #p STRB r3,[r4,#0] + 0x010071f0: e013 .. B 0x100721a ; yc_pin_mode + 70 + 0x010071f2: 2a02 .* CMP r2,#2 + 0x010071f4: d104 .. BNE 0x1007200 ; yc_pin_mode + 44 + 0x010071f6: 2340 @# MOVS r3,#0x40 + 0x010071f8: 4c08 .L LDR r4,[pc,#32] ; [0x100721c] = 0xf8700 + 0x010071fa: 190c .. ADDS r4,r1,r4 + 0x010071fc: 7023 #p STRB r3,[r4,#0] + 0x010071fe: e00c .. B 0x100721a ; yc_pin_mode + 70 + 0x01007200: 2a03 .* CMP r2,#3 + 0x01007202: d104 .. BNE 0x100720e ; yc_pin_mode + 58 + 0x01007204: 2380 .# MOVS r3,#0x80 + 0x01007206: 4c05 .L LDR r4,[pc,#20] ; [0x100721c] = 0xf8700 + 0x01007208: 190c .. ADDS r4,r1,r4 + 0x0100720a: 7023 #p STRB r3,[r4,#0] + 0x0100720c: e005 .. B 0x100721a ; yc_pin_mode + 70 + 0x0100720e: 2a04 .* CMP r2,#4 + 0x01007210: d103 .. BNE 0x100721a ; yc_pin_mode + 70 + 0x01007212: 2340 @# MOVS r3,#0x40 + 0x01007214: 4c01 .L LDR r4,[pc,#4] ; [0x100721c] = 0xf8700 + 0x01007216: 190c .. ADDS r4,r1,r4 + 0x01007218: 7023 #p STRB r3,[r4,#0] + 0x0100721a: bd10 .. POP {r4,pc} + $d + 0x0100721c: 000f8700 .... DCD 1017600 + $t + i.yc_pin_read + yc_pin_read + 0x01007220: b570 p. PUSH {r4-r6,lr} + 0x01007222: 4604 .F MOV r4,r0 + 0x01007224: 460a .F MOV r2,r1 + 0x01007226: 17c8 .. ASRS r0,r1,#31 + 0x01007228: 0f00 .. LSRS r0,r0,#28 + 0x0100722a: 1880 .. ADDS r0,r0,r2 + 0x0100722c: 1100 .. ASRS r0,r0,#4 + 0x0100722e: 0040 @. LSLS r0,r0,#1 + 0x01007230: 4d09 .M LDR r5,[pc,#36] ; [0x1007258] = 0xf8700 + 0x01007232: 1940 @. ADDS r0,r0,r5 + 0x01007234: 8f80 .. LDRH r0,[r0,#0x3c] + 0x01007236: 460b .F MOV r3,r1 + 0x01007238: 17cd .. ASRS r5,r1,#31 + 0x0100723a: 0f2d -. LSRS r5,r5,#28 + 0x0100723c: 18ed .. ADDS r5,r5,r3 + 0x0100723e: 112d -. ASRS r5,r5,#4 + 0x01007240: 012d -. LSLS r5,r5,#4 + 0x01007242: 1b4e N. SUBS r6,r1,r5 + 0x01007244: 2501 .% MOVS r5,#1 + 0x01007246: 40b5 .@ LSLS r5,r5,r6 + 0x01007248: 4028 (@ ANDS r0,r0,r5 + 0x0100724a: 2800 .( CMP r0,#0 + 0x0100724c: d001 .. BEQ 0x1007252 ; yc_pin_read + 50 + 0x0100724e: 2001 . MOVS r0,#1 + 0x01007250: bd70 p. POP {r4-r6,pc} + 0x01007252: 2000 . MOVS r0,#0 + 0x01007254: e7fc .. B 0x1007250 ; yc_pin_read + 48 + $d + 0x01007256: 0000 .. DCW 0 + 0x01007258: 000f8700 .... DCD 1017600 + $t + i.yc_pin_write + yc_pin_write + 0x0100725c: b510 .. PUSH {r4,lr} + 0x0100725e: 2a00 .* CMP r2,#0 + 0x01007260: d004 .. BEQ 0x100726c ; yc_pin_write + 16 + 0x01007262: 233f ?# MOVS r3,#0x3f + 0x01007264: 4c04 .L LDR r4,[pc,#16] ; [0x1007278] = 0xf8700 + 0x01007266: 190c .. ADDS r4,r1,r4 + 0x01007268: 7023 #p STRB r3,[r4,#0] + 0x0100726a: e003 .. B 0x1007274 ; yc_pin_write + 24 + 0x0100726c: 233e ># MOVS r3,#0x3e + 0x0100726e: 4c02 .L LDR r4,[pc,#8] ; [0x1007278] = 0xf8700 + 0x01007270: 190c .. ADDS r4,r1,r4 + 0x01007272: 7023 #p STRB r3,[r4,#0] + 0x01007274: bd10 .. POP {r4,pc} + $d + 0x01007276: 0000 .. DCW 0 + 0x01007278: 000f8700 .... DCD 1017600 + $d.realdata + .constdata + __FUNCTION__ + 0x0100727c: 6e69705f _pin DCD 1852403807 + 0x01007280: 6165725f _rea DCD 1634038367 + 0x01007284: 0064 d. DCW 100 + __FUNCTION__ + 0x01007286: 705f _p DCW 28767 + 0x01007288: 775f6e69 in_w DCD 2002742889 + 0x0100728c: 65746972 rite DCD 1702127986 + 0x01007290: 00 . DCB 0 + __FUNCTION__ + 0x01007291: 5f7069 _pi DCB 95,112,105 + 0x01007294: 6f635f6e n_co DCD 1868783470 + 0x01007298: 6f72746e ntro DCD 1869771886 + 0x0100729c: 006c l. DCW 108 + __FUNCTION__ + 0x0100729e: 7472 rt DCW 29810 + 0x010072a0: 6e69705f _pin DCD 1852403807 + 0x010072a4: 7474615f _att DCD 1953784159 + 0x010072a8: 5f686361 ach_ DCD 1600676705 + 0x010072ac: 00717269 irq. DCD 7434857 + __FUNCTION__ + 0x010072b0: 705f7472 rt_p DCD 1885303922 + 0x010072b4: 645f6e69 in_d DCD 1683975785 + 0x010072b8: 63617465 etac DCD 1667331173 + 0x010072bc: 72695f68 h_ir DCD 1919508328 + 0x010072c0: 0071 q. DCW 113 + __FUNCTION__ + 0x010072c2: 7472 rt DCW 29810 + 0x010072c4: 6e69705f _pin DCD 1852403807 + 0x010072c8: 7172695f _irq DCD 1903323487 + 0x010072cc: 616e655f _ena DCD 1634624863 + 0x010072d0: 00656c62 ble. DCD 6646882 + __FUNCTION__ + 0x010072d4: 705f7472 rt_p DCD 1885303922 + 0x010072d8: 6d5f6e69 in_m DCD 1834970729 + 0x010072dc: 0065646f ode. DCD 6644847 + __FUNCTION__ + 0x010072e0: 705f7472 rt_p DCD 1885303922 + 0x010072e4: 775f6e69 in_w DCD 2002742889 + 0x010072e8: 65746972 rite DCD 1702127986 + 0x010072ec: 00 . DCB 0 + __FUNCTION__ + 0x010072ed: 72745f rt_ DCB 114,116,95 + 0x010072f0: 5f6e6970 pin_ DCD 1601071472 + 0x010072f4: 64616572 read DCD 1684104562 + 0x010072f8: 00 . DCB 0 + __FUNCTION__ + 0x010072f9: 72745f rt_ DCB 114,116,95 + 0x010072fc: 5f6e6970 pin_ DCD 1601071472 + 0x01007300: 00746567 get. DCD 7628135 + .constdata + __FUNCTION__ + 0x01007304: 7265735f _ser DCD 1919251295 + 0x01007308: 5f6c6169 ial_ DCD 1600938345 + 0x0100730c: 6c6c6f70 poll DCD 1819045744 + 0x01007310: 0078725f _rx. DCD 7893599 + __FUNCTION__ + 0x01007314: 7265735f _ser DCD 1919251295 + 0x01007318: 5f6c6169 ial_ DCD 1600938345 + 0x0100731c: 6c6c6f70 poll DCD 1819045744 + 0x01007320: 0078745f _tx. DCD 7894111 + __FUNCTION__ + 0x01007324: 7265735f _ser DCD 1919251295 + 0x01007328: 5f6c6169 ial_ DCD 1600938345 + 0x0100732c: 5f746e69 int_ DCD 1601465961 + 0x01007330: 7872 rx DCW 30834 + 0x01007332: 00 . DCB 0 + __FUNCTION__ + 0x01007333: 5f _ DCB 95 + 0x01007334: 69726573 seri DCD 1769104755 + 0x01007338: 695f6c61 al_i DCD 1767861345 + 0x0100733c: 745f746e nt_t DCD 1952412782 + 0x01007340: 0078 x. DCW 120 + __FUNCTION__ + 0x01007342: 7472 rt DCW 29810 + 0x01007344: 7265735f _ser DCD 1919251295 + 0x01007348: 5f6c6169 ial_ DCD 1600938345 + 0x0100734c: 74696e69 init DCD 1953066601 + 0x01007350: 00 . DCB 0 + __FUNCTION__ + 0x01007351: 72745f rt_ DCB 114,116,95 + 0x01007354: 69726573 seri DCD 1769104755 + 0x01007358: 6f5f6c61 al_o DCD 1868524641 + 0x0100735c: 006e6570 pen. DCD 7234928 + __FUNCTION__ + 0x01007360: 735f7472 rt_s DCD 1935635570 + 0x01007364: 61697265 eria DCD 1634300517 + 0x01007368: 6c635f6c l_cl DCD 1818451820 + 0x0100736c: 0065736f ose. DCD 6648687 + __FUNCTION__ + 0x01007370: 735f7472 rt_s DCD 1935635570 + 0x01007374: 61697265 eria DCD 1634300517 + 0x01007378: 65725f6c l_re DCD 1701994348 + 0x0100737c: 6461 ad DCW 25697 + 0x0100737e: 00 . DCB 0 + __FUNCTION__ + 0x0100737f: 72 r DCB 114 + 0x01007380: 65735f74 t_se DCD 1702059892 + 0x01007384: 6c616972 rial DCD 1818323314 + 0x01007388: 6972775f _wri DCD 1769109343 + 0x0100738c: 6574 te DCW 25972 + 0x0100738e: 00 . DCB 0 + __FUNCTION__ + 0x0100738f: 72 r DCB 114 + 0x01007390: 65735f74 t_se DCD 1702059892 + 0x01007394: 6c616972 rial DCD 1818323314 + 0x01007398: 6e6f635f _con DCD 1852793695 + 0x0100739c: 6c6f7274 trol DCD 1819243124 + 0x010073a0: 00 . DCB 0 + __FUNCTION__ + 0x010073a1: 72745f rt_ DCB 114,116,95 + 0x010073a4: 735f7768 hw_s DCD 1935636328 + 0x010073a8: 61697265 eria DCD 1634300517 + 0x010073ac: 65725f6c l_re DCD 1701994348 + 0x010073b0: 74736967 gist DCD 1953720679 + 0x010073b4: 7265 er DCW 29285 + 0x010073b6: 00 . DCB 0 + __FUNCTION__ + 0x010073b7: 72 r DCB 114 + 0x010073b8: 77685f74 t_hw DCD 2003328884 + 0x010073bc: 7265735f _ser DCD 1919251295 + 0x010073c0: 5f6c6169 ial_ DCD 1600938345 + 0x010073c4: 00727369 isr. DCD 7500649 + .constdata + __FUNCTION__ + 0x010073c8: 635f7472 rt_c DCD 1667200114 + 0x010073cc: 6c706d6f ompl DCD 1819307375 + 0x010073d0: 6f697465 etio DCD 1869182053 + 0x010073d4: 6e695f6e n_in DCD 1852399470 + 0x010073d8: 7469 it DCW 29801 + 0x010073da: 00 . DCB 0 + __FUNCTION__ + 0x010073db: 72 r DCB 114 + 0x010073dc: 6f635f74 t_co DCD 1868783476 + 0x010073e0: 656c706d mple DCD 1701605485 + 0x010073e4: 6e6f6974 tion DCD 1852795252 + 0x010073e8: 6961775f _wai DCD 1767995231 + 0x010073ec: 0074 t. DCW 116 + __FUNCTION__ + 0x010073ee: 7472 rt DCW 29810 + 0x010073f0: 6d6f635f _com DCD 1836016479 + 0x010073f4: 74656c70 plet DCD 1952803952 + 0x010073f8: 5f6e6f69 ion_ DCD 1601073001 + 0x010073fc: 656e6f64 done DCD 1701736292 + 0x01007400: 00000000 .... DCD 0 + .constdata + yc3121_pin_ops + 0x01007404: 010071d5 .q.. DCD 16806357 + 0x01007408: 0100725d ]r.. DCD 16806493 + 0x0100740c: 01007221 !r.. DCD 16806433 + 0x01007410: 01007031 1p.. DCD 16805937 + 0x01007414: 01007057 Wp.. DCD 16805975 + 0x01007418: 0100707d }p.. DCD 16806013 + 0x0100741c: 00000000 .... DCD 0 + .constdata + yc3121_uart_ops + 0x01007420: 01006e65 en.. DCD 16805477 + 0x01007424: 01006f35 5o.. DCD 16805685 + 0x01007428: 01006fe9 .o.. DCD 16805865 + 0x0100742c: 01006fa1 .o.. DCD 16805793 + 0x01007430: 00000000 .... DCD 0 + __FUNCTION__ + 0x01007434: 31336379 yc31 DCD 825451385 + 0x01007438: 755f3132 21_u DCD 1969172786 + 0x0100743c: 5f747261 art_ DCD 1601466977 + 0x01007440: 666e6f63 conf DCD 1718513507 + 0x01007444: 72756769 igur DCD 1920296809 + 0x01007448: 0065 e. DCW 101 + __FUNCTION__ + 0x0100744a: 6379 yc DCW 25465 + 0x0100744c: 31323133 3121 DCD 825372979 + 0x01007450: 7261755f _uar DCD 1918989663 + 0x01007454: 6f635f74 t_co DCD 1868783476 + 0x01007458: 6f72746e ntro DCD 1869771886 + 0x0100745c: 006c l. DCW 108 + __FUNCTION__ + 0x0100745e: 6379 yc DCW 25465 + 0x01007460: 31323133 3121 DCD 825372979 + 0x01007464: 7261755f _uar DCD 1918989663 + 0x01007468: 75705f74 t_pu DCD 1970298740 + 0x0100746c: 6374 tc DCW 25460 + 0x0100746e: 00 . DCB 0 + __FUNCTION__ + 0x0100746f: 79 y DCB 121 + 0x01007470: 32313363 c312 DCD 842085219 + 0x01007474: 61755f31 1_ua DCD 1635082033 + 0x01007478: 675f7472 rt_g DCD 1734308978 + 0x0100747c: 00637465 etc. DCD 6517861 + 0x01007480: 0001c200 .... DCD 115200 + 0x01007484: 00010008 .... DCD 65544 + .constdata + __FUNCTION__ + 0x01007488: 736e6966 fins DCD 1936615782 + 0x0100748c: 65675f68 h_ge DCD 1701273448 + 0x01007490: 72705f74 t_pr DCD 1919967092 + 0x01007494: 74706d6f ompt DCD 1953525103 + 0x01007498: 646f6d5f _mod DCD 1685024095 + 0x0100749c: 0065 e. DCW 101 + __FUNCTION__ + 0x0100749e: 6966 fi DCW 26982 + 0x010074a0: 5f68736e nsh_ DCD 1600680814 + 0x010074a4: 5f746573 set_ DCD 1601463667 + 0x010074a8: 6d6f7270 prom DCD 1836020336 + 0x010074ac: 6d5f7470 pt_m DCD 1834972272 + 0x010074b0: 0065646f ode. DCD 6644847 + __FUNCTION__ + 0x010074b4: 736e6966 fins DCD 1936615782 + 0x010074b8: 65675f68 h_ge DCD 1701273448 + 0x010074bc: 61686374 tcha DCD 1634231156 + 0x010074c0: 0072 r. DCW 114 + __FUNCTION__ + 0x010074c2: 6966 fi DCW 26982 + 0x010074c4: 5f68736e nsh_ DCD 1600680814 + 0x010074c8: 695f7872 rx_i DCD 1767864434 + 0x010074cc: 646e nd DCW 25710 + 0x010074ce: 00 . DCB 0 + __FUNCTION__ + 0x010074cf: 66 f DCB 102 + 0x010074d0: 68736e69 insh DCD 1752395369 + 0x010074d4: 7465735f _set DCD 1952805727 + 0x010074d8: 7665645f _dev DCD 1986356319 + 0x010074dc: 00656369 ice. DCD 6644585 + __FUNCTION__ + 0x010074e0: 736e6966 fins DCD 1936615782 + 0x010074e4: 65675f68 h_ge DCD 1701273448 + 0x010074e8: 65645f74 t_de DCD 1701076852 + 0x010074ec: 65636976 vice DCD 1701013878 + 0x010074f0: 00 . DCB 0 + __FUNCTION__ + 0x010074f1: 66696e fin DCB 102,105,110 + 0x010074f4: 735f6873 sh_s DCD 1935632499 + 0x010074f8: 655f7465 et_e DCD 1700754533 + 0x010074fc: 006f6863 cho. DCD 7301219 + __FUNCTION__ + 0x01007500: 736e6966 fins DCD 1936615782 + 0x01007504: 65675f68 h_ge DCD 1701273448 + 0x01007508: 63655f74 t_ec DCD 1667587956 + 0x0100750c: 6f68 ho DCW 28520 + 0x0100750e: 00 . DCB 0 + .constdata + __FUNCTION__ + 0x0100750f: 5f _ DCB 95 + 0x01007510: 5f68736d msh_ DCD 1600680813 + 0x01007514: 63657865 exec DCD 1667594341 + 0x01007518: 646d635f _cmd DCD 1684890463 + 0x0100751c: 00000000 .... DCD 0 + .constdata + device_type_str + 0x01007520: 01007e68 h~.. DCD 16809576 + 0x01007524: 01007e24 $~.. DCD 16809508 + 0x01007528: 01007da8 .}.. DCD 16809384 + 0x0100752c: 01007dbc .}.. DCD 16809404 + 0x01007530: 01007dd4 .}.. DCD 16809428 + 0x01007534: 01007da4 .}.. DCD 16809380 + 0x01007538: 01007df0 .}.. DCD 16809456 + 0x0100753c: 01007de0 .}.. DCD 16809440 + 0x01007540: 01007ed0 .~.. DCD 16809680 + 0x01007544: 01007e00 .~.. DCD 16809472 + 0x01007548: 01007ef8 .~.. DCD 16809720 + 0x0100754c: 01007ed8 .~.. DCD 16809688 + 0x01007550: 01007ee4 .~.. DCD 16809700 + 0x01007554: 01007dc8 .}.. DCD 16809416 + 0x01007558: 01007eec .~.. DCD 16809708 + 0x0100755c: 01007e44 D~.. DCD 16809540 + 0x01007560: 01007ec0 .~.. DCD 16809664 + 0x01007564: 01007e34 4~.. DCD 16809524 + 0x01007568: 01007e58 X~.. DCD 16809560 + 0x0100756c: 01007e8c .~.. DCD 16809612 + 0x01007570: 01007e7c |~.. DCD 16809596 + 0x01007574: 01007e14 .~.. DCD 16809492 + 0x01007578: 01007ea4 .~.. DCD 16809636 + 0x0100757c: 01007eb0 .~.. DCD 16809648 + 0x01007580: 01007ec8 .~.. DCD 16809672 + .constdata + __FUNCTION__ + 0x01007584: 615f7472 rt_a DCD 1633645682 + 0x01007588: 696c7070 ppli DCD 1768714352 + 0x0100758c: 69746163 cati DCD 1769234787 + 0x01007590: 695f6e6f on_i DCD 1767861871 + 0x01007594: 0074696e nit. DCD 7629166 + .constdata + __FUNCTION__ + 0x01007598: 5f74725f _rt_ DCD 1601466975 + 0x0100759c: 65686373 sche DCD 1701340019 + 0x010075a0: 656c7564 dule DCD 1701606756 + 0x010075a4: 74735f72 r_st DCD 1953718130 + 0x010075a8: 5f6b6361 ack_ DCD 1600873313 + 0x010075ac: 63656863 chec DCD 1667590243 + 0x010075b0: 006b k. DCW 107 + __FUNCTION__ + 0x010075b2: 7472 rt DCW 29810 + 0x010075b4: 6863735f _sch DCD 1751348063 + 0x010075b8: 6c756465 edul DCD 1819632741 + 0x010075bc: 6e695f65 e_in DCD 1852399461 + 0x010075c0: 74726573 sert DCD 1953654131 + 0x010075c4: 7268745f _thr DCD 1919448159 + 0x010075c8: 00646165 ead. DCD 6578533 + __FUNCTION__ + 0x010075cc: 735f7472 rt_s DCD 1935635570 + 0x010075d0: 64656863 ched DCD 1684367459 + 0x010075d4: 5f656c75 ule_ DCD 1600482421 + 0x010075d8: 6f6d6572 remo DCD 1869440370 + 0x010075dc: 745f6576 ve_t DCD 1952408950 + 0x010075e0: 61657268 hrea DCD 1634038376 + 0x010075e4: 0064 d. DCW 100 + .constdata + __FUNCTION__ + 0x010075e6: 7472 rt DCW 29810 + 0x010075e8: 6665645f _def DCD 1717920863 + 0x010075ec: 74636e75 unct DCD 1952673397 + 0x010075f0: 6578655f _exe DCD 1702389087 + 0x010075f4: 65747563 cute DCD 1702131043 + 0x010075f8: 00 . DCB 0 + .constdata + __FUNCTION__ + 0x010075f9: 72745f rt_ DCB 114,116,95 + 0x010075fc: 69766564 devi DCD 1769366884 + 0x01007600: 755f6563 ce_u DCD 1969186147 + 0x01007604: 6765726e nreg DCD 1734701678 + 0x01007608: 65747369 iste DCD 1702130537 + 0x0100760c: 0072 r. DCW 114 + __FUNCTION__ + 0x0100760e: 7472 rt DCW 29810 + 0x01007610: 7665645f _dev DCD 1986356319 + 0x01007614: 5f656369 ice_ DCD 1600480105 + 0x01007618: 74736564 dest DCD 1953719652 + 0x0100761c: 00796f72 roy. DCD 7958386 + __FUNCTION__ + 0x01007620: 645f7472 rt_d DCD 1683977330 + 0x01007624: 63697665 evic DCD 1667855973 + 0x01007628: 6e695f65 e_in DCD 1852399461 + 0x0100762c: 7469 it DCW 29801 + 0x0100762e: 00 . DCB 0 + __FUNCTION__ + 0x0100762f: 72 r DCB 114 + 0x01007630: 65645f74 t_de DCD 1701076852 + 0x01007634: 65636976 vice DCD 1701013878 + 0x01007638: 65706f5f _ope DCD 1701867359 + 0x0100763c: 006e n. DCW 110 + __FUNCTION__ + 0x0100763e: 7472 rt DCW 29810 + 0x01007640: 7665645f _dev DCD 1986356319 + 0x01007644: 5f656369 ice_ DCD 1600480105 + 0x01007648: 736f6c63 clos DCD 1936682083 + 0x0100764c: 0065 e. DCW 101 + __FUNCTION__ + 0x0100764e: 7472 rt DCW 29810 + 0x01007650: 7665645f _dev DCD 1986356319 + 0x01007654: 5f656369 ice_ DCD 1600480105 + 0x01007658: 64616572 read DCD 1684104562 + 0x0100765c: 00 . DCB 0 + __FUNCTION__ + 0x0100765d: 72745f rt_ DCB 114,116,95 + 0x01007660: 69766564 devi DCD 1769366884 + 0x01007664: 775f6563 ce_w DCD 2002740579 + 0x01007668: 65746972 rite DCD 1702127986 + 0x0100766c: 00 . DCB 0 + __FUNCTION__ + 0x0100766d: 72745f rt_ DCB 114,116,95 + 0x01007670: 69766564 devi DCD 1769366884 + 0x01007674: 635f6563 ce_c DCD 1667196259 + 0x01007678: 72746e6f ontr DCD 1920233071 + 0x0100767c: 6c6f ol DCW 27759 + 0x0100767e: 00 . DCB 0 + __FUNCTION__ + 0x0100767f: 72 r DCB 114 + 0x01007680: 65645f74 t_de DCD 1701076852 + 0x01007684: 65636976 vice DCD 1701013878 + 0x01007688: 7465735f _set DCD 1952805727 + 0x0100768c: 5f78725f _rx_ DCD 1601729119 + 0x01007690: 69646e69 indi DCD 1768189545 + 0x01007694: 65746163 cate DCD 1702125923 + 0x01007698: 00 . DCB 0 + __FUNCTION__ + 0x01007699: 72745f rt_ DCB 114,116,95 + 0x0100769c: 69766564 devi DCD 1769366884 + 0x010076a0: 735f6563 ce_s DCD 1935631715 + 0x010076a4: 745f7465 et_t DCD 1952412773 + 0x010076a8: 6f635f78 x_co DCD 1868783480 + 0x010076ac: 656c706d mple DCD 1701605485 + 0x010076b0: 6574 te DCW 25972 + 0x010076b2: 00 . DCB 0 + .constdata + __lowest_bit_bitmap + 0x010076b3: 00 . DCB 0 + 0x010076b4: 02000100 .... DCD 33554688 + 0x010076b8: 03000100 .... DCD 50331904 + 0x010076bc: 02000100 .... DCD 33554688 + 0x010076c0: 04000100 .... DCD 67109120 + 0x010076c4: 02000100 .... DCD 33554688 + 0x010076c8: 03000100 .... DCD 50331904 + 0x010076cc: 02000100 .... DCD 33554688 + 0x010076d0: 05000100 .... DCD 83886336 + 0x010076d4: 02000100 .... DCD 33554688 + 0x010076d8: 03000100 .... DCD 50331904 + 0x010076dc: 02000100 .... DCD 33554688 + 0x010076e0: 04000100 .... DCD 67109120 + 0x010076e4: 02000100 .... DCD 33554688 + 0x010076e8: 03000100 .... DCD 50331904 + 0x010076ec: 02000100 .... DCD 33554688 + 0x010076f0: 06000100 .... DCD 100663552 + 0x010076f4: 02000100 .... DCD 33554688 + 0x010076f8: 03000100 .... DCD 50331904 + 0x010076fc: 02000100 .... DCD 33554688 + 0x01007700: 04000100 .... DCD 67109120 + 0x01007704: 02000100 .... DCD 33554688 + 0x01007708: 03000100 .... DCD 50331904 + 0x0100770c: 02000100 .... DCD 33554688 + 0x01007710: 05000100 .... DCD 83886336 + 0x01007714: 02000100 .... DCD 33554688 + 0x01007718: 03000100 .... DCD 50331904 + 0x0100771c: 02000100 .... DCD 33554688 + 0x01007720: 04000100 .... DCD 67109120 + 0x01007724: 02000100 .... DCD 33554688 + 0x01007728: 03000100 .... DCD 50331904 + 0x0100772c: 02000100 .... DCD 33554688 + 0x01007730: 07000100 .... DCD 117440768 + 0x01007734: 02000100 .... DCD 33554688 + 0x01007738: 03000100 .... DCD 50331904 + 0x0100773c: 02000100 .... DCD 33554688 + 0x01007740: 04000100 .... DCD 67109120 + 0x01007744: 02000100 .... DCD 33554688 + 0x01007748: 03000100 .... DCD 50331904 + 0x0100774c: 02000100 .... DCD 33554688 + 0x01007750: 05000100 .... DCD 83886336 + 0x01007754: 02000100 .... DCD 33554688 + 0x01007758: 03000100 .... DCD 50331904 + 0x0100775c: 02000100 .... DCD 33554688 + 0x01007760: 04000100 .... DCD 67109120 + 0x01007764: 02000100 .... DCD 33554688 + 0x01007768: 03000100 .... DCD 50331904 + 0x0100776c: 02000100 .... DCD 33554688 + 0x01007770: 06000100 .... DCD 100663552 + 0x01007774: 02000100 .... DCD 33554688 + 0x01007778: 03000100 .... DCD 50331904 + 0x0100777c: 02000100 .... DCD 33554688 + 0x01007780: 04000100 .... DCD 67109120 + 0x01007784: 02000100 .... DCD 33554688 + 0x01007788: 03000100 .... DCD 50331904 + 0x0100778c: 02000100 .... DCD 33554688 + 0x01007790: 05000100 .... DCD 83886336 + 0x01007794: 02000100 .... DCD 33554688 + 0x01007798: 03000100 .... DCD 50331904 + 0x0100779c: 02000100 .... DCD 33554688 + 0x010077a0: 04000100 .... DCD 67109120 + 0x010077a4: 02000100 .... DCD 33554688 + 0x010077a8: 03000100 .... DCD 50331904 + 0x010077ac: 02000100 .... DCD 33554688 + 0x010077b0: 0100 .. DCW 256 + 0x010077b2: 00 . DCB 0 + small_digits + 0x010077b3: 30 0 DCB 48 + 0x010077b4: 34333231 1234 DCD 875770417 + 0x010077b8: 38373635 5678 DCD 943142453 + 0x010077bc: 63626139 9abc DCD 1667391801 + 0x010077c0: 00666564 def. DCD 6710628 + large_digits + 0x010077c4: 33323130 0123 DCD 858927408 + 0x010077c8: 37363534 4567 DCD 926299444 + 0x010077cc: 42413938 89AB DCD 1111570744 + 0x010077d0: 46454443 CDEF DCD 1178944579 + 0x010077d4: 00 . DCB 0 + .constdata + __FUNCTION__ + 0x010077d5: 5f6970 _ip DCB 95,105,112 + 0x010077d8: 696c5f63 c_li DCD 1768709987 + 0x010077dc: 735f7473 st_s DCD 1935635571 + 0x010077e0: 65707375 uspe DCD 1701868405 + 0x010077e4: 646e nd DCW 25710 + 0x010077e6: 00 . DCB 0 + __FUNCTION__ + 0x010077e7: 72 r DCB 114 + 0x010077e8: 65735f74 t_se DCD 1702059892 + 0x010077ec: 6e695f6d m_in DCD 1852399469 + 0x010077f0: 7469 it DCW 29801 + 0x010077f2: 00 . DCB 0 + __FUNCTION__ + 0x010077f3: 72 r DCB 114 + 0x010077f4: 65735f74 t_se DCD 1702059892 + 0x010077f8: 65645f6d m_de DCD 1701076845 + 0x010077fc: 68636174 tach DCD 1751343476 + 0x01007800: 00 . DCB 0 + __FUNCTION__ + 0x01007801: 72745f rt_ DCB 114,116,95 + 0x01007804: 5f6d6573 sem_ DCD 1601004915 + 0x01007808: 61657263 crea DCD 1634038371 + 0x0100780c: 6574 te DCW 25972 + 0x0100780e: 00 . DCB 0 + __FUNCTION__ + 0x0100780f: 72 r DCB 114 + 0x01007810: 65735f74 t_se DCD 1702059892 + 0x01007814: 65645f6d m_de DCD 1701076845 + 0x01007818: 6574656c lete DCD 1702126956 + 0x0100781c: 00 . DCB 0 + __FUNCTION__ + 0x0100781d: 72745f rt_ DCB 114,116,95 + 0x01007820: 5f6d6573 sem_ DCD 1601004915 + 0x01007824: 656b6174 take DCD 1701536116 + 0x01007828: 00 . DCB 0 + __FUNCTION__ + 0x01007829: 72745f rt_ DCB 114,116,95 + 0x0100782c: 5f6d6573 sem_ DCD 1601004915 + 0x01007830: 656c6572 rele DCD 1701602674 + 0x01007834: 00657361 ase. DCD 6648673 + __FUNCTION__ + 0x01007838: 735f7472 rt_s DCD 1935635570 + 0x0100783c: 635f6d65 em_c DCD 1667198309 + 0x01007840: 72746e6f ontr DCD 1920233071 + 0x01007844: 6c6f ol DCW 27759 + 0x01007846: 00 . DCB 0 + __FUNCTION__ + 0x01007847: 72 r DCB 114 + 0x01007848: 756d5f74 t_mu DCD 1970102132 + 0x0100784c: 5f786574 tex_ DCD 1601725812 + 0x01007850: 74696e69 init DCD 1953066601 + 0x01007854: 00 . DCB 0 + __FUNCTION__ + 0x01007855: 72745f rt_ DCB 114,116,95 + 0x01007858: 6574756d mute DCD 1702131053 + 0x0100785c: 65645f78 x_de DCD 1701076856 + 0x01007860: 68636174 tach DCD 1751343476 + 0x01007864: 00 . DCB 0 + __FUNCTION__ + 0x01007865: 72745f rt_ DCB 114,116,95 + 0x01007868: 6574756d mute DCD 1702131053 + 0x0100786c: 72635f78 x_cr DCD 1919115128 + 0x01007870: 65746165 eate DCD 1702125925 + 0x01007874: 00 . DCB 0 + __FUNCTION__ + 0x01007875: 72745f rt_ DCB 114,116,95 + 0x01007878: 6574756d mute DCD 1702131053 + 0x0100787c: 65645f78 x_de DCD 1701076856 + 0x01007880: 6574656c lete DCD 1702126956 + 0x01007884: 00 . DCB 0 + __FUNCTION__ + 0x01007885: 72745f rt_ DCB 114,116,95 + 0x01007888: 6574756d mute DCD 1702131053 + 0x0100788c: 61745f78 x_ta DCD 1635016568 + 0x01007890: 656b ke DCW 25963 + 0x01007892: 00 . DCB 0 + __FUNCTION__ + 0x01007893: 72 r DCB 114 + 0x01007894: 756d5f74 t_mu DCD 1970102132 + 0x01007898: 5f786574 tex_ DCD 1601725812 + 0x0100789c: 656c6572 rele DCD 1701602674 + 0x010078a0: 00657361 ase. DCD 6648673 + __FUNCTION__ + 0x010078a4: 6d5f7472 rt_m DCD 1834972274 + 0x010078a8: 78657475 utex DCD 2019914869 + 0x010078ac: 6e6f635f _con DCD 1852793695 + 0x010078b0: 6c6f7274 trol DCD 1819243124 + 0x010078b4: 00 . DCB 0 + __FUNCTION__ + 0x010078b5: 72745f rt_ DCB 114,116,95 + 0x010078b8: 6e657665 even DCD 1852143205 + 0x010078bc: 6e695f74 t_in DCD 1852399476 + 0x010078c0: 7469 it DCW 29801 + 0x010078c2: 00 . DCB 0 + __FUNCTION__ + 0x010078c3: 72 r DCB 114 + 0x010078c4: 76655f74 t_ev DCD 1986355060 + 0x010078c8: 5f746e65 ent_ DCD 1601465957 + 0x010078cc: 61746564 deta DCD 1635018084 + 0x010078d0: 6863 ch DCW 26723 + 0x010078d2: 00 . DCB 0 + __FUNCTION__ + 0x010078d3: 72 r DCB 114 + 0x010078d4: 76655f74 t_ev DCD 1986355060 + 0x010078d8: 5f746e65 ent_ DCD 1601465957 + 0x010078dc: 61657263 crea DCD 1634038371 + 0x010078e0: 6574 te DCW 25972 + 0x010078e2: 00 . DCB 0 + __FUNCTION__ + 0x010078e3: 72 r DCB 114 + 0x010078e4: 76655f74 t_ev DCD 1986355060 + 0x010078e8: 5f746e65 ent_ DCD 1601465957 + 0x010078ec: 656c6564 dele DCD 1701602660 + 0x010078f0: 6574 te DCW 25972 + 0x010078f2: 00 . DCB 0 + __FUNCTION__ + 0x010078f3: 72 r DCB 114 + 0x010078f4: 76655f74 t_ev DCD 1986355060 + 0x010078f8: 5f746e65 ent_ DCD 1601465957 + 0x010078fc: 646e6573 send DCD 1684956531 + 0x01007900: 00 . DCB 0 + __FUNCTION__ + 0x01007901: 72745f rt_ DCB 114,116,95 + 0x01007904: 6e657665 even DCD 1852143205 + 0x01007908: 65725f74 t_re DCD 1701994356 + 0x0100790c: 7663 cv DCW 30307 + 0x0100790e: 00 . DCB 0 + __FUNCTION__ + 0x0100790f: 72 r DCB 114 + 0x01007910: 76655f74 t_ev DCD 1986355060 + 0x01007914: 5f746e65 ent_ DCD 1601465957 + 0x01007918: 746e6f63 cont DCD 1953394531 + 0x0100791c: 006c6f72 rol. DCD 7106418 + __FUNCTION__ + 0x01007920: 6d5f7472 rt_m DCD 1834972274 + 0x01007924: 6e695f62 b_in DCD 1852399458 + 0x01007928: 7469 it DCW 29801 + 0x0100792a: 00 . DCB 0 + __FUNCTION__ + 0x0100792b: 72 r DCB 114 + 0x0100792c: 626d5f74 t_mb DCD 1651335028 + 0x01007930: 7465645f _det DCD 1952801887 + 0x01007934: 00686361 ach. DCD 6841185 + __FUNCTION__ + 0x01007938: 6d5f7472 rt_m DCD 1834972274 + 0x0100793c: 72635f62 b_cr DCD 1919115106 + 0x01007940: 65746165 eate DCD 1702125925 + 0x01007944: 00 . DCB 0 + __FUNCTION__ + 0x01007945: 72745f rt_ DCB 114,116,95 + 0x01007948: 645f626d mb_d DCD 1683972717 + 0x0100794c: 74656c65 elet DCD 1952803941 + 0x01007950: 0065 e. DCW 101 + __FUNCTION__ + 0x01007952: 7472 rt DCW 29810 + 0x01007954: 5f626d5f _mb_ DCD 1600286047 + 0x01007958: 646e6573 send DCD 1684956531 + 0x0100795c: 6961775f _wai DCD 1767995231 + 0x01007960: 0074 t. DCW 116 + __FUNCTION__ + 0x01007962: 7472 rt DCW 29810 + 0x01007964: 5f626d5f _mb_ DCD 1600286047 + 0x01007968: 65677275 urge DCD 1701278325 + 0x0100796c: 746e nt DCW 29806 + 0x0100796e: 00 . DCB 0 + __FUNCTION__ + 0x0100796f: 72 r DCB 114 + 0x01007970: 626d5f74 t_mb DCD 1651335028 + 0x01007974: 6365725f _rec DCD 1667592799 + 0x01007978: 0076 v. DCW 118 + __FUNCTION__ + 0x0100797a: 7472 rt DCW 29810 + 0x0100797c: 5f626d5f _mb_ DCD 1600286047 + 0x01007980: 746e6f63 cont DCD 1953394531 + 0x01007984: 006c6f72 rol. DCD 7106418 + __FUNCTION__ + 0x01007988: 6d5f7472 rt_m DCD 1834972274 + 0x0100798c: 6e695f71 q_in DCD 1852399473 + 0x01007990: 7469 it DCW 29801 + 0x01007992: 00 . DCB 0 + __FUNCTION__ + 0x01007993: 72 r DCB 114 + 0x01007994: 716d5f74 t_mq DCD 1902993268 + 0x01007998: 7465645f _det DCD 1952801887 + 0x0100799c: 00686361 ach. DCD 6841185 + __FUNCTION__ + 0x010079a0: 6d5f7472 rt_m DCD 1834972274 + 0x010079a4: 72635f71 q_cr DCD 1919115121 + 0x010079a8: 65746165 eate DCD 1702125925 + 0x010079ac: 00 . DCB 0 + __FUNCTION__ + 0x010079ad: 72745f rt_ DCB 114,116,95 + 0x010079b0: 645f716d mq_d DCD 1683976557 + 0x010079b4: 74656c65 elet DCD 1952803941 + 0x010079b8: 0065 e. DCW 101 + __FUNCTION__ + 0x010079ba: 7472 rt DCW 29810 + 0x010079bc: 5f716d5f _mq_ DCD 1601269087 + 0x010079c0: 646e6573 send DCD 1684956531 + 0x010079c4: 6961775f _wai DCD 1767995231 + 0x010079c8: 0074 t. DCW 116 + __FUNCTION__ + 0x010079ca: 7472 rt DCW 29810 + 0x010079cc: 5f716d5f _mq_ DCD 1601269087 + 0x010079d0: 65677275 urge DCD 1701278325 + 0x010079d4: 746e nt DCW 29806 + 0x010079d6: 00 . DCB 0 + __FUNCTION__ + 0x010079d7: 72 r DCB 114 + 0x010079d8: 716d5f74 t_mq DCD 1902993268 + 0x010079dc: 6365725f _rec DCD 1667592799 + 0x010079e0: 0076 v. DCW 118 + __FUNCTION__ + 0x010079e2: 7472 rt DCW 29810 + 0x010079e4: 5f716d5f _mq_ DCD 1601269087 + 0x010079e8: 746e6f63 cont DCD 1953394531 + 0x010079ec: 006c6f72 rol. DCD 7106418 + .constdata + __FUNCTION__ + 0x010079f0: 745f7472 rt_t DCD 1952412786 + 0x010079f4: 72656d69 imer DCD 1919249769 + 0x010079f8: 696e695f _ini DCD 1768843615 + 0x010079fc: 0074 t. DCW 116 + __FUNCTION__ + 0x010079fe: 7472 rt DCW 29810 + 0x01007a00: 6d69745f _tim DCD 1835627615 + 0x01007a04: 645f7265 er_d DCD 1683976805 + 0x01007a08: 63617465 etac DCD 1667331173 + 0x01007a0c: 0068 h. DCW 104 + __FUNCTION__ + 0x01007a0e: 7472 rt DCW 29810 + 0x01007a10: 6d69745f _tim DCD 1835627615 + 0x01007a14: 645f7265 er_d DCD 1683976805 + 0x01007a18: 74656c65 elet DCD 1952803941 + 0x01007a1c: 0065 e. DCW 101 + __FUNCTION__ + 0x01007a1e: 7472 rt DCW 29810 + 0x01007a20: 6d69745f _tim DCD 1835627615 + 0x01007a24: 735f7265 er_s DCD 1935635045 + 0x01007a28: 74726174 tart DCD 1953653108 + 0x01007a2c: 00 . DCB 0 + __FUNCTION__ + 0x01007a2d: 72745f rt_ DCB 114,116,95 + 0x01007a30: 656d6974 time DCD 1701669236 + 0x01007a34: 74735f72 r_st DCD 1953718130 + 0x01007a38: 706f op DCW 28783 + 0x01007a3a: 00 . DCB 0 + __FUNCTION__ + 0x01007a3b: 72 r DCB 114 + 0x01007a3c: 69745f74 t_ti DCD 1769234292 + 0x01007a40: 5f72656d mer_ DCD 1601332589 + 0x01007a44: 746e6f63 cont DCD 1953394531 + 0x01007a48: 006c6f72 rol. DCD 7106418 + .constdata + __FUNCTION__ + 0x01007a4c: 6f5f7472 rt_o DCD 1868526706 + 0x01007a50: 63656a62 bjec DCD 1667590754 + 0x01007a54: 6e695f74 t_in DCD 1852399476 + 0x01007a58: 7469 it DCW 29801 + 0x01007a5a: 00 . DCB 0 + __FUNCTION__ + 0x01007a5b: 72 r DCB 114 + 0x01007a5c: 626f5f74 t_ob DCD 1651466100 + 0x01007a60: 7463656a ject DCD 1952671082 + 0x01007a64: 7465645f _det DCD 1952801887 + 0x01007a68: 00686361 ach. DCD 6841185 + __FUNCTION__ + 0x01007a6c: 6f5f7472 rt_o DCD 1868526706 + 0x01007a70: 63656a62 bjec DCD 1667590754 + 0x01007a74: 6c615f74 t_al DCD 1818320756 + 0x01007a78: 61636f6c loca DCD 1633906540 + 0x01007a7c: 6574 te DCW 25972 + 0x01007a7e: 00 . DCB 0 + __FUNCTION__ + 0x01007a7f: 72 r DCB 114 + 0x01007a80: 626f5f74 t_ob DCD 1651466100 + 0x01007a84: 7463656a ject DCD 1952671082 + 0x01007a88: 6c65645f _del DCD 1818584159 + 0x01007a8c: 00657465 ete. DCD 6648933 + __FUNCTION__ + 0x01007a90: 6f5f7472 rt_o DCD 1868526706 + 0x01007a94: 63656a62 bjec DCD 1667590754 + 0x01007a98: 73695f74 t_is DCD 1936285556 + 0x01007a9c: 7379735f _sys DCD 1937339231 + 0x01007aa0: 6f6d6574 temo DCD 1869440372 + 0x01007aa4: 63656a62 bjec DCD 1667590754 + 0x01007aa8: 0074 t. DCW 116 + __FUNCTION__ + 0x01007aaa: 7472 rt DCW 29810 + 0x01007aac: 6a626f5f _obj DCD 1784835935 + 0x01007ab0: 5f746365 ect_ DCD 1601463141 + 0x01007ab4: 5f746567 get_ DCD 1601463655 + 0x01007ab8: 65707974 type DCD 1701869940 + 0x01007abc: 00 . DCB 0 + __FUNCTION__ + 0x01007abd: 72745f rt_ DCB 114,116,95 + 0x01007ac0: 656a626f obje DCD 1701470831 + 0x01007ac4: 665f7463 ct_f DCD 1717531747 + 0x01007ac8: 00646e69 ind. DCD 6581865 + .constdata + __FUNCTION__ + 0x01007acc: 6d5f7472 rt_m DCD 1834972274 + 0x01007ad0: 65686d65 emhe DCD 1701342565 + 0x01007ad4: 695f7061 ap_i DCD 1767862369 + 0x01007ad8: 0074696e nit. DCD 7629166 + __FUNCTION__ + 0x01007adc: 6d5f7472 rt_m DCD 1834972274 + 0x01007ae0: 65686d65 emhe DCD 1701342565 + 0x01007ae4: 645f7061 ap_d DCD 1683976289 + 0x01007ae8: 63617465 etac DCD 1667331173 + 0x01007aec: 0068 h. DCW 104 + __FUNCTION__ + 0x01007aee: 7472 rt DCW 29810 + 0x01007af0: 6d656d5f _mem DCD 1835363679 + 0x01007af4: 70616568 heap DCD 1885431144 + 0x01007af8: 6c6c615f _all DCD 1819042143 + 0x01007afc: 636f oc DCW 25455 + 0x01007afe: 00 . DCB 0 + __FUNCTION__ + 0x01007aff: 72 r DCB 114 + 0x01007b00: 656d5f74 t_me DCD 1701666676 + 0x01007b04: 6165686d mhea DCD 1634035821 + 0x01007b08: 65725f70 p_re DCD 1701994352 + 0x01007b0c: 6f6c6c61 allo DCD 1869376609 + 0x01007b10: 0063 c. DCW 99 + __FUNCTION__ + 0x01007b12: 7472 rt DCW 29810 + 0x01007b14: 6d656d5f _mem DCD 1835363679 + 0x01007b18: 70616568 heap DCD 1885431144 + 0x01007b1c: 6572665f _fre DCD 1701996127 + 0x01007b20: 0065 e. DCW 101 + __FUNCTION__ + 0x01007b22: 7472 rt DCW 29810 + 0x01007b24: 6d656d5f _mem DCD 1835363679 + 0x01007b28: 70616568 heap DCD 1885431144 + 0x01007b2c: 6d75645f _dum DCD 1836409951 + 0x01007b30: 0070 p. DCW 112 + .constdata + __FUNCTION__ + 0x01007b32: 745f _t DCW 29791 + 0x01007b34: 61657268 hrea DCD 1634038376 + 0x01007b38: 6e695f64 d_in DCD 1852399460 + 0x01007b3c: 7469 it DCW 29801 + 0x01007b3e: 00 . DCB 0 + __FUNCTION__ + 0x01007b3f: 72 r DCB 114 + 0x01007b40: 68745f74 t_th DCD 1752457076 + 0x01007b44: 64616572 read DCD 1684104562 + 0x01007b48: 696e695f _ini DCD 1768843615 + 0x01007b4c: 0074 t. DCW 116 + __FUNCTION__ + 0x01007b4e: 7472 rt DCW 29810 + 0x01007b50: 7268745f _thr DCD 1919448159 + 0x01007b54: 5f646165 ead_ DCD 1600414053 + 0x01007b58: 72617473 star DCD 1918989427 + 0x01007b5c: 00707574 tup. DCD 7370100 + __FUNCTION__ + 0x01007b60: 745f7472 rt_t DCD 1952412786 + 0x01007b64: 61657268 hrea DCD 1634038376 + 0x01007b68: 65645f64 d_de DCD 1701076836 + 0x01007b6c: 68636174 tach DCD 1751343476 + 0x01007b70: 00 . DCB 0 + __FUNCTION__ + 0x01007b71: 72745f rt_ DCB 114,116,95 + 0x01007b74: 65726874 thre DCD 1701996660 + 0x01007b78: 645f6461 ad_d DCD 1683973217 + 0x01007b7c: 74656c65 elet DCD 1952803941 + 0x01007b80: 0065 e. DCW 101 + __FUNCTION__ + 0x01007b82: 7472 rt DCW 29810 + 0x01007b84: 7268745f _thr DCD 1919448159 + 0x01007b88: 5f646165 ead_ DCD 1600414053 + 0x01007b8c: 65656c73 slee DCD 1701145715 + 0x01007b90: 0070 p. DCW 112 + __FUNCTION__ + 0x01007b92: 7472 rt DCW 29810 + 0x01007b94: 7268745f _thr DCD 1919448159 + 0x01007b98: 5f646165 ead_ DCD 1600414053 + 0x01007b9c: 616c6564 dela DCD 1634493796 + 0x01007ba0: 6e755f79 y_un DCD 1853185913 + 0x01007ba4: 006c6974 til. DCD 7104884 + __FUNCTION__ + 0x01007ba8: 745f7472 rt_t DCD 1952412786 + 0x01007bac: 61657268 hrea DCD 1634038376 + 0x01007bb0: 6f635f64 d_co DCD 1868783460 + 0x01007bb4: 6f72746e ntro DCD 1869771886 + 0x01007bb8: 006c l. DCW 108 + __FUNCTION__ + 0x01007bba: 7472 rt DCW 29810 + 0x01007bbc: 7268745f _thr DCD 1919448159 + 0x01007bc0: 5f646165 ead_ DCD 1600414053 + 0x01007bc4: 70737573 susp DCD 1886614899 + 0x01007bc8: 00646e65 end. DCD 6581861 + __FUNCTION__ + 0x01007bcc: 745f7472 rt_t DCD 1952412786 + 0x01007bd0: 61657268 hrea DCD 1634038376 + 0x01007bd4: 65725f64 d_re DCD 1701994340 + 0x01007bd8: 656d7573 sume DCD 1701672307 + 0x01007bdc: 00 . DCB 0 + __FUNCTION__ + 0x01007bdd: 72745f rt_ DCB 114,116,95 + 0x01007be0: 65726874 thre DCD 1701996660 + 0x01007be4: 745f6461 ad_t DCD 1952408673 + 0x01007be8: 6f656d69 imeo DCD 1868918121 + 0x01007bec: 7475 ut DCW 29813 + 0x01007bee: 00 . DCB 0 + .constdata + __FUNCTION__ + 0x01007bef: 70 p DCB 112 + 0x01007bf0: 5f67756c lug_ DCD 1600615788 + 0x01007bf4: 656c6f68 hole DCD 1701605224 + 0x01007bf8: 0073 s. DCW 115 + __FUNCTION__ + 0x01007bfa: 7472 rt DCW 29810 + 0x01007bfc: 7379735f _sys DCD 1937339231 + 0x01007c00: 5f6d6574 tem_ DCD 1601004916 + 0x01007c04: 70616568 heap DCD 1885431144 + 0x01007c08: 696e695f _ini DCD 1768843615 + 0x01007c0c: 0074 t. DCW 116 + __FUNCTION__ + 0x01007c0e: 7472 rt DCW 29810 + 0x01007c10: 6c616d5f _mal DCD 1818324319 + 0x01007c14: 00636f6c loc. DCD 6516588 + __FUNCTION__ + 0x01007c18: 725f7472 rt_r DCD 1918858354 + 0x01007c1c: 6c6c6165 eall DCD 1819042149 + 0x01007c20: 636f oc DCW 25455 + 0x01007c22: 00 . DCB 0 + __FUNCTION__ + 0x01007c23: 72 r DCB 114 + 0x01007c24: 72665f74 t_fr DCD 1919311732 + 0x01007c28: 6565 ee DCW 25957 + 0x01007c2a: 00 . DCB 0 + .constdata + __FUNCTION__ + 0x01007c2b: 55 U DCB 85 + 0x01007c2c: 5f545241 ART_ DCD 1599361601 + 0x01007c30: 6f747541 Auto DCD 1869903169 + 0x01007c34: 776f6c46 Flow DCD 2003790918 + 0x01007c38: 6c727443 Ctrl DCD 1819440195 + 0x01007c3c: 00646d43 Cmd. DCD 6581571 + __FUNCTION__ + 0x01007c40: 54524155 UART DCD 1414676821 + 0x01007c44: 4965445f _DeI DCD 1231373407 + 0x01007c48: 0074696e nit. DCD 7629166 + __FUNCTION__ + 0x01007c4c: 54524155 UART DCD 1414676821 + 0x01007c50: 414d445f _DMA DCD 1095582815 + 0x01007c54: 646e6553 Send DCD 1684956499 + 0x01007c58: 00667542 Buf. DCD 6714690 + __FUNCTION__ + 0x01007c5c: 54524155 UART DCD 1414676821 + 0x01007c60: 696e495f _Ini DCD 1768835423 + 0x01007c64: 0074 t. DCW 116 + __FUNCTION__ + 0x01007c66: 4155 UA DCW 16725 + 0x01007c68: 495f5452 RT_I DCD 1230984274 + 0x01007c6c: 46585273 sRXF DCD 1180193395 + 0x01007c70: 464f4649 IFOF DCD 1179600457 + 0x01007c74: 006c6c75 ull. DCD 7105653 + __FUNCTION__ + 0x01007c78: 54524155 UART DCD 1414676821 + 0x01007c7c: 5273495f _IsR DCD 1383287135 + 0x01007c80: 46494658 XFIF DCD 1179207256 + 0x01007c84: 746f4e4f ONot DCD 1953451599 + 0x01007c88: 74706d45 Empt DCD 1953525061 + 0x01007c8c: 0079 y. DCW 121 + __FUNCTION__ + 0x01007c8e: 4155 UA DCW 16725 + 0x01007c90: 495f5452 RT_I DCD 1230984274 + 0x01007c94: 52415573 sUAR DCD 1380013427 + 0x01007c98: 73754254 TBus DCD 1937064532 + 0x01007c9c: 0079 y. DCW 121 + __FUNCTION__ + 0x01007c9e: 4155 UA DCW 16725 + 0x01007ca0: 495f5452 RT_I DCD 1230984274 + 0x01007ca4: 6e6f4354 TCon DCD 1852785492 + 0x01007ca8: 00676966 fig. DCD 6777190 + __FUNCTION__ + 0x01007cac: 54524155 UART DCD 1414676821 + 0x01007cb0: 6365525f _Rec DCD 1667584607 + 0x01007cb4: 65766965 eive DCD 1702259045 + 0x01007cb8: 61746144 Data DCD 1635017028 + 0x01007cbc: 00 . DCB 0 + __FUNCTION__ + 0x01007cbd: 554152 UAR DCB 85,65,82 + 0x01007cc0: 65525f54 T_Re DCD 1699897172 + 0x01007cc4: 75427663 cvBu DCD 1967289955 + 0x01007cc8: 0066 f. DCW 102 + __FUNCTION__ + 0x01007cca: 4155 UA DCW 16725 + 0x01007ccc: 535f5452 RT_S DCD 1398756434 + 0x01007cd0: 42646e65 endB DCD 1113878117 + 0x01007cd4: 6675 uf DCW 26229 + 0x01007cd6: 00 . DCB 0 + __FUNCTION__ + 0x01007cd7: 55 U DCB 85 + 0x01007cd8: 5f545241 ART_ DCD 1599361601 + 0x01007cdc: 52746553 SetR DCD 1383359827 + 0x01007ce0: 4e544978 xITN DCD 1314146680 + 0x01007ce4: 6d75 um DCW 28021 + 0x01007ce6: 00 . DCB 0 + __FUNCTION__ + 0x01007ce7: 55 U DCB 85 + 0x01007ce8: 5f545241 ART_ DCD 1599361601 + 0x01007cec: 65636552 Rece DCD 1701012818 + 0x01007cf0: 44657669 iveD DCD 1147500137 + 0x01007cf4: 4c617461 ataL DCD 1281455201 + 0x01007cf8: 00006e65 en.. DCD 28261 + .conststring + 0x01007cfc: 6e726157 Warn DCD 1852989783 + 0x01007d00: 3a676e69 ing: DCD 979857001 + 0x01007d04: 65685420 The DCD 1701336096 + 0x01007d08: 69206572 re i DCD 1763730802 + 0x01007d0c: 6f6e2073 s no DCD 1869488243 + 0x01007d10: 6f6e6520 eno DCD 1869505824 + 0x01007d14: 20686775 ugh DCD 543713141 + 0x01007d18: 66667562 buff DCD 1717990754 + 0x01007d1c: 66207265 er f DCD 1713402469 + 0x01007d20: 7320726f or s DCD 1931506287 + 0x01007d24: 6e697661 avin DCD 1852405345 + 0x01007d28: 61642067 g da DCD 1633951847 + 0x01007d2c: 202c6174 ta, DCD 539779444 + 0x01007d30: 61656c70 plea DCD 1634036848 + 0x01007d34: 69206573 se i DCD 1763730803 + 0x01007d38: 6572636e ncre DCD 1701995374 + 0x01007d3c: 20657361 ase DCD 543519585 + 0x01007d40: 20656874 the DCD 543516788 + 0x01007d44: 535f5452 RT_S DCD 1398756434 + 0x01007d48: 41495245 ERIA DCD 1095324229 + 0x01007d4c: 42525f4c L_RB DCD 1112694604 + 0x01007d50: 4655425f _BUF DCD 1179992671 + 0x01007d54: 6f205a53 SZ o DCD 1864391251 + 0x01007d58: 6f697470 ptio DCD 1869182064 + 0x01007d5c: 00002e6e n... DCD 11886 + .conststring + 0x01007d60: 2e2a2d25 %-*. DCD 774516005 + 0x01007d64: 72702073 s pr DCD 1919950963 + 0x01007d68: 73202069 i s DCD 1931485289 + 0x01007d6c: 75746174 tatu DCD 1970561396 + 0x01007d70: 20202073 s DCD 538976371 + 0x01007d74: 73202020 s DCD 1931485216 + 0x01007d78: 20202070 p DCD 538976368 + 0x01007d7c: 74732020 st DCD 1953701920 + 0x01007d80: 206b6361 ack DCD 543908705 + 0x01007d84: 657a6973 size DCD 1702521203 + 0x01007d88: 78616d20 max DCD 2019650848 + 0x01007d8c: 65737520 use DCD 1702065440 + 0x01007d90: 656c2064 d le DCD 1701584996 + 0x01007d94: 74207466 ft t DCD 1948284006 + 0x01007d98: 206b6369 ick DCD 543908713 + 0x01007d9c: 72726520 err DCD 1920099616 + 0x01007da0: 000a726f or.. DCD 684655 + 0x01007da4: 00435452 RTC. DCD 4412498 + 0x01007da8: 7774654e Netw DCD 2004116814 + 0x01007dac: 206b726f ork DCD 543912559 + 0x01007db0: 65746e49 Inte DCD 1702129225 + 0x01007db4: 63616672 rfac DCD 1667327602 + 0x01007db8: 00000065 e... DCD 101 + 0x01007dbc: 2044544d MTD DCD 541348941 + 0x01007dc0: 69766544 Devi DCD 1769366852 + 0x01007dc4: 00006563 ce.. DCD 25955 + 0x01007dc8: 20495053 SPI DCD 541675603 + 0x01007dcc: 69766544 Devi DCD 1769366852 + 0x01007dd0: 00006563 ce.. DCD 25955 + 0x01007dd4: 204e4143 CAN DCD 541999427 + 0x01007dd8: 69766544 Devi DCD 1769366852 + 0x01007ddc: 00006563 ce.. DCD 25955 + 0x01007de0: 70617247 Grap DCD 1885434439 + 0x01007de4: 20636968 hic DCD 543385960 + 0x01007de8: 69766544 Devi DCD 1769366852 + 0x01007dec: 00006563 ce.. DCD 25955 + 0x01007df0: 6e756f53 Soun DCD 1853189971 + 0x01007df4: 65442064 d De DCD 1698963556 + 0x01007df8: 65636976 vice DCD 1701013878 + 0x01007dfc: 00000000 .... DCD 0 + 0x01007e00: 20425355 USB DCD 541217621 + 0x01007e04: 76616c53 Slav DCD 1986096211 + 0x01007e08: 65442065 e De DCD 1698963557 + 0x01007e0c: 65636976 vice DCD 1701013878 + 0x01007e10: 00000000 .... DCD 0 + 0x01007e14: 63756f54 Touc DCD 1668640596 + 0x01007e18: 65442068 h De DCD 1698963560 + 0x01007e1c: 65636976 vice DCD 1701013878 + 0x01007e20: 00000000 .... DCD 0 + 0x01007e24: 636f6c42 Bloc DCD 1668246594 + 0x01007e28: 6544206b k De DCD 1698963563 + 0x01007e2c: 65636976 vice DCD 1701013878 + 0x01007e30: 00000000 .... DCD 0 + 0x01007e34: 74726f50 Port DCD 1953656656 + 0x01007e38: 44206c61 al D DCD 1142975585 + 0x01007e3c: 63697665 evic DCD 1667855973 + 0x01007e40: 00000065 e... DCD 101 + 0x01007e44: 50204d50 PM P DCD 1344294224 + 0x01007e48: 64756573 seud DCD 1685415283 + 0x01007e4c: 6544206f o De DCD 1698963567 + 0x01007e50: 65636976 vice DCD 1701013878 + 0x01007e54: 00000000 .... DCD 0 + 0x01007e58: 656d6954 Time DCD 1701669204 + 0x01007e5c: 65442072 r De DCD 1698963570 + 0x01007e60: 65636976 vice DCD 1701013878 + 0x01007e64: 00000000 .... DCD 0 + 0x01007e68: 72616843 Char DCD 1918986307 + 0x01007e6c: 65746361 acte DCD 1702126433 + 0x01007e70: 65442072 r De DCD 1698963570 + 0x01007e74: 65636976 vice DCD 1701013878 + 0x01007e78: 00000000 .... DCD 0 + 0x01007e7c: 736e6553 Sens DCD 1936614739 + 0x01007e80: 4420726f or D DCD 1142977135 + 0x01007e84: 63697665 evic DCD 1667855973 + 0x01007e88: 00000065 e... DCD 101 + 0x01007e8c: 6373694d Misc DCD 1668507981 + 0x01007e90: 616c6c65 ella DCD 1634495589 + 0x01007e94: 756f656e neou DCD 1970234734 + 0x01007e98: 65442073 s De DCD 1698963571 + 0x01007e9c: 65636976 vice DCD 1701013878 + 0x01007ea0: 00000000 .... DCD 0 + 0x01007ea4: 20796850 Phy DCD 544827472 + 0x01007ea8: 69766544 Devi DCD 1769366852 + 0x01007eac: 00006563 ce.. DCD 25955 + 0x01007eb0: 75636553 Secu DCD 1969448275 + 0x01007eb4: 79746972 rity DCD 2037672306 + 0x01007eb8: 76654420 Dev DCD 1986348064 + 0x01007ebc: 00656369 ice. DCD 6644585 + 0x01007ec0: 65706950 Pipe DCD 1701865808 + 0x01007ec4: 00000000 .... DCD 0 + 0x01007ec8: 6e6b6e55 Unkn DCD 1852534357 + 0x01007ecc: 006e776f own. DCD 7239535 + 0x01007ed0: 20433249 I2C DCD 541274697 + 0x01007ed4: 00737542 Bus. DCD 7566658 + 0x01007ed8: 20425355 USB DCD 541217621 + 0x01007edc: 2047544f OTG DCD 541545551 + 0x01007ee0: 00737542 Bus. DCD 7566658 + 0x01007ee4: 20495053 SPI DCD 541675603 + 0x01007ee8: 00737542 Bus. DCD 7566658 + 0x01007eec: 4f494453 SDIO DCD 1330201683 + 0x01007ef0: 73754220 Bus DCD 1937064480 + 0x01007ef4: 00000000 .... DCD 0 + 0x01007ef8: 20425355 USB DCD 541217621 + 0x01007efc: 74736f48 Host DCD 1953722184 + 0x01007f00: 73754220 Bus DCD 1937064480 + 0x01007f04: 00000000 .... DCD 0 + .conststring + 0x01007f08: 6f5f7472 rt_o DCD 1868526706 + 0x01007f0c: 63656a62 bjec DCD 1667590754 + 0x01007f10: 65675f74 t_ge DCD 1701273460 + 0x01007f14: 79745f74 t_ty DCD 2037669748 + 0x01007f18: 26286570 pe(& DCD 640181616 + 0x01007f1c: 2d6d6573 sem- DCD 762144115 + 0x01007f20: 7261703e >par DCD 1918988350 + 0x01007f24: 2e746e65 ent. DCD 779382373 + 0x01007f28: 65726170 pare DCD 1701994864 + 0x01007f2c: 2029746e nt) DCD 539587694 + 0x01007f30: 52203d3d == R DCD 1377844541 + 0x01007f34: 624f5f54 T_Ob DCD 1649368916 + 0x01007f38: 7463656a ject DCD 1952671082 + 0x01007f3c: 616c435f _Cla DCD 1634485087 + 0x01007f40: 535f7373 ss_S DCD 1398764403 + 0x01007f44: 70616d65 emap DCD 1885433189 + 0x01007f48: 65726f68 hore DCD 1701998440 + 0x01007f4c: 00000000 .... DCD 0 + .conststring + 0x01007f50: 6f5f7472 rt_o DCD 1868526706 + 0x01007f54: 63656a62 bjec DCD 1667590754 + 0x01007f58: 65675f74 t_ge DCD 1701273460 + 0x01007f5c: 79745f74 t_ty DCD 2037669748 + 0x01007f60: 28286570 pe(( DCD 673736048 + 0x01007f64: 6f5f7472 rt_o DCD 1868526706 + 0x01007f68: 63656a62 bjec DCD 1667590754 + 0x01007f6c: 29745f74 t_t) DCD 695492468 + 0x01007f70: 65726874 thre DCD 1701996660 + 0x01007f74: 20296461 ad) DCD 539583585 + 0x01007f78: 52203d3d == R DCD 1377844541 + 0x01007f7c: 624f5f54 T_Ob DCD 1649368916 + 0x01007f80: 7463656a ject DCD 1952671082 + 0x01007f84: 616c435f _Cla DCD 1634485087 + 0x01007f88: 545f7373 ss_T DCD 1415541619 + 0x01007f8c: 61657268 hrea DCD 1634038376 + 0x01007f90: 00000064 d... DCD 100 + .conststring + 0x01007f94: 5f747228 (rt_ DCD 1601466920 + 0x01007f98: 73616275 ubas DCD 1935762037 + 0x01007f9c: 29745f65 e_t) DCD 695492453 + 0x01007fa0: 74722828 ((rt DCD 1953638440 + 0x01007fa4: 6e69755f _uin DCD 1852405087 + 0x01007fa8: 745f3874 t8_t DCD 1952397428 + 0x01007fac: 6d292a20 *)m DCD 1831414304 + 0x01007fb0: 2b206d65 em + DCD 723545445 + 0x01007fb4: 5a495320 SIZ DCD 1514754848 + 0x01007fb8: 5f464f45 EOF_ DCD 1598443333 + 0x01007fbc: 55525453 STRU DCD 1431458899 + 0x01007fc0: 4d5f5443 CT_M DCD 1298093123 + 0x01007fc4: 20294d45 EM) DCD 539577669 + 0x01007fc8: 54522025 % RT DCD 1414668325 + 0x01007fcc: 494c415f _ALI DCD 1229734239 + 0x01007fd0: 535f4e47 GN_S DCD 1398754887 + 0x01007fd4: 20455a49 IZE DCD 541416009 + 0x01007fd8: 30203d3d == 0 DCD 807419197 + 0x01007fdc: 00000000 .... DCD 0 + 0x01007fe0: 5f747228 (rt_ DCD 1601466920 + 0x01007fe4: 746e6975 uint DCD 1953393013 + 0x01007fe8: 20745f38 8_t DCD 544497464 + 0x01007fec: 6d72292a *)rm DCD 1836198186 + 0x01007ff0: 3e206d65 em > DCD 1042312549 + 0x01007ff4: 7228203d = (r DCD 1915232317 + 0x01007ff8: 69755f74 t_ui DCD 1769299828 + 0x01007ffc: 5f38746e nt8_ DCD 1597535342 + 0x01008000: 292a2074 t *) DCD 690626676 + 0x01008004: 70616568 heap DCD 1885431144 + 0x01008008: 7274705f _ptr DCD 1920233567 + 0x0100800c: 20262620 && DCD 539371040 + 0x01008010: 5f747228 (rt_ DCD 1601466920 + 0x01008014: 746e6975 uint DCD 1953393013 + 0x01008018: 20745f38 8_t DCD 544497464 + 0x0100801c: 6d72292a *)rm DCD 1836198186 + 0x01008020: 3c206d65 em < DCD 1008758117 + 0x01008024: 74722820 (rt DCD 1953638432 + 0x01008028: 6e69755f _uin DCD 1852405087 + 0x0100802c: 745f3874 t8_t DCD 1952397428 + 0x01008030: 68292a20 *)h DCD 1747528224 + 0x01008034: 5f706165 eap_ DCD 1601200485 + 0x01008038: 00646e65 end. DCD 6581861 + 0x0100803c: 5f747228 (rt_ DCD 1601466920 + 0x01008040: 73616275 ubas DCD 1935762037 + 0x01008044: 29745f65 e_t) DCD 695492453 + 0x01008048: 206d656d mem DCD 544040301 + 0x0100804c: 4953202b + SI DCD 1230184491 + 0x01008050: 464f455a ZEOF DCD 1179600218 + 0x01008054: 5254535f _STR DCD 1381258079 + 0x01008058: 5f544355 UCT_ DCD 1599357781 + 0x0100805c: 204d454d MEM DCD 541934925 + 0x01008060: 6973202b + si DCD 1769152555 + 0x01008064: 3c20657a ze < DCD 1008756090 + 0x01008068: 7228203d = (r DCD 1915232317 + 0x0100806c: 62755f74 t_ub DCD 1651859316 + 0x01008070: 5f657361 ase_ DCD 1600484193 + 0x01008074: 65682974 t)he DCD 1701325172 + 0x01008078: 655f7061 ap_e DCD 1700753505 + 0x0100807c: 646e nd DCW 25710 + 0x0100807e: 00 . DCB 0 + .rodata.name + __fsym_help_name + 0x0100807f: 68 h DCB 104 + 0x01008080: 00706c65 elp. DCD 7367781 + __fsym_help_desc + 0x01008084: 2d205452 RT - DCD 757093458 + 0x01008088: 72685420 Thr DCD 1919439904 + 0x0100808c: 20646165 ead DCD 543449445 + 0x01008090: 6c656873 shel DCD 1818585203 + 0x01008094: 6568206c l he DCD 1701322860 + 0x01008098: 002e706c lp.. DCD 3043436 + __fsym_ps_name + 0x0100809c: 7370 ps DCW 29552 + 0x0100809e: 00 . DCB 0 + __fsym_ps_desc + 0x0100809f: 4c L DCB 76 + 0x010080a0: 20747369 ist DCD 544502633 + 0x010080a4: 65726874 thre DCD 1701996660 + 0x010080a8: 20736461 ads DCD 544433249 + 0x010080ac: 74206e69 in t DCD 1948282473 + 0x010080b0: 73206568 he s DCD 1931502952 + 0x010080b4: 65747379 yste DCD 1702130553 + 0x010080b8: 2e6d m. DCW 11885 + 0x010080ba: 00 . DCB 0 + __fsym_free_name + 0x010080bb: 66 f DCB 102 + 0x010080bc: 00656572 ree. DCD 6645106 + __fsym_free_desc + 0x010080c0: 776f6853 Show DCD 2003789907 + 0x010080c4: 65687420 the DCD 1701344288 + 0x010080c8: 6d656d20 mem DCD 1835363616 + 0x010080cc: 2079726f ory DCD 544830063 + 0x010080d0: 67617375 usag DCD 1734439797 + 0x010080d4: 6e692065 e in DCD 1852383333 + 0x010080d8: 65687420 the DCD 1701344288 + 0x010080dc: 73797320 sys DCD 1937339168 + 0x010080e0: 2e6d6574 tem. DCD 778921332 + 0x010080e4: 00 . DCB 0 + .rodata.name + __fsym_hello_name + 0x010080e5: 68656c hel DCB 104,101,108 + 0x010080e8: 6f6c lo DCW 28524 + 0x010080ea: 00 . DCB 0 + __fsym_hello_desc + 0x010080eb: 73 s DCB 115 + 0x010080ec: 68207961 ay h DCD 1746958689 + 0x010080f0: 6f6c6c65 ello DCD 1869376613 + 0x010080f4: 726f7720 wor DCD 1919907616 + 0x010080f8: 646c ld DCW 25708 + 0x010080fa: 00 . DCB 0 + __fsym_clear_name + 0x010080fb: 63 c DCB 99 + 0x010080fc: 7261656c lear DCD 1918985580 + 0x01008100: 00 . DCB 0 + __fsym_clear_desc + 0x01008101: 636c65 cle DCB 99,108,101 + 0x01008104: 74207261 ar t DCD 1948283489 + 0x01008108: 74206568 he t DCD 1948280168 + 0x0100810c: 696d7265 ermi DCD 1768780389 + 0x01008110: 206c616e nal DCD 543973742 + 0x01008114: 65726373 scre DCD 1701995379 + 0x01008118: 6e65 en DCW 28261 + 0x0100811a: 00 . DCB 0 + __fsym_version_name + 0x0100811b: 76 v DCB 118 + 0x0100811c: 69737265 ersi DCD 1769173605 + 0x01008120: 6e6f on DCW 28271 + 0x01008122: 00 . DCB 0 + __fsym_version_desc + 0x01008123: 73 s DCB 115 + 0x01008124: 20776f68 how DCD 544698216 + 0x01008128: 2d205452 RT - DCD 757093458 + 0x0100812c: 72685420 Thr DCD 1919439904 + 0x01008130: 20646165 ead DCD 543449445 + 0x01008134: 73726576 vers DCD 1936876918 + 0x01008138: 206e6f69 ion DCD 544108393 + 0x0100813c: 6f666e69 info DCD 1868983913 + 0x01008140: 74616d72 rmat DCD 1952542066 + 0x01008144: 006e6f69 ion. DCD 7237481 + __fsym_list_thread_name + 0x01008148: 7473696c list DCD 1953720684 + 0x0100814c: 7268745f _thr DCD 1919448159 + 0x01008150: 00646165 ead. DCD 6578533 + __fsym_list_thread_desc + 0x01008154: 7473696c list DCD 1953720684 + 0x01008158: 72687420 thr DCD 1919448096 + 0x0100815c: 00646165 ead. DCD 6578533 + __fsym_list_sem_name + 0x01008160: 7473696c list DCD 1953720684 + 0x01008164: 6d65735f _sem DCD 1835365215 + 0x01008168: 00 . DCB 0 + __fsym_list_sem_desc + 0x01008169: 6c6973 lis DCB 108,105,115 + 0x0100816c: 65732074 t se DCD 1702043764 + 0x01008170: 6870616d maph DCD 1752195437 + 0x01008174: 2065726f ore DCD 543519343 + 0x01008178: 73206e69 in s DCD 1931505257 + 0x0100817c: 65747379 yste DCD 1702130553 + 0x01008180: 006d m. DCW 109 + __fsym_list_event_name + 0x01008182: 696c li DCW 26988 + 0x01008184: 655f7473 st_e DCD 1700754547 + 0x01008188: 746e6576 vent DCD 1953391990 + 0x0100818c: 00 . DCB 0 + __fsym_list_event_desc + 0x0100818d: 6c6973 lis DCB 108,105,115 + 0x01008190: 76652074 t ev DCD 1986338932 + 0x01008194: 20746e65 ent DCD 544501349 + 0x01008198: 73206e69 in s DCD 1931505257 + 0x0100819c: 65747379 yste DCD 1702130553 + 0x010081a0: 006d m. DCW 109 + __fsym_list_mutex_name + 0x010081a2: 696c li DCW 26988 + 0x010081a4: 6d5f7473 st_m DCD 1834972275 + 0x010081a8: 78657475 utex DCD 2019914869 + 0x010081ac: 00 . DCB 0 + __fsym_list_mutex_desc + 0x010081ad: 6c6973 lis DCB 108,105,115 + 0x010081b0: 756d2074 t mu DCD 1970086004 + 0x010081b4: 20786574 tex DCD 544761204 + 0x010081b8: 73206e69 in s DCD 1931505257 + 0x010081bc: 65747379 yste DCD 1702130553 + 0x010081c0: 006d m. DCW 109 + __fsym_list_mailbox_name + 0x010081c2: 696c li DCW 26988 + 0x010081c4: 6d5f7473 st_m DCD 1834972275 + 0x010081c8: 626c6961 ailb DCD 1651272033 + 0x010081cc: 786f ox DCW 30831 + 0x010081ce: 00 . DCB 0 + __fsym_list_mailbox_desc + 0x010081cf: 6c l DCB 108 + 0x010081d0: 20747369 ist DCD 544502633 + 0x010081d4: 6c69616d mail DCD 1818845549 + 0x010081d8: 786f6220 box DCD 2020565536 + 0x010081dc: 206e6920 in DCD 544106784 + 0x010081e0: 74737973 syst DCD 1953724787 + 0x010081e4: 6d65 em DCW 28005 + 0x010081e6: 00 . DCB 0 + __fsym_list_msgqueue_name + 0x010081e7: 6c l DCB 108 + 0x010081e8: 5f747369 ist_ DCD 1601467241 + 0x010081ec: 7167736d msgq DCD 1902605165 + 0x010081f0: 65756575 ueue DCD 1702192501 + 0x010081f4: 00 . DCB 0 + __fsym_list_msgqueue_desc + 0x010081f5: 6c6973 lis DCB 108,105,115 + 0x010081f8: 656d2074 t me DCD 1701650548 + 0x010081fc: 67617373 ssag DCD 1734439795 + 0x01008200: 75712065 e qu DCD 1970348133 + 0x01008204: 20657565 eue DCD 543520101 + 0x01008208: 73206e69 in s DCD 1931505257 + 0x0100820c: 65747379 yste DCD 1702130553 + 0x01008210: 006d m. DCW 109 + __fsym_list_memheap_name + 0x01008212: 696c li DCW 26988 + 0x01008214: 6d5f7473 st_m DCD 1834972275 + 0x01008218: 65686d65 emhe DCD 1701342565 + 0x0100821c: 7061 ap DCW 28769 + 0x0100821e: 00 . DCB 0 + __fsym_list_memheap_desc + 0x0100821f: 6c l DCB 108 + 0x01008220: 20747369 ist DCD 544502633 + 0x01008224: 6f6d656d memo DCD 1869440365 + 0x01008228: 68207972 ry h DCD 1746958706 + 0x0100822c: 20706165 eap DCD 544235877 + 0x01008230: 73206e69 in s DCD 1931505257 + 0x01008234: 65747379 yste DCD 1702130553 + 0x01008238: 006d m. DCW 109 + __fsym_list_mempool_name + 0x0100823a: 696c li DCW 26988 + 0x0100823c: 6d5f7473 st_m DCD 1834972275 + 0x01008240: 6f706d65 empo DCD 1869639013 + 0x01008244: 6c6f ol DCW 27759 + 0x01008246: 00 . DCB 0 + __fsym_list_mempool_desc + 0x01008247: 6c l DCB 108 + 0x01008248: 20747369 ist DCD 544502633 + 0x0100824c: 6f6d656d memo DCD 1869440365 + 0x01008250: 70207972 ry p DCD 1881176434 + 0x01008254: 206c6f6f ool DCD 543977327 + 0x01008258: 73206e69 in s DCD 1931505257 + 0x0100825c: 65747379 yste DCD 1702130553 + 0x01008260: 006d m. DCW 109 + __fsym_list_timer_name + 0x01008262: 696c li DCW 26988 + 0x01008264: 745f7473 st_t DCD 1952412787 + 0x01008268: 72656d69 imer DCD 1919249769 + 0x0100826c: 00 . DCB 0 + __fsym_list_timer_desc + 0x0100826d: 6c6973 lis DCB 108,105,115 + 0x01008270: 69742074 t ti DCD 1769218164 + 0x01008274: 2072656d mer DCD 544367981 + 0x01008278: 73206e69 in s DCD 1931505257 + 0x0100827c: 65747379 yste DCD 1702130553 + 0x01008280: 006d m. DCW 109 + __fsym_list_device_name + 0x01008282: 696c li DCW 26988 + 0x01008284: 645f7473 st_d DCD 1683977331 + 0x01008288: 63697665 evic DCD 1667855973 + 0x0100828c: 0065 e. DCW 101 + __fsym_list_device_desc + 0x0100828e: 696c li DCW 26988 + 0x01008290: 64207473 st d DCD 1679848563 + 0x01008294: 63697665 evic DCD 1667855973 + 0x01008298: 6e692065 e in DCD 1852383333 + 0x0100829c: 73797320 sys DCD 1937339168 + 0x010082a0: 006d6574 tem. DCD 7169396 + __fsym_list_name + 0x010082a4: 7473696c list DCD 1953720684 + 0x010082a8: 00 . DCB 0 + __fsym_list_desc + 0x010082a9: 6c6973 lis DCB 108,105,115 + 0x010082ac: 6c612074 t al DCD 1818304628 + 0x010082b0: 6f63206c l co DCD 1868767340 + 0x010082b4: 6e616d6d mman DCD 1851878765 + 0x010082b8: 69207364 ds i DCD 1763734372 + 0x010082bc: 7973206e n sy DCD 2037588078 + 0x010082c0: 6d657473 stem DCD 1835365491 + 0x010082c4: 00 . DCB 0 + .rodata.name + __fsym_memheaptrace_name + 0x010082c5: 6d656d mem DCB 109,101,109 + 0x010082c8: 70616568 heap DCD 1885431144 + 0x010082cc: 63617274 trac DCD 1667330676 + 0x010082d0: 0065 e. DCW 101 + __fsym_memheaptrace_desc + 0x010082d2: 7564 du DCW 30052 + 0x010082d4: 6d20706d mp m DCD 1830842477 + 0x010082d8: 726f6d65 emor DCD 1919905125 + 0x010082dc: 72742079 y tr DCD 1920213113 + 0x010082e0: 20656361 ace DCD 543515489 + 0x010082e4: 6f666e69 info DCD 1868983913 + 0x010082e8: 74616d72 rmat DCD 1952542066 + 0x010082ec: 006e6f69 ion. DCD 7237481 + .rti_fn.0 + __tagsym$$used + __rt_init_rti_start + 0x010082f0: 01006c6b kl.. DCD 16804971 + .rti_fn.0.end + __tagsym$$used + __rt_init_rti_board_start + 0x010082f4: 01006c63 cl.. DCD 16804963 + .rti_fn.1 + __tagsym$$used + __rt_init_rt_hw_pin_init + 0x010082f8: 0100420d .B.. DCD 16794125 + .rti_fn.1 + __tagsym$$used + __rt_init_rt_hw_uart_init + 0x010082fc: 010043e9 .C.. DCD 16794601 + .rti_fn.1.end + __tagsym$$used + __rt_init_rti_board_end + 0x01008300: 01006c5f _l.. DCD 16804959 + .rti_fn.6 + __tagsym$$used + __rt_init_finsh_system_init + 0x01008304: 01001a29 )... DCD 16783913 + .rti_fn.6.end + __tagsym$$used + __rt_init_rti_end + 0x01008308: 01006c67 gl.. DCD 16804967 + FSymTab + __tagsym$$used + FSymTab$$Base + __fsym_help + 0x0100830c: 0100807f .... DCD 16810111 + 0x01008310: 01008084 .... DCD 16810116 + 0x01008314: 01003191 .1.. DCD 16789905 + __tagsym$$used + __fsym_ps + 0x01008318: 0100809c .... DCD 16810140 + 0x0100831c: 0100809f .... DCD 16810143 + 0x01008320: 010017b3 .... DCD 16783283 + __tagsym$$used + __fsym_free + 0x01008324: 010080bb .... DCD 16810171 + 0x01008328: 010080c0 .... DCD 16810176 + 0x0100832c: 010017a5 .... DCD 16783269 + FSymTab + __tagsym$$used + __fsym_hello + 0x01008330: 010080e5 .... DCD 16810213 + 0x01008334: 010080eb .... DCD 16810219 + 0x01008338: 010020c5 . .. DCD 16785605 + __tagsym$$used + __fsym_clear + 0x0100833c: 010080fb .... DCD 16810235 + 0x01008340: 01008101 .... DCD 16810241 + 0x01008344: 01001791 .... DCD 16783249 + __tagsym$$used + __fsym_version + 0x01008348: 0100811b .... DCD 16810267 + 0x0100834c: 01008123 #... DCD 16810275 + 0x01008350: 01006e59 Yn.. DCD 16805465 + __tagsym$$used + __fsym_list_thread + 0x01008354: 01008148 H... DCD 16810312 + 0x01008358: 01008154 T... DCD 16810324 + 0x0100835c: 01002c51 Q,.. DCD 16788561 + __tagsym$$used + __fsym_list_sem + 0x01008360: 01008160 `... DCD 16810336 + 0x01008364: 01008169 i... DCD 16810345 + 0x01008368: 01002b19 .+.. DCD 16788249 + __tagsym$$used + __fsym_list_event + 0x0100836c: 01008182 .... DCD 16810370 + 0x01008370: 0100818d .... DCD 16810381 + 0x01008374: 01002261 a".. DCD 16786017 + __tagsym$$used + __fsym_list_mutex + 0x01008378: 010081a2 .... DCD 16810402 + 0x0100837c: 010081ad .... DCD 16810413 + 0x01008380: 01002a0d .*.. DCD 16787981 + __tagsym$$used + __fsym_list_mailbox + 0x01008384: 010081c2 .... DCD 16810434 + 0x01008388: 010081cf .... DCD 16810447 + 0x0100838c: 01002465 e$.. DCD 16786533 + __tagsym$$used + __fsym_list_msgqueue + 0x01008390: 010081e7 .... DCD 16810471 + 0x01008394: 010081f5 .... DCD 16810485 + 0x01008398: 010028c9 .(.. DCD 16787657 + __tagsym$$used + __fsym_list_memheap + 0x0100839c: 01008212 .... DCD 16810514 + 0x010083a0: 0100821f .... DCD 16810527 + 0x010083a4: 01002639 9&.. DCD 16787001 + __tagsym$$used + __fsym_list_mempool + 0x010083a8: 0100823a :... DCD 16810554 + 0x010083ac: 01008247 G... DCD 16810567 + 0x010083b0: 01002755 U'.. DCD 16787285 + __tagsym$$used + __fsym_list_timer + 0x010083b4: 01008262 b... DCD 16810594 + 0x010083b8: 0100826d m... DCD 16810605 + 0x010083bc: 01002e3d =... DCD 16789053 + __tagsym$$used + __fsym_list_device + 0x010083c0: 01008282 .... DCD 16810626 + 0x010083c4: 0100828e .... DCD 16810638 + 0x010083c8: 0100214d M!.. DCD 16785741 + __tagsym$$used + __fsym_list + 0x010083cc: 010082a4 .... DCD 16810660 + 0x010083d0: 010082a9 .... DCD 16810665 + 0x010083d4: 010020e5 . .. DCD 16785637 + FSymTab + __tagsym$$used + __fsym_memheaptrace + 0x010083d8: 010082c5 .... DCD 16810693 + 0x010083dc: 010082d2 .... DCD 16810706 + 0x010083e0: 01002fe1 ./.. DCD 16789473 + FSymTab$$Limit + Region$$Table$$Base + 0x010083e4: 01008404 .... DCD 16811012 + 0x010083e8: 00020000 .... DCD 131072 + 0x010083ec: 00000158 X... DCD 344 + 0x010083f0: 01000a32 2... DCD 16779826 + 0x010083f4: 01008468 h... DCD 16811112 + 0x010083f8: 00020158 X... DCD 131416 + 0x010083fc: 00000db8 .... DCD 3512 + 0x01008400: 01000444 D... DCD 16778308 + Region$$Table$$Limit + +** Section #5 'RW_IRAM1' (SHT_PROGBITS) [SHF_ALLOC + SHF_WRITE] + Size : 100 bytes (alignment 4) + Address: 0x00020000 + + +** Section #6 'RW_IRAM1' (SHT_NOBITS) [SHF_ALLOC + SHF_WRITE] + Size : 3512 bytes (alignment 16) + Address: 0x00020158 + + +** Section #7 '.debug_abbrev' (SHT_PROGBITS) + Size : 1476 bytes + + +** Section #8 '.debug_frame' (SHT_PROGBITS) + Size : 7560 bytes + + +** Section #9 '.debug_info' (SHT_PROGBITS) + Size : 124416 bytes + + +** Section #10 '.debug_line' (SHT_PROGBITS) + Size : 47496 bytes + + +** Section #11 '.debug_loc' (SHT_PROGBITS) + Size : 29452 bytes + + +** Section #12 '.debug_macinfo' (SHT_PROGBITS) + Size : 48792 bytes + + +** Section #13 '.debug_pubnames' (SHT_PROGBITS) + Size : 10286 bytes + + +** Section #14 '.symtab' (SHT_SYMTAB) + Size : 23392 bytes (alignment 4) + String table #15 '.strtab' + Last local symbol no. 1064 + + +** Section #15 '.strtab' (SHT_STRTAB) + Size : 15520 bytes + + +** Section #16 '.note' (SHT_NOTE) + Size : 40 bytes (alignment 4) + + +** Section #17 '.comment' (SHT_PROGBITS) + Size : 42332 bytes + + +** Section #18 '.shstrtab' (SHT_STRTAB) + Size : 184 bytes + + +address size variable name type +0x00020154 0x4 SystickCount tick + +address size variable name type +0x000205a4 0x400 uart0_DMA_buf array[1024] of uint8_t + +address size variable name type +0x000209a4 0x400 uart1_DMA_buf array[1024] of uint8_t + +address size variable name type +0x00020140 0x4 heap_end pointer to heap_mem + +address size variable name type +0x0002013c 0x4 heap_ptr pointer to rt_uint8_t + +address size variable name type +0x00020584 0x20 heap_sem rt_semaphore +0x00020584 0x1c heap_sem.parent rt_ipc_object +0x00020584 0x14 heap_sem.parent.parent rt_object +0x00020584 0x8 heap_sem.parent.parent.name array[8] of char +0x0002058c 0x1 heap_sem.parent.parent.type rt_uint8_t +0x0002058d 0x1 * heap_sem.parent.parent.flag rt_uint8_t +0x00020590 0x8 heap_sem.parent.parent.list rt_list_t +0x00020590 0x4 heap_sem.parent.parent.list.next pointer to rt_list_node +0x00020594 0x4 heap_sem.parent.parent.list.prev pointer to rt_list_node +0x00020598 0x8 heap_sem.parent.suspend_thread rt_list_t +0x00020598 0x4 heap_sem.parent.suspend_thread.next pointer to rt_list_node +0x0002059c 0x4 heap_sem.parent.suspend_thread.prev pointer to rt_list_node +0x000205a0 0x2 heap_sem.value rt_uint16_t +0x000205a2 0x2 heap_sem.reserved rt_uint16_t + +address size variable name type +0x00020144 0x4 lfree pointer to heap_mem + +address size variable name type +0x00020150 0x4 max_mem rt_size_t + +address size variable name type +0x00020148 0x4 mem_size_aligned rt_size_t + +address size variable name type +0x00020138 0x4 rt_free_hook pointer to function + +address size variable name type +0x00020134 0x4 rt_malloc_hook pointer to function + +address size variable name type +0x0002014c 0x4 used_mem rt_size_t + +address size variable name type +0x00020130 0x4 rt_thread_inited_hook pointer to function + +address size variable name type +0x0002012c 0x4 rt_thread_resume_hook pointer to function + +address size variable name type +0x00020128 0x4 rt_thread_suspend_hook pointer to function + +address size variable name type +0x0002011c 0x4 rt_interrupt_enter_hook pointer to function + +address size variable name type +0x00020120 0x4 rt_interrupt_leave_hook pointer to function + +address size variable name type +0x00020124 0x1 rt_interrupt_nest volatile rt_uint8_t + +address size variable name type +0x010083d8 0xc __fsym_memheaptrace const finsh_syscall +0x010083d8 0x4 __fsym_memheaptrace.name pointer to const char +0x010083dc 0x4 __fsym_memheaptrace.desc pointer to const char +0x010083e0 0x4 __fsym_memheaptrace.func syscall_func + +address size variable name type +0x010082d2 0x1e __fsym_memheaptrace_desc array[30] of const char + +address size variable name type +0x010082c5 0xd __fsym_memheaptrace_name array[13] of const char + +address size variable name type +0x00020068 0xa0 _object_container array[10] of rt_object_information + +address size variable name type +0x00020108 0x4 rt_object_attach_hook pointer to function + +address size variable name type +0x0002010c 0x4 rt_object_detach_hook pointer to function + +address size variable name type +0x00020118 0x4 rt_object_put_hook pointer to function + +address size variable name type +0x00020114 0x4 rt_object_take_hook pointer to function + +address size variable name type +0x00020110 0x4 rt_object_trytake_hook pointer to function + +address size variable name type +0x00020054 0x8 _timer_list array[1] of rt_list_t + +address size variable name type +0x0002005c 0x4 rt_timer_enter_hook pointer to function + +address size variable name type +0x00020060 0x4 rt_timer_exit_hook pointer to function + +address size variable name type +0x010076b3 0x100 __lowest_bit_bitmap array[256] of const rt_uint8_t + +address size variable name type +0x00020048 0x4 __rt_errno volatile int + +address size variable name type +0x0002004c 0x4 _console_device rt_device_t + +address size variable name type +0x00020050 0x4 rt_assert_hook pointer to function + +address size variable name type +0x00020044 0x4 rt_tick volatile rt_tick_t + +address size variable name type +0x0002003c 0x8 _rt_thread_defunct rt_list_t +0x0002003c 0x4 _rt_thread_defunct.next pointer to rt_list_node +0x00020040 0x4 _rt_thread_defunct.prev pointer to rt_list_node + +address size variable name type +0x00020374 0x80 idle array[1] of rt_thread + +address size variable name type +0x000204f4 0x10 idle_hook_list array[4] of pointer to function + +address size variable name type +0x000203f4 0x100 rt_thread_stack array[1] of array[256] of rt_uint8_t + +address size variable name type +0x00020030 0x1 rt_current_priority rt_uint8_t + +address size variable name type +0x0002002c 0x4 rt_current_thread pointer to rt_thread + +address size variable name type +0x00020034 0x4 rt_scheduler_hook pointer to function + +address size variable name type +0x00020028 0x2 rt_scheduler_lock_nest rt_int16_t + +address size variable name type +0x00020038 0x4 rt_scheduler_switch_hook pointer to function + +address size variable name type +0x00020274 0x100 rt_thread_priority_table array[32] of rt_list_t + +address size variable name type +0x00020024 0x4 rt_thread_ready_priority_group rt_uint32_t + +address size variable name type +0x01008300 0x4 __rt_init_rti_board_end const init_fn_t + +address size variable name type +0x010082f4 0x4 __rt_init_rti_board_start const init_fn_t + +address size variable name type +0x01008308 0x4 __rt_init_rti_end const init_fn_t + +address size variable name type +0x010082f0 0x4 __rt_init_rti_start const init_fn_t + +address size variable name type +0x0100833c 0xc __fsym_clear const finsh_syscall +0x0100833c 0x4 __fsym_clear.name pointer to const char +0x01008340 0x4 __fsym_clear.desc pointer to const char +0x01008344 0x4 __fsym_clear.func syscall_func + +address size variable name type +0x01008101 0x1a __fsym_clear_desc array[26] of const char + +address size variable name type +0x010080fb 0x6 __fsym_clear_name array[6] of const char + +address size variable name type +0x01008330 0xc __fsym_hello const finsh_syscall +0x01008330 0x4 __fsym_hello.name pointer to const char +0x01008334 0x4 __fsym_hello.desc pointer to const char +0x01008338 0x4 __fsym_hello.func syscall_func + +address size variable name type +0x010080eb 0x10 __fsym_hello_desc array[16] of const char + +address size variable name type +0x010080e5 0x6 __fsym_hello_name array[6] of const char + +address size variable name type +0x010083cc 0xc __fsym_list const finsh_syscall +0x010083cc 0x4 __fsym_list.name pointer to const char +0x010083d0 0x4 __fsym_list.desc pointer to const char +0x010083d4 0x4 __fsym_list.func syscall_func + +address size variable name type +0x010082a9 0x1c __fsym_list_desc array[28] of const char + +address size variable name type +0x010083c0 0xc __fsym_list_device const finsh_syscall +0x010083c0 0x4 __fsym_list_device.name pointer to const char +0x010083c4 0x4 __fsym_list_device.desc pointer to const char +0x010083c8 0x4 __fsym_list_device.func syscall_func + +address size variable name type +0x0100828e 0x16 __fsym_list_device_desc array[22] of const char + +address size variable name type +0x01008282 0xc __fsym_list_device_name array[12] of const char + +address size variable name type +0x0100836c 0xc __fsym_list_event const finsh_syscall +0x0100836c 0x4 __fsym_list_event.name pointer to const char +0x01008370 0x4 __fsym_list_event.desc pointer to const char +0x01008374 0x4 __fsym_list_event.func syscall_func + +address size variable name type +0x0100818d 0x15 __fsym_list_event_desc array[21] of const char + +address size variable name type +0x01008182 0xb __fsym_list_event_name array[11] of const char + +address size variable name type +0x01008384 0xc __fsym_list_mailbox const finsh_syscall +0x01008384 0x4 __fsym_list_mailbox.name pointer to const char +0x01008388 0x4 __fsym_list_mailbox.desc pointer to const char +0x0100838c 0x4 __fsym_list_mailbox.func syscall_func + +address size variable name type +0x010081cf 0x18 __fsym_list_mailbox_desc array[24] of const char + +address size variable name type +0x010081c2 0xd __fsym_list_mailbox_name array[13] of const char + +address size variable name type +0x0100839c 0xc __fsym_list_memheap const finsh_syscall +0x0100839c 0x4 __fsym_list_memheap.name pointer to const char +0x010083a0 0x4 __fsym_list_memheap.desc pointer to const char +0x010083a4 0x4 __fsym_list_memheap.func syscall_func + +address size variable name type +0x0100821f 0x1b __fsym_list_memheap_desc array[27] of const char + +address size variable name type +0x01008212 0xd __fsym_list_memheap_name array[13] of const char + +address size variable name type +0x010083a8 0xc __fsym_list_mempool const finsh_syscall +0x010083a8 0x4 __fsym_list_mempool.name pointer to const char +0x010083ac 0x4 __fsym_list_mempool.desc pointer to const char +0x010083b0 0x4 __fsym_list_mempool.func syscall_func + +address size variable name type +0x01008247 0x1b __fsym_list_mempool_desc array[27] of const char + +address size variable name type +0x0100823a 0xd __fsym_list_mempool_name array[13] of const char + +address size variable name type +0x01008390 0xc __fsym_list_msgqueue const finsh_syscall +0x01008390 0x4 __fsym_list_msgqueue.name pointer to const char +0x01008394 0x4 __fsym_list_msgqueue.desc pointer to const char +0x01008398 0x4 __fsym_list_msgqueue.func syscall_func + +address size variable name type +0x010081f5 0x1d __fsym_list_msgqueue_desc array[29] of const char + +address size variable name type +0x010081e7 0xe __fsym_list_msgqueue_name array[14] of const char + +address size variable name type +0x01008378 0xc __fsym_list_mutex const finsh_syscall +0x01008378 0x4 __fsym_list_mutex.name pointer to const char +0x0100837c 0x4 __fsym_list_mutex.desc pointer to const char +0x01008380 0x4 __fsym_list_mutex.func syscall_func + +address size variable name type +0x010081ad 0x15 __fsym_list_mutex_desc array[21] of const char + +address size variable name type +0x010081a2 0xb __fsym_list_mutex_name array[11] of const char + +address size variable name type +0x010082a4 0x5 __fsym_list_name array[5] of const char + +address size variable name type +0x01008360 0xc __fsym_list_sem const finsh_syscall +0x01008360 0x4 __fsym_list_sem.name pointer to const char +0x01008364 0x4 __fsym_list_sem.desc pointer to const char +0x01008368 0x4 __fsym_list_sem.func syscall_func + +address size variable name type +0x01008169 0x19 __fsym_list_sem_desc array[25] of const char + +address size variable name type +0x01008160 0x9 __fsym_list_sem_name array[9] of const char + +address size variable name type +0x01008354 0xc __fsym_list_thread const finsh_syscall +0x01008354 0x4 __fsym_list_thread.name pointer to const char +0x01008358 0x4 __fsym_list_thread.desc pointer to const char +0x0100835c 0x4 __fsym_list_thread.func syscall_func + +address size variable name type +0x01008154 0xc __fsym_list_thread_desc array[12] of const char + +address size variable name type +0x01008148 0xc __fsym_list_thread_name array[12] of const char + +address size variable name type +0x010083b4 0xc __fsym_list_timer const finsh_syscall +0x010083b4 0x4 __fsym_list_timer.name pointer to const char +0x010083b8 0x4 __fsym_list_timer.desc pointer to const char +0x010083bc 0x4 __fsym_list_timer.func syscall_func + +address size variable name type +0x0100826d 0x15 __fsym_list_timer_desc array[21] of const char + +address size variable name type +0x01008262 0xb __fsym_list_timer_name array[11] of const char + +address size variable name type +0x01008348 0xc __fsym_version const finsh_syscall +0x01008348 0x4 __fsym_version.name pointer to const char +0x0100834c 0x4 __fsym_version.desc pointer to const char +0x01008350 0x4 __fsym_version.func syscall_func + +address size variable name type +0x01008123 0x25 __fsym_version_desc array[37] of const char + +address size variable name type +0x0100811b 0x8 __fsym_version_name array[8] of const char + +address size variable name type +0x01007520 0x64 device_type_str array[25] of const pointer to char + +address size variable name type +0x01008324 0xc __fsym_free const finsh_syscall +0x01008324 0x4 __fsym_free.name pointer to const char +0x01008328 0x4 __fsym_free.desc pointer to const char +0x0100832c 0x4 __fsym_free.func syscall_func + +address size variable name type +0x010080c0 0x25 __fsym_free_desc array[37] of const char + +address size variable name type +0x010080bb 0x5 __fsym_free_name array[5] of const char + +address size variable name type +0x0100830c 0xc __fsym_help const finsh_syscall +0x0100830c 0x4 __fsym_help.name pointer to const char +0x01008310 0x4 __fsym_help.desc pointer to const char +0x01008314 0x4 __fsym_help.func syscall_func + +address size variable name type +0x01008084 0x18 __fsym_help_desc array[24] of const char + +address size variable name type +0x0100807f 0x5 __fsym_help_name array[5] of const char + +address size variable name type +0x01008318 0xc __fsym_ps const finsh_syscall +0x01008318 0x4 __fsym_ps.name pointer to const char +0x0100831c 0x4 __fsym_ps.desc pointer to const char +0x01008320 0x4 __fsym_ps.func syscall_func + +address size variable name type +0x0100809f 0x1c __fsym_ps_desc array[28] of const char + +address size variable name type +0x0100809c 0x3 __fsym_ps_name array[3] of const char + +address size variable name type +0x01008304 0x4 __rt_init_finsh_system_init const init_fn_t + +address size variable name type +0x00020014 0x4 _syscall_table_begin pointer to finsh_syscall + +address size variable name type +0x00020018 0x4 _syscall_table_end pointer to finsh_syscall + +address size variable name type +0x00020020 0x4 finsh_prompt_custom pointer to char + +address size variable name type +0x0002001c 0x4 shell pointer to finsh_shell + +address size variable name type +0x010082fc 0x4 __rt_init_rt_hw_uart_init const init_fn_t + +address size variable name type +0x0002019c 0x54 serial0 rt_serial_device +0x0002019c 0x40 serial0.parent rt_device +0x0002019c 0x14 serial0.parent.parent rt_object +0x0002019c 0x8 serial0.parent.parent.name array[8] of char +0x000201a4 0x1 serial0.parent.parent.type rt_uint8_t +0x000201a5 0x1 * serial0.parent.parent.flag rt_uint8_t +0x000201a8 0x8 serial0.parent.parent.list rt_list_t +0x000201a8 0x4 serial0.parent.parent.list.next pointer to rt_list_node +0x000201ac 0x4 serial0.parent.parent.list.prev pointer to rt_list_node +0x000201b0 0x1 * serial0.parent.type rt_device_class_type +0x000201b2 0x2 serial0.parent.flag rt_uint16_t +0x000201b4 0x2 serial0.parent.open_flag rt_uint16_t +0x000201b6 0x1 serial0.parent.ref_count rt_uint8_t +0x000201b7 0x1 serial0.parent.device_id rt_uint8_t +0x000201b8 0x4 serial0.parent.rx_indicate pointer to function +0x000201bc 0x4 serial0.parent.tx_complete pointer to function +0x000201c0 0x4 serial0.parent.init pointer to function +0x000201c4 0x4 serial0.parent.open pointer to function +0x000201c8 0x4 serial0.parent.close pointer to function +0x000201cc 0x4 serial0.parent.read pointer to function +0x000201d0 0x4 serial0.parent.write pointer to function +0x000201d4 0x4 serial0.parent.control pointer to function +0x000201d8 0x4 serial0.parent.user_data pointer to unknown Type +0x000201dc 0x4 serial0.ops pointer to const rt_uart_ops +0x000201e0 0x8 serial0.config serial_configure +0x000201e0 0x4 serial0.config.baud_rate rt_uint32_t +0x000201e4 0x4(28:4) serial0.config.data_bits rt_uint32_t +0x000201e4 0x4(26:2) serial0.config.stop_bits rt_uint32_t +0x000201e4 0x4(24:2) serial0.config.parity rt_uint32_t +0x000201e4 0x4(23:1) serial0.config.bit_order rt_uint32_t +0x000201e4 0x4(22:1) serial0.config.invert rt_uint32_t +0x000201e4 0x4(6:16) serial0.config.bufsz rt_uint32_t +0x000201e4 0x4(0:6) serial0.config.reserved rt_uint32_t +0x000201e8 0x4 serial0.serial_rx pointer to unknown Type +0x000201ec 0x4 serial0.serial_tx pointer to unknown Type + +address size variable name type +0x00020010 0x2 uart0 yc3121_uart +0x00020010 0x1 uart0.uart UART_TypeDef +0x00020011 0x1 uart0.irq IRQn_Type + +address size variable name type +0x01007420 0x14 yc3121_uart_ops const rt_uart_ops +0x01007420 0x4 yc3121_uart_ops.configure pointer to function +0x01007424 0x4 yc3121_uart_ops.control pointer to function +0x01007428 0x4 yc3121_uart_ops.putc pointer to function +0x0100742c 0x4 yc3121_uart_ops.getc pointer to function +0x01007430 0x4 yc3121_uart_ops.dma_transmit pointer to function + +address size variable name type +0x010082f8 0x4 __rt_init_rt_hw_pin_init const init_fn_t + +address size variable name type +0x01007404 0x1c yc3121_pin_ops const rt_pin_ops +0x01007404 0x4 yc3121_pin_ops.pin_mode pointer to function +0x01007408 0x4 yc3121_pin_ops.pin_write pointer to function +0x0100740c 0x4 yc3121_pin_ops.pin_read pointer to function +0x01007410 0x4 yc3121_pin_ops.pin_attach_irq pointer to unknown Type +0x01007414 0x4 yc3121_pin_ops.pin_detach_irq pointer to function +0x01007418 0x4 yc3121_pin_ops.pin_irq_enable pointer to function +0x0100741c 0x4 yc3121_pin_ops.pin_get pointer to function + +address size variable name type +0x00020158 0x44 _hw_pin rt_device_pin +0x00020158 0x40 _hw_pin.parent rt_device +0x00020158 0x14 _hw_pin.parent.parent rt_object +0x00020158 0x8 _hw_pin.parent.parent.name array[8] of char +0x00020160 0x1 _hw_pin.parent.parent.type rt_uint8_t +0x00020161 0x1 * _hw_pin.parent.parent.flag rt_uint8_t +0x00020164 0x8 _hw_pin.parent.parent.list rt_list_t +0x00020164 0x4 _hw_pin.parent.parent.list.next pointer to rt_list_node +0x00020168 0x4 _hw_pin.parent.parent.list.prev pointer to rt_list_node +0x0002016c 0x1 * _hw_pin.parent.type rt_device_class_type +0x0002016e 0x2 _hw_pin.parent.flag rt_uint16_t +0x00020170 0x2 _hw_pin.parent.open_flag rt_uint16_t +0x00020172 0x1 _hw_pin.parent.ref_count rt_uint8_t +0x00020173 0x1 _hw_pin.parent.device_id rt_uint8_t +0x00020174 0x4 _hw_pin.parent.rx_indicate pointer to function +0x00020178 0x4 _hw_pin.parent.tx_complete pointer to function +0x0002017c 0x4 _hw_pin.parent.init pointer to function +0x00020180 0x4 _hw_pin.parent.open pointer to function +0x00020184 0x4 _hw_pin.parent.close pointer to function +0x00020188 0x4 _hw_pin.parent.read pointer to function +0x0002018c 0x4 _hw_pin.parent.write pointer to function +0x00020190 0x4 _hw_pin.parent.control pointer to function +0x00020194 0x4 _hw_pin.parent.user_data pointer to unknown Type +0x00020198 0x4 _hw_pin.ops pointer to const rt_pin_ops + +address size variable name type +0x00020000 0x4 rt_interrupt_from_thread rt_uint32_t + +address size variable name type +0x00020004 0x4 rt_interrupt_to_thread rt_uint32_t + +address size variable name type +0x00020008 0x4 rt_thread_switch_interrupt_flag rt_uint32_t + diff --git a/bsp/yichip/yc3121-pos/template.ewp b/bsp/yichip/yc3121-pos/template.ewp new file mode 100644 index 0000000000..2ff75d9abc --- /dev/null +++ b/bsp/yichip/yc3121-pos/template.ewp @@ -0,0 +1,2032 @@ + + + 3 + + rt-thread + + ARM + + 1 + + General + 3 + + 29 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 34 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 10 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + 0 + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 20 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Release + + ARM + + 0 + + General + 3 + + 29 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 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0000000000..0e93bee143 --- /dev/null +++ b/bsp/yichip/yc3121-pos/template.uvopt @@ -0,0 +1,184 @@ + + + + 1.0 + +
    ### uVision Project, (C) Keil Software
    + + + *.c + *.s*; *.src; *.a* + *.obj + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + + + + 0 + 0 + + + + rt-thread + 0x4 + ARM-ADS + + 25000000 + + 1 + 1 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\build\keil\List\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 0 + 0 + 1 + + 255 + + + 0 + Datasheet + DATASHTS\ST\STM32F4xx\DM00053488.pdf + + + 1 + Reference Manual + DATASHTS\ST\STM32F4xx\DM00031020.pdf + + + 2 + Technical Reference Manual + datashts\arm\cortex_m4\r0p1\DDI0439C_CORTEX_M4_R0P1_TRM.PDF + + + 3 + Generic User Guide + datashts\arm\cortex_m4\r0p1\DUI0553A_CORTEX_M4_DGUG.PDF + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 0 + 1 + 1 + 0 + 0 + 0 + 6 + + + + + + + + + + + Segger\JL2CM3.dll + + + + 0 + JL2CM3 + -U20090928 -O207 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -TO18 -TC10000000 -TP21 -TDS8001 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024 -FS08000000 -FL0100000 + + + 0 + UL2CM3 + UL2CM3(-O207 -S0 -C0 -FO7 -FN1 -FC800 -FD20000000 -FF0STM32F4xx_1024 -FL0100000 -FS08000000 + + + + + 0 + + + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + +     diff --git a/bsp/yichip/yc3121-pos/template.uvoptx b/bsp/yichip/yc3121-pos/template.uvoptx new file mode 100644 index 0000000000..3534243b9f --- /dev/null +++ b/bsp/yichip/yc3121-pos/template.uvoptx @@ -0,0 +1,177 @@ + + + + 1.0 + +
    ### uVision Project, (C) Keil Software
    + + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + rt-thread + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\build\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 0 + 0 + 1 + + 7 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 4 + + + + + + + + + + + Segger\JL2CM3.dll + + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000) + + + 0 + JL2CM3 + -U788594195 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(0BB11477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8004 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO31 -FD20000 -FCA000 -FN0 + + + + + 0 + + + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + +     diff --git a/bsp/yichip/yc3121-pos/template.uvprojx b/bsp/yichip/yc3121-pos/template.uvprojx new file mode 100644 index 0000000000..daa2a90403 --- /dev/null +++ b/bsp/yichip/yc3121-pos/template.uvprojx @@ -0,0 +1,389 @@ + + + + 2.1 + +
    ### uVision Project, (C) Keil Software
    + + + + rt-thread + 0x4 + ARM-ADS + 5060528::V5.06 update 5 (build 528)::ARMCC + 0 + + + ARMCM0 + ARM + ARM.CMSIS.5.3.0 + http://www.keil.com/pack/ + IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000) + 0 + $$Device:ARMCM0$Device\ARM\ARMCM0\Include\ARMCM0.h + + + + + + + + + + $$Device:ARMCM0$Device\ARM\SVD\ARMCM0.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\build\keil\Obj\ + rtthread + 1 + 0 + 1 + 1 + 1 + .\build\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 1 + 0 + fromelf.exe --text -a -c --output=@L_asm.txt "!L" + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + + DARMCM1.DLL + -pCM0 + SARMCM3.DLL + + TARMCM1.DLL + -pCM0 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4100 + + 0 + Segger\JL2CM3.dll + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + "Cortex-M0" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 8 + 0 + 1 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + .\drivers\linker_scripts\link.sct + + + + + + + + + + + + + + + + + +