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Code Issues Releases Wiki Activity

[Nuvoton] Update drivers.

Browse Source 
1. Fix open-control order issue in CAN driver.
2. [N9H30] Improve N9H30 I2C busy-wait implementation.
3. [N9H30] Support 1024x600x32b LCD panel.
4. Move nu_packages menu into sub-menu of board.
This commit is contained in:
Wayne Lin 2022-01-10 14:42:31 +08:00
parent 715eecd3eb
commit 0547395eb5
56 changed files with 1258 additions and 25128 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

435
bsp/nuvoton/libraries/m2354/rtt_port/drv_can.c
View File

@ -7,6 +7,7 @@
* Change Logs:
* Date Author Notes
* 2020-6-22 ChingI First version
* 2022-1-8 Wayne Fix IE issue
*
******************************************************************************/
@ -42,7 +43,7 @@ enum
#if defined(BSP_USING_CAN0)
CAN0_IDX,
#endif
CAN_CNT,
CAN_CNT
};
/* Private Typedef --------------------------------------------------------------*/
@ -50,9 +51,10 @@ struct nu_can
{
struct rt_can_device dev;
char *name;
CAN_T *can_base;
uint32_t can_rst;
IRQn_Type can_irq_n;
CAN_T *base;
IRQn_Type irqn;
uint32_t rstidx;
uint32_t int_flag;
};
typedef struct nu_can *nu_can_t;
@ -68,12 +70,11 @@ static struct nu_can nu_can_arr[] =
#if defined(BSP_USING_CAN0)
{
.name = "can0",
.can_base = CAN0,
.can_rst = CAN0_RST,
.can_irq_n = CAN0_IRQn,
.base = CAN0,
.rstidx = CAN0_RST,
.irqn = CAN0_IRQn,
},
#endif
{0}
}; /* struct nu_can */
/* Public functions ------------------------------------------------------------*/
@ -106,266 +107,271 @@ void CAN0_IRQHandler(void)
/* Private Variables ------------------------------------------------------------*/
static void nu_can_isr(nu_can_t can)
static void nu_can_isr(nu_can_t psNuCAN)
{
uint32_t u32IIDRstatus;
/* Get base address of CAN register */
CAN_T *can_base = ((nu_can_t)can)->can_base;
CAN_T *base = psNuCAN->base;
/* Get interrupt event */
u32IIDRstatus = CAN_GET_INT_PENDING_STATUS(can_base);
uint32_t u32IIDRstatus = CAN_GET_INT_PENDING_STATUS(base) & CAN_IIDR_INTID_Msk;
if (u32IIDRstatus == 0x00008000) /* Check Status Interrupt Flag (Error status Int and Status change Int) */
/* Check Status Interrupt Flag (Error status Int and Status change Int) */
if (u32IIDRstatus == 0x00008000)
{
/**************************/
/* Status Change interrupt*/
/**************************/
if (can_base->STATUS & CAN_STATUS_TXOK_Msk)
if (base->STATUS & CAN_STATUS_TXOK_Msk)
{
can_base->STATUS &= ~CAN_STATUS_TXOK_Msk; /* Clear Tx Ok status*/
base->STATUS &= ~CAN_STATUS_TXOK_Msk; /* Clear Tx Ok status*/
#ifndef RT_CAN_USING_HDR
/* Using as Lisen,Loopback,Loopback+Lisen mode*/
rt_hw_can_isr(&can->dev, RT_CAN_EVENT_TX_DONE);
if (psNuCAN->int_flag & RT_DEVICE_FLAG_INT_TX)
{
/*Using as Lisen,Loopback,Loopback+Lisen mode*/
rt_hw_can_isr(&psNuCAN->dev, RT_CAN_EVENT_TX_DONE);
}
#endif
//rt_kprintf("[%s]TX OK INT\n", can->name) ;
}
if (can_base->STATUS & CAN_STATUS_RXOK_Msk)
if (base->STATUS & CAN_STATUS_RXOK_Msk)
{
can_base->STATUS &= ~CAN_STATUS_RXOK_Msk; /* Clear Rx Ok status*/
base->STATUS &= ~CAN_STATUS_RXOK_Msk; /* Clear Rx Ok status*/
#ifndef RT_CAN_USING_HDR
/* Using as Lisen,Loopback,Loopback+Lisen mode*/
rt_hw_can_isr(&can->dev, RT_CAN_EVENT_RX_IND);
if (psNuCAN->int_flag & RT_DEVICE_FLAG_INT_RX)
{
/*Using as Lisen,Loopback,Loopback+Lisen mode*/
rt_hw_can_isr(&psNuCAN->dev, RT_CAN_EVENT_RX_IND);
}
#endif
//rt_kprintf("[%s]RX OK INT\n", can->name) ;
}
/**************************/
/* Error Status interrupt */
/**************************/
if (can_base->STATUS & CAN_STATUS_EWARN_Msk)
if (base->STATUS & CAN_STATUS_EWARN_Msk)
{
rt_kprintf("[%s]EWARN INT\n", can->name) ;
rt_kprintf("[%s]EWARN INT\n", psNuCAN->name) ;
}
if (can_base->STATUS & CAN_STATUS_BOFF_Msk)
if (base->STATUS & CAN_STATUS_BOFF_Msk)
{
rt_kprintf("[%s]BUSOFF INT\n", can->name) ;
rt_kprintf("[%s]BUSOFF INT\n", psNuCAN->name) ;
/* Do Init to release busoff pin */
can_base->CON = (CAN_CON_INIT_Msk | CAN_CON_CCE_Msk);
can_base->CON &= (~(CAN_CON_INIT_Msk | CAN_CON_CCE_Msk));
while (can_base->CON & CAN_CON_INIT_Msk);
/* To release busoff pin */
CAN_EnterInitMode(base, CAN_CON_INIT_Msk | CAN_CON_CCE_Msk);
CAN_LeaveInitMode(base);
}
if (base->STATUS & CAN_STATUS_LEC_Msk)
{
rt_kprintf("[%s] Last Error Code %03x\n", psNuCAN->name, base->STATUS & CAN_STATUS_LEC_Msk) ;
}
}
#ifdef RT_CAN_USING_HDR
/*IntId: 0x0001-0x0020, Number of Message Object which caused the interrupt.*/
else if (u32IIDRstatus > 0 && u32IIDRstatus <= 32)
{
/*Message RAM 0~RX_MSG_ID_INDEX for CAN Tx using*/
if (u32IIDRstatus <= RX_MSG_ID_INDEX)
if ((psNuCAN->int_flag & RT_DEVICE_FLAG_INT_TX) &&
(u32IIDRstatus <= RX_MSG_ID_INDEX))
{
//rt_kprintf("[%s-Tx]IntId = %d\n", can->name, u32IIDRstatus);
rt_hw_can_isr(&can->dev, RT_CAN_EVENT_TX_DONE);
/*Message RAM 0~RX_MSG_ID_INDEX for CAN Tx using*/
rt_hw_can_isr(&psNuCAN->dev, RT_CAN_EVENT_TX_DONE);
}
else /*Message RAM RX_MSG_ID_INDEX~31 for CAN Rx using*/
else if (psNuCAN->int_flag & RT_DEVICE_FLAG_INT_RX)
{
//rt_kprintf("[%s-Rx]IntId = %d\n", can->name, u32IIDRstatus);
rt_hw_can_isr(&can->dev, (RT_CAN_EVENT_RX_IND | ((u32IIDRstatus - 1) << 8)));
/*Message RAM RX_MSG_ID_INDEX~31 for CAN Rx using*/
rt_hw_can_isr(&psNuCAN->dev, (RT_CAN_EVENT_RX_IND | ((u32IIDRstatus - 1) << 8)));
}
CAN_CLR_INT_PENDING_BIT(can_base, (u32IIDRstatus - 1)); /* Clear Interrupt Pending */
CAN_CLR_INT_PENDING_BIT(base, (u32IIDRstatus - 1)); /* Clear Interrupt Pending */
}
#endif
}
static void nu_can_ie(nu_can_t psNuCAN)
{
uint32_t u32CanIE = CAN_CON_IE_Msk;
if (psNuCAN->int_flag & (RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_INT_TX))
{
u32CanIE |= CAN_CON_SIE_Msk;
}
else
{
u32CanIE &= ~CAN_CON_SIE_Msk;
}
if (psNuCAN->int_flag & RT_DEVICE_CAN_INT_ERR)
{
u32CanIE |= CAN_CON_EIE_Msk;
}
else
{
u32CanIE &= ~CAN_CON_EIE_Msk;
}
if (u32CanIE & (CAN_CON_SIE_Msk | CAN_CON_EIE_Msk))
{
CAN_EnableInt(psNuCAN->base, u32CanIE);
/* Enable interrupt. */
NVIC_EnableIRQ(psNuCAN->irqn);
}
else
{
u32CanIE |= (CAN_CON_IE_Msk | CAN_CON_SIE_Msk);
CAN_DisableInt(psNuCAN->base, u32CanIE);
/* Disable interrupt. */
NVIC_DisableIRQ(psNuCAN->irqn);
}
}
static rt_err_t nu_can_configure(struct rt_can_device *can, struct can_configure *cfg)
{
nu_can_t psNuCAN = (nu_can_t)can;
uint32_t u32CANMode;
RT_ASSERT(can != RT_NULL);
RT_ASSERT(cfg != RT_NULL);
RT_ASSERT(can);
RT_ASSERT(cfg);
/* Get base address of CAN register */
CAN_T *can_base = ((nu_can_t)can)->can_base;
RT_ASSERT(can_base != RT_NULL);
CAN_T *base = psNuCAN->base;
/* Reset this module */
SYS_ResetModule(((nu_can_t)can)->can_rst);
SYS_ResetModule(psNuCAN->rstidx);
switch (cfg->mode)
{
/* CAN default Normal mode */
case RT_CAN_MODE_NORMAL:
can->config.mode = CAN_NORMAL_MODE;
break;
case RT_CAN_MODE_LISEN:
can->config.mode = RT_CAN_MODE_LISEN;
break;
case RT_CAN_MODE_LOOPBACK:
can->config.mode = RT_CAN_MODE_LOOPBACK;
break;
case RT_CAN_MODE_LOOPBACKANLISEN:
can->config.mode = RT_CAN_MODE_LOOPBACKANLISEN;
break;
default:
rt_kprintf("Unsupported Operating mode");
goto exit_nu_can_configure;
}
u32CANMode = (cfg->mode == RT_CAN_MODE_NORMAL) ? CAN_NORMAL_MODE : CAN_BASIC_MODE;
/*Set the CAN Bit Rate and Operating mode*/
if (CAN_Open(can_base, can->config.baud_rate, can->config.mode) < 1)
return -(RT_ERROR);
if (CAN_Open(base, cfg->baud_rate, u32CANMode) != cfg->baud_rate)
goto exit_nu_can_configure;
switch (cfg->mode)
{
/* CAN default Normal mode */
case RT_CAN_MODE_NORMAL:
#ifdef RT_CAN_USING_HDR
CAN_LeaveTestMode(can_base);
CAN_LeaveTestMode(base);
#else
CAN_EnterTestMode(can_base, CAN_TEST_BASIC_Msk);
CAN_EnterTestMode(base, CAN_TEST_BASIC_Msk);
#endif
break;
case RT_CAN_MODE_LISEN:
CAN_EnterTestMode(can_base, CAN_TEST_BASIC_Msk | CAN_TEST_SILENT_Msk);
CAN_EnterTestMode(base, CAN_TEST_BASIC_Msk | CAN_TEST_SILENT_Msk);
break;
case RT_CAN_MODE_LOOPBACK:
CAN_EnterTestMode(can_base, CAN_TEST_BASIC_Msk | CAN_TEST_LBACK_Msk);
CAN_EnterTestMode(base, CAN_TEST_BASIC_Msk | CAN_TEST_LBACK_Msk);
break;
case RT_CAN_MODE_LOOPBACKANLISEN:
CAN_EnterTestMode(can_base, CAN_TEST_BASIC_Msk | CAN_TEST_SILENT_Msk | CAN_TEST_LBACK_Msk);
CAN_EnterTestMode(base, CAN_TEST_BASIC_Msk | CAN_TEST_SILENT_Msk | CAN_TEST_LBACK_Msk);
break;
default:
rt_kprintf("Unsupported Operating mode");
goto exit_nu_can_configure;
}
nu_can_ie(psNuCAN);
return RT_EOK;
exit_nu_can_configure:
CAN_Close(can_base);
CAN_Close(base);
return -(RT_ERROR);
}
static rt_err_t nu_can_control(struct rt_can_device *can, int cmd, void *arg)
{
rt_uint32_t argval;
rt_uint32_t argval = (rt_uint32_t)arg;
nu_can_t psNuCAN = (nu_can_t)can;
#ifdef RT_CAN_USING_HDR
struct rt_can_filter_config *filter_cfg;
#endif
/* Get base address of CAN register */
CAN_T *can_base = ((nu_can_t)can)->can_base;
RT_ASSERT(can_base != RT_NULL);
/* Check baud rate */
RT_ASSERT(can->config.baud_rate != 0);
RT_ASSERT(can);
switch (cmd)
{
case RT_DEVICE_CTRL_CLR_INT:
argval = (rt_uint32_t) arg;
if ((argval == RT_DEVICE_FLAG_INT_RX) || (argval == RT_DEVICE_FLAG_INT_TX))
{
/* Disable NVIC interrupt. */
NVIC_DisableIRQ(((nu_can_t)can)->can_irq_n);
/* Disable Status Change Interrupt */
CAN_DisableInt(can_base, CAN_CON_IE_Msk | CAN_CON_SIE_Msk);
}
else if (argval == RT_DEVICE_CAN_INT_ERR)
{
/* Disable NVIC interrupt. */
NVIC_DisableIRQ(((nu_can_t)can)->can_irq_n);
/* Disable Error Interrupt */
CAN_DisableInt(can_base, CAN_CON_EIE_Msk);
}
break;
case RT_DEVICE_CTRL_SET_INT:
argval = (rt_uint32_t) arg;
if (argval == RT_DEVICE_FLAG_INT_RX || (argval == RT_DEVICE_FLAG_INT_TX))
{
/* Enable Status Change Interrupt */
CAN_EnableInt(can_base, CAN_CON_IE_Msk | CAN_CON_SIE_Msk);
/* Enable NVIC interrupt. */
NVIC_EnableIRQ(((nu_can_t)can)->can_irq_n);
}
else if (argval == RT_DEVICE_CAN_INT_ERR)
{
/* Enable Error Status and Status Change Interrupt */
CAN_EnableInt(can_base, CAN_CON_IE_Msk | CAN_CON_SIE_Msk | CAN_CON_EIE_Msk);
/* Enable NVIC interrupt. */
NVIC_EnableIRQ(((nu_can_t)can)->can_irq_n);
}
psNuCAN->int_flag |= argval;
nu_can_ie(psNuCAN);
break;
case RT_DEVICE_CTRL_CLR_INT:
psNuCAN->int_flag &= ~argval;
nu_can_ie(psNuCAN);
break;
#ifdef RT_CAN_USING_HDR
case RT_CAN_CMD_SET_FILTER:
filter_cfg = (struct rt_can_filter_config *)arg;
{
struct rt_can_filter_config *filter_cfg = (struct rt_can_filter_config *)arg;
for (int i = 0; i < filter_cfg->count; i++)
{
/*set the filter message object*/
if (filter_cfg->items[i].mode == 1)
{
if (CAN_SetRxMsgObjAndMsk(can_base, MSG(filter_cfg->items[i].hdr + RX_MSG_ID_INDEX), filter_cfg->items[i].ide, filter_cfg->items[i].id, filter_cfg->items[i].mask, FALSE) == FALSE)
if (CAN_SetRxMsgObjAndMsk(psNuCAN->base, MSG(filter_cfg->items[i].hdr + RX_MSG_ID_INDEX), filter_cfg->items[i].ide, filter_cfg->items[i].id, filter_cfg->items[i].mask, FALSE) == FALSE)
{
return -(RT_ERROR);
}
}
else
{
/*set the filter message object*/
if (CAN_SetRxMsgAndMsk(can_base, MSG(filter_cfg->items[i].hdr + RX_MSG_ID_INDEX), filter_cfg->items[i].ide, filter_cfg->items[i].id, filter_cfg->items[i].mask) == FALSE)
if (CAN_SetRxMsgAndMsk(psNuCAN->base, MSG(filter_cfg->items[i].hdr + RX_MSG_ID_INDEX), filter_cfg->items[i].ide, filter_cfg->items[i].id, filter_cfg->items[i].mask) == FALSE)
{
return -(RT_ERROR);
}
}
}
break;
#endif
}
break;
case RT_CAN_CMD_SET_MODE:
argval = (rt_uint32_t) arg;
if (argval != RT_CAN_MODE_NORMAL && argval != RT_CAN_MODE_LISEN &&
argval != RT_CAN_MODE_LOOPBACK && argval != RT_CAN_MODE_LOOPBACKANLISEN)
if ((argval == RT_CAN_MODE_NORMAL) ||
(argval == RT_CAN_MODE_LISEN) ||
(argval == RT_CAN_MODE_LOOPBACK) ||
(argval == RT_CAN_MODE_LOOPBACKANLISEN))
{
if (argval != can->config.mode)
{
can->config.mode = argval;
return nu_can_configure(can, &can->config);
}
}
else
{
return -(RT_ERROR);
}
if (argval != can->config.mode)
{
can->config.mode = argval;
return nu_can_configure(can, &can->config);
}
break;
case RT_CAN_CMD_SET_BAUD:
argval = (rt_uint32_t) arg;
if (argval != CAN1MBaud && argval != CAN800kBaud && argval != CAN500kBaud && argval != CAN250kBaud &&
argval != CAN125kBaud && argval != CAN100kBaud && argval != CAN50kBaud && argval != CAN20kBaud && argval != CAN10kBaud)
{
if ((argval == CAN1MBaud) ||
(argval == CAN800kBaud) ||
(argval == CAN500kBaud) ||
(argval == CAN250kBaud) ||
(argval == CAN125kBaud) ||
(argval == CAN100kBaud) ||
(argval == CAN50kBaud) ||
(argval == CAN20kBaud) ||
(argval == CAN10kBaud))
{
if (argval != can->config.baud_rate)
{
can->config.baud_rate = argval;
return nu_can_configure(can, &can->config);
}
}
else
{
return -(RT_ERROR);
}
if (argval != can->config.baud_rate)
{
can->config.baud_rate = argval;
return nu_can_configure(can, &can->config);
}
break;
}
break;
case RT_CAN_CMD_SET_PRIV:
argval = (rt_uint32_t) arg;
if (argval != RT_CAN_MODE_PRIV && argval != RT_CAN_MODE_NOPRIV)
if (argval != RT_CAN_MODE_PRIV &&
argval != RT_CAN_MODE_NOPRIV)
{
return -(RT_ERROR);
}
@ -375,20 +381,29 @@ static rt_err_t nu_can_control(struct rt_can_device *can, int cmd, void *arg)
return nu_can_configure(can, &can->config);
}
break;
case RT_CAN_CMD_GET_STATUS:
{
rt_uint32_t errtype;
errtype = can_base->ERR;
/*Receive Error Counter*/
rt_uint32_t errtype = psNuCAN->base->ERR;
RT_ASSERT(arg);
/*Receive Error Counter, return value is with Receive Error Passive.*/
can->status.rcverrcnt = (errtype >> 8);
/*Transmit Error Counter*/
can->status.snderrcnt = ((errtype >> 24) & 0xFF);
can->status.lasterrtype = CAN_GET_INT_STATUS(can_base) & 0x8000;
/*status error code*/
can->status.errcode = CAN_GET_INT_STATUS(can_base) & 0x07;
rt_memcpy(arg, &can->status, sizeof(can->status));
can->status.snderrcnt = (errtype & 0xFF);
/*Last Error Type*/
can->status.lasterrtype = CAN_GET_INT_STATUS(psNuCAN->base) & 0x8000;
/*Status error code*/
can->status.errcode = CAN_GET_INT_STATUS(psNuCAN->base) & 0x07;
rt_memcpy(arg, &can->status, sizeof(struct rt_can_status));
}
break;
default:
return -(RT_EINVAL);
@ -400,61 +415,91 @@ static rt_err_t nu_can_control(struct rt_can_device *can, int cmd, void *arg)
static int nu_can_sendmsg(struct rt_can_device *can, const void *buf, rt_uint32_t boxno)
{
STR_CANMSG_T tMsg;
struct rt_can_msg *pmsg = (struct rt_can_msg *) buf;
/* Get base address of CAN register */
CAN_T *can_base = ((nu_can_t)can)->can_base;
struct rt_can_msg *pmsg;
nu_can_t psNuCAN = (nu_can_t)can;
RT_ASSERT(can_base != RT_NULL);
RT_ASSERT(buf != RT_NULL);
/* Check the parameters */
RT_ASSERT(IS_CAN_DLC(pmsg->len));
/* Standard ID (11 bits)*/
if (pmsg->ide == RT_CAN_STDID)
RT_ASSERT(can);
RT_ASSERT(buf);
pmsg = (struct rt_can_msg *) buf;
if (pmsg->ide == RT_CAN_STDID && IS_CAN_STDID(pmsg->id))
{
/* Standard ID (11 bits)*/
tMsg.IdType = CAN_STD_ID;
RT_ASSERT(IS_CAN_STDID(pmsg->id))
tMsg.Id = pmsg->id ;
}
else
else if (pmsg->ide == RT_CAN_EXTID && IS_CAN_EXTID(pmsg->id))
{
/* Extended ID (29 bits)*/
tMsg.IdType = CAN_EXT_ID;
RT_ASSERT(IS_CAN_EXTID(pmsg->id));
tMsg.Id = pmsg->id ;
}
else
{
goto exit_nu_can_sendmsg;
}
if (pmsg->rtr == RT_CAN_DTR)
{
/* Data frame */
tMsg.FrameType = CAN_DATA_FRAME;
}
else
else if (pmsg->rtr == RT_CAN_RTR)
{
/* Remote frame */
tMsg.FrameType = CAN_REMOTE_FRAME;
}
tMsg.DLC = pmsg->len;
rt_memcpy(tMsg.Data, pmsg->data, pmsg->len);
if (CAN_Transmit(can_base, MSG(boxno), &tMsg) == FALSE) // Configure Msg RAM and send the Msg in the RAM
else
{
return -(RT_ERROR);
goto exit_nu_can_sendmsg;
}
/* Check the parameters */
if (IS_CAN_DLC(pmsg->len))
{
tMsg.DLC = pmsg->len;
}
else
{
goto exit_nu_can_sendmsg;
}
if (pmsg->data && pmsg->len)
{
rt_memcpy(&tMsg.Data[0], pmsg->data, pmsg->len);
}
else
{
goto exit_nu_can_sendmsg;
}
/* Configure Msg RAM and send the Msg in the RAM. */
if (CAN_Transmit(psNuCAN->base, MSG(boxno), &tMsg) == FALSE)
{
goto exit_nu_can_sendmsg;
}
return RT_EOK;
exit_nu_can_sendmsg:
return -(RT_ERROR);
}
static int nu_can_recvmsg(struct rt_can_device *can, void *buf, rt_uint32_t boxno)
{
STR_CANMSG_T tMsg;
struct rt_can_msg *pmsg = (struct rt_can_msg *) buf;
/* Get base address of CAN register */
CAN_T *can_base = ((nu_can_t)can)->can_base;
struct rt_can_msg *pmsg;
nu_can_t psNuCAN = (nu_can_t)can;
RT_ASSERT(can_base != RT_NULL);
RT_ASSERT(buf != RT_NULL);
RT_ASSERT(can);
RT_ASSERT(buf);
pmsg = (struct rt_can_msg *) buf;
/* get data */
if (CAN_Receive(can_base, boxno, &tMsg) == FALSE)
if (CAN_Receive(psNuCAN->base, boxno, &tMsg) == FALSE)
{
rt_kprintf("No available RX Msg.\n");
return -(RT_ERROR);
@ -466,32 +511,13 @@ static int nu_can_recvmsg(struct rt_can_device *can, void *buf, rt_uint32_t boxn
can->hdr[pmsg->hdr].connected = 1;
#endif
/* Standard ID (11 bits)*/
if (tMsg.IdType == CAN_STD_ID)
{
pmsg->ide = RT_CAN_STDID;
pmsg->id = tMsg.Id;
}
else /* Extended ID (29 bits)*/
{
pmsg->ide = RT_CAN_EXTID;
pmsg->id = tMsg.Id;
}
if (tMsg.FrameType == CAN_DATA_FRAME)
{
/* Data frame */
pmsg->rtr = RT_CAN_DTR;
}
else
{
/* Remote frame */
pmsg->rtr = RT_CAN_RTR;
}
pmsg->ide = (tMsg.IdType == CAN_STD_ID) ? RT_CAN_STDID : RT_CAN_EXTID;
pmsg->rtr = (tMsg.FrameType == CAN_DATA_FRAME) ? RT_CAN_DTR : RT_CAN_RTR;
pmsg->id = tMsg.Id;
pmsg->len = tMsg.DLC ;
rt_memcpy(pmsg->data, tMsg.Data, pmsg->len);
if (pmsg->data && pmsg->len)
rt_memcpy(pmsg->data, &tMsg.Data[0], pmsg->len);
return RT_EOK;
}
@ -506,13 +532,12 @@ static int rt_hw_can_init(void)
for (i = (CAN_START + 1); i < CAN_CNT; i++)
{
nu_can_arr[i].dev.ops = &nu_can_ops;
nu_can_arr[i].dev.config = nu_can_default_config;
#ifdef RT_CAN_USING_HDR
nu_can_arr[i].dev.config.maxhdr = RT_CANMSG_BOX_SZ;
#endif
/* Register can device */
ret = rt_hw_can_register(&nu_can_arr[i].dev, nu_can_arr[i].name, &nu_can_ops, NULL);
RT_ASSERT(ret == RT_EOK);
}

8
bsp/nuvoton/libraries/m480/Device/Nuvoton/M480/Include/can_reg.h
View File

@ -10,7 +10,7 @@
#define __CAN_REG_H__
#if defined ( __CC_ARM )
#pragma anon_unions
#pragma anon_unions
#endif
/**
@ -586,8 +586,8 @@ typedef struct
#define CAN_BTIME_TSEG2_Pos (12) /*!< CAN_T::BTIME: TSeg2 Position */
#define CAN_BTIME_TSEG2_Msk (0x7ul << CAN_BTIME_TSEG2_Pos) /*!< CAN_T::BTIME: TSeg2 Mask */
#define CAN_IIDR_IntId_Pos (0) /*!< CAN_T::IIDR: IntId Position */
#define CAN_IIDR_IntId_Msk (0xfffful << CAN_IIDR_IntId_Pos) /*!< CAN_T::IIDR: IntId Mask */
#define CAN_IIDR_INTID_Pos (0) /*!< CAN_T::IIDR: IntId Position */
#define CAN_IIDR_INTID_Msk (0xfffful << CAN_IIDR_INTID_Pos) /*!< CAN_T::IIDR: IntId Mask */
#define CAN_TEST_BASIC_Pos (2) /*!< CAN_T::TEST: Basic Position */
#define CAN_TEST_BASIC_Msk (0x1ul << CAN_TEST_BASIC_Pos) /*!< CAN_T::TEST: Basic Mask */
@ -753,7 +753,7 @@ typedef struct
/**@}*/ /* end of REGISTER group */
#if defined ( __CC_ARM )
#pragma no_anon_unions
#pragma no_anon_unions
#endif
#endif /* __CAN_REG_H__ */

451
bsp/nuvoton/libraries/m480/rtt_port/drv_can.c
View File

@ -1,12 +1,13 @@
/**************************************************************************//**
*
* @copyright (C) 2019 Nuvoton Technology Corp. All rights reserved.
* @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-2-07 ChingI First version
* 2020-6-22 ChingI First version
* 2022-1-8 Wayne Fix IE issue
*
******************************************************************************/
@ -56,9 +57,10 @@ struct nu_can
{
struct rt_can_device dev;
char *name;
CAN_T *can_base;
uint32_t can_rst;
IRQn_Type can_irq_n;
CAN_T *base;
IRQn_Type irqn;
uint32_t rstidx;
uint32_t int_flag;
};
typedef struct nu_can *nu_can_t;
@ -74,29 +76,27 @@ static struct nu_can nu_can_arr[] =
#if defined(BSP_USING_CAN0)
{
.name = "can0",
.can_base = CAN0,
.can_rst = CAN0_RST,
.can_irq_n = CAN0_IRQn,
.base = CAN0,
.rstidx = CAN0_RST,
.irqn = CAN0_IRQn,
},
#endif
#if defined(BSP_USING_CAN1)
{
.name = "can1",
.can_base = CAN1,
.can_rst = CAN1_RST,
.can_irq_n = CAN1_IRQn,
.base = CAN1,
.rstidx = CAN1_RST,
.irqn = CAN1_IRQn,
},
#endif
#if defined(BSP_USING_CAN2)
{
.name = "can2",
.can_base = CAN2,
.can_rst = CAN2_RST,
.can_irq_n = CAN2_IRQn,
.base = CAN2,
.rstidx = CAN2_RST,
.irqn = CAN2_IRQn,
},
#endif
{0}
}; /* struct nu_can */
/* Public functions ------------------------------------------------------------*/
@ -158,267 +158,271 @@ void CAN2_IRQHandler(void)
/* Private Variables ------------------------------------------------------------*/
static void nu_can_isr(nu_can_t can)
static void nu_can_isr(nu_can_t psNuCAN)
{
uint32_t u32IIDRstatus;
/* Get base address of CAN register */
CAN_T *can_base = ((nu_can_t)can)->can_base;
CAN_T *base = psNuCAN->base;
/* Get interrupt event */
u32IIDRstatus = CAN_GET_INT_PENDING_STATUS(can_base);
uint32_t u32IIDRstatus = CAN_GET_INT_PENDING_STATUS(base) & CAN_IIDR_INTID_Msk;
if (u32IIDRstatus == 0x00008000) /* Check Status Interrupt Flag (Error status Int and Status change Int) */
/* Check Status Interrupt Flag (Error status Int and Status change Int) */
if (u32IIDRstatus == 0x00008000)
{
/**************************/
/* Status Change interrupt*/
/**************************/
if (can_base->STATUS & CAN_STATUS_TXOK_Msk)
if (base->STATUS & CAN_STATUS_TXOK_Msk)
{
can_base->STATUS &= ~CAN_STATUS_TXOK_Msk; /* Clear Tx Ok status*/
base->STATUS &= ~CAN_STATUS_TXOK_Msk; /* Clear Tx Ok status*/
#ifndef RT_CAN_USING_HDR
/* Using as Lisen,Loopback,Loopback+Lisen mode*/
rt_hw_can_isr(&can->dev, RT_CAN_EVENT_TX_DONE);
if (psNuCAN->int_flag & RT_DEVICE_FLAG_INT_TX)
{
/*Using as Lisen,Loopback,Loopback+Lisen mode*/
rt_hw_can_isr(&psNuCAN->dev, RT_CAN_EVENT_TX_DONE);
}
#endif
//rt_kprintf("[%s]TX OK INT\n", can->name) ;
}
if (can_base->STATUS & CAN_STATUS_RXOK_Msk)
if (base->STATUS & CAN_STATUS_RXOK_Msk)
{
can_base->STATUS &= ~CAN_STATUS_RXOK_Msk; /* Clear Rx Ok status*/
base->STATUS &= ~CAN_STATUS_RXOK_Msk; /* Clear Rx Ok status*/
#ifndef RT_CAN_USING_HDR
/* Using as Lisen,Loopback,Loopback+Lisen mode*/
rt_hw_can_isr(&can->dev, RT_CAN_EVENT_RX_IND);
if (psNuCAN->int_flag & RT_DEVICE_FLAG_INT_RX)
{
/*Using as Lisen,Loopback,Loopback+Lisen mode*/
rt_hw_can_isr(&psNuCAN->dev, RT_CAN_EVENT_RX_IND);
}
#endif
//rt_kprintf("[%s]RX OK INT\n", can->name) ;
}
/**************************/
/* Error Status interrupt */
/**************************/
if (can_base->STATUS & CAN_STATUS_EWARN_Msk)
if (base->STATUS & CAN_STATUS_EWARN_Msk)
{
rt_kprintf("[%s]EWARN INT\n", can->name) ;
rt_kprintf("[%s]EWARN INT\n", psNuCAN->name) ;
}
if (can_base->STATUS & CAN_STATUS_BOFF_Msk)
if (base->STATUS & CAN_STATUS_BOFF_Msk)
{
rt_kprintf("[%s]BUSOFF INT\n", can->name) ;
rt_kprintf("[%s]BUSOFF INT\n", psNuCAN->name) ;
/* Do Init to release busoff pin */
can_base->CON = (CAN_CON_INIT_Msk | CAN_CON_CCE_Msk);
can_base->CON &= (~(CAN_CON_INIT_Msk | CAN_CON_CCE_Msk));
while (can_base->CON & CAN_CON_INIT_Msk);
/* To release busoff pin */
CAN_EnterInitMode(base, CAN_CON_INIT_Msk | CAN_CON_CCE_Msk);
CAN_LeaveInitMode(base);
}
if (base->STATUS & CAN_STATUS_LEC_Msk)
{
rt_kprintf("[%s] Last Error Code %03x\n", psNuCAN->name, base->STATUS & CAN_STATUS_LEC_Msk) ;
}
}
#ifdef RT_CAN_USING_HDR
/*IntId: 0x0001-0x0020, Number of Message Object which caused the interrupt.*/
else if (u32IIDRstatus > 0 && u32IIDRstatus <= 32)
{
/*Message RAM 0~RX_MSG_ID_INDEX for CAN Tx using*/
if (u32IIDRstatus <= RX_MSG_ID_INDEX)
if ((psNuCAN->int_flag & RT_DEVICE_FLAG_INT_TX) &&
(u32IIDRstatus <= RX_MSG_ID_INDEX))
{
//rt_kprintf("[%s-Tx]IntId = %d\n", can->name, u32IIDRstatus);
rt_hw_can_isr(&can->dev, RT_CAN_EVENT_TX_DONE);
/*Message RAM 0~RX_MSG_ID_INDEX for CAN Tx using*/
rt_hw_can_isr(&psNuCAN->dev, RT_CAN_EVENT_TX_DONE);
}
else /*Message RAM RX_MSG_ID_INDEX~31 for CAN Rx using*/
else if (psNuCAN->int_flag & RT_DEVICE_FLAG_INT_RX)
{
//rt_kprintf("[%s-Rx]IntId = %d\n", can->name, u32IIDRstatus);
rt_hw_can_isr(&can->dev, (RT_CAN_EVENT_RX_IND | ((u32IIDRstatus - 1) << 8)));
/*Message RAM RX_MSG_ID_INDEX~31 for CAN Rx using*/
rt_hw_can_isr(&psNuCAN->dev, (RT_CAN_EVENT_RX_IND | ((u32IIDRstatus - 1) << 8)));
}
CAN_CLR_INT_PENDING_BIT(can_base, (u32IIDRstatus - 1)); /* Clear Interrupt Pending */
CAN_CLR_INT_PENDING_BIT(base, (u32IIDRstatus - 1)); /* Clear Interrupt Pending */
}
#endif
}
static void nu_can_ie(nu_can_t psNuCAN)
{
uint32_t u32CanIE = CAN_CON_IE_Msk;
if (psNuCAN->int_flag & (RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_INT_TX))
{
u32CanIE |= CAN_CON_SIE_Msk;
}
else
{
u32CanIE &= ~CAN_CON_SIE_Msk;
}
if (psNuCAN->int_flag & RT_DEVICE_CAN_INT_ERR)
{
u32CanIE |= CAN_CON_EIE_Msk;
}
else
{
u32CanIE &= ~CAN_CON_EIE_Msk;
}
if (u32CanIE & (CAN_CON_SIE_Msk | CAN_CON_EIE_Msk))
{
CAN_EnableInt(psNuCAN->base, u32CanIE);
/* Enable interrupt. */
NVIC_EnableIRQ(psNuCAN->irqn);
}
else
{
u32CanIE |= (CAN_CON_IE_Msk | CAN_CON_SIE_Msk);
CAN_DisableInt(psNuCAN->base, u32CanIE);
/* Disable interrupt. */
NVIC_DisableIRQ(psNuCAN->irqn);
}
}
static rt_err_t nu_can_configure(struct rt_can_device *can, struct can_configure *cfg)
{
nu_can_t psNuCAN = (nu_can_t)can;
uint32_t u32CANMode;
RT_ASSERT(can != RT_NULL);
RT_ASSERT(cfg != RT_NULL);
RT_ASSERT(can);
RT_ASSERT(cfg);
/* Get base address of CAN register */
CAN_T *can_base = ((nu_can_t)can)->can_base;
RT_ASSERT(can_base != RT_NULL);
CAN_T *base = psNuCAN->base;
/* Reset this module */
SYS_ResetModule(((nu_can_t)can)->can_rst);
SYS_ResetModule(psNuCAN->rstidx);
switch (cfg->mode)
{
/* CAN default Normal mode */
case RT_CAN_MODE_NORMAL:
can->config.mode = CAN_NORMAL_MODE;
break;
case RT_CAN_MODE_LISEN:
can->config.mode = RT_CAN_MODE_LISEN;
break;
case RT_CAN_MODE_LOOPBACK:
can->config.mode = RT_CAN_MODE_LOOPBACK;
break;
case RT_CAN_MODE_LOOPBACKANLISEN:
can->config.mode = RT_CAN_MODE_LOOPBACKANLISEN;
break;
default:
rt_kprintf("Unsupported Operating mode");
goto exit_nu_can_configure;
}
u32CANMode = (cfg->mode == RT_CAN_MODE_NORMAL) ? CAN_NORMAL_MODE : CAN_BASIC_MODE;
/*Set the CAN Bit Rate and Operating mode*/
if (CAN_Open(can_base, can->config.baud_rate, can->config.mode) < 1)
return -(RT_ERROR);
if (CAN_Open(base, cfg->baud_rate, u32CANMode) != cfg->baud_rate)
goto exit_nu_can_configure;
switch (cfg->mode)
{
/* CAN default Normal mode */
case RT_CAN_MODE_NORMAL:
#ifdef RT_CAN_USING_HDR
CAN_LeaveTestMode(can_base);
CAN_LeaveTestMode(base);
#else
CAN_EnterTestMode(can_base, CAN_TEST_BASIC_Msk);
CAN_EnterTestMode(base, CAN_TEST_BASIC_Msk);
#endif
break;
case RT_CAN_MODE_LISEN:
CAN_EnterTestMode(can_base, CAN_TEST_BASIC_Msk | CAN_TEST_SILENT_Msk);
CAN_EnterTestMode(base, CAN_TEST_BASIC_Msk | CAN_TEST_SILENT_Msk);
break;
case RT_CAN_MODE_LOOPBACK:
CAN_EnterTestMode(can_base, CAN_TEST_BASIC_Msk | CAN_TEST_LBACK_Msk);
CAN_EnterTestMode(base, CAN_TEST_BASIC_Msk | CAN_TEST_LBACK_Msk);
break;
case RT_CAN_MODE_LOOPBACKANLISEN:
CAN_EnterTestMode(can_base, CAN_TEST_BASIC_Msk | CAN_TEST_SILENT_Msk | CAN_TEST_LBACK_Msk);
CAN_EnterTestMode(base, CAN_TEST_BASIC_Msk | CAN_TEST_SILENT_Msk | CAN_TEST_LBACK_Msk);
break;
default:
rt_kprintf("Unsupported Operating mode");
goto exit_nu_can_configure;
}
nu_can_ie(psNuCAN);
return RT_EOK;
exit_nu_can_configure:
CAN_Close(can_base);
CAN_Close(base);
return -(RT_ERROR);
}
static rt_err_t nu_can_control(struct rt_can_device *can, int cmd, void *arg)
{
rt_uint32_t argval;
rt_uint32_t argval = (rt_uint32_t)arg;
nu_can_t psNuCAN = (nu_can_t)can;
#ifdef RT_CAN_USING_HDR
struct rt_can_filter_config *filter_cfg;
#endif
/* Get base address of CAN register */
CAN_T *can_base = ((nu_can_t)can)->can_base;
RT_ASSERT(can_base != RT_NULL);
/* Check baud rate */
RT_ASSERT(can->config.baud_rate != 0);
RT_ASSERT(can);
switch (cmd)
{
case RT_DEVICE_CTRL_CLR_INT:
argval = (rt_uint32_t) arg;
if ((argval == RT_DEVICE_FLAG_INT_RX) || (argval == RT_DEVICE_FLAG_INT_TX))
{
/* Disable NVIC interrupt. */
NVIC_DisableIRQ(((nu_can_t)can)->can_irq_n);
/* Disable Status Change Interrupt */
CAN_DisableInt(can_base, CAN_CON_IE_Msk | CAN_CON_SIE_Msk);
}
else if (argval == RT_DEVICE_CAN_INT_ERR)
{
/* Disable NVIC interrupt. */
NVIC_DisableIRQ(((nu_can_t)can)->can_irq_n);
/* Disable Error Interrupt */
CAN_DisableInt(can_base, CAN_CON_EIE_Msk);
}
break;
case RT_DEVICE_CTRL_SET_INT:
argval = (rt_uint32_t) arg;
if (argval == RT_DEVICE_FLAG_INT_RX || (argval == RT_DEVICE_FLAG_INT_TX))
{
/* Enable Status Change Interrupt */
CAN_EnableInt(can_base, CAN_CON_IE_Msk | CAN_CON_SIE_Msk);
/* Enable NVIC interrupt. */
NVIC_EnableIRQ(((nu_can_t)can)->can_irq_n);
}
else if (argval == RT_DEVICE_CAN_INT_ERR)
{
/* Enable Error Status and Status Change Interrupt */
CAN_EnableInt(can_base, CAN_CON_IE_Msk | CAN_CON_SIE_Msk | CAN_CON_EIE_Msk);
/* Enable NVIC interrupt. */
NVIC_EnableIRQ(((nu_can_t)can)->can_irq_n);
}
psNuCAN->int_flag |= argval;
nu_can_ie(psNuCAN);
break;
case RT_DEVICE_CTRL_CLR_INT:
psNuCAN->int_flag &= ~argval;
nu_can_ie(psNuCAN);
break;
#ifdef RT_CAN_USING_HDR
case RT_CAN_CMD_SET_FILTER:
filter_cfg = (struct rt_can_filter_config *)arg;
{
struct rt_can_filter_config *filter_cfg = (struct rt_can_filter_config *)arg;
for (int i = 0; i < filter_cfg->count; i++)
{
/*set the filter message object*/
if (filter_cfg->items[i].mode == 1)
{
if (CAN_SetRxMsgObjAndMsk(can_base, MSG(filter_cfg->items[i].hdr + RX_MSG_ID_INDEX), filter_cfg->items[i].ide, filter_cfg->items[i].id, filter_cfg->items[i].mask, FALSE) == FALSE)
if (CAN_SetRxMsgObjAndMsk(psNuCAN->base, MSG(filter_cfg->items[i].hdr + RX_MSG_ID_INDEX), filter_cfg->items[i].ide, filter_cfg->items[i].id, filter_cfg->items[i].mask, FALSE) == FALSE)
{
return -(RT_ERROR);
}
}
else
{
/*set the filter message object*/
if (CAN_SetRxMsgAndMsk(can_base, MSG(filter_cfg->items[i].hdr + RX_MSG_ID_INDEX), filter_cfg->items[i].ide, filter_cfg->items[i].id, filter_cfg->items[i].mask) == FALSE)
if (CAN_SetRxMsgAndMsk(psNuCAN->base, MSG(filter_cfg->items[i].hdr + RX_MSG_ID_INDEX), filter_cfg->items[i].ide, filter_cfg->items[i].id, filter_cfg->items[i].mask) == FALSE)
{
return -(RT_ERROR);
}
}
}
break;
#endif
}
break;
case RT_CAN_CMD_SET_MODE:
argval = (rt_uint32_t) arg;
if (argval != RT_CAN_MODE_NORMAL && argval != RT_CAN_MODE_LISEN &&
argval != RT_CAN_MODE_LOOPBACK && argval != RT_CAN_MODE_LOOPBACKANLISEN)
if ((argval == RT_CAN_MODE_NORMAL) ||
(argval == RT_CAN_MODE_LISEN) ||
(argval == RT_CAN_MODE_LOOPBACK) ||
(argval == RT_CAN_MODE_LOOPBACKANLISEN))
{
if (argval != can->config.mode)
{
can->config.mode = argval;
return nu_can_configure(can, &can->config);
}
}
else
{
return -(RT_ERROR);
}
if (argval != can->config.mode)
{
can->config.mode = argval;
return nu_can_configure(can, &can->config);
}
break;
case RT_CAN_CMD_SET_BAUD:
argval = (rt_uint32_t) arg;
if (argval != CAN1MBaud && argval != CAN800kBaud && argval != CAN500kBaud && argval != CAN250kBaud &&
argval != CAN125kBaud && argval != CAN100kBaud && argval != CAN50kBaud && argval != CAN20kBaud && argval != CAN10kBaud)
{
if ((argval == CAN1MBaud) ||
(argval == CAN800kBaud) ||
(argval == CAN500kBaud) ||
(argval == CAN250kBaud) ||
(argval == CAN125kBaud) ||
(argval == CAN100kBaud) ||
(argval == CAN50kBaud) ||
(argval == CAN20kBaud) ||
(argval == CAN10kBaud))
{
if (argval != can->config.baud_rate)
{
can->config.baud_rate = argval;
return nu_can_configure(can, &can->config);
}
}
else
{
return -(RT_ERROR);
}
if (argval != can->config.baud_rate)
{
can->config.baud_rate = argval;
return nu_can_configure(can, &can->config);
}
break;
}
break;
case RT_CAN_CMD_SET_PRIV:
argval = (rt_uint32_t) arg;
if (argval != RT_CAN_MODE_PRIV && argval != RT_CAN_MODE_NOPRIV)
if (argval != RT_CAN_MODE_PRIV &&
argval != RT_CAN_MODE_NOPRIV)
{
return -(RT_ERROR);
}
@ -428,20 +432,29 @@ static rt_err_t nu_can_control(struct rt_can_device *can, int cmd, void *arg)
return nu_can_configure(can, &can->config);
}
break;
case RT_CAN_CMD_GET_STATUS:
{
rt_uint32_t errtype;
errtype = can_base->ERR;
/*Receive Error Counter*/
rt_uint32_t errtype = psNuCAN->base->ERR;
RT_ASSERT(arg);
/*Receive Error Counter, return value is with Receive Error Passive.*/
can->status.rcverrcnt = (errtype >> 8);
/*Transmit Error Counter*/
can->status.snderrcnt = ((errtype >> 24) & 0xFF);
can->status.lasterrtype = CAN_GET_INT_STATUS(can_base) & 0x8000;
/*status error code*/
can->status.errcode = CAN_GET_INT_STATUS(can_base) & 0x07;
rt_memcpy(arg, &can->status, sizeof(can->status));
can->status.snderrcnt = (errtype & 0xFF);
/*Last Error Type*/
can->status.lasterrtype = CAN_GET_INT_STATUS(psNuCAN->base) & 0x8000;
/*Status error code*/
can->status.errcode = CAN_GET_INT_STATUS(psNuCAN->base) & 0x07;
rt_memcpy(arg, &can->status, sizeof(struct rt_can_status));
}
break;
default:
return -(RT_EINVAL);
@ -453,61 +466,91 @@ static rt_err_t nu_can_control(struct rt_can_device *can, int cmd, void *arg)
static int nu_can_sendmsg(struct rt_can_device *can, const void *buf, rt_uint32_t boxno)
{
STR_CANMSG_T tMsg;
struct rt_can_msg *pmsg = (struct rt_can_msg *) buf;
/* Get base address of CAN register */
CAN_T *can_base = ((nu_can_t)can)->can_base;
struct rt_can_msg *pmsg;
nu_can_t psNuCAN = (nu_can_t)can;
RT_ASSERT(can_base != RT_NULL);
RT_ASSERT(buf != RT_NULL);
/* Check the parameters */
RT_ASSERT(IS_CAN_DLC(pmsg->len));
/* Standard ID (11 bits)*/
if (pmsg->ide == RT_CAN_STDID)
RT_ASSERT(can);
RT_ASSERT(buf);
pmsg = (struct rt_can_msg *) buf;
if (pmsg->ide == RT_CAN_STDID && IS_CAN_STDID(pmsg->id))
{
/* Standard ID (11 bits)*/
tMsg.IdType = CAN_STD_ID;
RT_ASSERT(IS_CAN_STDID(pmsg->id))
tMsg.Id = pmsg->id ;
}
else
else if (pmsg->ide == RT_CAN_EXTID && IS_CAN_EXTID(pmsg->id))
{
/* Extended ID (29 bits)*/
tMsg.IdType = CAN_EXT_ID;
RT_ASSERT(IS_CAN_EXTID(pmsg->id));
tMsg.Id = pmsg->id ;
}
else
{
goto exit_nu_can_sendmsg;
}
if (pmsg->rtr == RT_CAN_DTR)
{
/* Data frame */
tMsg.FrameType = CAN_DATA_FRAME;
}
else
else if (pmsg->rtr == RT_CAN_RTR)
{
/* Remote frame */
tMsg.FrameType = CAN_REMOTE_FRAME;
}
tMsg.DLC = pmsg->len;
rt_memcpy(tMsg.Data, pmsg->data, pmsg->len);
if (CAN_Transmit(can_base, MSG(boxno), &tMsg) == FALSE) // Configure Msg RAM and send the Msg in the RAM
else
{
return -(RT_ERROR);
goto exit_nu_can_sendmsg;
}
/* Check the parameters */
if (IS_CAN_DLC(pmsg->len))
{
tMsg.DLC = pmsg->len;
}
else
{
goto exit_nu_can_sendmsg;
}
if (pmsg->data && pmsg->len)
{
rt_memcpy(&tMsg.Data[0], pmsg->data, pmsg->len);
}
else
{
goto exit_nu_can_sendmsg;
}
/* Configure Msg RAM and send the Msg in the RAM. */
if (CAN_Transmit(psNuCAN->base, MSG(boxno), &tMsg) == FALSE)
{
goto exit_nu_can_sendmsg;
}
return RT_EOK;
exit_nu_can_sendmsg:
return -(RT_ERROR);
}
static int nu_can_recvmsg(struct rt_can_device *can, void *buf, rt_uint32_t boxno)
{
STR_CANMSG_T tMsg;
struct rt_can_msg *pmsg = (struct rt_can_msg *) buf;
/* Get base address of CAN register */
CAN_T *can_base = ((nu_can_t)can)->can_base;
struct rt_can_msg *pmsg;
nu_can_t psNuCAN = (nu_can_t)can;
RT_ASSERT(can_base != RT_NULL);
RT_ASSERT(buf != RT_NULL);
RT_ASSERT(can);
RT_ASSERT(buf);
pmsg = (struct rt_can_msg *) buf;
/* get data */
if (CAN_Receive(can_base, boxno, &tMsg) == FALSE)
if (CAN_Receive(psNuCAN->base, boxno, &tMsg) == FALSE)
{
rt_kprintf("No available RX Msg.\n");
return -(RT_ERROR);
@ -519,32 +562,13 @@ static int nu_can_recvmsg(struct rt_can_device *can, void *buf, rt_uint32_t boxn
can->hdr[pmsg->hdr].connected = 1;
#endif
/* Standard ID (11 bits)*/
if (tMsg.IdType == CAN_STD_ID)
{
pmsg->ide = RT_CAN_STDID;
pmsg->id = tMsg.Id;
}
else /* Extended ID (29 bits)*/
{
pmsg->ide = RT_CAN_EXTID;
pmsg->id = tMsg.Id;
}
if (tMsg.FrameType == CAN_DATA_FRAME)
{
/* Data frame */
pmsg->rtr = RT_CAN_DTR;
}
else
{
/* Remote frame */
pmsg->rtr = RT_CAN_RTR;
}
pmsg->ide = (tMsg.IdType == CAN_STD_ID) ? RT_CAN_STDID : RT_CAN_EXTID;
pmsg->rtr = (tMsg.FrameType == CAN_DATA_FRAME) ? RT_CAN_DTR : RT_CAN_RTR;
pmsg->id = tMsg.Id;
pmsg->len = tMsg.DLC ;
rt_memcpy(pmsg->data, tMsg.Data, pmsg->len);
if (pmsg->data && pmsg->len)
rt_memcpy(pmsg->data, &tMsg.Data[0], pmsg->len);
return RT_EOK;
}
@ -559,13 +583,12 @@ static int rt_hw_can_init(void)
for (i = (CAN_START + 1); i < CAN_CNT; i++)
{
nu_can_arr[i].dev.ops = &nu_can_ops;
nu_can_arr[i].dev.config = nu_can_default_config;
#ifdef RT_CAN_USING_HDR
nu_can_arr[i].dev.config.maxhdr = RT_CANMSG_BOX_SZ;
#endif
/* Register can device */
ret = rt_hw_can_register(&nu_can_arr[i].dev, nu_can_arr[i].name, &nu_can_ops, NULL);
RT_ASSERT(ret == RT_EOK);
}

4
bsp/nuvoton/libraries/n9h30/Driver/Include/nu_can.h
View File

@ -151,8 +151,8 @@ typedef struct
#define CAN_BTIME_TSEG2_Pos (12) /*!< CAN_T::BTIME: TSeg2 Position */
#define CAN_BTIME_TSEG2_Msk (0x7ul << CAN_BTIME_TSEG2_Pos) /*!< CAN_T::BTIME: TSeg2 Mask */
#define CAN_IIDR_IntId_Pos (0) /*!< CAN_T::IIDR: IntId Position */
#define CAN_IIDR_IntId_Msk (0xfffful << CAN_IIDR_IntId_Pos) /*!< CAN_T::IIDR: IntId Mask */
#define CAN_IIDR_INTID_Pos (0) /*!< CAN_T::IIDR: IntId Position */
#define CAN_IIDR_INTID_Msk (0xfffful << CAN_IIDR_INTID_Pos) /*!< CAN_T::IIDR: IntId Mask */
#define CAN_TEST_BASIC_Pos (2) /*!< CAN_T::TEST: Basic Position */
#define CAN_TEST_BASIC_Msk (0x1ul << CAN_TEST_BASIC_Pos) /*!< CAN_T::TEST: Basic Mask */

16
bsp/nuvoton/libraries/n9h30/Driver/Include/nu_lcd.h
View File

@ -171,11 +171,17 @@ typedef struct
uint32_t *pFrameBuffer; /*!< User input, The address of OSD source image */
} OSDFORMATEX;
#define DIS_PANEL_E50A2V1 0
#define DIS_PANEL_ILI9341_MPU80 1
#define DIS_LSA40AT9001 2
#define DIS_PANEL_FW070TFT 3
#define DIS_PANEL_FW043TFT 4
enum DIS_PANEL
{
DIS_PANEL_E50A2V1 = 0,
DIS_PANEL_ILI9341_MPU80,
DIS_LSA40AT9001,
DIS_PANEL_FW070TFT,
DIS_PANEL_FW043TFT,
DIS_PANEL_FW070TFT_WSVGA,
DIS_PANEL_CNT
};
typedef struct
{
uint32_t u32DevWidth; /*!< Panel width */

75
bsp/nuvoton/libraries/n9h30/Driver/Source/nu_lcd.c
View File

@ -168,9 +168,82 @@ static VPOST_T DEF_FW043TFT =
}
};
#define FW070TFT_WSVGA_WIDTH 1024 /*!< XRES */
#define FW070TFT_WSVGA_HEIGHT 600 /*!< YRES */
#define FW070TFT_WSVGA_MARGIN_LEFT 160 /*!< HBP (Horizontal Back Porch) */
#define FW070TFT_WSVGA_MARGIN_RIGHT 160 /*!< HFP (Horizontal Front Porch) */
#define FW070TFT_WSVGA_MARGIN_UPPER 12 /*!< VBP (Vertical Back Porch) */
#define FW070TFT_WSVGA_MARGIN_LOWER 23 /*!< VFP (Vertical Front Porch) */
#define FW070TFT_WSVGA_HSYNC_LEN 1 /*!< HPW (HSYNC plus width) */
#define FW070TFT_WSVGA_VSYNC_LEN 1 /*!< VPW (VSYNC width) */
static VPOST_T DEF_FW070TFT_WSVGA =
{
FW070TFT_WSVGA_WIDTH, /*!< Panel width */
FW070TFT_WSVGA_HEIGHT, /*!< Panel height */
0, /*!< MPU command line low indicator */
0, /*!< MPU command width */
0, /*!< MPU bus width */
VPOSTB_DATA16or18, /*!< Display bus width */
0, /*!< MPU mode */
VPOSTB_COLORTYPE_16M, /*!< Display colors */
VPOSTB_DEVICE_SYNC_HIGHCOLOR, /*!< Type of display panel */
.sCRTCSIZE =
{
/*!< Horizontal Total */
.HTT = FW070TFT_WSVGA_MARGIN_LEFT + FW070TFT_WSVGA_WIDTH + FW070TFT_WSVGA_MARGIN_RIGHT,
/*!< Vertical Total */
.VTT = FW070TFT_WSVGA_MARGIN_UPPER + FW070TFT_WSVGA_HEIGHT + FW070TFT_WSVGA_MARGIN_LOWER,
},
.sCRTCDEND =
{
/*!< Horizontal Display Enable End */
.HDEND = FW070TFT_WSVGA_WIDTH,
/*!< Vertical Display Enable End */
.VDEND = FW070TFT_WSVGA_HEIGHT,
},
.sCRTCHR =
{
/*!< Internal Horizontal Retrace Start Timing */
.HRS = FW070TFT_WSVGA_WIDTH + 1,
/*!< Internal Horizontal Retrace End Low */
.HRE = FW070TFT_WSVGA_WIDTH + 5,
},
.sCRTCHSYNC =
{
/*!< Horizontal Sync Start Timing */
.HSYNC_S = FW070TFT_WSVGA_WIDTH + FW070TFT_WSVGA_MARGIN_LEFT,
/*!< Horizontal Sync End Timing */
.HSYNC_E = FW070TFT_WSVGA_WIDTH + FW070TFT_WSVGA_MARGIN_LEFT + FW070TFT_WSVGA_HSYNC_LEN,
/*!< Hsync Signal Adjustment For Multi-Cycles Per Pixel Mode Of Sync-Based Unipac-LCD */
.HSYNC_SHIFT = 0,
},
.sCRTCVR =
{
/*!< Vertical Internal Retrace Start Timing */
.VRS = FW070TFT_WSVGA_HEIGHT + FW070TFT_WSVGA_MARGIN_UPPER,
/*!< Vertical Internal Retrace End Low */
.VRE = FW070TFT_WSVGA_HEIGHT + FW070TFT_WSVGA_MARGIN_UPPER + FW070TFT_WSVGA_VSYNC_LEN,
}
};
/* LCD build-in support list */
static VPOST_T *DisplayDevList[5] = {&DEF_E50A2V1, &DEF_ILI9341_MPU80, &DEF_LSA40AT9001, &DEF_FW070TFT, &DEF_FW043TFT};
static VPOST_T *DisplayDevList[DIS_PANEL_CNT] =
{
&DEF_E50A2V1,
&DEF_ILI9341_MPU80,
&DEF_LSA40AT9001,
&DEF_FW070TFT,
&DEF_FW043TFT,
&DEF_FW070TFT_WSVGA
};
static VPOST_T curDisplayDev;
static OSDFORMATEX curOSDDev = {0};
static LCDFORMATEX curVADev = {0};

7
bsp/nuvoton/libraries/n9h30/rtt_port/Kconfig
View File

@ -475,6 +475,9 @@ config SOC_SERIES_N9H30
config LCM_USING_FW043TFT
bool "LCM_FW043TFT(480x272-RGB888)"
config LCM_USING_FW070TFT_WSVGA
bool "LCM_USING_FW070TFT_WSVGA(1024x600-RGB888)"
endchoice
config VPOST_USING_LCD_IDX
@ -483,6 +486,7 @@ config SOC_SERIES_N9H30
default 2 if LCM_USING_LSA40AT9001
default 3 if LCM_USING_FW070TFT
default 4 if LCM_USING_FW043TFT
default 5 if LCM_USING_FW070TFT_WSVGA
config BSP_LCD_BPP
int
@ -490,6 +494,7 @@ config SOC_SERIES_N9H30
default 16 if LCM_USING_LSA40AT9001
default 32 if LCM_USING_FW070TFT
default 32 if LCM_USING_FW043TFT
default 32 if LCM_USING_FW070TFT_WSVGA
config BSP_LCD_WIDTH
int
@ -497,6 +502,7 @@ config SOC_SERIES_N9H30
default 800 if LCM_USING_LSA40AT9001
default 800 if LCM_USING_FW070TFT
default 480 if LCM_USING_FW043TFT
default 1024 if LCM_USING_FW070TFT_WSVGA
config BSP_LCD_HEIGHT
int
@ -504,6 +510,7 @@ config SOC_SERIES_N9H30
default 600 if LCM_USING_LSA40AT9001
default 480 if LCM_USING_FW070TFT
default 272 if LCM_USING_FW043TFT
default 600 if LCM_USING_FW070TFT_WSVGA
config BSP_USING_VPOST_OSD
bool "Enable VPOST OSD layer"

28
bsp/nuvoton/libraries/n9h30/rtt_port/drv_adc_touch.c
View File

@ -30,18 +30,12 @@ static nu_adc_touch s_NuAdcTouch = {0};
#define DEF_CALDATA_LENGTH 7
#if defined(LCM_USING_FW043TFT)
#define LCM_WIDTH 480
#define LCM_HEIGHT 272
#if (BSP_LCD_WIDTH==480) && (BSP_LCD_HEIGHT==272)
static int cal_data_a[DEF_CALDATA_LENGTH] = { 8824, -34, -2261272, -70, -6302, 21805816, 65536 };
#else
#define LCM_WIDTH 800
#define LCM_HEIGHT 480
#if defined(LCM_USING_FW070TFT)
#elif (BSP_LCD_WIDTH==800) && (BSP_LCD_HEIGHT==480)
static int cal_data_a[DEF_CALDATA_LENGTH] = { 13230, -66, -1161952, -85, 8600, -1636996, 65536 };
#else
#else
static int cal_data_a[DEF_CALDATA_LENGTH] = { 1, 0, 0, 0, 1, 0, 1 };
#endif
#endif
static const int cal_zero[DEF_CALDATA_LENGTH] = { 1, 0, 0, 0, 1, 0, 1 };
@ -166,8 +160,8 @@ int rt_hw_adc_touch_init(void)
s_NuAdcTouch.dev.info.type = RT_TOUCH_TYPE_RESISTANCE;
s_NuAdcTouch.dev.info.vendor = RT_TOUCH_VENDOR_UNKNOWN;
s_NuAdcTouch.dev.info.point_num = 1;
s_NuAdcTouch.dev.info.range_x = LCM_WIDTH;
s_NuAdcTouch.dev.info.range_y = LCM_HEIGHT;
s_NuAdcTouch.dev.info.range_x = BSP_LCD_WIDTH;
s_NuAdcTouch.dev.info.range_y = BSP_LCD_HEIGHT;
s_NuAdcTouch.dev.ops = &touch_ops;
@ -203,11 +197,11 @@ static void adc_touch_entry(void *parameter)
result = rt_device_set_rx_indicate(pdev, adc_touch_rx_callback);
RT_ASSERT(result == RT_EOK);
max_range = LCM_WIDTH;
max_range = BSP_LCD_WIDTH;
result = rt_device_control(pdev, RT_TOUCH_CTRL_SET_X_RANGE, (void *)&max_range);
RT_ASSERT(result == RT_EOK);
max_range = LCM_HEIGHT;
max_range = BSP_LCD_HEIGHT;
result = rt_device_control(pdev, RT_TOUCH_CTRL_SET_Y_RANGE, (void *)&max_range);
RT_ASSERT(result == RT_EOK);
@ -270,7 +264,7 @@ static rt_err_t nu_touch_start(int argc, char **argv)
adc_touch_thread = rt_thread_create("adc_touch_thread",
adc_touch_entry,
RT_NULL,
1024,
2048,
25,
5);
adc_touch_worker_run = 1;
@ -281,6 +275,12 @@ static rt_err_t nu_touch_start(int argc, char **argv)
}
MSH_CMD_EXPORT(nu_touch_start, e.g: start adc touch);
static int nu_touch_autostart(void)
{
return nu_touch_start(0, RT_NULL);
}
INIT_APP_EXPORT(nu_touch_autostart);
/* Support "nu_touch_stop" command line in msh mode */
static rt_err_t nu_touch_stop(int argc, char **argv)
{

375
bsp/nuvoton/libraries/n9h30/rtt_port/drv_can.c
View File

@ -58,6 +58,7 @@ struct nu_can
IRQn_Type irqn;
E_SYS_IPRST rstidx;
E_SYS_IPCLK clkidx;
uint32_t int_flag;
};
typedef struct nu_can *nu_can_t;
@ -106,16 +107,16 @@ static const struct can_configure nu_can_default_config = NU_CAN_CONFIG_DEFAULT;
/* Interrupt Handle Function ----------------------------------------------------*/
static void nu_can_isr(int vector, void *param)
{
uint32_t u32IIDRstatus;
nu_can_t psNuCAN = (nu_can_t)param;
/* Get base address of CAN register */
CAN_T *base = psNuCAN->base;
/* Get interrupt event */
u32IIDRstatus = CAN_GET_INT_PENDING_STATUS(base);
uint32_t u32IIDRstatus = CAN_GET_INT_PENDING_STATUS(base) & CAN_IIDR_INTID_Msk;
if (u32IIDRstatus == 0x00008000) /* Check Status Interrupt Flag (Error status Int and Status change Int) */
/* Check Status Interrupt Flag (Error status Int and Status change Int) */
if (u32IIDRstatus == 0x00008000)
{
/**************************/
/* Status Change interrupt*/
@ -123,20 +124,24 @@ static void nu_can_isr(int vector, void *param)
if (base->STATUS & CAN_STATUS_TXOK_Msk)
{
base->STATUS &= ~CAN_STATUS_TXOK_Msk; /* Clear Tx Ok status*/
//rt_kprintf("%s: TX\n", psNuCAN->name) ;
#ifndef RT_CAN_USING_HDR
/* Using as Lisen,Loopback,Loopback+Lisen mode*/
rt_hw_can_isr(&psNuCAN->dev, RT_CAN_EVENT_TX_DONE);
if (psNuCAN->int_flag & RT_DEVICE_FLAG_INT_TX)
{
/*Using as Lisen,Loopback,Loopback+Lisen mode*/
rt_hw_can_isr(&psNuCAN->dev, RT_CAN_EVENT_TX_DONE);
}
#endif
}
if (base->STATUS & CAN_STATUS_RXOK_Msk)
{
base->STATUS &= ~CAN_STATUS_RXOK_Msk; /* Clear Rx Ok status*/
//rt_kprintf("%s: RX\n", psNuCAN->name) ;
#ifndef RT_CAN_USING_HDR
/* Using as Lisen,Loopback,Loopback+Lisen mode*/
rt_hw_can_isr(&psNuCAN->dev, RT_CAN_EVENT_RX_IND);
if (psNuCAN->int_flag & RT_DEVICE_FLAG_INT_RX)
{
/*Using as Lisen,Loopback,Loopback+Lisen mode*/
rt_hw_can_isr(&psNuCAN->dev, RT_CAN_EVENT_RX_IND);
}
#endif
}
@ -145,17 +150,16 @@ static void nu_can_isr(int vector, void *param)
/**************************/
if (base->STATUS & CAN_STATUS_EWARN_Msk)
{
rt_kprintf("%s: EWARN\n", psNuCAN->name) ;
rt_kprintf("[%s]EWARN INT\n", psNuCAN->name) ;
}
if (base->STATUS & CAN_STATUS_BOFF_Msk)
{
rt_kprintf("%s: BUSOFF\n", psNuCAN->name) ;
rt_kprintf("[%s]BUSOFF INT\n", psNuCAN->name) ;
/* Do Init to release busoff pin */
base->CON = (CAN_CON_INIT_Msk | CAN_CON_CCE_Msk);
base->CON &= (~(CAN_CON_INIT_Msk | CAN_CON_CCE_Msk));
while (base->CON & CAN_CON_INIT_Msk);
/* To release busoff pin */
CAN_EnterInitMode(base, CAN_CON_INIT_Msk | CAN_CON_CCE_Msk);
CAN_LeaveInitMode(base);
}
if (base->STATUS & CAN_STATUS_LEC_Msk)
@ -168,66 +172,83 @@ static void nu_can_isr(int vector, void *param)
/*IntId: 0x0001-0x0020, Number of Message Object which caused the interrupt.*/
else if (u32IIDRstatus > 0 && u32IIDRstatus <= 32)
{
/*Message RAM 0~RX_MSG_ID_INDEX for CAN Tx using*/
if (u32IIDRstatus <= RX_MSG_ID_INDEX)
if ((psNuCAN->int_flag & RT_DEVICE_FLAG_INT_TX) &&
(u32IIDRstatus <= RX_MSG_ID_INDEX))
{
//rt_kprintf("[%s-Tx]IntId = %d\n", psNuCAN->name, u32IIDRstatus);
/*Message RAM 0~RX_MSG_ID_INDEX for CAN Tx using*/
rt_hw_can_isr(&psNuCAN->dev, RT_CAN_EVENT_TX_DONE);
}
else /*Message RAM RX_MSG_ID_INDEX~31 for CAN Rx using*/
else if (psNuCAN->int_flag & RT_DEVICE_FLAG_INT_RX)
{
//rt_kprintf("[%s-Rx]IntId = %d\n", psNuCAN->name, u32IIDRstatus);
/*Message RAM RX_MSG_ID_INDEX~31 for CAN Rx using*/
rt_hw_can_isr(&psNuCAN->dev, (RT_CAN_EVENT_RX_IND | ((u32IIDRstatus - 1) << 8)));
}
CAN_CLR_INT_PENDING_BIT(base, (u32IIDRstatus - 1)); /* Clear Interrupt Pending */
}
#endif
}
static void nu_can_ie(nu_can_t psNuCAN)
{
uint32_t u32CanIE = CAN_CON_IE_Msk;
if (psNuCAN->int_flag & (RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_INT_TX))
{
u32CanIE |= CAN_CON_SIE_Msk;
}
else
{
u32CanIE &= ~CAN_CON_SIE_Msk;
}
if (psNuCAN->int_flag & RT_DEVICE_CAN_INT_ERR)
{
u32CanIE |= CAN_CON_EIE_Msk;
}
else
{
u32CanIE &= ~CAN_CON_EIE_Msk;
}
if (u32CanIE & (CAN_CON_SIE_Msk | CAN_CON_EIE_Msk))
{
CAN_EnableInt(psNuCAN->base, u32CanIE);
/* Enable interrupt. */
rt_hw_interrupt_umask(psNuCAN->irqn);
}
else
{
u32CanIE |= (CAN_CON_IE_Msk | CAN_CON_SIE_Msk);
CAN_DisableInt(psNuCAN->base, u32CanIE);
/* Disable interrupt. */
rt_hw_interrupt_mask(psNuCAN->irqn);
}
}
static rt_err_t nu_can_configure(struct rt_can_device *can, struct can_configure *cfg)
{
nu_can_t psNuCAN = (nu_can_t)can;
uint32_t u32CANMode;
RT_ASSERT(can != RT_NULL);
RT_ASSERT(cfg != RT_NULL);
RT_ASSERT(can);
RT_ASSERT(cfg);
/* Get base address of CAN register */
CAN_T *base = psNuCAN->base;
RT_ASSERT(base != RT_NULL);
switch (cfg->mode)
{
/* CAN default Normal mode */
case RT_CAN_MODE_NORMAL:
can->config.mode = CAN_NORMAL_MODE;
break;
case RT_CAN_MODE_LISEN:
can->config.mode = RT_CAN_MODE_LISEN;
break;
case RT_CAN_MODE_LOOPBACK:
can->config.mode = RT_CAN_MODE_LOOPBACK;
break;
case RT_CAN_MODE_LOOPBACKANLISEN:
can->config.mode = RT_CAN_MODE_LOOPBACKANLISEN;
break;
default:
rt_kprintf("Unsupported Operating mode");
goto exit_nu_can_configure;
}
/* Reset this module */
nu_sys_ip_reset(psNuCAN->rstidx);
/*Set the CAN Bit Rate and Operating mode*/
if (CAN_Open(base, can->config.baud_rate, can->config.mode) < 1)
return -(RT_ERROR);
u32CANMode = (cfg->mode == RT_CAN_MODE_NORMAL) ? CAN_NORMAL_MODE : CAN_BASIC_MODE;
/*Set the CAN Bit Rate and Operating mode*/
if (CAN_Open(base, cfg->baud_rate, u32CANMode) != cfg->baud_rate)
goto exit_nu_can_configure;
switch (cfg->mode)
{
/* CAN default Normal mode */
case RT_CAN_MODE_NORMAL:
#ifdef RT_CAN_USING_HDR
CAN_LeaveTestMode(base);
@ -249,6 +270,7 @@ static rt_err_t nu_can_configure(struct rt_can_device *can, struct can_configure
goto exit_nu_can_configure;
}
nu_can_ie(psNuCAN);
return RT_EOK;
@ -261,73 +283,33 @@ exit_nu_can_configure:
static rt_err_t nu_can_control(struct rt_can_device *can, int cmd, void *arg)
{
rt_uint32_t argval;
nu_can_t psNuCAN = (nu_can_t)can;
rt_uint32_t argval = (rt_uint32_t)arg;
nu_can_t psNuCAN = (nu_can_t)can;
#ifdef RT_CAN_USING_HDR
struct rt_can_filter_config *filter_cfg;
#endif
/* Get base address of CAN register */
CAN_T *base = psNuCAN->base;
RT_ASSERT(base != RT_NULL);
/* Check baud rate */
RT_ASSERT(can->config.baud_rate != 0);
RT_ASSERT(can);
switch (cmd)
{
case RT_DEVICE_CTRL_CLR_INT:
argval = (rt_uint32_t) arg;
if ((argval == RT_DEVICE_FLAG_INT_RX) || (argval == RT_DEVICE_FLAG_INT_TX))
{
/* Disable NVIC interrupt. */
rt_hw_interrupt_mask(psNuCAN->irqn);
/* Disable Status Change Interrupt */
CAN_DisableInt(base, CAN_CON_IE_Msk | CAN_CON_SIE_Msk);
}
else if (argval == RT_DEVICE_CAN_INT_ERR)
{
/* Disable interrupt. */
rt_hw_interrupt_mask(psNuCAN->irqn);
/* Disable Error Interrupt */
CAN_DisableInt(base, CAN_CON_EIE_Msk);
}
break;
case RT_DEVICE_CTRL_SET_INT:
argval = (rt_uint32_t) arg;
if (argval == RT_DEVICE_FLAG_INT_RX || (argval == RT_DEVICE_FLAG_INT_TX))
{
/* Enable Status Change Interrupt */
CAN_EnableInt(base, CAN_CON_IE_Msk | CAN_CON_SIE_Msk);
/* Enable interrupt. */
rt_hw_interrupt_umask(psNuCAN->irqn);
}
else if (argval == RT_DEVICE_CAN_INT_ERR)
{
/* Enable Error Status and Status Change Interrupt */
CAN_EnableInt(base, CAN_CON_IE_Msk | CAN_CON_SIE_Msk | CAN_CON_EIE_Msk);
/* Enable interrupt. */
rt_hw_interrupt_umask(psNuCAN->irqn);
}
psNuCAN->int_flag |= argval;
nu_can_ie(psNuCAN);
break;
case RT_DEVICE_CTRL_CLR_INT:
psNuCAN->int_flag &= ~argval;
nu_can_ie(psNuCAN);
break;
#ifdef RT_CAN_USING_HDR
case RT_CAN_CMD_SET_FILTER:
filter_cfg = (struct rt_can_filter_config *)arg;
{
struct rt_can_filter_config *filter_cfg = (struct rt_can_filter_config *)arg;
for (int i = 0; i < filter_cfg->count; i++)
{
/*set the filter message object*/
if (filter_cfg->items[i].mode == 1)
{
if (CAN_SetRxMsgObjAndMsk(base, MSG(filter_cfg->items[i].hdr + RX_MSG_ID_INDEX), filter_cfg->items[i].ide, filter_cfg->items[i].id, filter_cfg->items[i].mask, FALSE) == FALSE)
if (CAN_SetRxMsgObjAndMsk(psNuCAN->base, MSG(filter_cfg->items[i].hdr + RX_MSG_ID_INDEX), filter_cfg->items[i].ide, filter_cfg->items[i].id, filter_cfg->items[i].mask, FALSE) == FALSE)
{
return -(RT_ERROR);
}
@ -335,46 +317,61 @@ static rt_err_t nu_can_control(struct rt_can_device *can, int cmd, void *arg)
else
{
/*set the filter message object*/
if (CAN_SetRxMsgAndMsk(base, MSG(filter_cfg->items[i].hdr + RX_MSG_ID_INDEX), filter_cfg->items[i].ide, filter_cfg->items[i].id, filter_cfg->items[i].mask) == FALSE)
if (CAN_SetRxMsgAndMsk(psNuCAN->base, MSG(filter_cfg->items[i].hdr + RX_MSG_ID_INDEX), filter_cfg->items[i].ide, filter_cfg->items[i].id, filter_cfg->items[i].mask) == FALSE)
{
return -(RT_ERROR);
}
}
}
break;
#endif
}
break;
case RT_CAN_CMD_SET_MODE:
argval = (rt_uint32_t) arg;
if (argval != RT_CAN_MODE_NORMAL && argval != RT_CAN_MODE_LISEN &&
argval != RT_CAN_MODE_LOOPBACK && argval != RT_CAN_MODE_LOOPBACKANLISEN)
if ((argval == RT_CAN_MODE_NORMAL) ||
(argval == RT_CAN_MODE_LISEN) ||
(argval == RT_CAN_MODE_LOOPBACK) ||
(argval == RT_CAN_MODE_LOOPBACKANLISEN))
{
if (argval != can->config.mode)
{
can->config.mode = argval;
return nu_can_configure(can, &can->config);
}
}
else
{
return -(RT_ERROR);
}
if (argval != can->config.mode)
{
can->config.mode = argval;
return nu_can_configure(can, &can->config);
}
break;
case RT_CAN_CMD_SET_BAUD:
argval = (rt_uint32_t) arg;
if (argval != CAN1MBaud && argval != CAN800kBaud && argval != CAN500kBaud && argval != CAN250kBaud &&
argval != CAN125kBaud && argval != CAN100kBaud && argval != CAN50kBaud && argval != CAN20kBaud && argval != CAN10kBaud)
{
if ((argval == CAN1MBaud) ||
(argval == CAN800kBaud) ||
(argval == CAN500kBaud) ||
(argval == CAN250kBaud) ||
(argval == CAN125kBaud) ||
(argval == CAN100kBaud) ||
(argval == CAN50kBaud) ||
(argval == CAN20kBaud) ||
(argval == CAN10kBaud))
{
if (argval != can->config.baud_rate)
{
can->config.baud_rate = argval;
return nu_can_configure(can, &can->config);
}
}
else
{
return -(RT_ERROR);
}
if (argval != can->config.baud_rate)
{
can->config.baud_rate = argval;
return nu_can_configure(can, &can->config);
}
break;
}
break;
case RT_CAN_CMD_SET_PRIV:
argval = (rt_uint32_t) arg;
if (argval != RT_CAN_MODE_PRIV && argval != RT_CAN_MODE_NOPRIV)
if (argval != RT_CAN_MODE_PRIV &&
argval != RT_CAN_MODE_NOPRIV)
{
return -(RT_ERROR);
}
@ -387,16 +384,23 @@ static rt_err_t nu_can_control(struct rt_can_device *can, int cmd, void *arg)
case RT_CAN_CMD_GET_STATUS:
{
rt_uint32_t errtype;
errtype = base->ERR;
/*Receive Error Counter*/
rt_uint32_t errtype = psNuCAN->base->ERR;
RT_ASSERT(arg);
/*Receive Error Counter, return value is with Receive Error Passive.*/
can->status.rcverrcnt = (errtype >> 8);
/*Transmit Error Counter*/
can->status.snderrcnt = ((errtype >> 24) & 0xFF);
can->status.lasterrtype = CAN_GET_INT_STATUS(base) & 0x8000;
/*status error code*/
can->status.errcode = CAN_GET_INT_STATUS(base) & 0x07;
rt_memcpy(arg, &can->status, sizeof(can->status));
can->status.snderrcnt = (errtype & 0xFF);
/*Last Error Type*/
can->status.lasterrtype = CAN_GET_INT_STATUS(psNuCAN->base) & 0x8000;
/*Status error code*/
can->status.errcode = CAN_GET_INT_STATUS(psNuCAN->base) & 0x07;
rt_memcpy(arg, &can->status, sizeof(struct rt_can_status));
}
break;
@ -411,64 +415,91 @@ static rt_err_t nu_can_control(struct rt_can_device *can, int cmd, void *arg)
static int nu_can_sendmsg(struct rt_can_device *can, const void *buf, rt_uint32_t boxno)
{
STR_CANMSG_T tMsg;
struct rt_can_msg *pmsg = (struct rt_can_msg *) buf;
struct rt_can_msg *pmsg;
nu_can_t psNuCAN = (nu_can_t)can;
/* Get base address of CAN register */
CAN_T *base = ((nu_can_t)can)->base;
RT_ASSERT(can);
RT_ASSERT(buf);
RT_ASSERT(base != RT_NULL);
RT_ASSERT(buf != RT_NULL);
pmsg = (struct rt_can_msg *) buf;
/* Check the parameters */
RT_ASSERT(IS_CAN_DLC(pmsg->len));
/* Standard ID (11 bits)*/
if (pmsg->ide == RT_CAN_STDID)
if (pmsg->ide == RT_CAN_STDID && IS_CAN_STDID(pmsg->id))
{
/* Standard ID (11 bits)*/
tMsg.IdType = CAN_STD_ID;
RT_ASSERT(IS_CAN_STDID(pmsg->id))
tMsg.Id = pmsg->id ;
}
else
else if (pmsg->ide == RT_CAN_EXTID && IS_CAN_EXTID(pmsg->id))
{
/* Extended ID (29 bits)*/
tMsg.IdType = CAN_EXT_ID;
RT_ASSERT(IS_CAN_EXTID(pmsg->id));
tMsg.Id = pmsg->id ;
}
else
{
goto exit_nu_can_sendmsg;
}
if (pmsg->rtr == RT_CAN_DTR)
{
/* Data frame */
tMsg.FrameType = CAN_DATA_FRAME;
}
else
else if (pmsg->rtr == RT_CAN_RTR)
{
/* Remote frame */
tMsg.FrameType = CAN_REMOTE_FRAME;
}
tMsg.DLC = pmsg->len;
rt_memcpy(tMsg.Data, pmsg->data, pmsg->len);
if (CAN_Transmit(base, MSG(boxno), &tMsg) == FALSE) // Configure Msg RAM and send the Msg in the RAM
else
{
return -(RT_ERROR);
goto exit_nu_can_sendmsg;
}
/* Check the parameters */
if (IS_CAN_DLC(pmsg->len))
{
tMsg.DLC = pmsg->len;
}
else
{
goto exit_nu_can_sendmsg;
}
if (pmsg->data && pmsg->len)
{
rt_memcpy(&tMsg.Data[0], pmsg->data, pmsg->len);
}
else
{
goto exit_nu_can_sendmsg;
}
/* Configure Msg RAM and send the Msg in the RAM. */
if (CAN_Transmit(psNuCAN->base, MSG(boxno), &tMsg) == FALSE)
{
goto exit_nu_can_sendmsg;
}
return RT_EOK;
exit_nu_can_sendmsg:
return -(RT_ERROR);
}
static int nu_can_recvmsg(struct rt_can_device *can, void *buf, rt_uint32_t boxno)
{
STR_CANMSG_T tMsg;
struct rt_can_msg *pmsg = (struct rt_can_msg *) buf;
/* Get base address of CAN register */
CAN_T *base = ((nu_can_t)can)->base;
struct rt_can_msg *pmsg;
nu_can_t psNuCAN = (nu_can_t)can;
RT_ASSERT(base != RT_NULL);
RT_ASSERT(buf != RT_NULL);
RT_ASSERT(can);
RT_ASSERT(buf);
pmsg = (struct rt_can_msg *) buf;
/* get data */
if (CAN_Receive(base, boxno, &tMsg) == FALSE)
if (CAN_Receive(psNuCAN->base, boxno, &tMsg) == FALSE)
{
rt_kprintf("No available RX Msg.\n");
return -(RT_ERROR);
@ -480,32 +511,13 @@ static int nu_can_recvmsg(struct rt_can_device *can, void *buf, rt_uint32_t boxn
can->hdr[pmsg->hdr].connected = 1;
#endif
/* Standard ID (11 bits)*/
if (tMsg.IdType == CAN_STD_ID)
{
pmsg->ide = RT_CAN_STDID;
pmsg->id = tMsg.Id;
}
else /* Extended ID (29 bits)*/
{
pmsg->ide = RT_CAN_EXTID;
pmsg->id = tMsg.Id;
}
if (tMsg.FrameType == CAN_DATA_FRAME)
{
/* Data frame */
pmsg->rtr = RT_CAN_DTR;
}
else
{
/* Remote frame */
pmsg->rtr = RT_CAN_RTR;
}
pmsg->ide = (tMsg.IdType == CAN_STD_ID) ? RT_CAN_STDID : RT_CAN_EXTID;
pmsg->rtr = (tMsg.FrameType == CAN_DATA_FRAME) ? RT_CAN_DTR : RT_CAN_RTR;
pmsg->id = tMsg.Id;
pmsg->len = tMsg.DLC ;
rt_memcpy(pmsg->data, tMsg.Data, pmsg->len);
if (pmsg->data && pmsg->len)
rt_memcpy(pmsg->data, &tMsg.Data[0], pmsg->len);
return RT_EOK;
}
@ -540,5 +552,4 @@ static int rt_hw_can_init(void)
return (int)ret;
}
INIT_DEVICE_EXPORT(rt_hw_can_init);
#endif //#if defined(BSP_USING_CAN)

108
bsp/nuvoton/libraries/n9h30/rtt_port/drv_i2c.c
View File

@ -34,6 +34,8 @@
#define I2C_ENABLE(dev) I2C_REG_WRITE(dev, I2C_CSR, 0x3) /* Enable i2c core and interrupt */
#define I2C_ISBUSFREE(dev) (((I2C_REG_READ(dev, I2C_SWR) & 0x18) == 0x18 && (I2C_REG_READ(dev, I2C_CSR) & 0x0400) == 0) ? 1 : 0)
#define I2C_SIGNAL_TIMEOUT 5000
enum
{
I2C_START = -1,
@ -50,7 +52,7 @@ enum
typedef struct
{
int32_t base; /* i2c bus number */
int32_t state;
volatile int32_t state;
int32_t addr;
uint32_t last_error;
int32_t bNackValid;
@ -58,9 +60,11 @@ typedef struct
uint32_t subaddr;
int32_t subaddr_len;
uint8_t buffer[I2C_MAX_BUF_LEN];
uint32_t pos, len;
volatile uint32_t pos;
volatile uint32_t len;
uint8_t *buffer;
struct rt_completion signal;
} nu_i2c_dev;
typedef nu_i2c_dev *nu_i2c_dev_t;
@ -68,7 +72,6 @@ typedef struct
{
struct rt_i2c_bus_device parent;
char *name;
IRQn_Type irqn;
E_SYS_IPRST rstidx;
E_SYS_IPCLK clkidx;
@ -113,13 +116,13 @@ static nu_i2c_bus nu_i2c_arr [ ] =
* @brief Set i2c interface speed
* @param[in] dev i2c device structure pointer
* @param[in] sp i2c speed
* @return always 0
* @return 0 or I2C_ERR_NOTTY
*/
static int32_t nu_i2c_set_speed(nu_i2c_dev_t psNuI2cDev, int32_t sp)
{
uint32_t d;
if (sp != 100 && sp != 400)
if ((sp != 100) && (sp != 400))
return (I2C_ERR_NOTTY);
d = (sysGetClock(SYS_PCLK) * 1000) / (sp * 5) - 1;
@ -205,6 +208,7 @@ static void nu_i2c_isr(int vector, void *param)
psNuI2CDev->last_error = I2C_ERR_NACK;
nu_i2c_command(psNuI2CDev, I2C_CMD_STOP);
psNuI2CDev->state = I2C_STATE_NOP;
rt_completion_done(&psNuI2CDev->signal);
}
/* Arbitration lost */
else if (csr & 0x200)
@ -212,6 +216,7 @@ static void nu_i2c_isr(int vector, void *param)
rt_kprintf("Arbitration lost\n");
psNuI2CDev->last_error = I2C_ERR_LOSTARBITRATION;
psNuI2CDev->state = I2C_STATE_NOP;
rt_completion_done(&psNuI2CDev->signal);
}
/* Transmit complete */
else if (!(csr & 0x100))
@ -225,6 +230,7 @@ static void nu_i2c_isr(int vector, void *param)
}
else if (psNuI2CDev->state == I2C_STATE_READ)
{
/* Sub-address send over, begin restart a read command */
if (psNuI2CDev->pos == psNuI2CDev->subaddr_len + 1)
{
@ -246,6 +252,7 @@ static void nu_i2c_isr(int vector, void *param)
else
{
psNuI2CDev->state = I2C_STATE_NOP;
rt_completion_done(&psNuI2CDev->signal);
}
}
}
@ -270,13 +277,13 @@ static void nu_i2c_isr(int vector, void *param)
else
{
psNuI2CDev->state = I2C_STATE_NOP;
rt_completion_done(&psNuI2CDev->signal);
}
}
}
}
/**
* @brief Read data from I2C slave.
* @param[in] psNuI2cDev is interface structure pointer.
@ -294,6 +301,9 @@ static int32_t nu_i2c_read(nu_i2c_dev_t psNuI2cDev, struct rt_i2c_msg *pmsg)
uint8_t *buf = pmsg->buf;
uint32_t len = pmsg->len;
RT_ASSERT(len);
RT_ASSERT(buf);
if (len > I2C_MAX_BUF_LEN - 10)
len = I2C_MAX_BUF_LEN - 10;
@ -317,9 +327,22 @@ static int32_t nu_i2c_read(nu_i2c_dev_t psNuI2cDev, struct rt_i2c_msg *pmsg)
if (!I2C_ISBUSFREE(psNuI2cDev))
return (I2C_ERR_BUSY);
rt_completion_init(&psNuI2cDev->signal);
nu_i2c_command(psNuI2cDev, I2C_CMD_START | I2C_CMD_WRITE);
while (psNuI2cDev->state != I2C_STATE_NOP);
if ((RT_EOK == rt_completion_wait(&psNuI2cDev->signal, I2C_SIGNAL_TIMEOUT)))
{
rt_memcpy(buf, psNuI2cDev->buffer + psNuI2cDev->subaddr_len + 3, len);
psNuI2cDev->subaddr += len;
}
else
{
rt_kprintf("[%s]Wait signal timeout.\n", __func__);
len = 0;
}
/* Disable I2C-EN */
I2C_DISABLE(psNuI2cDev);
@ -327,10 +350,6 @@ static int32_t nu_i2c_read(nu_i2c_dev_t psNuI2cDev, struct rt_i2c_msg *pmsg)
if (psNuI2cDev->last_error)
return (psNuI2cDev->last_error);
rt_memcpy(buf, psNuI2cDev->buffer + psNuI2cDev->subaddr_len + 3, len);
psNuI2cDev->subaddr += len;
return len;
}
@ -351,6 +370,9 @@ static int32_t nu_i2c_write(nu_i2c_dev_t psNuI2cDev, struct rt_i2c_msg *pmsg)
uint8_t *buf = pmsg->buf;
uint32_t len = pmsg->len;
RT_ASSERT(len);
RT_ASSERT(buf);
if (len > I2C_MAX_BUF_LEN - 10)
len = I2C_MAX_BUF_LEN - 10;
@ -373,9 +395,20 @@ static int32_t nu_i2c_write(nu_i2c_dev_t psNuI2cDev, struct rt_i2c_msg *pmsg)
if (!I2C_ISBUSFREE(psNuI2cDev))
return (I2C_ERR_BUSY);
rt_completion_init(&psNuI2cDev->signal);
nu_i2c_command(psNuI2cDev, I2C_CMD_START | I2C_CMD_WRITE);
while (psNuI2cDev->state != I2C_STATE_NOP);
if ((RT_EOK == rt_completion_wait(&psNuI2cDev->signal, I2C_SIGNAL_TIMEOUT)))
{
psNuI2cDev->subaddr += len;
}
else
{
rt_kprintf("[%s]Wait signal timeout.\n", __func__);
len = 0;
}
/* Disable I2C-EN */
I2C_DISABLE(psNuI2cDev);
@ -383,8 +416,6 @@ static int32_t nu_i2c_write(nu_i2c_dev_t psNuI2cDev, struct rt_i2c_msg *pmsg)
if (psNuI2cDev->last_error)
return (psNuI2cDev->last_error);
psNuI2cDev->subaddr += len;
return len;
}
@ -405,16 +436,13 @@ static int32_t nu_i2c_ioctl(nu_i2c_dev_t psNuI2cDev, uint32_t cmd, uint32_t arg0
switch (cmd)
{
case I2C_IOC_SET_DEV_ADDRESS:
psNuI2cDev->addr = arg0;
break;
case I2C_IOC_SET_SPEED:
return (nu_i2c_set_speed(psNuI2cDev, (int32_t)arg0));
return nu_i2c_set_speed(psNuI2cDev, (int32_t)arg0);
case I2C_IOC_SET_SUB_ADDRESS:
if (arg1 > 4)
{
return (I2C_ERR_NOTTY);
@ -441,7 +469,8 @@ static rt_size_t nu_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
rt_err_t ret;
struct rt_i2c_msg *pmsg;
RT_ASSERT(bus != RT_NULL);
RT_ASSERT(bus);
psNuI2cBus = (nu_i2c_bus_t) bus;
psNuI2cDev = &psNuI2cBus->dev;
@ -459,6 +488,7 @@ static rt_size_t nu_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
/* Set device address */
nu_i2c_reset(psNuI2cDev);
nu_i2c_ioctl(psNuI2cDev, I2C_IOC_SET_DEV_ADDRESS, pmsg->addr, 0);
if (pmsg->flags & RT_I2C_RD)
@ -470,18 +500,39 @@ static rt_size_t nu_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
ret = nu_i2c_write(psNuI2cDev, pmsg);
}
if (ret != pmsg->len) break;
}
return i;
}
static rt_err_t nu_i2c_bus_control(struct rt_i2c_bus_device *bus, rt_uint32_t u32Cmd, rt_uint32_t u32Value)
{
nu_i2c_bus_t psNuI2cBus;
nu_i2c_dev_t psNuI2cDev;
RT_ASSERT(bus);
psNuI2cBus = (nu_i2c_bus_t) bus;
psNuI2cDev = &psNuI2cBus->dev;
switch (RT_I2C_DEV_CTRL_CLK)
{
case RT_I2C_DEV_CTRL_CLK:
nu_i2c_set_speed(psNuI2cDev, (int32_t)u32Value);
break;
default:
return -RT_EIO;
}
return RT_EOK;
}
static const struct rt_i2c_bus_device_ops nu_i2c_ops =
{
.master_xfer = nu_i2c_mst_xfer,
.slave_xfer = NULL,
.i2c_bus_control = NULL,
.i2c_bus_control = nu_i2c_bus_control,
};
@ -489,17 +540,17 @@ static const struct rt_i2c_bus_device_ops nu_i2c_ops =
int rt_hw_i2c_init(void)
{
int i;
rt_err_t ret = RT_EOK;
rt_err_t ret;
for (i = (I2C_START + 1); i < I2C_CNT; i++)
{
nu_i2c_dev_t psNuI2cDev = &nu_i2c_arr[i].dev;
ret = rt_i2c_bus_device_register(&nu_i2c_arr[i].parent, nu_i2c_arr[i].name);
RT_ASSERT(RT_EOK == ret);
nu_i2c_arr[i].parent.ops = &nu_i2c_ops;
psNuI2cDev->buffer = rt_malloc(I2C_MAX_BUF_LEN);
RT_ASSERT(psNuI2cDev->buffer);
/* Enable I2C engine clock and reset. */
nu_sys_ipclk_enable(nu_i2c_arr[i].clkidx);
nu_sys_ip_reset(nu_i2c_arr[i].rstidx);
@ -509,6 +560,9 @@ int rt_hw_i2c_init(void)
/* Register ISR and Respond IRQ. */
rt_hw_interrupt_install(nu_i2c_arr[i].irqn, nu_i2c_isr, &nu_i2c_arr[i], nu_i2c_arr[i].name);
rt_hw_interrupt_umask(nu_i2c_arr[i].irqn);
ret = rt_i2c_bus_device_register(&nu_i2c_arr[i].parent, nu_i2c_arr[i].name);
RT_ASSERT(RT_EOK == ret);
}
return 0;

21
bsp/nuvoton/libraries/n9h30/rtt_port/drv_vpost.c
View File

@ -49,6 +49,10 @@ typedef struct nu_vpost *nu_vpost_t;
static volatile uint32_t g_u32VSyncBlank = 0;
static struct rt_completion vsync_wq;
RT_WEAK void nu_lcd_backlight_on(void) { }
RT_WEAK void nu_lcd_backlight_off(void) { }
static struct nu_vpost nu_fbdev[eVpost_Cnt] =
{
{
@ -149,6 +153,18 @@ static rt_err_t vpost_layer_control(rt_device_t dev, int cmd, void *args)
switch (cmd)
{
case RTGRAPHIC_CTRL_POWERON:
{
nu_lcd_backlight_on();
}
break;
case RTGRAPHIC_CTRL_POWEROFF:
{
nu_lcd_backlight_off();
}
break;
case RTGRAPHIC_CTRL_GET_INFO:
{
struct rt_device_graphic_info *info = (struct rt_device_graphic_info *) args;
@ -324,6 +340,11 @@ int rt_hw_vpost_init(void)
rt_kprintf("Fail to get VRAM buffer.\n");
RT_ASSERT(0);
}
else
{
uint32_t u32FBSize = psVpost->info.pitch * psVpostLcmInst->u32DevHeight;
rt_memset(psVpost->info.framebuffer, 0, u32FBSize);
}
/* Register member functions of lcd device */
psVpost->dev.type = RT_Device_Class_Graphic;

4
bsp/nuvoton/libraries/nuc980/Driver/Include/nu_can.h
View File

@ -151,8 +151,8 @@ typedef struct
#define CAN_BTIME_TSEG2_Pos (12) /*!< CAN_T::BTIME: TSeg2 Position */
#define CAN_BTIME_TSEG2_Msk (0x7ul << CAN_BTIME_TSEG2_Pos) /*!< CAN_T::BTIME: TSeg2 Mask */
#define CAN_IIDR_IntId_Pos (0) /*!< CAN_T::IIDR: IntId Position */
#define CAN_IIDR_IntId_Msk (0xfffful << CAN_IIDR_IntId_Pos) /*!< CAN_T::IIDR: IntId Mask */
#define CAN_IIDR_INTID_Pos (0) /*!< CAN_T::IIDR: IntId Position */
#define CAN_IIDR_INTID_Msk (0xfffful << CAN_IIDR_INTID_Pos) /*!< CAN_T::IIDR: IntId Mask */
#define CAN_TEST_BASIC_Pos (2) /*!< CAN_T::TEST: Basic Position */
#define CAN_TEST_BASIC_Msk (0x1ul << CAN_TEST_BASIC_Pos) /*!< CAN_T::TEST: Basic Mask */

4
bsp/nuvoton/libraries/nuc980/Driver/Source/nu_emac.c
View File

@ -1129,7 +1129,7 @@ uint32_t EMAC_GetAvailRXBufSize(EMAC_MEMMGR_T *psMemMgr, uint8_t **ppuDataBuf)
* @note Application can only call this function once every time \ref EMAC_RecvPkt or \ref EMAC_RecvPktTS returns 1
* @note This function is without doing EMAC_TRIGGER_RX.
*/
EMAC_DESCRIPTOR_T * EMAC_RecvPktDoneWoRxTrigger(EMAC_MEMMGR_T *psMemMgr)
EMAC_DESCRIPTOR_T *EMAC_RecvPktDoneWoRxTrigger(EMAC_MEMMGR_T *psMemMgr)
{
/* Get Rx Frame Descriptor */
EMAC_DESCRIPTOR_T *desc = (EMAC_DESCRIPTOR_T *)psMemMgr->psCurrentRxDesc;
@ -1151,7 +1151,7 @@ EMAC_DESCRIPTOR_T * EMAC_RecvPktDoneWoRxTrigger(EMAC_MEMMGR_T *psMemMgr)
return ret;
}
void EMAC_RxTrigger(EMAC_MEMMGR_T *psMemMgr, EMAC_DESCRIPTOR_T * rx_desc)
void EMAC_RxTrigger(EMAC_MEMMGR_T *psMemMgr, EMAC_DESCRIPTOR_T *rx_desc)
{
EMAC_T *EMAC = psMemMgr->psEmac;

375
bsp/nuvoton/libraries/nuc980/rtt_port/drv_can.c
View File

@ -64,6 +64,7 @@ struct nu_can
IRQn_Type irqn;
E_SYS_IPRST rstidx;
E_SYS_IPCLK clkidx;
uint32_t int_flag;
};
typedef struct nu_can *nu_can_t;
@ -130,16 +131,16 @@ static const struct can_configure nu_can_default_config = NU_CAN_CONFIG_DEFAULT;
/* Interrupt Handle Function ----------------------------------------------------*/
static void nu_can_isr(int vector, void *param)
{
uint32_t u32IIDRstatus;
nu_can_t psNuCAN = (nu_can_t)param;
/* Get base address of CAN register */
CAN_T *base = psNuCAN->base;
/* Get interrupt event */
u32IIDRstatus = CAN_GET_INT_PENDING_STATUS(base);
uint32_t u32IIDRstatus = CAN_GET_INT_PENDING_STATUS(base) & CAN_IIDR_INTID_Msk;
if (u32IIDRstatus == 0x00008000) /* Check Status Interrupt Flag (Error status Int and Status change Int) */
/* Check Status Interrupt Flag (Error status Int and Status change Int) */
if (u32IIDRstatus == 0x00008000)
{
/**************************/
/* Status Change interrupt*/
@ -147,20 +148,24 @@ static void nu_can_isr(int vector, void *param)
if (base->STATUS & CAN_STATUS_TXOK_Msk)
{
base->STATUS &= ~CAN_STATUS_TXOK_Msk; /* Clear Tx Ok status*/
//rt_kprintf("%s: TX\n", psNuCAN->name) ;
#ifndef RT_CAN_USING_HDR
/* Using as Lisen,Loopback,Loopback+Lisen mode*/
rt_hw_can_isr(&psNuCAN->dev, RT_CAN_EVENT_TX_DONE);
if (psNuCAN->int_flag & RT_DEVICE_FLAG_INT_TX)
{
/*Using as Lisen,Loopback,Loopback+Lisen mode*/
rt_hw_can_isr(&psNuCAN->dev, RT_CAN_EVENT_TX_DONE);
}
#endif
}
if (base->STATUS & CAN_STATUS_RXOK_Msk)
{
base->STATUS &= ~CAN_STATUS_RXOK_Msk; /* Clear Rx Ok status*/
//rt_kprintf("%s: RX\n", psNuCAN->name) ;
#ifndef RT_CAN_USING_HDR
/* Using as Lisen,Loopback,Loopback+Lisen mode*/
rt_hw_can_isr(&psNuCAN->dev, RT_CAN_EVENT_RX_IND);
if (psNuCAN->int_flag & RT_DEVICE_FLAG_INT_RX)
{
/*Using as Lisen,Loopback,Loopback+Lisen mode*/
rt_hw_can_isr(&psNuCAN->dev, RT_CAN_EVENT_RX_IND);
}
#endif
}
@ -169,17 +174,16 @@ static void nu_can_isr(int vector, void *param)
/**************************/
if (base->STATUS & CAN_STATUS_EWARN_Msk)
{
rt_kprintf("%s: EWARN\n", psNuCAN->name) ;
rt_kprintf("[%s]EWARN INT\n", psNuCAN->name) ;
}
if (base->STATUS & CAN_STATUS_BOFF_Msk)
{
rt_kprintf("%s: BUSOFF\n", psNuCAN->name) ;
rt_kprintf("[%s]BUSOFF INT\n", psNuCAN->name) ;
/* Do Init to release busoff pin */
base->CON = (CAN_CON_INIT_Msk | CAN_CON_CCE_Msk);
base->CON &= (~(CAN_CON_INIT_Msk | CAN_CON_CCE_Msk));
while (base->CON & CAN_CON_INIT_Msk);
/* To release busoff pin */
CAN_EnterInitMode(base, CAN_CON_INIT_Msk | CAN_CON_CCE_Msk);
CAN_LeaveInitMode(base);
}
if (base->STATUS & CAN_STATUS_LEC_Msk)
@ -192,66 +196,83 @@ static void nu_can_isr(int vector, void *param)
/*IntId: 0x0001-0x0020, Number of Message Object which caused the interrupt.*/
else if (u32IIDRstatus > 0 && u32IIDRstatus <= 32)
{
/*Message RAM 0~RX_MSG_ID_INDEX for CAN Tx using*/
if (u32IIDRstatus <= RX_MSG_ID_INDEX)
if ((psNuCAN->int_flag & RT_DEVICE_FLAG_INT_TX) &&
(u32IIDRstatus <= RX_MSG_ID_INDEX))
{
//rt_kprintf("[%s-Tx]IntId = %d\n", psNuCAN->name, u32IIDRstatus);
/*Message RAM 0~RX_MSG_ID_INDEX for CAN Tx using*/
rt_hw_can_isr(&psNuCAN->dev, RT_CAN_EVENT_TX_DONE);
}
else /*Message RAM RX_MSG_ID_INDEX~31 for CAN Rx using*/
else if (psNuCAN->int_flag & RT_DEVICE_FLAG_INT_RX)
{
//rt_kprintf("[%s-Rx]IntId = %d\n", psNuCAN->name, u32IIDRstatus);
/*Message RAM RX_MSG_ID_INDEX~31 for CAN Rx using*/
rt_hw_can_isr(&psNuCAN->dev, (RT_CAN_EVENT_RX_IND | ((u32IIDRstatus - 1) << 8)));
}
CAN_CLR_INT_PENDING_BIT(base, (u32IIDRstatus - 1)); /* Clear Interrupt Pending */
}
#endif
}
static void nu_can_ie(nu_can_t psNuCAN)
{
uint32_t u32CanIE = CAN_CON_IE_Msk;
if (psNuCAN->int_flag & (RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_INT_TX))
{
u32CanIE |= CAN_CON_SIE_Msk;
}
else
{
u32CanIE &= ~CAN_CON_SIE_Msk;
}
if (psNuCAN->int_flag & RT_DEVICE_CAN_INT_ERR)
{
u32CanIE |= CAN_CON_EIE_Msk;
}
else
{
u32CanIE &= ~CAN_CON_EIE_Msk;
}
if (u32CanIE & (CAN_CON_SIE_Msk | CAN_CON_EIE_Msk))
{
CAN_EnableInt(psNuCAN->base, u32CanIE);
/* Enable interrupt. */
rt_hw_interrupt_umask(psNuCAN->irqn);
}
else
{
u32CanIE |= (CAN_CON_IE_Msk | CAN_CON_SIE_Msk);
CAN_DisableInt(psNuCAN->base, u32CanIE);
/* Disable interrupt. */
rt_hw_interrupt_mask(psNuCAN->irqn);
}
}
static rt_err_t nu_can_configure(struct rt_can_device *can, struct can_configure *cfg)
{
nu_can_t psNuCAN = (nu_can_t)can;
uint32_t u32CANMode;
RT_ASSERT(can != RT_NULL);
RT_ASSERT(cfg != RT_NULL);
RT_ASSERT(can);
RT_ASSERT(cfg);
/* Get base address of CAN register */
CAN_T *base = psNuCAN->base;
RT_ASSERT(base != RT_NULL);
switch (cfg->mode)
{
/* CAN default Normal mode */
case RT_CAN_MODE_NORMAL:
can->config.mode = CAN_NORMAL_MODE;
break;
case RT_CAN_MODE_LISEN:
can->config.mode = RT_CAN_MODE_LISEN;
break;
case RT_CAN_MODE_LOOPBACK:
can->config.mode = RT_CAN_MODE_LOOPBACK;
break;
case RT_CAN_MODE_LOOPBACKANLISEN:
can->config.mode = RT_CAN_MODE_LOOPBACKANLISEN;
break;
default:
rt_kprintf("Unsupported Operating mode");
goto exit_nu_can_configure;
}
/* Reset this module */
nu_sys_ip_reset(psNuCAN->rstidx);
/*Set the CAN Bit Rate and Operating mode*/
if (CAN_Open(base, can->config.baud_rate, can->config.mode) < 1)
return -(RT_ERROR);
u32CANMode = (cfg->mode == RT_CAN_MODE_NORMAL) ? CAN_NORMAL_MODE : CAN_BASIC_MODE;
/*Set the CAN Bit Rate and Operating mode*/
if (CAN_Open(base, cfg->baud_rate, u32CANMode) != cfg->baud_rate)
goto exit_nu_can_configure;
switch (cfg->mode)
{
/* CAN default Normal mode */
case RT_CAN_MODE_NORMAL:
#ifdef RT_CAN_USING_HDR
CAN_LeaveTestMode(base);
@ -273,6 +294,7 @@ static rt_err_t nu_can_configure(struct rt_can_device *can, struct can_configure
goto exit_nu_can_configure;
}
nu_can_ie(psNuCAN);
return RT_EOK;
@ -285,73 +307,33 @@ exit_nu_can_configure:
static rt_err_t nu_can_control(struct rt_can_device *can, int cmd, void *arg)
{
rt_uint32_t argval;
nu_can_t psNuCAN = (nu_can_t)can;
rt_uint32_t argval = (rt_uint32_t)arg;
nu_can_t psNuCAN = (nu_can_t)can;
#ifdef RT_CAN_USING_HDR
struct rt_can_filter_config *filter_cfg;
#endif
/* Get base address of CAN register */
CAN_T *base = psNuCAN->base;
RT_ASSERT(base != RT_NULL);
/* Check baud rate */
RT_ASSERT(can->config.baud_rate != 0);
RT_ASSERT(can);
switch (cmd)
{
case RT_DEVICE_CTRL_CLR_INT:
argval = (rt_uint32_t) arg;
if ((argval == RT_DEVICE_FLAG_INT_RX) || (argval == RT_DEVICE_FLAG_INT_TX))
{
/* Disable NVIC interrupt. */
rt_hw_interrupt_mask(psNuCAN->irqn);
/* Disable Status Change Interrupt */
CAN_DisableInt(base, CAN_CON_IE_Msk | CAN_CON_SIE_Msk);
}
else if (argval == RT_DEVICE_CAN_INT_ERR)
{
/* Disable interrupt. */
rt_hw_interrupt_mask(psNuCAN->irqn);
/* Disable Error Interrupt */
CAN_DisableInt(base, CAN_CON_EIE_Msk);
}
break;
case RT_DEVICE_CTRL_SET_INT:
argval = (rt_uint32_t) arg;
if (argval == RT_DEVICE_FLAG_INT_RX || (argval == RT_DEVICE_FLAG_INT_TX))
{
/* Enable Status Change Interrupt */
CAN_EnableInt(base, CAN_CON_IE_Msk | CAN_CON_SIE_Msk);
/* Enable interrupt. */
rt_hw_interrupt_umask(psNuCAN->irqn);
}
else if (argval == RT_DEVICE_CAN_INT_ERR)
{
/* Enable Error Status and Status Change Interrupt */
CAN_EnableInt(base, CAN_CON_IE_Msk | CAN_CON_SIE_Msk | CAN_CON_EIE_Msk);
/* Enable interrupt. */
rt_hw_interrupt_umask(psNuCAN->irqn);
}
psNuCAN->int_flag |= argval;
nu_can_ie(psNuCAN);
break;
case RT_DEVICE_CTRL_CLR_INT:
psNuCAN->int_flag &= ~argval;
nu_can_ie(psNuCAN);
break;
#ifdef RT_CAN_USING_HDR
case RT_CAN_CMD_SET_FILTER:
filter_cfg = (struct rt_can_filter_config *)arg;
{
struct rt_can_filter_config *filter_cfg = (struct rt_can_filter_config *)arg;
for (int i = 0; i < filter_cfg->count; i++)
{
/*set the filter message object*/
if (filter_cfg->items[i].mode == 1)
{
if (CAN_SetRxMsgObjAndMsk(base, MSG(filter_cfg->items[i].hdr + RX_MSG_ID_INDEX), filter_cfg->items[i].ide, filter_cfg->items[i].id, filter_cfg->items[i].mask, FALSE) == FALSE)
if (CAN_SetRxMsgObjAndMsk(psNuCAN->base, MSG(filter_cfg->items[i].hdr + RX_MSG_ID_INDEX), filter_cfg->items[i].ide, filter_cfg->items[i].id, filter_cfg->items[i].mask, FALSE) == FALSE)
{
return -(RT_ERROR);
}
@ -359,46 +341,61 @@ static rt_err_t nu_can_control(struct rt_can_device *can, int cmd, void *arg)
else
{
/*set the filter message object*/
if (CAN_SetRxMsgAndMsk(base, MSG(filter_cfg->items[i].hdr + RX_MSG_ID_INDEX), filter_cfg->items[i].ide, filter_cfg->items[i].id, filter_cfg->items[i].mask) == FALSE)
if (CAN_SetRxMsgAndMsk(psNuCAN->base, MSG(filter_cfg->items[i].hdr + RX_MSG_ID_INDEX), filter_cfg->items[i].ide, filter_cfg->items[i].id, filter_cfg->items[i].mask) == FALSE)
{
return -(RT_ERROR);
}
}
}
break;
#endif
}
break;
case RT_CAN_CMD_SET_MODE:
argval = (rt_uint32_t) arg;
if (argval != RT_CAN_MODE_NORMAL && argval != RT_CAN_MODE_LISEN &&
argval != RT_CAN_MODE_LOOPBACK && argval != RT_CAN_MODE_LOOPBACKANLISEN)
if ((argval == RT_CAN_MODE_NORMAL) ||
(argval == RT_CAN_MODE_LISEN) ||
(argval == RT_CAN_MODE_LOOPBACK) ||
(argval == RT_CAN_MODE_LOOPBACKANLISEN))
{
if (argval != can->config.mode)
{
can->config.mode = argval;
return nu_can_configure(can, &can->config);
}
}
else
{
return -(RT_ERROR);
}
if (argval != can->config.mode)
{
can->config.mode = argval;
return nu_can_configure(can, &can->config);
}
break;
case RT_CAN_CMD_SET_BAUD:
argval = (rt_uint32_t) arg;
if (argval != CAN1MBaud && argval != CAN800kBaud && argval != CAN500kBaud && argval != CAN250kBaud &&
argval != CAN125kBaud && argval != CAN100kBaud && argval != CAN50kBaud && argval != CAN20kBaud && argval != CAN10kBaud)
{
if ((argval == CAN1MBaud) ||
(argval == CAN800kBaud) ||
(argval == CAN500kBaud) ||
(argval == CAN250kBaud) ||
(argval == CAN125kBaud) ||
(argval == CAN100kBaud) ||
(argval == CAN50kBaud) ||
(argval == CAN20kBaud) ||
(argval == CAN10kBaud))
{
if (argval != can->config.baud_rate)
{
can->config.baud_rate = argval;
return nu_can_configure(can, &can->config);
}
}
else
{
return -(RT_ERROR);
}
if (argval != can->config.baud_rate)
{
can->config.baud_rate = argval;
return nu_can_configure(can, &can->config);
}
break;
}
break;
case RT_CAN_CMD_SET_PRIV:
argval = (rt_uint32_t) arg;
if (argval != RT_CAN_MODE_PRIV && argval != RT_CAN_MODE_NOPRIV)
if (argval != RT_CAN_MODE_PRIV &&
argval != RT_CAN_MODE_NOPRIV)
{
return -(RT_ERROR);
}
@ -411,16 +408,23 @@ static rt_err_t nu_can_control(struct rt_can_device *can, int cmd, void *arg)
case RT_CAN_CMD_GET_STATUS:
{
rt_uint32_t errtype;
errtype = base->ERR;
/*Receive Error Counter*/
rt_uint32_t errtype = psNuCAN->base->ERR;
RT_ASSERT(arg);
/*Receive Error Counter, return value is with Receive Error Passive.*/
can->status.rcverrcnt = (errtype >> 8);
/*Transmit Error Counter*/
can->status.snderrcnt = ((errtype >> 24) & 0xFF);
can->status.lasterrtype = CAN_GET_INT_STATUS(base) & 0x8000;
/*status error code*/
can->status.errcode = CAN_GET_INT_STATUS(base) & 0x07;
rt_memcpy(arg, &can->status, sizeof(can->status));
can->status.snderrcnt = (errtype & 0xFF);
/*Last Error Type*/
can->status.lasterrtype = CAN_GET_INT_STATUS(psNuCAN->base) & 0x8000;
/*Status error code*/
can->status.errcode = CAN_GET_INT_STATUS(psNuCAN->base) & 0x07;
rt_memcpy(arg, &can->status, sizeof(struct rt_can_status));
}
break;
@ -435,64 +439,91 @@ static rt_err_t nu_can_control(struct rt_can_device *can, int cmd, void *arg)
static int nu_can_sendmsg(struct rt_can_device *can, const void *buf, rt_uint32_t boxno)
{
STR_CANMSG_T tMsg;
struct rt_can_msg *pmsg = (struct rt_can_msg *) buf;
struct rt_can_msg *pmsg;
nu_can_t psNuCAN = (nu_can_t)can;
/* Get base address of CAN register */
CAN_T *base = ((nu_can_t)can)->base;
RT_ASSERT(can);
RT_ASSERT(buf);
RT_ASSERT(base != RT_NULL);
RT_ASSERT(buf != RT_NULL);
pmsg = (struct rt_can_msg *) buf;
/* Check the parameters */
RT_ASSERT(IS_CAN_DLC(pmsg->len));
/* Standard ID (11 bits)*/
if (pmsg->ide == RT_CAN_STDID)
if (pmsg->ide == RT_CAN_STDID && IS_CAN_STDID(pmsg->id))
{
/* Standard ID (11 bits)*/
tMsg.IdType = CAN_STD_ID;
RT_ASSERT(IS_CAN_STDID(pmsg->id))
tMsg.Id = pmsg->id ;
}
else
else if (pmsg->ide == RT_CAN_EXTID && IS_CAN_EXTID(pmsg->id))
{
/* Extended ID (29 bits)*/
tMsg.IdType = CAN_EXT_ID;
RT_ASSERT(IS_CAN_EXTID(pmsg->id));
tMsg.Id = pmsg->id ;
}
else
{
goto exit_nu_can_sendmsg;
}
if (pmsg->rtr == RT_CAN_DTR)
{
/* Data frame */
tMsg.FrameType = CAN_DATA_FRAME;
}
else
else if (pmsg->rtr == RT_CAN_RTR)
{
/* Remote frame */
tMsg.FrameType = CAN_REMOTE_FRAME;
}
tMsg.DLC = pmsg->len;
rt_memcpy(tMsg.Data, pmsg->data, pmsg->len);
if (CAN_Transmit(base, MSG(boxno), &tMsg) == FALSE) // Configure Msg RAM and send the Msg in the RAM
else
{
return -(RT_ERROR);
goto exit_nu_can_sendmsg;
}
/* Check the parameters */
if (IS_CAN_DLC(pmsg->len))
{
tMsg.DLC = pmsg->len;
}
else
{
goto exit_nu_can_sendmsg;
}
if (pmsg->data && pmsg->len)
{
rt_memcpy(&tMsg.Data[0], pmsg->data, pmsg->len);
}
else
{
goto exit_nu_can_sendmsg;
}
/* Configure Msg RAM and send the Msg in the RAM. */
if (CAN_Transmit(psNuCAN->base, MSG(boxno), &tMsg) == FALSE)
{
goto exit_nu_can_sendmsg;
}
return RT_EOK;
exit_nu_can_sendmsg:
return -(RT_ERROR);
}
static int nu_can_recvmsg(struct rt_can_device *can, void *buf, rt_uint32_t boxno)
{
STR_CANMSG_T tMsg;
struct rt_can_msg *pmsg = (struct rt_can_msg *) buf;
/* Get base address of CAN register */
CAN_T *base = ((nu_can_t)can)->base;
struct rt_can_msg *pmsg;
nu_can_t psNuCAN = (nu_can_t)can;
RT_ASSERT(base != RT_NULL);
RT_ASSERT(buf != RT_NULL);
RT_ASSERT(can);
RT_ASSERT(buf);
pmsg = (struct rt_can_msg *) buf;
/* get data */
if (CAN_Receive(base, boxno, &tMsg) == FALSE)
if (CAN_Receive(psNuCAN->base, boxno, &tMsg) == FALSE)
{
rt_kprintf("No available RX Msg.\n");
return -(RT_ERROR);
@ -504,32 +535,13 @@ static int nu_can_recvmsg(struct rt_can_device *can, void *buf, rt_uint32_t boxn
can->hdr[pmsg->hdr].connected = 1;
#endif
/* Standard ID (11 bits)*/
if (tMsg.IdType == CAN_STD_ID)
{
pmsg->ide = RT_CAN_STDID;
pmsg->id = tMsg.Id;
}
else /* Extended ID (29 bits)*/
{
pmsg->ide = RT_CAN_EXTID;
pmsg->id = tMsg.Id;
}
if (tMsg.FrameType == CAN_DATA_FRAME)
{
/* Data frame */
pmsg->rtr = RT_CAN_DTR;
}
else
{
/* Remote frame */
pmsg->rtr = RT_CAN_RTR;
}
pmsg->ide = (tMsg.IdType == CAN_STD_ID) ? RT_CAN_STDID : RT_CAN_EXTID;
pmsg->rtr = (tMsg.FrameType == CAN_DATA_FRAME) ? RT_CAN_DTR : RT_CAN_RTR;
pmsg->id = tMsg.Id;
pmsg->len = tMsg.DLC ;
rt_memcpy(pmsg->data, tMsg.Data, pmsg->len);
if (pmsg->data && pmsg->len)
rt_memcpy(pmsg->data, &tMsg.Data[0], pmsg->len);
return RT_EOK;
}
@ -564,5 +576,4 @@ static int rt_hw_can_init(void)
return (int)ret;
}
INIT_DEVICE_EXPORT(rt_hw_can_init);
#endif //#if defined(BSP_USING_CAN)

2
bsp/nuvoton/nk-980iot/.config
View File

@ -1003,3 +1003,5 @@ CONFIG_BOARD_USING_ILI9341_PIN_BACKLIGHT=103
CONFIG_BOARD_USING_ILI9341_PIN_RESET=90
CONFIG_BOARD_USING_ILI9341_PIN_DC=89
# CONFIG_BOARD_USING_ESP8266 is not set
CONFIG_BOARD_USE_UTEST=y
CONFIG_UTEST_CMD_PREFIX="bsp.nuvoton.nk980-iot.test.utest."

6
bsp/nuvoton/nk-980iot/Kconfig
View File

@ -18,12 +18,6 @@ config PKGS_DIR
option env="PKGS_ROOT"
default "packages"
config NU_PKGS_DIR
string
option env="NU_PKGS_ROOT"
default "../libraries/nu_packages"
source "$RTT_DIR/Kconfig"
source "$PKGS_DIR/Kconfig"
source "$NU_PKGS_DIR/Kconfig"
source "$BSP_DIR/board/Kconfig"

1
bsp/nuvoton/nk-980iot/board/Kconfig
View File

@ -113,5 +113,6 @@ menu "Hardware Drivers Config"
endmenu
source "$BSP_DIR/../libraries/nu_packages/Kconfig"
endmenu

1877
bsp/nuvoton/nk-980iot/project.uvproj
View File

File diff suppressed because it is too large Load Diff

1869
bsp/nuvoton/nk-980iot/project.uvprojx
View File

File diff suppressed because it is too large Load Diff

459
bsp/nuvoton/nk-980iot/rtconfig.h
View File

@ -1,459 +0,0 @@
#ifndef RT_CONFIG_H__
#define RT_CONFIG_H__
/* Automatically generated file; DO NOT EDIT. */
/* RT-Thread Configuration */
/* RT-Thread Kernel */
#define RT_NAME_MAX 16
#define RT_ALIGN_SIZE 4
#define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32
#define RT_TICK_PER_SECOND 1000
#define RT_USING_OVERFLOW_CHECK
#define RT_USING_HOOK
#define RT_HOOK_USING_FUNC_PTR
#define RT_USING_IDLE_HOOK
#define RT_IDLE_HOOK_LIST_SIZE 4
#define IDLE_THREAD_STACK_SIZE 2048
/* kservice optimization */
#define RT_DEBUG
#define RT_DEBUG_COLOR
/* Inter-Thread communication */
#define RT_USING_SEMAPHORE
#define RT_USING_MUTEX
#define RT_USING_EVENT
#define RT_USING_MAILBOX
#define RT_USING_MESSAGEQUEUE
#define RT_USING_SIGNALS
/* Memory Management */
#define RT_USING_MEMPOOL
#define RT_USING_SMALL_MEM
#define RT_USING_MEMHEAP
#define RT_MEMHEAP_FAST_MODE
#define RT_USING_SMALL_MEM_AS_HEAP
#define RT_USING_MEMTRACE
#define RT_USING_HEAP
/* Kernel Device Object */
#define RT_USING_DEVICE
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 256
#define RT_CONSOLE_DEVICE_NAME "uart0"
#define RT_VER_NUM 0x40100
#define ARCH_ARM
#define ARCH_ARM_ARM9
/* RT-Thread Components */
#define RT_USING_COMPONENTS_INIT
#define RT_USING_USER_MAIN
#define RT_MAIN_THREAD_STACK_SIZE 2048
#define RT_MAIN_THREAD_PRIORITY 10
/* C++ features */
/* Command shell */
#define RT_USING_FINSH
#define RT_USING_MSH
#define FINSH_USING_MSH
#define FINSH_THREAD_NAME "tshell"
#define FINSH_THREAD_PRIORITY 20
#define FINSH_THREAD_STACK_SIZE 4096
#define FINSH_USING_HISTORY
#define FINSH_HISTORY_LINES 5
#define FINSH_USING_SYMTAB
#define FINSH_CMD_SIZE 80
#define MSH_USING_BUILT_IN_COMMANDS
#define FINSH_USING_DESCRIPTION
#define FINSH_ARG_MAX 10
/* Device virtual file system */
#define RT_USING_DFS
#define DFS_USING_POSIX
#define DFS_USING_WORKDIR
#define DFS_FILESYSTEMS_MAX 16
#define DFS_FILESYSTEM_TYPES_MAX 16
#define DFS_FD_MAX 64
#define RT_USING_DFS_MNTTABLE
#define RT_USING_DFS_ELMFAT
/* elm-chan's FatFs, Generic FAT Filesystem Module */
#define RT_DFS_ELM_CODE_PAGE 437
#define RT_DFS_ELM_WORD_ACCESS
#define RT_DFS_ELM_USE_LFN_3
#define RT_DFS_ELM_USE_LFN 3
#define RT_DFS_ELM_LFN_UNICODE_0
#define RT_DFS_ELM_LFN_UNICODE 0
#define RT_DFS_ELM_MAX_LFN 255
#define RT_DFS_ELM_DRIVES 8
#define RT_DFS_ELM_MAX_SECTOR_SIZE 4096
#define RT_DFS_ELM_REENTRANT
#define RT_DFS_ELM_MUTEX_TIMEOUT 3000
#define RT_USING_DFS_DEVFS
/* Device Drivers */
#define RT_USING_DEVICE_IPC
#define RT_USING_SYSTEM_WORKQUEUE
#define RT_SYSTEM_WORKQUEUE_STACKSIZE 2048
#define RT_SYSTEM_WORKQUEUE_PRIORITY 23
#define RT_USING_SERIAL
#define RT_USING_SERIAL_V1
#define RT_SERIAL_USING_DMA
#define RT_SERIAL_RB_BUFSZ 2048
#define RT_USING_CAN
#define RT_CAN_USING_HDR
#define RT_USING_HWTIMER
#define RT_USING_CPUTIME
#define RT_USING_I2C
#define RT_USING_I2C_BITOPS
#define RT_USING_PIN
#define RT_USING_ADC
#define RT_USING_PWM
#define RT_USING_MTD_NAND
#define RT_MTD_NAND_DEBUG
#define RT_USING_RTC
#define RT_USING_ALARM
#define RT_USING_SPI
#define RT_USING_QSPI
#define RT_USING_WDT
#define RT_USING_AUDIO
#define RT_AUDIO_REPLAY_MP_BLOCK_SIZE 4096
#define RT_AUDIO_REPLAY_MP_BLOCK_COUNT 2
#define RT_AUDIO_RECORD_PIPE_SIZE 2048
#define RT_USING_TOUCH
#define RT_USING_HWCRYPTO
#define RT_HWCRYPTO_DEFAULT_NAME "hwcryto"
#define RT_HWCRYPTO_IV_MAX_SIZE 16
#define RT_HWCRYPTO_KEYBIT_MAX_SIZE 256
#define RT_HWCRYPTO_USING_AES
#define RT_HWCRYPTO_USING_AES_ECB
#define RT_HWCRYPTO_USING_AES_CBC
#define RT_HWCRYPTO_USING_AES_CFB
#define RT_HWCRYPTO_USING_AES_CTR
#define RT_HWCRYPTO_USING_AES_OFB
#define RT_HWCRYPTO_USING_SHA1
#define RT_HWCRYPTO_USING_SHA2
#define RT_HWCRYPTO_USING_SHA2_224
#define RT_HWCRYPTO_USING_SHA2_256
#define RT_HWCRYPTO_USING_SHA2_384
#define RT_HWCRYPTO_USING_SHA2_512
#define RT_HWCRYPTO_USING_RNG
/* Using USB */
#define RT_USING_USB
#define RT_USING_USB_HOST
#define RT_USBH_MSTORAGE
#define UDISK_MOUNTPOINT "/mnt/udisk"
#define RT_USING_USB_DEVICE
#define RT_USBD_THREAD_STACK_SZ 4096
#define USB_VENDOR_ID 0x0FFE
#define USB_PRODUCT_ID 0x0001
#define RT_USB_DEVICE_COMPOSITE
#define RT_USB_DEVICE_CDC
#define RT_USB_DEVICE_NONE
#define RT_USB_DEVICE_MSTORAGE
#define RT_VCOM_TASK_STK_SIZE 2048
#define RT_CDC_RX_BUFSIZE 128
#define RT_VCOM_SERNO "32021919830108"
#define RT_VCOM_SER_LEN 14
#define RT_VCOM_TX_TIMEOUT 1000
#define RT_USB_MSTORAGE_DISK_NAME "ramdisk1"
/* POSIX layer and C standard library */
#define RT_LIBC_DEFAULT_TIMEZONE 8
/* POSIX (Portable Operating System Interface) layer */
#define RT_USING_POSIX_FS
#define RT_USING_POSIX_POLL
#define RT_USING_POSIX_SELECT
/* Interprocess Communication (IPC) */
/* Socket is in the 'Network' category */
/* Network */
/* Socket abstraction layer */
#define RT_USING_SAL
/* protocol stack implement */
#define SAL_USING_LWIP
#define SAL_USING_POSIX
/* Network interface device */
#define RT_USING_NETDEV
#define NETDEV_USING_IFCONFIG
#define NETDEV_USING_PING
#define NETDEV_USING_NETSTAT
#define NETDEV_USING_AUTO_DEFAULT
#define NETDEV_IPV4 1
#define NETDEV_IPV6 0
/* light weight TCP/IP stack */
#define RT_USING_LWIP
#define RT_USING_LWIP212
#define RT_LWIP_MEM_ALIGNMENT 4
#define RT_LWIP_IGMP
#define RT_LWIP_ICMP
#define RT_LWIP_DNS
#define RT_LWIP_DHCP
#define IP_SOF_BROADCAST 1
#define IP_SOF_BROADCAST_RECV 1
/* Static IPv4 Address */
#define RT_LWIP_IPADDR "192.168.31.55"
#define RT_LWIP_GWADDR "192.168.31.1"
#define RT_LWIP_MSKADDR "255.255.255.0"
#define RT_LWIP_UDP
#define RT_LWIP_TCP
#define RT_LWIP_RAW
#define RT_MEMP_NUM_NETCONN 16
#define RT_LWIP_PBUF_NUM 256
#define RT_LWIP_RAW_PCB_NUM 16
#define RT_LWIP_UDP_PCB_NUM 16
#define RT_LWIP_TCP_PCB_NUM 16
#define RT_LWIP_TCP_SEG_NUM 64
#define RT_LWIP_TCP_SND_BUF 16384
#define RT_LWIP_TCP_WND 65535
#define RT_LWIP_TCPTHREAD_PRIORITY 10
#define RT_LWIP_TCPTHREAD_MBOX_SIZE 256
#define RT_LWIP_TCPTHREAD_STACKSIZE 4096
#define RT_LWIP_ETHTHREAD_PRIORITY 12
#define RT_LWIP_ETHTHREAD_STACKSIZE 4096
#define RT_LWIP_ETHTHREAD_MBOX_SIZE 256
#define RT_LWIP_REASSEMBLY_FRAG
#define LWIP_NETIF_STATUS_CALLBACK 1
#define LWIP_NETIF_LINK_CALLBACK 1
#define SO_REUSE 1
#define LWIP_SO_RCVTIMEO 1
#define LWIP_SO_SNDTIMEO 1
#define LWIP_SO_RCVBUF 1
#define LWIP_SO_LINGER 0
#define RT_LWIP_NETIF_LOOPBACK
#define LWIP_NETIF_LOOPBACK 1
#define RT_LWIP_STATS
#define RT_LWIP_USING_PING
/* AT commands */
/* VBUS(Virtual Software BUS) */
/* Utilities */
#define RT_USING_UTEST
#define UTEST_THR_STACK_SIZE 4096
#define UTEST_THR_PRIORITY 20
/* RT-Thread Utestcases */
/* RT-Thread online packages */
/* IoT - internet of things */
/* Wi-Fi */
/* Marvell WiFi */
/* Wiced WiFi */
#define PKG_USING_NETUTILS
#define PKG_NETUTILS_TFTP
#define PKG_NETUTILS_IPERF
#define PKG_NETUTILS_NTP
#define NTP_USING_AUTO_SYNC
#define NTP_AUTO_SYNC_FIRST_DELAY 30
#define NTP_AUTO_SYNC_PERIOD 3600
#define NETUTILS_NTP_HOSTNAME "0.tw.pool.ntp.org"
#define NETUTILS_NTP_HOSTNAME2 "1.tw.pool.ntp.org"
#define NETUTILS_NTP_HOSTNAME3 "2.tw.pool.ntp.org"
#define PKG_USING_NETUTILS_V131
#define PKG_NETUTILS_VER_NUM 0x10301
/* IoT Cloud */
/* security packages */
/* language packages */
/* multimedia packages */
/* LVGL: powerful and easy-to-use embedded GUI library */
#define PKG_USING_LVGL
#define PKG_USING_LVGL_V810
#define PKG_LVGL_VER_NUM 0x08010
#define PKG_USING_LV_MUSIC_DEMO
/* u8g2: a monochrome graphic library */
#define PKG_USING_WAVPLAYER
#define PKG_WP_USING_PLAY
#define PKG_WP_PLAY_DEVICE "sound0"
#define PKG_WP_USING_RECORD
#define PKG_WP_RECORD_DEVICE "sound0"
#define PKG_USING_WAVPLAYER_LATEST_VERSION
/* PainterEngine: A cross-platform graphics application framework written in C language */
/* tools packages */
/* system packages */
/* enhanced kernel services */
/* POSIX extension functions */
/* acceleration: Assembly language or algorithmic acceleration packages */
/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
/* Micrium: Micrium software products porting for RT-Thread */
#define PKG_USING_DFS_UFFS
#define RT_USING_DFS_UFFS
#define RT_UFFS_ECC_MODE_3
#define RT_UFFS_ECC_MODE 3
#define PKG_USING_DFS_UFFS_LATEST_VERSION
#define PKG_USING_RAMDISK
#define PKG_USING_RAMDISK_LATEST_VERSION
/* peripheral libraries and drivers */
/* AI packages */
/* miscellaneous packages */
/* samples: kernel and components samples */
/* entertainment: terminal games and other interesting software packages */
#define PKG_USING_OPTPARSE
#define PKG_USING_OPTPARSE_LATEST_VERSION
/* Nuvoton Packages Config */
#define NU_PKG_USING_UTILS
#define NU_PKG_USING_DEMO
#define NU_PKG_USING_NAU8822
#define NU_PKG_USING_ILI9341
#define NU_PKG_USING_ILI9341_SPI
#define NU_PKG_ILI9341_WITH_OFFSCREEN_FRAMEBUFFER
#define NU_PKG_ILI9341_HORIZONTAL
#define NU_PKG_USING_SPINAND
/* Hardware Drivers Config */
/* On-chip Peripheral Drivers */
#define SOC_SERIES_NUC980
#define BSP_USE_STDDRIVER_SOURCE
#define BSP_USING_MMU
#define BSP_USING_PDMA
#define NU_PDMA_MEMFUN_ACTOR_MAX 2
#define BSP_USING_GPIO
#define BSP_USING_EMAC
#define BSP_USING_EMAC0
#define BSP_USING_RTC
#define NU_RTC_SUPPORT_IO_RW
#define NU_RTC_SUPPORT_MSH_CMD
#define BSP_USING_ADC
#define BSP_USING_TMR
#define BSP_USING_TIMER
#define BSP_USING_TMR0
#define BSP_USING_TIMER0
#define BSP_USING_TMR1
#define BSP_USING_TIMER1
#define BSP_USING_TMR2
#define BSP_USING_TIMER2
#define BSP_USING_TMR3
#define BSP_USING_TIMER3
#define BSP_USING_TMR4
#define BSP_USING_TIMER4
#define BSP_USING_UART
#define BSP_USING_UART0
#define BSP_USING_UART1
#define BSP_USING_UART1_TX_DMA
#define BSP_USING_UART1_RX_DMA
#define BSP_USING_I2C
#define BSP_USING_I2C0
#define BSP_USING_I2C2
#define BSP_USING_SDH
#define BSP_USING_SDH1
#define NU_SDH_USING_PDMA
#define NU_SDH_HOTPLUG
#define BSP_USING_PWM
#define BSP_USING_PWM0
#define BSP_USING_SPI
#define BSP_USING_SPI_PDMA
#define BSP_USING_SPI0
#define BSP_USING_SPI0_PDMA
#define BSP_USING_SPI1_NONE
#define BSP_USING_I2S
#define NU_I2S_DMA_FIFO_SIZE 4096
#define BSP_USING_QSPI
#define BSP_USING_QSPI_PDMA
#define BSP_USING_QSPI0
#define BSP_USING_QSPI0_PDMA
#define BSP_USING_CRYPTO
#define BSP_USING_WDT
#define BSP_USING_USBD
#define BSP_USING_USBH
/* On-board Peripheral Drivers */
#define BSP_USING_CONSOLE
#define BOARD_USING_IP101GR
#define BOARD_USING_NAU8822
#define BOARD_USING_STORAGE_SDCARD
#define BOARD_USING_STORAGE_SPINAND
#define BOARD_USING_USB0_DEVICE_HOST
#define BOARD_USING_USB1_HOST
/* Board extended module drivers */
#define BOARD_USING_LCD_ILI9341
#define BOARD_USING_ILI9341_PIN_BACKLIGHT 103
#define BOARD_USING_ILI9341_PIN_RESET 90
#define BOARD_USING_ILI9341_PIN_DC 89
#endif

36
bsp/nuvoton/nk-n9h30/.config
View File

@ -744,6 +744,7 @@ CONFIG_PKG_RAMDISK_VER="latest"
# CONFIG_PKG_USING_SSD1306 is not set
# CONFIG_PKG_USING_QKEY is not set
# CONFIG_PKG_USING_RS485 is not set
# CONFIG_PKG_USING_RS232 is not set
# CONFIG_PKG_USING_NES is not set
# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set
# CONFIG_PKG_USING_VDEVICE is not set
@ -832,19 +833,6 @@ CONFIG_PKG_RAMDISK_VER="latest"
# CONFIG_PKG_USING_STATE_MACHINE is not set
# CONFIG_PKG_USING_DESIGN_PATTERN is not set
#
# Nuvoton Packages Config
#
CONFIG_NU_PKG_USING_UTILS=y
# CONFIG_NU_PKG_USING_DEMO is not set
# CONFIG_NU_PKG_USING_BMX055 is not set
# CONFIG_NU_PKG_USING_MAX31875 is not set
# CONFIG_NU_PKG_USING_NAU88L25 is not set
CONFIG_NU_PKG_USING_NAU8822=y
# CONFIG_NU_PKG_USING_DA9062 is not set
# CONFIG_NU_PKG_USING_ILI9341 is not set
# CONFIG_NU_PKG_USING_SPINAND is not set
#
# Hardware Drivers Config
#
@ -929,6 +917,7 @@ CONFIG_BSP_USING_VPOST=y
# CONFIG_LCM_USING_LSA40AT9001 is not set
CONFIG_LCM_USING_FW070TFT=y
# CONFIG_LCM_USING_FW043TFT is not set
# CONFIG_LCM_USING_FW070TFT_WSVGA is not set
CONFIG_VPOST_USING_LCD_IDX=3
CONFIG_BSP_LCD_BPP=32
CONFIG_BSP_LCD_WIDTH=800
@ -946,10 +935,29 @@ CONFIG_BOARD_USING_NAU8822=y
CONFIG_BOARD_USING_STORAGE_SDCARD=y
CONFIG_BOARD_USING_STORAGE_SPIFLASH=y
CONFIG_BOARD_USING_BUZZER=y
CONFIG_BOARD_USING_LCM=y
CONFIG_BOARD_USING_USB0_DEVICE_HOST=y
CONFIG_BOARD_USING_USB1_HOST=y
#
# Board extended module drivers
#
CONFIG_BOARD_USING_LCM_FW070TFT_WVGA=y
# CONFIG_BOARD_USING_LCM_FW043TFT_HVGA is not set
# CONFIG_BOARD_USING_LCM_FW070TFT_WSVGA is not set
CONFIG_BOARD_USING_ADCTOUCH=y
# CONFIG_BOARD_USING_GT911 is not set
#
# Nuvoton Packages Config
#
CONFIG_NU_PKG_USING_UTILS=y
# CONFIG_NU_PKG_USING_DEMO is not set
# CONFIG_NU_PKG_USING_BMX055 is not set
# CONFIG_NU_PKG_USING_MAX31875 is not set
# CONFIG_NU_PKG_USING_NAU88L25 is not set
CONFIG_NU_PKG_USING_NAU8822=y
# CONFIG_NU_PKG_USING_DA9062 is not set
# CONFIG_NU_PKG_USING_ILI9341 is not set
# CONFIG_NU_PKG_USING_SPINAND is not set
CONFIG_BOARD_USE_UTEST=y
CONFIG_UTEST_CMD_PREFIX="bsp.nuvoton.nk-n9h30.test.utest."

6
bsp/nuvoton/nk-n9h30/Kconfig
View File

@ -18,12 +18,6 @@ config PKGS_DIR
option env="PKGS_ROOT"
default "packages"
config NU_PKGS_DIR
string
option env="NU_PKGS_ROOT"
default "../libraries/nu_packages"
source "$RTT_DIR/Kconfig"
source "$PKGS_DIR/Kconfig"
source "$NU_PKGS_DIR/Kconfig"
source "$BSP_DIR/board/Kconfig"

61
bsp/nuvoton/nk-n9h30/applications/lvgl/lv_port_disp.c
View File

@ -26,9 +26,30 @@ static lv_disp_drv_t disp_drv; /*Descriptor of a display driver*/
static void *buf3_next = RT_NULL;
static uint32_t u32FirstFlush = 0;
static void nu_antitearing(lv_disp_draw_buf_t *draw_buf, lv_color_t *color_p)
{
if (buf3_next)
{
/* vsync-none: Use triple screen-sized buffers. */
if (draw_buf->buf1 == color_p)
draw_buf->buf1 = buf3_next;
else
draw_buf->buf2 = buf3_next;
draw_buf->buf_act = buf3_next;
buf3_next = color_p;
}
else
{
/* vsync-after: Use ping-pong screen-sized buffers only.*/
rt_device_control(lcd_device, RTGRAPHIC_CTRL_WAIT_VSYNC, RT_NULL);
}
}
static void nu_flush_direct(lv_disp_drv_t *disp_drv, const lv_area_t *area, lv_color_t *color_p)
{
lv_disp_t *psDisp = _lv_refr_get_disp_refreshing();
void *pvDstReDraw;
#if (LV_USE_GPU_N9H30_GE2D==0)
@ -55,8 +76,14 @@ static void nu_flush_direct(lv_disp_drv_t *disp_drv, const lv_area_t *area, lv_c
mmu_invalidate_dcache((uint32_t)pvDstReDraw, disp_drv->draw_buf->size * sizeof(lv_color_t));
#endif
/* WAIT_VSYNC */
rt_device_control(lcd_device, RTGRAPHIC_CTRL_WAIT_VSYNC, RT_NULL);
nu_antitearing(disp_drv->draw_buf, color_p);
if (!u32FirstFlush)
{
/* Enable backlight at first flushing. */
rt_device_control(lcd_device, RTGRAPHIC_CTRL_POWERON, RT_NULL);
u32FirstFlush = 1;
}
lv_disp_flush_ready(disp_drv);
}
@ -70,21 +97,13 @@ static void nu_flush_full_refresh(lv_disp_drv_t *disp_drv, const lv_area_t *area
/* Use PANDISPLAY without H/W copying */
rt_device_control(lcd_device, RTGRAPHIC_CTRL_PAN_DISPLAY, color_p);
if (buf3_next)
{
/* vsync-none: Use triple screen-sized buffers. */
if (disp_drv->draw_buf->buf1 == color_p)
disp_drv->draw_buf->buf1 = buf3_next;
else
disp_drv->draw_buf->buf2 = buf3_next;
nu_antitearing(disp_drv->draw_buf, color_p);
disp_drv->draw_buf->buf_act = buf3_next;
buf3_next = color_p;
}
else
if (!u32FirstFlush)
{
/* vsync-after: Use ping-pong screen-sized buffers only.*/
rt_device_control(lcd_device, RTGRAPHIC_CTRL_WAIT_VSYNC, RT_NULL);
/* Enable backlight at first flushing. */
rt_device_control(lcd_device, RTGRAPHIC_CTRL_POWERON, RT_NULL);
u32FirstFlush = 1;
}
lv_disp_flush_ready(disp_drv);
@ -106,6 +125,13 @@ static void nu_flush(lv_disp_drv_t *disp_drv, const lv_area_t *area, lv_color_t
ge2dSpriteBlt_Screen(area->x1, area->y1, flush_area_w, flush_area_h, (void *)color_p);
// -> Leave GE2D
if (!u32FirstFlush)
{
/* Enable backlight at first flushing. */
rt_device_control(lcd_device, RTGRAPHIC_CTRL_POWERON, RT_NULL);
u32FirstFlush = 1;
}
lv_disp_flush_ready(disp_drv);
}
@ -188,6 +214,9 @@ void lv_port_disp_init(void)
return;
}
/* Disable backlight at startup. */
rt_device_control(lcd_device, RTGRAPHIC_CTRL_POWEROFF, RT_NULL);
RT_ASSERT(info.bits_per_pixel == 8 || info.bits_per_pixel == 16 ||
info.bits_per_pixel == 24 || info.bits_per_pixel == 32);

53
bsp/nuvoton/nk-n9h30/board/Kconfig
View File

@ -45,12 +45,6 @@ menu "Hardware Drivers Config"
select BSP_USING_PWM0
default n
config BOARD_USING_LCM
bool "NuDesign TFT-LCD7(over vpost)"
select BSP_USING_VPOST
select LCM_USING_FW070TFT
default y
config BOARD_USING_USB0_DEVICE_HOST
select BSP_USING_USBH
select BSP_USING_USBD
@ -69,7 +63,54 @@ menu "Hardware Drivers Config"
menu "Board extended module drivers"
choice
prompt "Select LCD panel devices.(Over VPOST)"
config BOARD_USING_LCM_FW070TFT_WVGA
bool "NuDesign TFT-LCD7-WVGA"
select BSP_USING_VPOST
select LCM_USING_FW070TFT
default y
help
Choose this option if you use 7" 800x480x32b LCD panel.
config BOARD_USING_LCM_FW043TFT_HVGA
bool "NuDesign TFT-LCD43-HVGA"
select BSP_USING_VPOST
select LCM_USING_FW043TFT
help
Choose this option if you use 4.3" 480x272x32b LCD panel.
config BOARD_USING_LCM_FW070TFT_WSVGA
bool "NuDesign TFT-LCD7-WSVGA"
select BSP_USING_VPOST
select LCM_USING_FW070TFT_WSVGA
help
Choose this option if you use 7" 1024x600x32b LCD panel.
endchoice
choice
prompt "Select Touch devices."
config BOARD_USING_ADCTOUCH
bool "ADC touching"
select BSP_USING_ADC_TOUCH
default y
help
Choose this option if you use internal ADC touching function.
config BOARD_USING_GT911
bool "GT911 TSC"
select BSP_USING_I2C
select BSP_USING_I2C0
select PKG_USING_GT911
help
Choose this option if you use GT911 external TSC touching function.
endchoice
endmenu
source "$BSP_DIR/../libraries/nu_packages/Kconfig"
endmenu

61
bsp/nuvoton/nk-n9h30/board/board_dev.c
View File

@ -173,6 +173,34 @@ int rt_hw_nau8822_port(void)
INIT_COMPONENT_EXPORT(rt_hw_nau8822_port);
#endif /* BOARD_USING_NAU8822 */
//#if defined(BOARD_USING_GT911) && defined(PKG_USING_GT911)
#if defined(PKG_USING_GT911)
#include "drv_gpio.h"
#include "gt911.h"
#define GT911_RST_PIN NU_GET_PININDEX(NU_PG, 4)
#define GT911_IRQ_PIN NU_GET_PININDEX(NU_PG, 5)
extern int gt911_sample(const char *name, rt_uint16_t x, rt_uint16_t y);
int rt_hw_gt911_port(void)
{
struct rt_touch_config cfg;
rt_uint8_t rst_pin;
rst_pin = GT911_RST_PIN;
cfg.dev_name = "i2c0";
cfg.irq_pin.pin = GT911_IRQ_PIN;
cfg.irq_pin.mode = PIN_MODE_INPUT_PULLDOWN;
cfg.user_data = &rst_pin;
rt_hw_gt911_init("gt911", &cfg);
gt911_sample("gt911", BSP_LCD_WIDTH, BSP_LCD_HEIGHT);
return 0;
}
INIT_ENV_EXPORT(rt_hw_gt911_port);
#endif /* if defined(BOARD_USING_GT911) && defined(PKG_USING_GT911) */
#if defined(BOARD_USING_BUZZER)
#define PWM_DEV_NAME "pwm0"
@ -227,10 +255,11 @@ static void PlayRingTone(void)
#define LCM_BLEN NU_GET_PININDEX(NU_PH, 3)
#endif
#define PWM_DEV_NAME "pwm0"
#define LCM_PWM_CHANNEL (0)
#define PWM_DEV_NAME "pwm0"
#define LCM_PWM_CHANNEL (0)
#define LCM_BACKLIGHT_CTRL NU_GET_PININDEX(NU_PH, 3)
static void LCMLightOn(void)
void nu_lcd_backlight_on(void)
{
struct rt_device_pwm *pwm_dev;
@ -243,10 +272,27 @@ static void LCMLightOn(void)
{
rt_kprintf("Can't find %s\n", PWM_DEV_NAME);
}
rt_pin_mode(LCM_BACKLIGHT_CTRL, PIN_MODE_OUTPUT);
rt_pin_write(LCM_BACKLIGHT_CTRL, PIN_HIGH);
}
void nu_lcd_backlight_off(void)
{
struct rt_device_pwm *pwm_dev;
if ((pwm_dev = (struct rt_device_pwm *)rt_device_find(PWM_DEV_NAME)) != RT_NULL)
{
rt_pwm_disable(pwm_dev, LCM_PWM_CHANNEL);
}
else
{
rt_kprintf("Can't find %s\n", PWM_DEV_NAME);
}
rt_pin_mode(LCM_BACKLIGHT_CTRL, PIN_MODE_OUTPUT);
rt_pin_write(LCM_BACKLIGHT_CTRL, PIN_LOW);
}
#ifdef FINSH_USING_MSH
MSH_CMD_EXPORT(LCMLightOn, LCM - light on panel);
#endif
int rt_hw_lcm_port(void)
{
@ -259,9 +305,6 @@ int rt_hw_lcm_port(void)
}
#endif
/* Use PWM to control backlight. */
LCMLightOn();
return 0;
}
INIT_COMPONENT_EXPORT(rt_hw_lcm_port);

1791
bsp/nuvoton/nk-n9h30/project.uvproj
View File

File diff suppressed because it is too large Load Diff

1783
bsp/nuvoton/nk-n9h30/project.uvprojx
View File

File diff suppressed because it is too large Load Diff

422
bsp/nuvoton/nk-n9h30/rtconfig.h
View File

@ -1,422 +0,0 @@
#ifndef RT_CONFIG_H__
#define RT_CONFIG_H__
/* Automatically generated file; DO NOT EDIT. */
/* RT-Thread Configuration */
/* RT-Thread Kernel */
#define RT_NAME_MAX 16
#define RT_ALIGN_SIZE 4
#define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32
#define RT_TICK_PER_SECOND 1000
#define RT_USING_OVERFLOW_CHECK
#define RT_USING_HOOK
#define RT_HOOK_USING_FUNC_PTR
#define RT_USING_IDLE_HOOK
#define RT_IDLE_HOOK_LIST_SIZE 4
#define IDLE_THREAD_STACK_SIZE 2048
/* kservice optimization */
#define RT_DEBUG
#define RT_DEBUG_COLOR
/* Inter-Thread communication */
#define RT_USING_SEMAPHORE
#define RT_USING_MUTEX
#define RT_USING_EVENT
#define RT_USING_MAILBOX
#define RT_USING_MESSAGEQUEUE
#define RT_USING_SIGNALS
/* Memory Management */
#define RT_USING_MEMPOOL
#define RT_USING_SMALL_MEM
#define RT_USING_MEMHEAP
#define RT_MEMHEAP_FAST_MODE
#define RT_USING_SMALL_MEM_AS_HEAP
#define RT_USING_MEMTRACE
#define RT_USING_HEAP
/* Kernel Device Object */
#define RT_USING_DEVICE
#define RT_USING_INTERRUPT_INFO
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 256
#define RT_CONSOLE_DEVICE_NAME "uart0"
#define RT_VER_NUM 0x40100
#define ARCH_ARM
#define ARCH_ARM_ARM9
/* RT-Thread Components */
#define RT_USING_COMPONENTS_INIT
#define RT_USING_USER_MAIN
#define RT_MAIN_THREAD_STACK_SIZE 2048
#define RT_MAIN_THREAD_PRIORITY 10
/* C++ features */
/* Command shell */
#define RT_USING_FINSH
#define RT_USING_MSH
#define FINSH_USING_MSH
#define FINSH_THREAD_NAME "tshell"
#define FINSH_THREAD_PRIORITY 20
#define FINSH_THREAD_STACK_SIZE 4096
#define FINSH_USING_HISTORY
#define FINSH_HISTORY_LINES 5
#define FINSH_USING_SYMTAB
#define FINSH_CMD_SIZE 80
#define MSH_USING_BUILT_IN_COMMANDS
#define FINSH_USING_DESCRIPTION
#define FINSH_ARG_MAX 10
/* Device virtual file system */
#define RT_USING_DFS
#define DFS_USING_POSIX
#define DFS_USING_WORKDIR
#define DFS_FILESYSTEMS_MAX 16
#define DFS_FILESYSTEM_TYPES_MAX 16
#define DFS_FD_MAX 64
#define RT_USING_DFS_MNTTABLE
#define RT_USING_DFS_ELMFAT
/* elm-chan's FatFs, Generic FAT Filesystem Module */
#define RT_DFS_ELM_CODE_PAGE 437
#define RT_DFS_ELM_WORD_ACCESS
#define RT_DFS_ELM_USE_LFN_3
#define RT_DFS_ELM_USE_LFN 3
#define RT_DFS_ELM_LFN_UNICODE_0
#define RT_DFS_ELM_LFN_UNICODE 0
#define RT_DFS_ELM_MAX_LFN 255
#define RT_DFS_ELM_DRIVES 8
#define RT_DFS_ELM_MAX_SECTOR_SIZE 4096
#define RT_DFS_ELM_REENTRANT
#define RT_DFS_ELM_MUTEX_TIMEOUT 3000
#define RT_USING_DFS_DEVFS
/* Device Drivers */
#define RT_USING_DEVICE_IPC
#define RT_USING_SYSTEM_WORKQUEUE
#define RT_SYSTEM_WORKQUEUE_STACKSIZE 2048
#define RT_SYSTEM_WORKQUEUE_PRIORITY 23
#define RT_USING_SERIAL
#define RT_USING_SERIAL_V1
#define RT_SERIAL_RB_BUFSZ 2048
#define RT_USING_CAN
#define RT_USING_HWTIMER
#define RT_USING_I2C
#define RT_USING_I2C_BITOPS
#define RT_USING_PIN
#define RT_USING_ADC
#define RT_USING_PWM
#define RT_USING_RTC
#define RT_USING_ALARM
#define RT_USING_SPI
#define RT_USING_QSPI
#define RT_USING_SFUD
#define RT_SFUD_USING_SFDP
#define RT_SFUD_USING_FLASH_INFO_TABLE
#define RT_SFUD_USING_QSPI
#define RT_SFUD_SPI_MAX_HZ 50000000
#define RT_USING_WDT
#define RT_USING_AUDIO
#define RT_AUDIO_REPLAY_MP_BLOCK_SIZE 4096
#define RT_AUDIO_REPLAY_MP_BLOCK_COUNT 2
#define RT_AUDIO_RECORD_PIPE_SIZE 2048
#define RT_USING_TOUCH
#define RT_USING_INPUT_CAPTURE
#define RT_INPUT_CAPTURE_RB_SIZE 100
/* Using USB */
#define RT_USING_USB
#define RT_USING_USB_HOST
#define RT_USBH_MSTORAGE
#define UDISK_MOUNTPOINT "/mnt/udisk"
#define RT_USING_USB_DEVICE
#define RT_USBD_THREAD_STACK_SZ 4096
#define USB_VENDOR_ID 0x0FFE
#define USB_PRODUCT_ID 0x0001
#define RT_USB_DEVICE_COMPOSITE
#define RT_USB_DEVICE_CDC
#define RT_USB_DEVICE_NONE
#define RT_USB_DEVICE_MSTORAGE
#define RT_VCOM_TASK_STK_SIZE 512
#define RT_CDC_RX_BUFSIZE 128
#define RT_VCOM_SERNO "32021919830108"
#define RT_VCOM_SER_LEN 14
#define RT_VCOM_TX_TIMEOUT 1000
#define RT_USB_MSTORAGE_DISK_NAME "ramdisk1"
/* POSIX layer and C standard library */
#define RT_LIBC_DEFAULT_TIMEZONE 8
/* POSIX (Portable Operating System Interface) layer */
#define RT_USING_POSIX_FS
#define RT_USING_POSIX_DEVIO
#define RT_USING_POSIX_POLL
#define RT_USING_POSIX_SELECT
/* Interprocess Communication (IPC) */
/* Socket is in the 'Network' category */
/* Network */
/* Socket abstraction layer */
#define RT_USING_SAL
#define SAL_INTERNET_CHECK
/* protocol stack implement */
#define SAL_USING_LWIP
#define SAL_USING_POSIX
/* Network interface device */
#define RT_USING_NETDEV
#define NETDEV_USING_IFCONFIG
#define NETDEV_USING_PING
#define NETDEV_USING_NETSTAT
#define NETDEV_USING_AUTO_DEFAULT
#define NETDEV_IPV4 1
#define NETDEV_IPV6 0
/* light weight TCP/IP stack */
#define RT_USING_LWIP
#define RT_USING_LWIP202
#define RT_LWIP_MEM_ALIGNMENT 4
#define RT_LWIP_IGMP
#define RT_LWIP_ICMP
#define RT_LWIP_DNS
#define RT_LWIP_DHCP
#define IP_SOF_BROADCAST 1
#define IP_SOF_BROADCAST_RECV 1
/* Static IPv4 Address */
#define RT_LWIP_IPADDR "192.168.1.30"
#define RT_LWIP_GWADDR "192.168.1.1"
#define RT_LWIP_MSKADDR "255.255.255.0"
#define RT_LWIP_UDP
#define RT_LWIP_TCP
#define RT_LWIP_RAW
#define RT_MEMP_NUM_NETCONN 32
#define RT_LWIP_PBUF_NUM 256
#define RT_LWIP_RAW_PCB_NUM 32
#define RT_LWIP_UDP_PCB_NUM 32
#define RT_LWIP_TCP_PCB_NUM 32
#define RT_LWIP_TCP_SEG_NUM 256
#define RT_LWIP_TCP_SND_BUF 32768
#define RT_LWIP_TCP_WND 10240
#define RT_LWIP_TCPTHREAD_PRIORITY 10
#define RT_LWIP_TCPTHREAD_MBOX_SIZE 32
#define RT_LWIP_TCPTHREAD_STACKSIZE 4096
#define RT_LWIP_ETHTHREAD_PRIORITY 12
#define RT_LWIP_ETHTHREAD_STACKSIZE 1024
#define RT_LWIP_ETHTHREAD_MBOX_SIZE 32
#define LWIP_NETIF_STATUS_CALLBACK 1
#define LWIP_NETIF_LINK_CALLBACK 1
#define SO_REUSE 1
#define LWIP_SO_RCVTIMEO 1
#define LWIP_SO_SNDTIMEO 1
#define LWIP_SO_RCVBUF 1
#define LWIP_SO_LINGER 0
#define RT_LWIP_NETIF_LOOPBACK
#define LWIP_NETIF_LOOPBACK 1
#define RT_LWIP_STATS
#define RT_LWIP_USING_PING
/* AT commands */
/* VBUS(Virtual Software BUS) */
/* Utilities */
#define RT_USING_UTEST
#define UTEST_THR_STACK_SIZE 4096
#define UTEST_THR_PRIORITY 20
/* RT-Thread Utestcases */
/* RT-Thread online packages */
/* IoT - internet of things */
/* Wi-Fi */
/* Marvell WiFi */
/* Wiced WiFi */
/* IoT Cloud */
/* security packages */
/* language packages */
/* multimedia packages */
/* LVGL: powerful and easy-to-use embedded GUI library */
#define PKG_USING_LVGL
#define PKG_USING_LVGL_V810
#define PKG_LVGL_VER_NUM 0x08010
#define PKG_USING_LV_MUSIC_DEMO
/* u8g2: a monochrome graphic library */
/* PainterEngine: A cross-platform graphics application framework written in C language */
/* tools packages */
/* system packages */
/* enhanced kernel services */
/* POSIX extension functions */
/* acceleration: Assembly language or algorithmic acceleration packages */
/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
/* Micrium: Micrium software products porting for RT-Thread */
#define PKG_USING_FAL
#define FAL_DEBUG_CONFIG
#define FAL_DEBUG 1
#define FAL_PART_HAS_TABLE_CFG
#define FAL_USING_SFUD_PORT
#define FAL_USING_NOR_FLASH_DEV_NAME "norflash0"
#define PKG_USING_FAL_LATEST_VERSION
#define PKG_FAL_VER_NUM 0x99999
#define PKG_USING_RAMDISK
#define PKG_USING_RAMDISK_LATEST_VERSION
/* peripheral libraries and drivers */
/* AI packages */
/* miscellaneous packages */
/* samples: kernel and components samples */
/* entertainment: terminal games and other interesting software packages */
/* Nuvoton Packages Config */
#define NU_PKG_USING_UTILS
#define NU_PKG_USING_NAU8822
/* Hardware Drivers Config */
/* On-chip Peripheral Drivers */
#define SOC_SERIES_N9H30
#define BSP_USING_MMU
#define BSP_USING_GPIO
#define BSP_USING_EMAC
#define BSP_USING_EMAC0
#define BSP_USING_EMAC1
#define BSP_USING_RTC
#define BSP_USING_ADC
#define BSP_USING_ADC_TOUCH
#define BSP_USING_ETMR
#define BSP_USING_ETIMER
#define BSP_USING_ETIMER_CAPTURE
#define BSP_USING_ETMR0
#define BSP_USING_ETIMER0
#define BSP_USING_ETMR1
#define BSP_USING_ETIMER1
#define BSP_USING_ETMR2
#define BSP_USING_ETIMER2_CAPTURE
#define BSP_USING_ETMR3
#define BSP_USING_ETIMER3_CAPTURE
#define BSP_USING_TMR
#define BSP_USING_TIMER
#define BSP_USING_TIMER0
#define BSP_USING_TIMER1
#define BSP_USING_TIMER2
#define BSP_USING_TIMER3
#define BSP_USING_UART
#define BSP_USING_UART0
#define BSP_USING_I2C
#define BSP_USING_I2C0
#define BSP_USING_SDH
#define BSP_USING_SDH0
#define BSP_USING_SDH1
#define NU_SDH_HOTPLUG
#define BSP_USING_CAN
#define BSP_USING_CAN0
#define BSP_USING_PWM
#define BSP_USING_PWM0
#define BSP_USING_QSPI
#define BSP_USING_QSPI0
#define BSP_USING_QSPI1_NONE
#define BSP_USING_I2S
#define NU_I2S_DMA_FIFO_SIZE 2048
#define BSP_USING_WDT
#define BSP_USING_EBI
#define BSP_USING_VPOST
#define LCM_USING_FW070TFT
#define VPOST_USING_LCD_IDX 3
#define BSP_LCD_BPP 32
#define BSP_LCD_WIDTH 800
#define BSP_LCD_HEIGHT 480
#define BSP_USING_VPOST_OSD
#define BSP_USING_USBD
#define BSP_USING_USBH
/* On-board Peripheral Drivers */
#define BSP_USING_CONSOLE
#define BOARD_USING_IP101GR
#define BOARD_USING_NAU8822
#define BOARD_USING_STORAGE_SDCARD
#define BOARD_USING_STORAGE_SPIFLASH
#define BOARD_USING_BUZZER
#define BOARD_USING_LCM
#define BOARD_USING_USB0_DEVICE_HOST
#define BOARD_USING_USB1_HOST
/* Board extended module drivers */
#endif

2
bsp/nuvoton/nk-rtu980/.config
View File

@ -974,3 +974,5 @@ CONFIG_BOARD_USING_USB0_DEVICE_HOST=y
# Board extended module drivers
#
CONFIG_BOARD_USING_IP101GR=y
CONFIG_BOARD_USE_UTEST=y
CONFIG_UTEST_CMD_PREFIX="bsp.nuvoton.nk-rtu980.test.utest."

6
bsp/nuvoton/nk-rtu980/Kconfig
View File

@ -18,12 +18,6 @@ config PKGS_DIR
option env="PKGS_ROOT"
default "packages"
config NU_PKGS_DIR
string
option env="NU_PKGS_ROOT"
default "../libraries/nu_packages"
source "$RTT_DIR/Kconfig"
source "$PKGS_DIR/Kconfig"
source "$NU_PKGS_DIR/Kconfig"
source "$BSP_DIR/board/Kconfig"

1
bsp/nuvoton/nk-rtu980/board/Kconfig
View File

@ -44,5 +44,6 @@ menu "Hardware Drivers Config"
endmenu
source "$BSP_DIR/../libraries/nu_packages/Kconfig"
endmenu

1774
bsp/nuvoton/nk-rtu980/project.uvproj
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1766
bsp/nuvoton/nk-rtu980/project.uvprojx
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File diff suppressed because it is too large Load Diff

431
bsp/nuvoton/nk-rtu980/rtconfig.h
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@ -1,431 +0,0 @@
#ifndef RT_CONFIG_H__
#define RT_CONFIG_H__
/* Automatically generated file; DO NOT EDIT. */
/* RT-Thread Configuration */
/* RT-Thread Kernel */
#define RT_NAME_MAX 16
#define RT_ALIGN_SIZE 4
#define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32
#define RT_TICK_PER_SECOND 1000
#define RT_USING_OVERFLOW_CHECK
#define RT_USING_HOOK
#define RT_HOOK_USING_FUNC_PTR
#define RT_USING_IDLE_HOOK
#define RT_IDLE_HOOK_LIST_SIZE 4
#define IDLE_THREAD_STACK_SIZE 2048
/* kservice optimization */
#define RT_DEBUG
#define RT_DEBUG_COLOR
/* Inter-Thread communication */
#define RT_USING_SEMAPHORE
#define RT_USING_MUTEX
#define RT_USING_EVENT
#define RT_USING_MAILBOX
#define RT_USING_MESSAGEQUEUE
#define RT_USING_SIGNALS
/* Memory Management */
#define RT_USING_MEMPOOL
#define RT_USING_SMALL_MEM
#define RT_USING_MEMHEAP
#define RT_MEMHEAP_FAST_MODE
#define RT_USING_SMALL_MEM_AS_HEAP
#define RT_USING_MEMTRACE
#define RT_USING_HEAP
/* Kernel Device Object */
#define RT_USING_DEVICE
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 256
#define RT_CONSOLE_DEVICE_NAME "uart0"
#define RT_VER_NUM 0x40100
#define ARCH_ARM
#define ARCH_ARM_ARM9
/* RT-Thread Components */
#define RT_USING_COMPONENTS_INIT
#define RT_USING_USER_MAIN
#define RT_MAIN_THREAD_STACK_SIZE 2048
#define RT_MAIN_THREAD_PRIORITY 10
/* C++ features */
/* Command shell */
#define RT_USING_FINSH
#define RT_USING_MSH
#define FINSH_USING_MSH
#define FINSH_THREAD_NAME "tshell"
#define FINSH_THREAD_PRIORITY 20
#define FINSH_THREAD_STACK_SIZE 4096
#define FINSH_USING_HISTORY
#define FINSH_HISTORY_LINES 5
#define FINSH_USING_SYMTAB
#define FINSH_CMD_SIZE 80
#define MSH_USING_BUILT_IN_COMMANDS
#define FINSH_USING_DESCRIPTION
#define FINSH_ARG_MAX 10
/* Device virtual file system */
#define RT_USING_DFS
#define DFS_USING_POSIX
#define DFS_USING_WORKDIR
#define DFS_FILESYSTEMS_MAX 16
#define DFS_FILESYSTEM_TYPES_MAX 16
#define DFS_FD_MAX 64
#define RT_USING_DFS_MNTTABLE
#define RT_USING_DFS_ELMFAT
/* elm-chan's FatFs, Generic FAT Filesystem Module */
#define RT_DFS_ELM_CODE_PAGE 437
#define RT_DFS_ELM_WORD_ACCESS
#define RT_DFS_ELM_USE_LFN_3
#define RT_DFS_ELM_USE_LFN 3
#define RT_DFS_ELM_LFN_UNICODE_0
#define RT_DFS_ELM_LFN_UNICODE 0
#define RT_DFS_ELM_MAX_LFN 255
#define RT_DFS_ELM_DRIVES 8
#define RT_DFS_ELM_MAX_SECTOR_SIZE 4096
#define RT_DFS_ELM_REENTRANT
#define RT_DFS_ELM_MUTEX_TIMEOUT 3000
#define RT_USING_DFS_DEVFS
/* Device Drivers */
#define RT_USING_DEVICE_IPC
#define RT_USING_SYSTEM_WORKQUEUE
#define RT_SYSTEM_WORKQUEUE_STACKSIZE 2048
#define RT_SYSTEM_WORKQUEUE_PRIORITY 23
#define RT_USING_SERIAL
#define RT_USING_SERIAL_V1
#define RT_SERIAL_USING_DMA
#define RT_SERIAL_RB_BUFSZ 2048
#define RT_USING_CAN
#define RT_CAN_USING_HDR
#define RT_USING_HWTIMER
#define RT_USING_CPUTIME
#define RT_USING_I2C
#define RT_USING_I2C_BITOPS
#define RT_USING_PIN
#define RT_USING_ADC
#define RT_USING_SPI
#define RT_USING_QSPI
#define RT_USING_SFUD
#define RT_SFUD_USING_SFDP
#define RT_SFUD_USING_FLASH_INFO_TABLE
#define RT_SFUD_USING_QSPI
#define RT_SFUD_SPI_MAX_HZ 50000000
#define RT_USING_WDT
#define RT_USING_HWCRYPTO
#define RT_HWCRYPTO_DEFAULT_NAME "hwcryto"
#define RT_HWCRYPTO_IV_MAX_SIZE 16
#define RT_HWCRYPTO_KEYBIT_MAX_SIZE 256
#define RT_HWCRYPTO_USING_AES
#define RT_HWCRYPTO_USING_AES_ECB
#define RT_HWCRYPTO_USING_AES_CBC
#define RT_HWCRYPTO_USING_AES_CFB
#define RT_HWCRYPTO_USING_AES_CTR
#define RT_HWCRYPTO_USING_AES_OFB
#define RT_HWCRYPTO_USING_SHA1
#define RT_HWCRYPTO_USING_SHA2
#define RT_HWCRYPTO_USING_SHA2_224
#define RT_HWCRYPTO_USING_SHA2_256
#define RT_HWCRYPTO_USING_SHA2_384
#define RT_HWCRYPTO_USING_SHA2_512
#define RT_HWCRYPTO_USING_RNG
/* Using USB */
#define RT_USING_USB
#define RT_USING_USB_HOST
#define RT_USBH_MSTORAGE
#define UDISK_MOUNTPOINT "/mnt/udisk"
#define RT_USING_USB_DEVICE
#define RT_USBD_THREAD_STACK_SZ 4096
#define USB_VENDOR_ID 0x0FFE
#define USB_PRODUCT_ID 0x0001
#define RT_USB_DEVICE_COMPOSITE
#define RT_USB_DEVICE_CDC
#define RT_USB_DEVICE_NONE
#define RT_USB_DEVICE_MSTORAGE
#define RT_VCOM_TASK_STK_SIZE 2048
#define RT_CDC_RX_BUFSIZE 128
#define RT_VCOM_SERNO "32021919830108"
#define RT_VCOM_SER_LEN 14
#define RT_VCOM_TX_TIMEOUT 1000
#define RT_USB_MSTORAGE_DISK_NAME "ramdisk1"
/* POSIX layer and C standard library */
#define RT_LIBC_DEFAULT_TIMEZONE 8
/* POSIX (Portable Operating System Interface) layer */
#define RT_USING_POSIX_FS
#define RT_USING_POSIX_DEVIO
#define RT_USING_POSIX_POLL
#define RT_USING_POSIX_SELECT
/* Interprocess Communication (IPC) */
/* Socket is in the 'Network' category */
/* Network */
/* Socket abstraction layer */
#define RT_USING_SAL
/* protocol stack implement */
#define SAL_USING_LWIP
#define SAL_USING_POSIX
/* Network interface device */
#define RT_USING_NETDEV
#define NETDEV_USING_IFCONFIG
#define NETDEV_USING_PING
#define NETDEV_USING_NETSTAT
#define NETDEV_USING_AUTO_DEFAULT
#define NETDEV_IPV4 1
#define NETDEV_IPV6 0
/* light weight TCP/IP stack */
#define RT_USING_LWIP
#define RT_USING_LWIP212
#define RT_LWIP_MEM_ALIGNMENT 4
#define RT_LWIP_IGMP
#define RT_LWIP_ICMP
#define RT_LWIP_DNS
#define RT_LWIP_DHCP
#define IP_SOF_BROADCAST 1
#define IP_SOF_BROADCAST_RECV 1
/* Static IPv4 Address */
#define RT_LWIP_IPADDR "192.168.31.55"
#define RT_LWIP_GWADDR "192.168.31.1"
#define RT_LWIP_MSKADDR "255.255.255.0"
#define RT_LWIP_UDP
#define RT_LWIP_TCP
#define RT_LWIP_RAW
#define RT_MEMP_NUM_NETCONN 16
#define RT_LWIP_PBUF_NUM 256
#define RT_LWIP_RAW_PCB_NUM 16
#define RT_LWIP_UDP_PCB_NUM 16
#define RT_LWIP_TCP_PCB_NUM 16
#define RT_LWIP_TCP_SEG_NUM 64
#define RT_LWIP_TCP_SND_BUF 16384
#define RT_LWIP_TCP_WND 65535
#define RT_LWIP_TCPTHREAD_PRIORITY 10
#define RT_LWIP_TCPTHREAD_MBOX_SIZE 256
#define RT_LWIP_TCPTHREAD_STACKSIZE 4096
#define RT_LWIP_ETHTHREAD_PRIORITY 12
#define RT_LWIP_ETHTHREAD_STACKSIZE 4096
#define RT_LWIP_ETHTHREAD_MBOX_SIZE 256
#define RT_LWIP_REASSEMBLY_FRAG
#define LWIP_NETIF_STATUS_CALLBACK 1
#define LWIP_NETIF_LINK_CALLBACK 1
#define SO_REUSE 1
#define LWIP_SO_RCVTIMEO 1
#define LWIP_SO_SNDTIMEO 1
#define LWIP_SO_RCVBUF 1
#define LWIP_SO_LINGER 0
#define RT_LWIP_NETIF_LOOPBACK
#define LWIP_NETIF_LOOPBACK 1
#define RT_LWIP_STATS
#define RT_LWIP_USING_PING
/* AT commands */
/* VBUS(Virtual Software BUS) */
/* Utilities */
#define RT_USING_UTEST
#define UTEST_THR_STACK_SIZE 4096
#define UTEST_THR_PRIORITY 20
/* RT-Thread Utestcases */
/* RT-Thread online packages */
/* IoT - internet of things */
/* Wi-Fi */
/* Marvell WiFi */
/* Wiced WiFi */
#define PKG_USING_NETUTILS
#define PKG_NETUTILS_TFTP
#define PKG_NETUTILS_IPERF
#define PKG_NETUTILS_NTP
#define NTP_USING_AUTO_SYNC
#define NTP_AUTO_SYNC_FIRST_DELAY 30
#define NTP_AUTO_SYNC_PERIOD 3600
#define NETUTILS_NTP_HOSTNAME "0.tw.pool.ntp.org"
#define NETUTILS_NTP_HOSTNAME2 "1.tw.pool.ntp.org"
#define NETUTILS_NTP_HOSTNAME3 "2.tw.pool.ntp.org"
#define PKG_USING_NETUTILS_V131
#define PKG_NETUTILS_VER_NUM 0x10301
/* IoT Cloud */
/* security packages */
/* language packages */
/* multimedia packages */
/* LVGL: powerful and easy-to-use embedded GUI library */
/* u8g2: a monochrome graphic library */
/* PainterEngine: A cross-platform graphics application framework written in C language */
/* tools packages */
/* system packages */
/* enhanced kernel services */
/* POSIX extension functions */
/* acceleration: Assembly language or algorithmic acceleration packages */
/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
/* Micrium: Micrium software products porting for RT-Thread */
#define PKG_USING_FAL
#define FAL_DEBUG_CONFIG
#define FAL_DEBUG 1
#define FAL_PART_HAS_TABLE_CFG
#define FAL_USING_SFUD_PORT
#define FAL_USING_NOR_FLASH_DEV_NAME "norflash0"
#define PKG_USING_FAL_LATEST_VERSION
#define PKG_FAL_VER_NUM 0x99999
#define PKG_USING_RAMDISK
#define PKG_USING_RAMDISK_LATEST_VERSION
/* peripheral libraries and drivers */
/* AI packages */
/* miscellaneous packages */
/* samples: kernel and components samples */
/* entertainment: terminal games and other interesting software packages */
#define PKG_USING_OPTPARSE
#define PKG_USING_OPTPARSE_LATEST_VERSION
/* Nuvoton Packages Config */
#define NU_PKG_USING_UTILS
#define NU_PKG_USING_DEMO
/* Hardware Drivers Config */
/* On-chip Peripheral Drivers */
#define SOC_SERIES_NUC980
#define BSP_USE_STDDRIVER_SOURCE
#define BSP_USING_MMU
#define BSP_USING_PDMA
#define NU_PDMA_MEMFUN_ACTOR_MAX 2
#define BSP_USING_GPIO
#define BSP_USING_EMAC
#define BSP_USING_EMAC1
#define NU_EMAC_PDMA_MEMCOPY
#define NU_EMAC_PDMA_MEMCOPY_THRESHOLD 128
#define BSP_USING_ADC
#define BSP_USING_TMR
#define BSP_USING_TIMER
#define BSP_USING_TMR0
#define BSP_USING_TIMER0
#define BSP_USING_TMR1
#define BSP_USING_TIMER1
#define BSP_USING_TMR2
#define BSP_USING_TIMER2
#define BSP_USING_TMR3
#define BSP_USING_TIMER3
#define BSP_USING_TMR4
#define BSP_USING_TIMER4
#define BSP_USING_UART
#define BSP_USING_UART0
#define BSP_USING_UART4
#define BSP_USING_UART4_TX_DMA
#define BSP_USING_UART4_RX_DMA
#define BSP_USING_UART8
#define BSP_USING_UART8_TX_DMA
#define BSP_USING_UART8_RX_DMA
#define BSP_USING_I2C
#define BSP_USING_I2C1
#define BSP_USING_CAN
#define BSP_USING_CAN3
#define BSP_USING_SPI
#define BSP_USING_SPI_PDMA
#define BSP_USING_SPI0
#define BSP_USING_SPI0_PDMA
#define BSP_USING_SPI1_NONE
#define BSP_USING_QSPI
#define BSP_USING_QSPI_PDMA
#define BSP_USING_QSPI0
#define BSP_USING_QSPI0_PDMA
#define BSP_USING_CRYPTO
#define BSP_USING_WDT
#define BSP_USING_USBD
#define BSP_USING_USBH
/* On-board Peripheral Drivers */
#define BSP_USING_CONSOLE
#define BOARD_USING_UART8_RS485
#define BOARD_USING_STORAGE_SPIFLASH
#define BOARD_USING_USB0_DEVICE_HOST
/* Board extended module drivers */
#define BOARD_USING_IP101GR
#endif

2
bsp/nuvoton/numaker-iot-m487/.config
View File

@ -973,3 +973,5 @@ CONFIG_BOARD_USING_HSUSBH_USBD=y
#
# CONFIG_BOARD_USING_MAX31875 is not set
# CONFIG_BOARD_USING_LCD_ILI9341 is not set
CONFIG_BOARD_USE_UTEST=y
CONFIG_UTEST_CMD_PREFIX="bsp.nuvoton.numaker-iot-m487.test.utest."

6
bsp/nuvoton/numaker-iot-m487/Kconfig
View File

@ -18,12 +18,6 @@ config PKGS_DIR
option env="PKGS_ROOT"
default "packages"
config NU_PKGS_DIR
string
option env="NU_PKGS_ROOT"
default "../libraries/nu_packages"
source "$RTT_DIR/Kconfig"
source "$PKGS_DIR/Kconfig"
source "$NU_PKGS_DIR/Kconfig"
source "$BSP_DIR/board/Kconfig"

1
bsp/nuvoton/numaker-iot-m487/board/Kconfig
View File

@ -129,5 +129,6 @@ menu "Hardware Drivers Config"
endmenu
source "$BSP_DIR/../libraries/nu_packages/Kconfig"
endmenu

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bsp/nuvoton/numaker-iot-m487/project.uvproj
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bsp/nuvoton/numaker-iot-m487/project.uvprojx
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400
bsp/nuvoton/numaker-iot-m487/rtconfig.h
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@ -1,400 +0,0 @@
#ifndef RT_CONFIG_H__
#define RT_CONFIG_H__
/* Automatically generated file; DO NOT EDIT. */
/* RT-Thread Configuration */
/* RT-Thread Kernel */
#define RT_NAME_MAX 8
#define RT_ALIGN_SIZE 4
#define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32
#define RT_TICK_PER_SECOND 1000
#define RT_USING_OVERFLOW_CHECK
#define RT_USING_HOOK
#define RT_HOOK_USING_FUNC_PTR
#define RT_USING_IDLE_HOOK
#define RT_IDLE_HOOK_LIST_SIZE 4
#define IDLE_THREAD_STACK_SIZE 1024
/* kservice optimization */
#define RT_DEBUG
#define RT_DEBUG_COLOR
/* Inter-Thread communication */
#define RT_USING_SEMAPHORE
#define RT_USING_MUTEX
#define RT_USING_EVENT
#define RT_USING_MAILBOX
#define RT_USING_MESSAGEQUEUE
#define RT_USING_SIGNALS
/* Memory Management */
#define RT_USING_MEMPOOL
#define RT_USING_SMALL_MEM
#define RT_USING_SMALL_MEM_AS_HEAP
#define RT_USING_HEAP
/* Kernel Device Object */
#define RT_USING_DEVICE
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 256
#define RT_CONSOLE_DEVICE_NAME "uart0"
#define RT_VER_NUM 0x40100
#define ARCH_ARM
#define RT_USING_CPU_FFS
#define ARCH_ARM_CORTEX_M
#define ARCH_ARM_CORTEX_M4
/* RT-Thread Components */
#define RT_USING_COMPONENTS_INIT
#define RT_USING_USER_MAIN
#define RT_MAIN_THREAD_STACK_SIZE 2048
#define RT_MAIN_THREAD_PRIORITY 10
/* C++ features */
/* Command shell */
#define RT_USING_FINSH
#define RT_USING_MSH
#define FINSH_USING_MSH
#define FINSH_THREAD_NAME "tshell"
#define FINSH_THREAD_PRIORITY 20
#define FINSH_THREAD_STACK_SIZE 2048
#define FINSH_USING_HISTORY
#define FINSH_HISTORY_LINES 5
#define FINSH_USING_SYMTAB
#define FINSH_CMD_SIZE 80
#define MSH_USING_BUILT_IN_COMMANDS
#define FINSH_USING_DESCRIPTION
#define FINSH_ARG_MAX 10
/* Device virtual file system */
#define RT_USING_DFS
#define DFS_USING_POSIX
#define DFS_USING_WORKDIR
#define DFS_FILESYSTEMS_MAX 8
#define DFS_FILESYSTEM_TYPES_MAX 4
#define DFS_FD_MAX 32
#define RT_USING_DFS_ELMFAT
/* elm-chan's FatFs, Generic FAT Filesystem Module */
#define RT_DFS_ELM_CODE_PAGE 437
#define RT_DFS_ELM_WORD_ACCESS
#define RT_DFS_ELM_USE_LFN_3
#define RT_DFS_ELM_USE_LFN 3
#define RT_DFS_ELM_LFN_UNICODE_0
#define RT_DFS_ELM_LFN_UNICODE 0
#define RT_DFS_ELM_MAX_LFN 255
#define RT_DFS_ELM_DRIVES 8
#define RT_DFS_ELM_MAX_SECTOR_SIZE 4096
#define RT_DFS_ELM_REENTRANT
#define RT_DFS_ELM_MUTEX_TIMEOUT 3000
#define RT_USING_DFS_DEVFS
/* Device Drivers */
#define RT_USING_DEVICE_IPC
#define RT_USING_SYSTEM_WORKQUEUE
#define RT_SYSTEM_WORKQUEUE_STACKSIZE 2048
#define RT_SYSTEM_WORKQUEUE_PRIORITY 23
#define RT_USING_SERIAL
#define RT_USING_SERIAL_V1
#define RT_SERIAL_USING_DMA
#define RT_SERIAL_RB_BUFSZ 2048
#define RT_USING_CAN
#define RT_USING_HWTIMER
#define RT_USING_I2C
#define RT_USING_I2C_BITOPS
#define RT_USING_PIN
#define RT_USING_ADC
#define RT_USING_PWM
#define RT_USING_PM
#define PM_TICKLESS_THRESHOLD_TIME 2
#define RT_USING_RTC
#define RT_USING_SPI
#define RT_USING_QSPI
#define RT_USING_SFUD
#define RT_SFUD_USING_SFDP
#define RT_SFUD_USING_FLASH_INFO_TABLE
#define RT_SFUD_SPI_MAX_HZ 50000000
#define RT_USING_WDT
#define RT_USING_AUDIO
#define RT_AUDIO_REPLAY_MP_BLOCK_SIZE 4096
#define RT_AUDIO_REPLAY_MP_BLOCK_COUNT 2
#define RT_AUDIO_RECORD_PIPE_SIZE 2048
#define RT_USING_SENSOR
#define RT_USING_SENSOR_CMD
#define RT_USING_HWCRYPTO
#define RT_HWCRYPTO_DEFAULT_NAME "hwcryto"
#define RT_HWCRYPTO_IV_MAX_SIZE 16
#define RT_HWCRYPTO_KEYBIT_MAX_SIZE 256
#define RT_HWCRYPTO_USING_AES
#define RT_HWCRYPTO_USING_AES_ECB
#define RT_HWCRYPTO_USING_AES_CBC
#define RT_HWCRYPTO_USING_AES_CFB
#define RT_HWCRYPTO_USING_AES_CTR
#define RT_HWCRYPTO_USING_AES_OFB
#define RT_HWCRYPTO_USING_DES
#define RT_HWCRYPTO_USING_DES_ECB
#define RT_HWCRYPTO_USING_DES_CBC
#define RT_HWCRYPTO_USING_3DES
#define RT_HWCRYPTO_USING_3DES_ECB
#define RT_HWCRYPTO_USING_3DES_CBC
#define RT_HWCRYPTO_USING_SHA1
#define RT_HWCRYPTO_USING_SHA2
#define RT_HWCRYPTO_USING_SHA2_224
#define RT_HWCRYPTO_USING_SHA2_256
#define RT_HWCRYPTO_USING_SHA2_384
#define RT_HWCRYPTO_USING_SHA2_512
#define RT_HWCRYPTO_USING_RNG
#define RT_HWCRYPTO_USING_CRC
#define RT_HWCRYPTO_USING_CRC_07
#define RT_HWCRYPTO_USING_CRC_8005
#define RT_HWCRYPTO_USING_CRC_1021
#define RT_HWCRYPTO_USING_CRC_04C11DB7
/* Using USB */
#define RT_USING_USB
#define RT_USING_USB_HOST
#define RT_USBH_MSTORAGE
#define UDISK_MOUNTPOINT "/mnt/udisk/"
#define RT_USING_USB_DEVICE
#define RT_USBD_THREAD_STACK_SZ 4096
#define USB_VENDOR_ID 0x0FFE
#define USB_PRODUCT_ID 0x0001
#define _RT_USB_DEVICE_HID
#define RT_USB_DEVICE_HID
#define RT_USB_DEVICE_HID_MOUSE
/* POSIX layer and C standard library */
#define RT_LIBC_DEFAULT_TIMEZONE 8
/* POSIX (Portable Operating System Interface) layer */
#define RT_USING_POSIX_FS
#define RT_USING_POSIX_DEVIO
#define RT_USING_POSIX_POLL
#define RT_USING_POSIX_SELECT
/* Interprocess Communication (IPC) */
/* Socket is in the 'Network' category */
/* Network */
/* Socket abstraction layer */
#define RT_USING_SAL
#define SAL_INTERNET_CHECK
/* protocol stack implement */
#define SAL_USING_AT
#define SAL_USING_POSIX
/* Network interface device */
#define RT_USING_NETDEV
#define NETDEV_USING_IFCONFIG
#define NETDEV_USING_PING
#define NETDEV_USING_NETSTAT
#define NETDEV_USING_AUTO_DEFAULT
#define NETDEV_IPV4 1
#define NETDEV_IPV6 0
/* light weight TCP/IP stack */
/* AT commands */
#define RT_USING_AT
#define AT_USING_CLIENT
#define AT_CLIENT_NUM_MAX 1
#define AT_USING_SOCKET
#define AT_USING_CLI
#define AT_CMD_MAX_LEN 512
#define AT_SW_VERSION_NUM 0x10301
/* VBUS(Virtual Software BUS) */
/* Utilities */
#define RT_USING_UTEST
#define UTEST_THR_STACK_SIZE 4096
#define UTEST_THR_PRIORITY 20
/* RT-Thread Utestcases */
/* RT-Thread online packages */
/* IoT - internet of things */
/* Wi-Fi */
/* Marvell WiFi */
/* Wiced WiFi */
#define PKG_USING_AT_DEVICE
#define AT_DEVICE_USING_ESP8266
#define AT_DEVICE_ESP8266_INIT_ASYN
#define PKG_USING_AT_DEVICE_LATEST_VERSION
#define PKG_AT_DEVICE_VER_NUM 0x99999
/* IoT Cloud */
/* security packages */
/* language packages */
/* multimedia packages */
/* LVGL: powerful and easy-to-use embedded GUI library */
/* u8g2: a monochrome graphic library */
/* PainterEngine: A cross-platform graphics application framework written in C language */
/* tools packages */
/* system packages */
/* enhanced kernel services */
/* POSIX extension functions */
/* acceleration: Assembly language or algorithmic acceleration packages */
/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
/* Micrium: Micrium software products porting for RT-Thread */
#define PKG_USING_FAL
#define FAL_DEBUG_CONFIG
#define FAL_DEBUG 1
#define FAL_PART_HAS_TABLE_CFG
#define PKG_USING_FAL_LATEST_VERSION
#define PKG_FAL_VER_NUM 0x99999
/* peripheral libraries and drivers */
/* AI packages */
/* miscellaneous packages */
/* samples: kernel and components samples */
/* entertainment: terminal games and other interesting software packages */
/* Nuvoton Packages Config */
#define NU_PKG_USING_UTILS
#define NU_PKG_USING_DEMO
#define NU_PKG_USING_BMX055
#define NU_PKG_USING_NAU88L25
/* Hardware Drivers Config */
/* On-chip Peripheral Drivers */
#define SOC_SERIES_M480
#define BSP_USE_STDDRIVER_SOURCE
#define BSP_USING_PDMA
#define NU_PDMA_MEMFUN_ACTOR_MAX 2
#define NU_PDMA_SGTBL_POOL_SIZE 16
#define BSP_USING_FMC
#define BSP_USING_GPIO
#define BSP_USING_CLK
#define NU_CLK_INVOKE_WKTMR
#define BSP_USING_RTC
#define NU_RTC_SUPPORT_MSH_CMD
#define BSP_USING_TMR
#define BSP_USING_UART
#define BSP_USING_UART0
#define BSP_USING_UART1
#define BSP_USING_UART1_TX_DMA
#define BSP_USING_UART1_RX_DMA
#define BSP_USING_UART2
#define BSP_USING_UART2_TX_DMA
#define BSP_USING_UART2_RX_DMA
#define BSP_USING_I2C
#define BSP_USING_I2C0
#define BSP_USING_I2C1
#define BSP_USING_I2C2
#define BSP_USING_USCI
#define BSP_USING_UUART
#define BSP_USING_USCI0
#define BSP_USING_UUART0
#define BSP_USING_UUART0_TX_DMA
#define BSP_USING_UUART0_RX_DMA
#define BSP_USING_SDH
#define BSP_USING_SDH0
#define NU_SDH_USING_PDMA
#define NU_SDH_HOTPLUG
#define BSP_USING_SPI
#define BSP_USING_SPI_PDMA
#define BSP_USING_SPI0_NONE
#define BSP_USING_SPI1
#define BSP_USING_SPI1_PDMA
#define BSP_USING_SPI2
#define BSP_USING_SPI3_NONE
#define BSP_USING_I2S
#define NU_I2S_DMA_FIFO_SIZE 2048
#define BSP_USING_QSPI
#define BSP_USING_QSPI0
#define BSP_USING_CRYPTO
#define BSP_USING_TRNG
#define BSP_USING_CRC
#define NU_CRC_USE_PDMA
#define BSP_USING_WDT
#define BSP_USING_USBD
#define BSP_USING_HSUSBH
#define NU_USBHOST_HUB_POLLING_INTERVAL 100
/* On-board Peripheral Drivers */
#define BSP_USING_NULINKME
#define BOARD_USING_ESP8266
#define BOARD_USING_BMX055
#define BOARD_USING_NAU88L25
#define BOARD_USING_STORAGE_SDCARD
#define BOARD_USING_STORAGE_SPIFLASH
#define BOARD_USING_HSUSBH_USBD
/* Board extended module drivers */
#endif

2
bsp/nuvoton/numaker-m032ki/.config
View File

@ -797,3 +797,5 @@ CONFIG_BSP_USING_NULINKME=y
# Board extended module drivers
#
# CONFIG_BOARD_USING_STORAGE_SPIFLASH is not set
CONFIG_BOARD_USE_UTEST=y
CONFIG_UTEST_CMD_PREFIX="bsp.nuvoton.numaker-m032ki.test.utest."

6
bsp/nuvoton/numaker-m032ki/Kconfig
View File

@ -18,12 +18,6 @@ config PKGS_DIR
option env="PKGS_ROOT"
default "packages"
config NU_PKGS_DIR
string
option env="NU_PKGS_ROOT"
default "../libraries/nu_packages"
source "$RTT_DIR/Kconfig"
source "$PKGS_DIR/Kconfig"
source "$NU_PKGS_DIR/Kconfig"
source "$BSP_DIR/board/Kconfig"

1
bsp/nuvoton/numaker-m032ki/board/Kconfig
View File

@ -24,4 +24,5 @@ menu "Hardware Drivers Config"
endmenu
source "$BSP_DIR/../libraries/nu_packages/Kconfig"
endmenu

1228
bsp/nuvoton/numaker-m032ki/project.uvprojx
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286
bsp/nuvoton/numaker-m032ki/rtconfig.h
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@ -1,286 +0,0 @@
#ifndef RT_CONFIG_H__
#define RT_CONFIG_H__
/* Automatically generated file; DO NOT EDIT. */
/* RT-Thread Configuration */
/* RT-Thread Kernel */
#define RT_NAME_MAX 8
#define RT_ALIGN_SIZE 4
#define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32
#define RT_TICK_PER_SECOND 1000
#define RT_USING_OVERFLOW_CHECK
#define RT_USING_HOOK
#define RT_HOOK_USING_FUNC_PTR
#define RT_USING_IDLE_HOOK
#define RT_IDLE_HOOK_LIST_SIZE 4
#define IDLE_THREAD_STACK_SIZE 512
#define RT_USING_TIMER_SOFT
#define RT_TIMER_THREAD_PRIO 4
#define RT_TIMER_THREAD_STACK_SIZE 512
/* kservice optimization */
#define RT_DEBUG
/* Inter-Thread communication */
#define RT_USING_SEMAPHORE
#define RT_USING_MUTEX
#define RT_USING_EVENT
#define RT_USING_MAILBOX
#define RT_USING_MESSAGEQUEUE
/* Memory Management */
#define RT_USING_MEMPOOL
#define RT_USING_SMALL_MEM
#define RT_USING_SMALL_MEM_AS_HEAP
#define RT_USING_HEAP
/* Kernel Device Object */
#define RT_USING_DEVICE
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 256
#define RT_CONSOLE_DEVICE_NAME "uart0"
#define RT_VER_NUM 0x40100
#define ARCH_ARM
#define ARCH_ARM_CORTEX_M
#define ARCH_ARM_CORTEX_M0
/* RT-Thread Components */
#define RT_USING_COMPONENTS_INIT
#define RT_USING_USER_MAIN
#define RT_MAIN_THREAD_STACK_SIZE 2048
#define RT_MAIN_THREAD_PRIORITY 10
/* C++ features */
/* Command shell */
#define RT_USING_FINSH
#define RT_USING_MSH
#define FINSH_USING_MSH
#define FINSH_THREAD_NAME "tshell"
#define FINSH_THREAD_PRIORITY 20
#define FINSH_THREAD_STACK_SIZE 4096
#define FINSH_USING_HISTORY
#define FINSH_HISTORY_LINES 5
#define FINSH_USING_SYMTAB
#define FINSH_CMD_SIZE 80
#define MSH_USING_BUILT_IN_COMMANDS
#define FINSH_USING_DESCRIPTION
#define FINSH_ARG_MAX 10
/* Device virtual file system */
#define RT_USING_DFS
#define DFS_USING_POSIX
#define DFS_USING_WORKDIR
#define DFS_FILESYSTEMS_MAX 2
#define DFS_FILESYSTEM_TYPES_MAX 2
#define DFS_FD_MAX 16
#define RT_USING_DFS_DEVFS
/* Device Drivers */
#define RT_USING_DEVICE_IPC
#define RT_USING_SERIAL
#define RT_USING_SERIAL_V1
#define RT_SERIAL_USING_DMA
#define RT_SERIAL_RB_BUFSZ 64
#define RT_USING_HWTIMER
#define RT_USING_PIN
#define RT_USING_ADC
#define RT_USING_PWM
#define RT_USING_PM
#define PM_TICKLESS_THRESHOLD_TIME 2
#define RT_USING_RTC
#define RT_USING_WDT
/* Using USB */
#define RT_USING_USB
#define RT_USING_USB_DEVICE
#define RT_USBD_THREAD_STACK_SZ 4096
#define USB_VENDOR_ID 0x0FFE
#define USB_PRODUCT_ID 0x0001
#define RT_USB_DEVICE_COMPOSITE
#define RT_USB_DEVICE_NONE
#define RT_USB_DEVICE_HID
#define RT_USB_DEVICE_HID_MOUSE
/* POSIX layer and C standard library */
#define RT_LIBC_DEFAULT_TIMEZONE 8
/* POSIX (Portable Operating System Interface) layer */
/* Interprocess Communication (IPC) */
/* Socket is in the 'Network' category */
/* Network */
/* Socket abstraction layer */
/* Network interface device */
/* light weight TCP/IP stack */
/* AT commands */
/* VBUS(Virtual Software BUS) */
/* Utilities */
#define RT_USING_UTEST
#define UTEST_THR_STACK_SIZE 4096
#define UTEST_THR_PRIORITY 20
/* RT-Thread Utestcases */
#define RT_USING_UTESTCASES
/* Utest Self Testcase */
#define UTEST_SELF_PASS_TC
/* Kernel Testcase */
#define UTEST_SMALL_MEM_TC
/* Utest Serial Testcase */
/* RT-Thread online packages */
/* IoT - internet of things */
/* Wi-Fi */
/* Marvell WiFi */
/* Wiced WiFi */
/* IoT Cloud */
/* security packages */
/* language packages */
/* multimedia packages */
/* LVGL: powerful and easy-to-use embedded GUI library */
/* u8g2: a monochrome graphic library */
/* PainterEngine: A cross-platform graphics application framework written in C language */
/* tools packages */
/* system packages */
/* enhanced kernel services */
/* POSIX extension functions */
/* acceleration: Assembly language or algorithmic acceleration packages */
/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
/* Micrium: Micrium software products porting for RT-Thread */
/* peripheral libraries and drivers */
/* AI packages */
/* miscellaneous packages */
/* samples: kernel and components samples */
/* entertainment: terminal games and other interesting software packages */
/* Nuvoton Packages Config */
#define NU_PKG_USING_UTILS
#define NU_PKG_USING_DEMO
/* Hardware Drivers Config */
/* On-chip Peripheral Drivers */
#define SOC_SERIES_M032
#define BSP_USE_STDDRIVER_SOURCE
#define BSP_USING_PDMA
#define NU_PDMA_MEMFUN_ACTOR_MAX 4
#define NU_PDMA_SGTBL_POOL_SIZE 16
#define BSP_USING_GPIO
#define BSP_USING_CLK
#define NU_CLK_INVOKE_WKTMR
#define BSP_USING_RTC
#define NU_RTC_SUPPORT_IO_RW
#define NU_RTC_SUPPORT_MSH_CMD
#define BSP_USING_ADC
#define BSP_USING_ADC0
#define BSP_USING_TMR
#define BSP_USING_TIMER
#define BSP_USING_TMR0
#define BSP_USING_TIMER0
#define BSP_USING_TMR1
#define BSP_USING_TIMER1
#define BSP_USING_TMR2
#define BSP_USING_TIMER2
#define BSP_USING_UART
#define BSP_USING_UART0
#define BSP_USING_UART1
#define BSP_USING_UART1_TX_DMA
#define BSP_USING_UART1_RX_DMA
#define BSP_USING_UART2
#define BSP_USING_UART3
#define BSP_USING_UART4
#define BSP_USING_UART5
#define BSP_USING_UART6
#define BSP_USING_UART7
#define BSP_USING_WDT
#define BSP_USING_USBD
/* On-board Peripheral Drivers */
#define BSP_USING_NULINKME
/* Board extended module drivers */
#endif

2
bsp/nuvoton/numaker-m2354/.config
View File

@ -947,3 +947,5 @@ CONFIG_BOARD_USING_OTG=y
# Board extended module drivers
#
CONFIG_BOARD_USING_SEGMENT_LCD=y
CONFIG_BOARD_USE_UTEST=y
CONFIG_UTEST_CMD_PREFIX="bsp.nuvoton.numaker-m2354.test.utest."

8
bsp/nuvoton/numaker-m2354/Kconfig
View File

@ -9,7 +9,7 @@ config RTT_DIR
string
option env="RTT_ROOT"
default "../../.."
# you can change the RTT_ROOT default "../../.." to your rtthread_root,
# example : default "F:/git_repositories/rt-thread"
@ -18,12 +18,6 @@ config PKGS_DIR
option env="PKGS_ROOT"
default "packages"
config NU_PKGS_DIR
string
option env="NU_PKGS_ROOT"
default "../libraries/nu_packages"
source "$RTT_DIR/Kconfig"
source "$PKGS_DIR/Kconfig"
source "$NU_PKGS_DIR/Kconfig"
source "$BSP_DIR/board/Kconfig"

2
bsp/nuvoton/numaker-m2354/board/Kconfig
View File

@ -68,4 +68,6 @@ menu "Hardware Drivers Config"
endmenu
source "$BSP_DIR/../libraries/nu_packages/Kconfig"
endmenu

1768
bsp/nuvoton/numaker-m2354/project.uvprojx
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383
bsp/nuvoton/numaker-m2354/rtconfig.h
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@ -1,383 +0,0 @@
#ifndef RT_CONFIG_H__
#define RT_CONFIG_H__
/* Automatically generated file; DO NOT EDIT. */
/* RT-Thread Configuration */
/* RT-Thread Kernel */
#define RT_NAME_MAX 8
#define RT_ALIGN_SIZE 4
#define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32
#define RT_TICK_PER_SECOND 1000
#define RT_USING_OVERFLOW_CHECK
#define RT_USING_HOOK
#define RT_HOOK_USING_FUNC_PTR
#define RT_USING_IDLE_HOOK
#define RT_IDLE_HOOK_LIST_SIZE 4
#define IDLE_THREAD_STACK_SIZE 2048
/* kservice optimization */
#define RT_DEBUG
#define RT_DEBUG_COLOR
/* Inter-Thread communication */
#define RT_USING_SEMAPHORE
#define RT_USING_MUTEX
#define RT_USING_EVENT
#define RT_USING_MAILBOX
#define RT_USING_MESSAGEQUEUE
#define RT_USING_SIGNALS
/* Memory Management */
#define RT_USING_MEMPOOL
#define RT_USING_SMALL_MEM
#define RT_USING_SMALL_MEM_AS_HEAP
#define RT_USING_HEAP
/* Kernel Device Object */
#define RT_USING_DEVICE
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 256
#define RT_CONSOLE_DEVICE_NAME "uart0"
#define RT_VER_NUM 0x40100
/* RT-Thread Components */
#define RT_USING_COMPONENTS_INIT
#define RT_USING_USER_MAIN
#define RT_MAIN_THREAD_STACK_SIZE 2048
#define RT_MAIN_THREAD_PRIORITY 10
/* C++ features */
/* Command shell */
#define RT_USING_FINSH
#define RT_USING_MSH
#define FINSH_USING_MSH
#define FINSH_THREAD_NAME "tshell"
#define FINSH_THREAD_PRIORITY 20
#define FINSH_THREAD_STACK_SIZE 4096
#define FINSH_USING_HISTORY
#define FINSH_HISTORY_LINES 5
#define FINSH_USING_SYMTAB
#define FINSH_CMD_SIZE 80
#define MSH_USING_BUILT_IN_COMMANDS
#define FINSH_USING_DESCRIPTION
#define FINSH_ARG_MAX 10
/* Device virtual file system */
#define RT_USING_DFS
#define DFS_USING_POSIX
#define DFS_USING_WORKDIR
#define DFS_FILESYSTEMS_MAX 4
#define DFS_FILESYSTEM_TYPES_MAX 4
#define DFS_FD_MAX 32
#define RT_USING_DFS_ELMFAT
/* elm-chan's FatFs, Generic FAT Filesystem Module */
#define RT_DFS_ELM_CODE_PAGE 437
#define RT_DFS_ELM_WORD_ACCESS
#define RT_DFS_ELM_USE_LFN_3
#define RT_DFS_ELM_USE_LFN 3
#define RT_DFS_ELM_LFN_UNICODE_0
#define RT_DFS_ELM_LFN_UNICODE 0
#define RT_DFS_ELM_MAX_LFN 255
#define RT_DFS_ELM_DRIVES 2
#define RT_DFS_ELM_MAX_SECTOR_SIZE 4096
#define RT_DFS_ELM_REENTRANT
#define RT_DFS_ELM_MUTEX_TIMEOUT 3000
#define RT_USING_DFS_DEVFS
/* Device Drivers */
#define RT_USING_DEVICE_IPC
#define RT_USING_SYSTEM_WORKQUEUE
#define RT_SYSTEM_WORKQUEUE_STACKSIZE 2048
#define RT_SYSTEM_WORKQUEUE_PRIORITY 23
#define RT_USING_SERIAL
#define RT_USING_SERIAL_V1
#define RT_SERIAL_USING_DMA
#define RT_SERIAL_RB_BUFSZ 2048
#define RT_USING_CAN
#define RT_USING_HWTIMER
#define RT_USING_I2C
#define RT_USING_I2C_BITOPS
#define RT_USING_PIN
#define RT_USING_ADC
#define RT_USING_PWM
#define RT_USING_PM
#define PM_TICKLESS_THRESHOLD_TIME 2
#define RT_USING_RTC
#define RT_USING_SPI
#define RT_USING_QSPI
#define RT_USING_SFUD
#define RT_SFUD_USING_SFDP
#define RT_SFUD_USING_FLASH_INFO_TABLE
#define RT_SFUD_USING_QSPI
#define RT_SFUD_SPI_MAX_HZ 50000000
#define RT_DEBUG_SFUD
#define RT_USING_WDT
#define RT_USING_AUDIO
#define RT_AUDIO_REPLAY_MP_BLOCK_SIZE 4096
#define RT_AUDIO_REPLAY_MP_BLOCK_COUNT 2
#define RT_AUDIO_RECORD_PIPE_SIZE 2048
#define RT_USING_SENSOR
#define RT_USING_SENSOR_CMD
#define RT_USING_HWCRYPTO
#define RT_HWCRYPTO_DEFAULT_NAME "hwcryto"
#define RT_HWCRYPTO_IV_MAX_SIZE 16
#define RT_HWCRYPTO_KEYBIT_MAX_SIZE 256
#define RT_HWCRYPTO_USING_AES
#define RT_HWCRYPTO_USING_AES_ECB
#define RT_HWCRYPTO_USING_AES_CBC
#define RT_HWCRYPTO_USING_AES_CFB
#define RT_HWCRYPTO_USING_AES_CTR
#define RT_HWCRYPTO_USING_AES_OFB
#define RT_HWCRYPTO_USING_DES
#define RT_HWCRYPTO_USING_DES_ECB
#define RT_HWCRYPTO_USING_DES_CBC
#define RT_HWCRYPTO_USING_3DES
#define RT_HWCRYPTO_USING_3DES_ECB
#define RT_HWCRYPTO_USING_3DES_CBC
#define RT_HWCRYPTO_USING_SHA1
#define RT_HWCRYPTO_USING_SHA2
#define RT_HWCRYPTO_USING_SHA2_224
#define RT_HWCRYPTO_USING_SHA2_256
#define RT_HWCRYPTO_USING_SHA2_384
#define RT_HWCRYPTO_USING_SHA2_512
#define RT_HWCRYPTO_USING_RNG
#define RT_HWCRYPTO_USING_CRC
#define RT_HWCRYPTO_USING_CRC_07
#define RT_HWCRYPTO_USING_CRC_8005
#define RT_HWCRYPTO_USING_CRC_1021
#define RT_HWCRYPTO_USING_CRC_04C11DB7
/* Using USB */
#define RT_USING_USB
#define RT_USING_USB_HOST
#define RT_USBH_MSTORAGE
#define UDISK_MOUNTPOINT "/"
#define RT_USING_USB_DEVICE
#define RT_USBD_THREAD_STACK_SZ 4096
#define USB_VENDOR_ID 0x0FFE
#define USB_PRODUCT_ID 0x0001
#define _RT_USB_DEVICE_HID
#define RT_USB_DEVICE_HID
#define RT_USB_DEVICE_HID_MOUSE
/* POSIX layer and C standard library */
#define RT_LIBC_DEFAULT_TIMEZONE 8
/* POSIX (Portable Operating System Interface) layer */
#define RT_USING_POSIX_FS
#define RT_USING_POSIX_DEVIO
#define RT_USING_POSIX_POLL
#define RT_USING_POSIX_SELECT
/* Interprocess Communication (IPC) */
/* Socket is in the 'Network' category */
/* Network */
/* Socket abstraction layer */
#define RT_USING_SAL
#define SAL_INTERNET_CHECK
/* protocol stack implement */
#define SAL_USING_AT
#define SAL_USING_POSIX
/* Network interface device */
#define RT_USING_NETDEV
#define NETDEV_USING_IFCONFIG
#define NETDEV_USING_PING
#define NETDEV_USING_NETSTAT
#define NETDEV_USING_AUTO_DEFAULT
#define NETDEV_IPV4 1
#define NETDEV_IPV6 0
/* light weight TCP/IP stack */
/* AT commands */
#define RT_USING_AT
#define AT_USING_CLIENT
#define AT_CLIENT_NUM_MAX 1
#define AT_USING_SOCKET
#define AT_USING_CLI
#define AT_CMD_MAX_LEN 2048
#define AT_SW_VERSION_NUM 0x10301
/* VBUS(Virtual Software BUS) */
/* Utilities */
#define RT_USING_UTEST
#define UTEST_THR_STACK_SIZE 4096
#define UTEST_THR_PRIORITY 20
/* RT-Thread Utestcases */
/* RT-Thread online packages */
/* IoT - internet of things */
/* Wi-Fi */
/* Marvell WiFi */
/* Wiced WiFi */
#define PKG_USING_AT_DEVICE
#define AT_DEVICE_USING_ESP8266
#define AT_DEVICE_ESP8266_INIT_ASYN
#define PKG_USING_AT_DEVICE_LATEST_VERSION
#define PKG_AT_DEVICE_VER_NUM 0x99999
/* IoT Cloud */
/* security packages */
/* language packages */
/* multimedia packages */
/* LVGL: powerful and easy-to-use embedded GUI library */
/* u8g2: a monochrome graphic library */
/* PainterEngine: A cross-platform graphics application framework written in C language */
/* tools packages */
/* system packages */
/* enhanced kernel services */
/* POSIX extension functions */
/* acceleration: Assembly language or algorithmic acceleration packages */
/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
/* Micrium: Micrium software products porting for RT-Thread */
#define PKG_USING_FAL
#define FAL_DEBUG_CONFIG
#define FAL_DEBUG 1
#define FAL_PART_HAS_TABLE_CFG
#define PKG_USING_FAL_V00500
#define PKG_FAL_VER_NUM 0x00500
/* peripheral libraries and drivers */
/* AI packages */
/* miscellaneous packages */
/* samples: kernel and components samples */
/* entertainment: terminal games and other interesting software packages */
/* Nuvoton Packages Config */
#define NU_PKG_USING_UTILS
#define NU_PKG_USING_DEMO
/* Hardware Drivers Config */
/* On-chip Peripheral Drivers */
#define SOC_SERIES_M2354
#define BSP_USE_STDDRIVER_SOURCE
#define BSP_USING_PDMA
#define NU_PDMA_MEMFUN_ACTOR_MAX 2
#define NU_PDMA_SGTBL_POOL_SIZE 16
#define BSP_USING_FMC
#define BSP_USING_GPIO
#define BSP_USING_CLK
#define NU_CLK_INVOKE_WKTMR
#define BSP_USING_RTC
#define NU_RTC_SUPPORT_MSH_CMD
#define BSP_USING_EADC
#define BSP_USING_EADC0
#define BSP_USING_TMR
#define BSP_USING_UART
#define BSP_USING_UART0
#define BSP_USING_UART1
#define BSP_USING_UART4
#define BSP_USING_UART4_TX_DMA
#define BSP_USING_UART4_RX_DMA
#define BSP_USING_I2C
#define BSP_USING_I2C1
#define BSP_USING_SDH
#define BSP_USING_SDH0
#define NU_SDH_USING_PDMA
#define NU_SDH_HOTPLUG
#define NU_SDH_MOUNT_ON_ROOT
#define BSP_USING_SPI
#define BSP_USING_SPI0
#define BSP_USING_SPI1
#define BSP_USING_SPI2_NONE
#define BSP_USING_SPI3_NONE
#define BSP_USING_CRYPTO
#define BSP_USING_TRNG
#define BSP_USING_CRC
#define NU_CRC_USE_PDMA
#define BSP_USING_WDT
#define BSP_USING_SLCD
#define BSP_USING_USBD
#define BSP_USING_USBH
#define NU_USBHOST_HUB_POLLING_INTERVAL 100
#define BSP_USING_OTG
/* On-board Peripheral Drivers */
#define BSP_USING_NULINKME
#define BOARD_USING_ESP8266
#define BOARD_USING_STORAGE_SDCARD
#define BOARD_USING_OTG
/* Board extended module drivers */
#define BOARD_USING_SEGMENT_LCD
#endif

2
bsp/nuvoton/numaker-pfm-m487/.config
View File

@ -975,3 +975,5 @@ CONFIG_BOARD_USING_HSUSBH_USBD=y
# Board extended module drivers
#
# CONFIG_BOARD_USING_ADVANCE_V4 is not set
CONFIG_BOARD_USE_UTEST=y
CONFIG_UTEST_CMD_PREFIX="bsp.nuvoton.numaker-pfm-m487.test.utest."

6
bsp/nuvoton/numaker-pfm-m487/Kconfig
View File

@ -18,12 +18,6 @@ config PKGS_DIR
option env="PKGS_ROOT"
default "packages"
config NU_PKGS_DIR
string
option env="NU_PKGS_ROOT"
default "../libraries/nu_packages"
source "$RTT_DIR/Kconfig"
source "$PKGS_DIR/Kconfig"
source "$NU_PKGS_DIR/Kconfig"
source "$BSP_DIR/board/Kconfig"

2
bsp/nuvoton/numaker-pfm-m487/board/Kconfig
View File

@ -162,4 +162,6 @@ menu "Hardware Drivers Config"
endmenu
source "$BSP_DIR/../libraries/nu_packages/Kconfig"
endmenu

1966
bsp/nuvoton/numaker-pfm-m487/project.uvproj
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File diff suppressed because it is too large Load Diff

1961
bsp/nuvoton/numaker-pfm-m487/project.uvprojx
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File diff suppressed because it is too large Load Diff

413
bsp/nuvoton/numaker-pfm-m487/rtconfig.h
View File

@ -1,413 +0,0 @@
#ifndef RT_CONFIG_H__
#define RT_CONFIG_H__
/* Automatically generated file; DO NOT EDIT. */
/* RT-Thread Configuration */
/* RT-Thread Kernel */
#define RT_NAME_MAX 8
#define RT_ALIGN_SIZE 4
#define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32
#define RT_TICK_PER_SECOND 1000
#define RT_USING_OVERFLOW_CHECK
#define RT_USING_HOOK
#define RT_HOOK_USING_FUNC_PTR
#define RT_USING_IDLE_HOOK
#define RT_IDLE_HOOK_LIST_SIZE 4
#define IDLE_THREAD_STACK_SIZE 1024
/* kservice optimization */
#define RT_DEBUG
#define RT_DEBUG_COLOR
/* Inter-Thread communication */
#define RT_USING_SEMAPHORE
#define RT_USING_MUTEX
#define RT_USING_EVENT
#define RT_USING_MAILBOX
#define RT_USING_MESSAGEQUEUE
#define RT_USING_SIGNALS
/* Memory Management */
#define RT_USING_MEMPOOL
#define RT_USING_SMALL_MEM
#define RT_USING_SMALL_MEM_AS_HEAP
#define RT_USING_HEAP
/* Kernel Device Object */
#define RT_USING_DEVICE
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 256
#define RT_CONSOLE_DEVICE_NAME "uart0"
#define RT_VER_NUM 0x40100
#define ARCH_ARM
#define RT_USING_CPU_FFS
#define ARCH_ARM_CORTEX_M
#define ARCH_ARM_CORTEX_M4
/* RT-Thread Components */
#define RT_USING_COMPONENTS_INIT
#define RT_USING_USER_MAIN
#define RT_MAIN_THREAD_STACK_SIZE 2048
#define RT_MAIN_THREAD_PRIORITY 10
/* C++ features */
/* Command shell */
#define RT_USING_FINSH
#define RT_USING_MSH
#define FINSH_USING_MSH
#define FINSH_THREAD_NAME "tshell"
#define FINSH_THREAD_PRIORITY 20
#define FINSH_THREAD_STACK_SIZE 2048
#define FINSH_USING_HISTORY
#define FINSH_HISTORY_LINES 5
#define FINSH_USING_SYMTAB
#define FINSH_CMD_SIZE 80
#define MSH_USING_BUILT_IN_COMMANDS
#define FINSH_USING_DESCRIPTION
#define FINSH_ARG_MAX 10
/* Device virtual file system */
#define RT_USING_DFS
#define DFS_USING_POSIX
#define DFS_USING_WORKDIR
#define DFS_FILESYSTEMS_MAX 8
#define DFS_FILESYSTEM_TYPES_MAX 4
#define DFS_FD_MAX 32
#define RT_USING_DFS_ELMFAT
/* elm-chan's FatFs, Generic FAT Filesystem Module */
#define RT_DFS_ELM_CODE_PAGE 437
#define RT_DFS_ELM_WORD_ACCESS
#define RT_DFS_ELM_USE_LFN_3
#define RT_DFS_ELM_USE_LFN 3
#define RT_DFS_ELM_LFN_UNICODE_0
#define RT_DFS_ELM_LFN_UNICODE 0
#define RT_DFS_ELM_MAX_LFN 255
#define RT_DFS_ELM_DRIVES 8
#define RT_DFS_ELM_MAX_SECTOR_SIZE 4096
#define RT_DFS_ELM_REENTRANT
#define RT_DFS_ELM_MUTEX_TIMEOUT 3000
#define RT_USING_DFS_DEVFS
/* Device Drivers */
#define RT_USING_DEVICE_IPC
#define RT_USING_SYSTEM_WORKQUEUE
#define RT_SYSTEM_WORKQUEUE_STACKSIZE 2048
#define RT_SYSTEM_WORKQUEUE_PRIORITY 23
#define RT_USING_SERIAL
#define RT_USING_SERIAL_V1
#define RT_SERIAL_USING_DMA
#define RT_SERIAL_RB_BUFSZ 128
#define RT_USING_CAN
#define RT_USING_HWTIMER
#define RT_USING_I2C
#define RT_USING_I2C_BITOPS
#define RT_USING_PIN
#define RT_USING_ADC
#define RT_USING_PWM
#define RT_USING_PM
#define PM_TICKLESS_THRESHOLD_TIME 2
#define RT_USING_RTC
#define RT_USING_SPI
#define RT_USING_QSPI
#define RT_USING_SFUD
#define RT_SFUD_USING_SFDP
#define RT_SFUD_USING_FLASH_INFO_TABLE
#define RT_SFUD_SPI_MAX_HZ 50000000
#define RT_USING_WDT
#define RT_USING_AUDIO
#define RT_AUDIO_REPLAY_MP_BLOCK_SIZE 4096
#define RT_AUDIO_REPLAY_MP_BLOCK_COUNT 2
#define RT_AUDIO_RECORD_PIPE_SIZE 2048
#define RT_USING_HWCRYPTO
#define RT_HWCRYPTO_DEFAULT_NAME "hwcryto"
#define RT_HWCRYPTO_IV_MAX_SIZE 16
#define RT_HWCRYPTO_KEYBIT_MAX_SIZE 256
#define RT_HWCRYPTO_USING_AES
#define RT_HWCRYPTO_USING_AES_ECB
#define RT_HWCRYPTO_USING_AES_CBC
#define RT_HWCRYPTO_USING_AES_CFB
#define RT_HWCRYPTO_USING_AES_CTR
#define RT_HWCRYPTO_USING_AES_OFB
#define RT_HWCRYPTO_USING_DES
#define RT_HWCRYPTO_USING_DES_ECB
#define RT_HWCRYPTO_USING_DES_CBC
#define RT_HWCRYPTO_USING_3DES
#define RT_HWCRYPTO_USING_3DES_ECB
#define RT_HWCRYPTO_USING_3DES_CBC
#define RT_HWCRYPTO_USING_SHA1
#define RT_HWCRYPTO_USING_SHA2
#define RT_HWCRYPTO_USING_SHA2_224
#define RT_HWCRYPTO_USING_SHA2_256
#define RT_HWCRYPTO_USING_SHA2_384
#define RT_HWCRYPTO_USING_SHA2_512
#define RT_HWCRYPTO_USING_RNG
#define RT_HWCRYPTO_USING_CRC
#define RT_HWCRYPTO_USING_CRC_07
#define RT_HWCRYPTO_USING_CRC_8005
#define RT_HWCRYPTO_USING_CRC_1021
#define RT_HWCRYPTO_USING_CRC_04C11DB7
/* Using USB */
#define RT_USING_USB
#define RT_USING_USB_HOST
#define RT_USBH_MSTORAGE
#define UDISK_MOUNTPOINT "/mnt/udisk/"
#define RT_USING_USB_DEVICE
#define RT_USBD_THREAD_STACK_SZ 4096
#define USB_VENDOR_ID 0x0FFE
#define USB_PRODUCT_ID 0x0001
#define _RT_USB_DEVICE_HID
#define RT_USB_DEVICE_HID
#define RT_USB_DEVICE_HID_MOUSE
/* POSIX layer and C standard library */
#define RT_LIBC_DEFAULT_TIMEZONE 8
/* POSIX (Portable Operating System Interface) layer */
#define RT_USING_POSIX_FS
#define RT_USING_POSIX_DEVIO
/* Interprocess Communication (IPC) */
/* Socket is in the 'Network' category */
/* Network */
/* Socket abstraction layer */
#define RT_USING_SAL
#define SAL_INTERNET_CHECK
/* protocol stack implement */
#define SAL_USING_LWIP
#define SAL_SOCKETS_NUM 16
/* Network interface device */
#define RT_USING_NETDEV
#define NETDEV_USING_IFCONFIG
#define NETDEV_USING_PING
#define NETDEV_USING_NETSTAT
#define NETDEV_USING_AUTO_DEFAULT
#define NETDEV_IPV4 1
#define NETDEV_IPV6 0
/* light weight TCP/IP stack */
#define RT_USING_LWIP
#define RT_USING_LWIP202
#define RT_LWIP_MEM_ALIGNMENT 4
#define RT_LWIP_IGMP
#define RT_LWIP_ICMP
#define RT_LWIP_DNS
#define RT_LWIP_DHCP
#define IP_SOF_BROADCAST 1
#define IP_SOF_BROADCAST_RECV 1
/* Static IPv4 Address */
#define RT_LWIP_IPADDR "192.168.1.30"
#define RT_LWIP_GWADDR "192.168.1.1"
#define RT_LWIP_MSKADDR "255.255.255.0"
#define RT_LWIP_UDP
#define RT_LWIP_TCP
#define RT_LWIP_RAW
#define RT_MEMP_NUM_NETCONN 8
#define RT_LWIP_PBUF_NUM 16
#define RT_LWIP_RAW_PCB_NUM 4
#define RT_LWIP_UDP_PCB_NUM 4
#define RT_LWIP_TCP_PCB_NUM 4
#define RT_LWIP_TCP_SEG_NUM 40
#define RT_LWIP_TCP_SND_BUF 8196
#define RT_LWIP_TCP_WND 8196
#define RT_LWIP_TCPTHREAD_PRIORITY 10
#define RT_LWIP_TCPTHREAD_MBOX_SIZE 8
#define RT_LWIP_TCPTHREAD_STACKSIZE 1024
#define RT_LWIP_ETHTHREAD_PRIORITY 12
#define RT_LWIP_ETHTHREAD_STACKSIZE 1024
#define RT_LWIP_ETHTHREAD_MBOX_SIZE 8
#define LWIP_NETIF_STATUS_CALLBACK 1
#define LWIP_NETIF_LINK_CALLBACK 1
#define SO_REUSE 1
#define LWIP_SO_RCVTIMEO 1
#define LWIP_SO_SNDTIMEO 1
#define LWIP_SO_RCVBUF 1
#define LWIP_SO_LINGER 0
#define LWIP_NETIF_LOOPBACK 0
#define RT_LWIP_USING_PING
/* AT commands */
/* VBUS(Virtual Software BUS) */
/* Utilities */
#define RT_USING_UTEST
#define UTEST_THR_STACK_SIZE 4096
#define UTEST_THR_PRIORITY 20
/* RT-Thread Utestcases */
/* RT-Thread online packages */
/* IoT - internet of things */
/* Wi-Fi */
/* Marvell WiFi */
/* Wiced WiFi */
/* IoT Cloud */
/* security packages */
/* language packages */
/* multimedia packages */
/* LVGL: powerful and easy-to-use embedded GUI library */
/* u8g2: a monochrome graphic library */
/* PainterEngine: A cross-platform graphics application framework written in C language */
/* tools packages */
/* system packages */
/* enhanced kernel services */
/* POSIX extension functions */
/* acceleration: Assembly language or algorithmic acceleration packages */
/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
/* Micrium: Micrium software products porting for RT-Thread */
#define PKG_USING_FAL
#define FAL_DEBUG_CONFIG
#define FAL_DEBUG 1
#define FAL_PART_HAS_TABLE_CFG
#define PKG_USING_FAL_V00400
#define PKG_FAL_VER_NUM 0x00400
/* peripheral libraries and drivers */
/* AI packages */
/* miscellaneous packages */
/* samples: kernel and components samples */
/* entertainment: terminal games and other interesting software packages */
/* Nuvoton Packages Config */
#define NU_PKG_USING_UTILS
#define NU_PKG_USING_DEMO
#define NU_PKG_USING_NAU88L25
/* Hardware Drivers Config */
/* On-chip Peripheral Drivers */
#define SOC_SERIES_M480
#define BSP_USE_STDDRIVER_SOURCE
#define BSP_USING_PDMA
#define NU_PDMA_MEMFUN_ACTOR_MAX 2
#define NU_PDMA_SGTBL_POOL_SIZE 16
#define BSP_USING_FMC
#define BSP_USING_GPIO
#define BSP_USING_CLK
#define NU_CLK_INVOKE_WKTMR
#define BSP_USING_EMAC
#define NU_EMAC_PDMA_MEMCOPY
#define NU_EMAC_PDMA_MEMCOPY_THRESHOLD 128
#define BSP_USING_RTC
#define NU_RTC_SUPPORT_MSH_CMD
#define BSP_USING_TMR
#define BSP_USING_UART
#define BSP_USING_UART0
#define BSP_USING_I2C
#define BSP_USING_I2C1
#define BSP_USING_I2C2
#define BSP_USING_SDH
#define BSP_USING_SDH0
#define NU_SDH_USING_PDMA
#define NU_SDH_HOTPLUG
#define BSP_USING_SPI
#define BSP_USING_SPI_PDMA
#define BSP_USING_SPI0_NONE
#define BSP_USING_SPI1_NONE
#define BSP_USING_SPI2_NONE
#define BSP_USING_SPI3
#define BSP_USING_I2S
#define NU_I2S_DMA_FIFO_SIZE 2048
#define BSP_USING_QSPI
#define BSP_USING_QSPI0
#define BSP_USING_QSPI0_PDMA
#define BSP_USING_CRYPTO
#define BSP_USING_TRNG
#define BSP_USING_CRC
#define NU_CRC_USE_PDMA
#define BSP_USING_WDT
#define BSP_USING_USBD
#define BSP_USING_HSUSBH
#define NU_USBHOST_HUB_POLLING_INTERVAL 100
/* On-board Peripheral Drivers */
#define BSP_USING_NULINKME
#define BOARD_USING_IP101GR
#define BOARD_USING_NAU88L25
#define BOARD_USING_STORAGE_SDCARD
#define BOARD_USING_STORAGE_SPIFLASH
#define BOARD_USING_HSUSBH_USBD
/* Board extended module drivers */
#endif