2017-10-26 15:39:32 +08:00
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/*
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2018-06-09 11:19:30 +08:00
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* The Clear BSD License
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2017-10-26 15:39:32 +08:00
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* Copyright (c) 2016, Freescale Semiconductor, Inc.
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* Copyright 2016-2017 NXP
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2018-06-09 11:19:30 +08:00
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* All rights reserved.
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2017-10-26 15:39:32 +08:00
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*
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* Redistribution and use in source and binary forms, with or without modification,
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2018-06-09 11:19:30 +08:00
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* are permitted (subject to the limitations in the disclaimer below) provided
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* that the following conditions are met:
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2017-10-26 15:39:32 +08:00
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*
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* o Redistributions of source code must retain the above copyright notice, this list
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* of conditions and the following disclaimer.
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*
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* o Redistributions in binary form must reproduce the above copyright notice, this
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* list of conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution.
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*
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* o Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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2018-06-09 11:19:30 +08:00
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* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
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2017-10-26 15:39:32 +08:00
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "fsl_tsc.h"
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2018-06-09 11:19:30 +08:00
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/* Component ID definition, used by tools. */
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#ifndef FSL_COMPONENT_ID
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#define FSL_COMPONENT_ID "platform.drivers.tsc"
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#endif
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2017-10-26 15:39:32 +08:00
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/*******************************************************************************
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* Prototypes
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******************************************************************************/
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/*!
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* @brief Get instance number for TSC module.
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*
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* @param base TSC peripheral base address
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*/
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static uint32_t TSC_GetInstance(TSC_Type *base);
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/*******************************************************************************
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* Variables
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******************************************************************************/
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/*! @brief Pointers to TSC bases for each instance. */
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static TSC_Type *const s_tscBases[] = TSC_BASE_PTRS;
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/*! @brief Pointers to ADC clocks for each instance. */
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static const clock_ip_name_t s_tscClocks[] = TSC_CLOCKS;
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/*******************************************************************************
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* Code
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******************************************************************************/
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static uint32_t TSC_GetInstance(TSC_Type *base)
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{
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uint32_t instance;
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/* Find the instance index from base address mappings. */
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for (instance = 0; instance < ARRAY_SIZE(s_tscBases); instance++)
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{
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if (s_tscBases[instance] == base)
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{
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break;
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}
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}
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assert(instance < ARRAY_SIZE(s_tscBases));
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return instance;
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}
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void TSC_Init(TSC_Type *base, const tsc_config_t *config)
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{
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assert(NULL != config);
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assert(config->measureDelayTime <= 0xFFFFFFU);
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uint32_t tmp32;
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#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
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/* Enable the TSC clock. */
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CLOCK_EnableClock(s_tscClocks[TSC_GetInstance(base)]);
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#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
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/* Configure TSC_BASIC_SETTING register. */
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tmp32 = TSC_BASIC_SETTING_MEASURE_DELAY_TIME(config->measureDelayTime) |
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TSC_BASIC_SETTING__4_5_WIRE(config->detectionMode);
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if (config->enableAutoMeasure)
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{
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tmp32 |= TSC_BASIC_SETTING_AUTO_MEASURE_MASK;
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}
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base->BASIC_SETTING = tmp32;
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/* Configure TSC_PS_INPUT_BUFFER_ADDR register. */
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2018-06-09 11:19:30 +08:00
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base->PRE_CHARGE_TIME = TSC_PRE_CHARGE_TIME_PRE_CHARGE_TIME(config->prechargeTime);
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2017-10-26 15:39:32 +08:00
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}
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void TSC_Deinit(TSC_Type *base)
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{
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#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
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/* Disable the TSC clcok. */
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CLOCK_DisableClock(s_tscClocks[TSC_GetInstance(base)]);
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#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
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}
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void TSC_GetDefaultConfig(tsc_config_t *config)
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{
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config->enableAutoMeasure = false;
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config->measureDelayTime = 0xFFFFU;
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config->prechargeTime = 0xFFFFU;
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config->detectionMode = kTSC_Detection4WireMode;
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}
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uint32_t TSC_GetMeasureValue(TSC_Type *base, tsc_corrdinate_value_selection_t selection)
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{
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uint32_t tmp32 = 0;
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2017-10-26 15:39:32 +08:00
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if (selection == kTSC_XCoordinateValueSelection)
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{
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tmp32 = ((base->MEASEURE_VALUE) & TSC_MEASEURE_VALUE_X_VALUE_MASK) >> TSC_MEASEURE_VALUE_X_VALUE_SHIFT;
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}
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else if (selection == kTSC_YCoordinateValueSelection)
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{
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tmp32 = ((base->MEASEURE_VALUE) & TSC_MEASEURE_VALUE_Y_VALUE_MASK) >> TSC_MEASEURE_VALUE_Y_VALUE_SHIFT;
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}
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else
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{
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}
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return tmp32;
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}
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void TSC_DebugTriggerSignalToADC(TSC_Type *base, tsc_trigger_signal_t hwts, bool enable)
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{
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if (enable)
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{
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/* TSC_DEBUG_MODE_EXT_HWTS field should be writed before writing TSC_DEBUG_MODE_TRIGGER field.
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If the two fields are writed at the same time, the trigger couldn't work as expect. */
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base->DEBUG_MODE &= ~TSC_DEBUG_MODE_EXT_HWTS_MASK;
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base->DEBUG_MODE |= TSC_DEBUG_MODE_EXT_HWTS(hwts);
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base->DEBUG_MODE |= TSC_DEBUG_MODE_TRIGGER_MASK;
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}
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else
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{
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base->DEBUG_MODE &= ~TSC_DEBUG_MODE_TRIGGER_MASK;
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}
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}
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void TSC_DebugEnableDetection(TSC_Type *base, tsc_detection_mode_t detectionMode, bool enable)
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{
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if (detectionMode == kTSC_Detection4WireMode)
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{
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if (enable)
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{
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base->DEBUG_MODE2 |= TSC_DEBUG_MODE2_DETECT_ENABLE_FOUR_WIRE_MASK;
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}
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else
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{
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base->DEBUG_MODE2 &= ~TSC_DEBUG_MODE2_DETECT_ENABLE_FOUR_WIRE_MASK;
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}
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}
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else if (detectionMode == kTSC_Detection5WireMode)
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{
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if (enable)
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{
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base->DEBUG_MODE2 |= TSC_DEBUG_MODE2_DETECT_ENABLE_FIVE_WIRE_MASK;
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}
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else
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{
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base->DEBUG_MODE2 &= ~TSC_DEBUG_MODE2_DETECT_ENABLE_FIVE_WIRE_MASK;
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}
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}
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else
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{
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}
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}
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void TSC_DebugSetPortMode(TSC_Type *base, tsc_port_source_t port, tsc_port_mode_t mode)
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{
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uint32_t tmp32;
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tmp32 = base->DEBUG_MODE2;
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switch (port)
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{
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case kTSC_WiperPortSource:
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tmp32 &= ~(TSC_DEBUG_MODE2_WIPER_200K_PULL_UP_MASK | TSC_DEBUG_MODE2_WIPER_PULL_UP_MASK |
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TSC_DEBUG_MODE2_WIPER_PULL_DOWN_MASK);
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tmp32 |= ((uint32_t)mode << TSC_DEBUG_MODE2_WIPER_PULL_DOWN_SHIFT);
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break;
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case kTSC_YnlrPortSource:
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tmp32 &= ~(TSC_DEBUG_MODE2_YNLR_200K_PULL_UP_MASK | TSC_DEBUG_MODE2_YNLR_PULL_UP_MASK |
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TSC_DEBUG_MODE2_YNLR_PULL_DOWN_MASK);
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tmp32 |= ((uint32_t)mode << TSC_DEBUG_MODE2_YNLR_PULL_DOWN_SHIFT);
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break;
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case kTSC_YpllPortSource:
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tmp32 &= ~(TSC_DEBUG_MODE2_YPLL_200K_PULL_UP_MASK | TSC_DEBUG_MODE2_YPLL_PULL_UP_MASK |
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TSC_DEBUG_MODE2_YPLL_PULL_DOWN_MASK);
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tmp32 |= ((uint32_t)mode << TSC_DEBUG_MODE2_YPLL_PULL_DOWN_SHIFT);
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break;
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case kTSC_XnurPortSource:
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tmp32 &= ~(TSC_DEBUG_MODE2_XNUR_200K_PULL_UP_MASK | TSC_DEBUG_MODE2_XNUR_PULL_UP_MASK |
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TSC_DEBUG_MODE2_XNUR_PULL_DOWN_MASK);
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tmp32 |= ((uint32_t)mode << TSC_DEBUG_MODE2_XNUR_PULL_DOWN_SHIFT);
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break;
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case kTSC_XpulPortSource:
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tmp32 &= ~(TSC_DEBUG_MODE2_XPUL_200K_PULL_UP_MASK | TSC_DEBUG_MODE2_XPUL_PULL_UP_MASK |
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TSC_DEBUG_MODE2_XPUL_PULL_DOWN_MASK);
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tmp32 |= ((uint32_t)mode << TSC_DEBUG_MODE2_XPUL_PULL_DOWN_SHIFT);
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break;
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default:
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break;
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}
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base->DEBUG_MODE2 = tmp32;
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}
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