317 lines
14 KiB
C
317 lines
14 KiB
C
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//*****************************************************************************
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//
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//! @file startup_gcc.c
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//!
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//! @brief Definitions for interrupt handlers, the vector table, and the stack.
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//
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//*****************************************************************************
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//*****************************************************************************
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//
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// Copyright (c) 2017, Ambiq Micro
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are met:
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//
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// 1. Redistributions of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimer.
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//
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// 2. Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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//
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// 3. Neither the name of the copyright holder nor the names of its
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// contributors may be used to endorse or promote products derived from this
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// software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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// POSSIBILITY OF SUCH DAMAGE.
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//
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// This is part of revision 1.2.9 of the AmbiqSuite Development Package.
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//
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//*****************************************************************************
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#include <stdint.h>
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//*****************************************************************************
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//
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// Forward declaration of interrupt handlers.
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//
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//*****************************************************************************
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extern void am_reset_isr(void) __attribute ((naked));
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extern void am_nmi_isr(void) __attribute ((weak));
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extern void am_fault_isr(void) __attribute ((weak));
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extern void am_mpufault_isr(void) __attribute ((weak, alias ("am_fault_isr")));
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extern void am_busfault_isr(void) __attribute ((weak, alias ("am_fault_isr")));
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extern void am_usagefault_isr(void) __attribute ((weak, alias ("am_fault_isr")));
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extern void am_svcall_isr(void) __attribute ((weak, alias ("am_default_isr")));
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extern void am_debugmon_isr(void) __attribute ((weak, alias ("am_default_isr")));
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extern void am_pendsv_isr(void) __attribute ((weak, alias ("am_default_isr")));
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extern void am_systick_isr(void) __attribute ((weak, alias ("am_default_isr")));
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extern void am_brownout_isr(void) __attribute ((weak, alias ("am_default_isr")));
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extern void am_watchdog_isr(void) __attribute ((weak, alias ("am_default_isr")));
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extern void am_clkgen_isr(void) __attribute ((weak, alias ("am_default_isr")));
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extern void am_vcomp_isr(void) __attribute ((weak, alias ("am_default_isr")));
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extern void am_ioslave_ios_isr(void) __attribute ((weak, alias ("am_default_isr")));
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extern void am_ioslave_acc_isr(void) __attribute ((weak, alias ("am_default_isr")));
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extern void am_iomaster0_isr(void) __attribute ((weak, alias ("am_default_isr")));
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extern void am_iomaster1_isr(void) __attribute ((weak, alias ("am_default_isr")));
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extern void am_iomaster2_isr(void) __attribute ((weak, alias ("am_default_isr")));
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extern void am_iomaster3_isr(void) __attribute ((weak, alias ("am_default_isr")));
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extern void am_iomaster4_isr(void) __attribute ((weak, alias ("am_default_isr")));
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extern void am_iomaster5_isr(void) __attribute ((weak, alias ("am_default_isr")));
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extern void am_gpio_isr(void) __attribute ((weak, alias ("am_default_isr")));
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extern void am_ctimer_isr(void) __attribute ((weak, alias ("am_default_isr")));
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extern void am_uart_isr(void) __attribute ((weak, alias ("am_default_isr")));
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extern void am_uart1_isr(void) __attribute ((weak, alias ("am_default_isr")));
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extern void am_adc_isr(void) __attribute ((weak, alias ("am_default_isr")));
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extern void am_pdm_isr(void) __attribute ((weak, alias ("am_default_isr")));
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extern void am_stimer_isr(void) __attribute ((weak, alias ("am_default_isr")));
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extern void am_stimer_cmpr0_isr(void) __attribute ((weak, alias ("am_default_isr")));
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extern void am_stimer_cmpr1_isr(void) __attribute ((weak, alias ("am_default_isr")));
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extern void am_stimer_cmpr2_isr(void) __attribute ((weak, alias ("am_default_isr")));
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extern void am_stimer_cmpr3_isr(void) __attribute ((weak, alias ("am_default_isr")));
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extern void am_stimer_cmpr4_isr(void) __attribute ((weak, alias ("am_default_isr")));
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extern void am_stimer_cmpr5_isr(void) __attribute ((weak, alias ("am_default_isr")));
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extern void am_stimer_cmpr6_isr(void) __attribute ((weak, alias ("am_default_isr")));
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extern void am_stimer_cmpr7_isr(void) __attribute ((weak, alias ("am_default_isr")));
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extern void am_flash_isr(void) __attribute ((weak, alias ("am_default_isr")));
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extern void am_software0_isr(void) __attribute ((weak, alias ("am_default_isr")));
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extern void am_software1_isr(void) __attribute ((weak, alias ("am_default_isr")));
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extern void am_software2_isr(void) __attribute ((weak, alias ("am_default_isr")));
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extern void am_software3_isr(void) __attribute ((weak, alias ("am_default_isr")));
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extern void am_default_isr(void) __attribute ((weak));
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//*****************************************************************************
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//
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// The entry point for the application.
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//
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//*****************************************************************************
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extern int main(void);
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//*****************************************************************************
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//
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// Reserve space for the system stack.
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//
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//*****************************************************************************
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__attribute__ ((section(".stack")))
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static uint32_t g_pui32Stack[1024];
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//*****************************************************************************
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//
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// The vector table. Note that the proper constructs must be placed on this to
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// ensure that it ends up at physical address 0x0000.0000.
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//
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// Note: Aliasing and weakly exporting am_mpufault_isr, am_busfault_isr, and
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// am_usagefault_isr does not work if am_fault_isr is defined externally.
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// Therefore, we'll explicitly use am_fault_isr in the table for those vectors.
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//
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//*****************************************************************************
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__attribute__ ((section(".isr_vector")))
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void (* const g_am_pfnVectors[])(void) =
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{
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(void (*)(void))((uint32_t)g_pui32Stack + sizeof(g_pui32Stack)),
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// The initial stack pointer
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am_reset_isr, // The reset handler
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am_nmi_isr, // The NMI handler
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am_fault_isr, // The hard fault handler
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am_fault_isr, // The MPU fault handler
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am_fault_isr, // The bus fault handler
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am_fault_isr, // The usage fault handler
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0, // Reserved
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0, // Reserved
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0, // Reserved
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0, // Reserved
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am_svcall_isr, // SVCall handle
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am_debugmon_isr, // Debug monitor handler
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0, // Reserved
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am_pendsv_isr, // The PendSV handler
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am_systick_isr, // The SysTick handler
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//
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// Peripheral Interrupts
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//
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am_brownout_isr, // 0: Brownout
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am_watchdog_isr, // 1: Watchdog
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am_clkgen_isr, // 2: CLKGEN
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am_vcomp_isr, // 3: Voltage Comparator
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am_ioslave_ios_isr, // 4: I/O Slave general
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am_ioslave_acc_isr, // 5: I/O Slave access
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am_iomaster0_isr, // 6: I/O Master 0
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am_iomaster1_isr, // 7: I/O Master 1
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am_iomaster2_isr, // 8: I/O Master 2
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am_iomaster3_isr, // 9: I/O Master 3
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am_iomaster4_isr, // 10: I/O Master 4
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am_iomaster5_isr, // 11: I/O Master 5
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am_gpio_isr, // 12: GPIO
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am_ctimer_isr, // 13: CTIMER
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am_uart_isr, // 14: UART
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am_uart1_isr, // 15: UART
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am_adc_isr, // 16: ADC
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am_pdm_isr, // 17: ADC
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am_stimer_isr, // 18: SYSTEM TIMER
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am_stimer_cmpr0_isr, // 19: SYSTEM TIMER COMPARE0
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am_stimer_cmpr1_isr, // 20: SYSTEM TIMER COMPARE1
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am_stimer_cmpr2_isr, // 21: SYSTEM TIMER COMPARE2
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am_stimer_cmpr3_isr, // 22: SYSTEM TIMER COMPARE3
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am_stimer_cmpr4_isr, // 23: SYSTEM TIMER COMPARE4
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am_stimer_cmpr5_isr, // 24: SYSTEM TIMER COMPARE5
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am_stimer_cmpr6_isr, // 25: SYSTEM TIMER COMPARE6
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am_stimer_cmpr7_isr, // 26: SYSTEM TIMER COMPARE7
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am_flash_isr, // 27: FLASH
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am_software0_isr, // 28: SOFTWARE0
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am_software1_isr, // 29: SOFTWARE1
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am_software2_isr, // 30: SOFTWARE2
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am_software3_isr // 31: SOFTWARE3
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};
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//*****************************************************************************
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//
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// The following are constructs created by the linker, indicating where the
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// the "data" and "bss" segments reside in memory. The initializers for the
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// "data" segment resides immediately following the "text" segment.
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//
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//*****************************************************************************
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extern uint32_t _etext;
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extern uint32_t _sdata;
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extern uint32_t _edata;
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extern uint32_t _sbss;
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extern uint32_t _ebss;
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//*****************************************************************************
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//
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// This is the code that gets called when the processor first starts execution
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// following a reset event. Only the absolutely necessary set is performed,
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// after which the application supplied entry() routine is called.
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//
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//*****************************************************************************
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#if defined(__GNUC_STDC_INLINE__)
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void
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am_reset_isr(void)
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{
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//
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// Set the vector table pointer.
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//
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__asm(" ldr r0, =0xE000ED08\n"
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" ldr r1, =g_am_pfnVectors\n"
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" str r1, [r0]");
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//
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// Set the stack pointer.
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//
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__asm(" ldr sp, [r1]");
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#ifndef NOFPU
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//
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// Enable the FPU.
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//
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__asm("ldr r0, =0xE000ED88\n"
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"ldr r1,[r0]\n"
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"orr r1,#(0xF << 20)\n"
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"str r1,[r0]\n"
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"dsb\n"
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"isb\n");
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#endif
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//
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// Copy the data segment initializers from flash to SRAM.
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//
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__asm(" ldr r0, =_init_data\n"
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" ldr r1, =_sdata\n"
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" ldr r2, =_edata\n"
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"copy_loop:\n"
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" ldr r3, [r0], #4\n"
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" str r3, [r1], #4\n"
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" cmp r1, r2\n"
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" blt copy_loop\n");
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//
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// Zero fill the bss segment.
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//
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__asm(" ldr r0, =_sbss\n"
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" ldr r1, =_ebss\n"
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" mov r2, #0\n"
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"zero_loop:\n"
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" cmp r0, r1\n"
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" it lt\n"
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" strlt r2, [r0], #4\n"
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" blt zero_loop");
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//
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// Call the application's entry point.
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//
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main();
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//
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// If main returns then execute a break point instruction
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//
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__asm(" bkpt ");
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}
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#else
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#error GNU STDC inline not supported.
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#endif
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//*****************************************************************************
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//
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// This is the code that gets called when the processor receives a NMI. This
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// simply enters an infinite loop, preserving the system state for examination
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// by a debugger.
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//
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//*****************************************************************************
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void
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am_nmi_isr(void)
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{
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//
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// Go into an infinite loop.
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//
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while(1)
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{
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}
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}
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//*****************************************************************************
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//
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// This is the code that gets called when the processor receives a fault
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// interrupt. This simply enters an infinite loop, preserving the system state
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// for examination by a debugger.
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//
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//*****************************************************************************
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void
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am_fault_isr(void)
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{
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//
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// Go into an infinite loop.
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//
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while(1)
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{
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}
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}
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//*****************************************************************************
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//
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// This is the code that gets called when the processor receives an unexpected
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// interrupt. This simply enters an infinite loop, preserving the system state
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// for examination by a debugger.
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//
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//*****************************************************************************
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void
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am_default_isr(void)
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{
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//
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// Go into an infinite loop.
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//
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while(1)
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{
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}
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}
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