2014-07-13 14:13:39 +08:00
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/*
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* File : drv_uart.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2009-2013 RT-Thread Develop Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2013-05-18 Bernard The first version for LPC40xx
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*/
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#include <rthw.h>
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#include <rtthread.h>
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#include <rtdevice.h>
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#include "board.h"
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#include "drv_uart.h"
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struct lpc_uart
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{
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LPC_USARTn_Type *USART;
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IRQn_Type USART_IRQn;
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};
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static rt_err_t lpc_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
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{
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RT_ASSERT(serial != RT_NULL);
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return RT_EOK;
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}
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static rt_err_t lpc_control(struct rt_serial_device *serial, int cmd, void *arg)
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{
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struct lpc_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = (struct lpc_uart *)serial->parent.user_data;
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switch (cmd)
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{
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case RT_DEVICE_CTRL_CLR_INT:
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/* disable rx irq */
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uart->USART->IER &= ~UART_IER_RBRINT_EN;
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break;
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case RT_DEVICE_CTRL_SET_INT:
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/* enable rx irq */
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uart->USART->IER |= UART_IER_RBRINT_EN;
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break;
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}
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return RT_EOK;
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}
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static int lpc_putc(struct rt_serial_device *serial, char c)
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{
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struct lpc_uart *uart;
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uart = (struct lpc_uart *)serial->parent.user_data;
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while (!(uart->USART->LSR & 0x20));
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uart->USART->THR = c;
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return 1;
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}
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static int lpc_getc(struct rt_serial_device *serial)
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{
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struct lpc_uart *uart;
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uart = (struct lpc_uart *)serial->parent.user_data;
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if (uart->USART->LSR & 0x01)
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{
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return (uart->USART->RBR);
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}
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return -1;
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}
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static const struct rt_uart_ops lpc_uart_ops =
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{
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lpc_configure,
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lpc_control,
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lpc_putc,
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lpc_getc,
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};
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2015-01-04 19:54:53 +08:00
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static void _do_uart_isr(struct rt_serial_device *sdev)
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2014-07-13 14:13:39 +08:00
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{
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struct lpc_uart *uart;
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volatile uint32_t intsrc, temp;
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2015-01-04 19:54:53 +08:00
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uart = sdev->parent.user_data;
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2014-07-13 14:13:39 +08:00
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/* Determine the interrupt source */
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intsrc = uart->USART->IIR & UART_IIR_INTID_MASK;
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switch (intsrc)
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{
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2015-01-04 19:54:53 +08:00
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case UART_IIR_INTID_RLS:
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/* Receive Line Status interrupt */
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2014-07-13 14:13:39 +08:00
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/* read the line status */
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intsrc = uart->USART->LSR;
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/* Receive an error data */
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if (intsrc & UART_LSR_PE)
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{
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2015-01-04 19:54:53 +08:00
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temp = uart->USART->RBR;
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2014-07-13 14:13:39 +08:00
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}
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break;
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2015-01-04 19:54:53 +08:00
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case UART_IIR_INTID_RDA:
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/* Receive data */
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case UART_IIR_INTID_CTI:
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/* Receive data timeout */
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2014-07-13 14:13:39 +08:00
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/* read the data to buffer */
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while (uart->USART->LSR & UART_LSR_RDR)
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{
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2015-01-04 19:54:53 +08:00
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rt_hw_serial_isr(sdev, RT_SERIAL_EVENT_RX_IND);
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2014-07-13 14:13:39 +08:00
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}
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break;
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default:
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break;
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}
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2015-01-04 19:54:53 +08:00
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}
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2014-07-13 14:13:39 +08:00
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2015-01-04 19:54:53 +08:00
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#if defined(RT_USING_UART0)
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/* UART0 device driver structure */
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struct lpc_uart uart0 =
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{
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LPC_USART0,
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USART0_IRQn,
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};
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struct rt_serial_device serial0;
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void UART0_IRQHandler(void)
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{
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rt_interrupt_enter();
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_do_uart_isr(&serial0);
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2014-07-13 14:13:39 +08:00
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rt_interrupt_leave();
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}
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#endif
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2015-01-04 19:54:53 +08:00
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2014-07-13 14:13:39 +08:00
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#if defined(RT_USING_UART2)
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struct lpc_uart uart2 =
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{
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LPC_USART2,
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USART2_IRQn,
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};
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struct rt_serial_device serial2;
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void UART2_IRQHandler(void)
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{
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rt_interrupt_enter();
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2015-01-04 19:54:53 +08:00
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_do_uart_isr(&serial2);
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2014-07-13 14:13:39 +08:00
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rt_interrupt_leave();
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}
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#endif
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2015-01-04 19:54:53 +08:00
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2015-01-04 20:43:32 +08:00
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#if defined(RT_USING_UART3)
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struct lpc_uart uart3 =
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{
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LPC_USART3,
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USART3_IRQn,
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};
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struct rt_serial_device serial3;
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void UART3_IRQHandler(void)
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{
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rt_interrupt_enter();
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_do_uart_isr(&serial3);
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rt_interrupt_leave();
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}
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#endif
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2014-07-13 14:13:39 +08:00
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void rt_hw_uart_init(void)
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{
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struct lpc_uart *uart;
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struct serial_configure config;
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#ifdef RT_USING_UART0
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uart = &uart0;
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config.baud_rate = BAUD_RATE_115200;
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config.bit_order = BIT_ORDER_LSB;
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config.data_bits = DATA_BITS_8;
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config.parity = PARITY_NONE;
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config.stop_bits = STOP_BITS_1;
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config.invert = NRZ_NORMAL;
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2015-01-04 19:54:53 +08:00
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config.bufsz = RT_SERIAL_RB_BUFSZ;
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2014-07-13 14:13:39 +08:00
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serial0.ops = &lpc_uart_ops;
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serial0.config = config;
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/* Enable GPIO register interface clock */
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LPC_CCU1->CLK_M4_GPIO_CFG |= 0x01;
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while (!(LPC_CCU1->CLK_M4_GPIO_STAT & 0x01));
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2015-01-04 19:54:53 +08:00
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/* Enable USART0 peripheral clock */
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2014-07-13 14:13:39 +08:00
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LPC_CCU2->CLK_APB0_USART0_CFG |= 0x01;
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while (!(LPC_CCU2->CLK_APB0_USART0_STAT & 0x01));
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2015-01-04 19:54:53 +08:00
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/* Enable USART0 register interface clock */
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2014-07-13 14:13:39 +08:00
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LPC_CCU1->CLK_M4_USART0_CFG |= 0x01;
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while (!(LPC_CCU1->CLK_M4_USART0_STAT & 0x01));
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/* Init GPIO pins */
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LPC_SCU->SFSP2_0 = (1 << 6) | /* Input buffer enabled */
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2015-01-04 19:54:53 +08:00
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(1 << 4) | /* Pull-up disabled */
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(1 << 0) ; /* Pin P2_0 used as U0_TXD */
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2014-07-13 14:13:39 +08:00
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LPC_SCU->SFSP2_1 = (1 << 6) | /* Input buffer enabled */
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2015-01-04 19:54:53 +08:00
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(1 << 4) | /* Pull-up disabled */
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(1 << 0) ; /* Pin P2_1 used as U0_RXD */
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2014-07-13 14:13:39 +08:00
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/* Init USART0 */
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2015-01-04 20:43:32 +08:00
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uart->USART->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
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uart->USART->DLL = 0x06; /* 115200 Baudrate @ 12 MHz IRC */
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uart->USART->DLM = 0x00;
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uart->USART->FDR = 0xC1;
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uart->USART->LCR = 0x03; /* DLAB = 0 */
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2014-07-13 14:13:39 +08:00
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/* preemption = 1, sub-priority = 1 */
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NVIC_SetPriority(uart->USART_IRQn, ((0x01 << 3) | 0x01));
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/* Enable Interrupt for UART channel */
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NVIC_EnableIRQ(uart->USART_IRQn);
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2015-01-04 19:54:53 +08:00
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/* register UART0 device */
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2014-07-13 14:13:39 +08:00
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rt_hw_serial_register(&serial0, "uart0",
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2014-07-18 06:45:54 +08:00
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RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
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2014-07-13 14:13:39 +08:00
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uart);
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#endif
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#ifdef RT_USING_UART2
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uart = &uart2;
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config.baud_rate = BAUD_RATE_115200;
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config.bit_order = BIT_ORDER_LSB;
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config.data_bits = DATA_BITS_8;
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config.parity = PARITY_NONE;
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config.stop_bits = STOP_BITS_1;
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config.invert = NRZ_NORMAL;
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2015-01-04 19:54:53 +08:00
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config.bufsz = RT_SERIAL_RB_BUFSZ;
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2014-07-13 14:13:39 +08:00
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serial2.ops = &lpc_uart_ops;
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serial2.config = config;
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/* Enable GPIO register interface clock */
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LPC_CCU1->CLK_M4_GPIO_CFG |= 0x01;
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while (!(LPC_CCU1->CLK_M4_GPIO_STAT & 0x01));
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2015-01-04 19:54:53 +08:00
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/* Enable USART2 peripheral clock */
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2015-01-04 20:43:32 +08:00
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LPC_CCU2->CLK_APB2_USART2_CFG |= 0x01;
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2014-07-13 14:13:39 +08:00
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while (!(LPC_CCU2->CLK_APB2_USART2_STAT & 0x01));
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/* Enable USART2 register interface clock */
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2015-01-04 19:54:53 +08:00
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LPC_CCU1->CLK_M4_USART2_CFG |= 0x01;
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2014-07-13 14:13:39 +08:00
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while (!(LPC_CCU1->CLK_M4_USART2_STAT & 0x01));
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/* Init GPIO pins */
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LPC_SCU->SFSP1_15 = (1 << 6) | /* Input buffer enabled */
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2015-01-04 19:54:53 +08:00
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(1 << 4) | /* Pull-up disabled */
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(1 << 0) ; /* Pin P1_15 used as U2_TXD */
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2014-07-13 14:13:39 +08:00
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LPC_SCU->SFSP1_16 = (1 << 6) | /* Input buffer enabled */
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2015-01-04 19:54:53 +08:00
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(1 << 4) | /* Pull-up disabled */
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(1 << 0) ; /* Pin P1_16 used as U2_RXD */
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2014-07-13 14:13:39 +08:00
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/* Init USART2 */
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2015-01-04 20:43:32 +08:00
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uart->USART->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
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uart->USART->DLL = 0x06; /* 115200 Baudrate @ 12 MHz IRC */
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uart->USART->DLM = 0x00;
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uart->USART->FDR = 0xC1;
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uart->USART->LCR = 0x03; /* DLAB = 0 */
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2015-01-04 19:54:53 +08:00
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2014-07-13 14:13:39 +08:00
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/* preemption = 1, sub-priority = 1 */
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NVIC_SetPriority(uart->USART_IRQn, ((0x01 << 3) | 0x01));
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/* Enable Interrupt for UART channel */
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NVIC_EnableIRQ(uart->USART_IRQn);
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2015-01-04 19:54:53 +08:00
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/* register UART2 device */
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2014-07-13 14:13:39 +08:00
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rt_hw_serial_register(&serial2, "uart2",
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2014-07-18 06:45:54 +08:00
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RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
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2014-07-13 14:13:39 +08:00
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uart);
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#endif
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2015-01-04 20:43:32 +08:00
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#ifdef RT_USING_UART3
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uart = &uart3;
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config.baud_rate = BAUD_RATE_115200;
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config.bit_order = BIT_ORDER_LSB;
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config.data_bits = DATA_BITS_8;
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config.parity = PARITY_NONE;
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config.stop_bits = STOP_BITS_1;
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config.invert = NRZ_NORMAL;
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config.bufsz = RT_SERIAL_RB_BUFSZ;
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serial3.ops = &lpc_uart_ops;
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serial3.config = config;
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/* Enable GPIO register interface clock */
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LPC_CCU1->CLK_M4_GPIO_CFG |= 0x01;
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while (!(LPC_CCU1->CLK_M4_GPIO_STAT & 0x01));
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/* Enable USART3 peripheral clock */
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LPC_CCU2->CLK_APB2_USART3_CFG |= 0x01;
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while (!(LPC_CCU2->CLK_APB2_USART3_STAT & 0x01));
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/* Enable USART3 register interface clock */
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LPC_CCU1->CLK_M4_USART3_CFG |= 0x01;
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while (!(LPC_CCU1->CLK_M4_USART3_STAT & 0x01));
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/* Init GPIO pins */
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LPC_SCU->SFSP2_3 = (1 << 6) | /* Input buffer enabled */
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(1 << 4) | /* Pull-up disabled */
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(2 << 0) ; /* Pin P1_15 used as U2_TXD */
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LPC_SCU->SFSP2_4 = (1 << 6) | /* Input buffer enabled */
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(1 << 4) | /* Pull-up disabled */
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(2 << 0) ; /* Pin P1_16 used as U2_RXD */
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/* Init USART3 */
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uart->USART->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
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uart->USART->DLL = 0x06; /* 115200 Baudrate @ 12 MHz IRC */
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uart->USART->DLM = 0x00;
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uart->USART->FDR = 0xC1;
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uart->USART->LCR = 0x03; /* DLAB = 0 */
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/* preemption = 1, sub-priority = 1 */
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NVIC_SetPriority(uart->USART_IRQn, ((0x01 << 3) | 0x01));
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/* Enable Interrupt for UART channel */
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NVIC_EnableIRQ(uart->USART_IRQn);
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/* register UART2 device */
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rt_hw_serial_register(&serial3, "uart3",
|
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RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
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|
uart);
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#endif
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2014-07-13 14:13:39 +08:00
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}
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