199 lines
8.5 KiB
C
199 lines
8.5 KiB
C
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/*!
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*******************************************************************************
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**
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** \file gh_efuse.h
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**
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** \brief EFUSE controller.
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**
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** Copyright: 2012 - 2016 (C) GoKe Microelectronics
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**
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** \attention THIS SAMPLE CODE IS PROVIDED AS IS. GOKE MICROELECTRONICS
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** ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR
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** OMMISSIONS.
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**
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** \note Do not modify this file as it is generated automatically.
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**
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******************************************************************************/
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#ifndef _GH_EFUSE_H
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#define _GH_EFUSE_H
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#ifdef __LINUX__
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#include "reg4linux.h"
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#else
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#define FIO_ADDRESS(block,address) (address)
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#define FIO_MOFFSET(block,moffset) (moffset)
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#endif
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#ifndef __LINUX__
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#include "gtypes.h" /* global type definitions */
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#include "gh_lib_cfg.h" /* configuration */
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#endif
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#define GH_EFUSE_ENABLE_DEBUG_PRINT 0
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#ifdef __LINUX__
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#define GH_EFUSE_DEBUG_PRINT_FUNCTION printk
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#else
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#define GH_EFUSE_DEBUG_PRINT_FUNCTION printf
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#endif
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#ifndef __LINUX__
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#if GH_EFUSE_ENABLE_DEBUG_PRINT
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#include <stdio.h>
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#endif
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#endif
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/*----------------------------------------------------------------------------*/
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/* registers */
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/*----------------------------------------------------------------------------*/
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#define REG_EFUSE_KEY FIO_ADDRESS(EFUSE,0x9000B000) /* read */
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#define REG_EFUSE_DATA FIO_ADDRESS(EFUSE,0x9000B010) /* read */
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#define REG_EFUSE_USER_DATA FIO_ADDRESS(EFUSE,0x9000B014) /* read */
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#define REG_EFUSE_CTRL FIO_ADDRESS(EFUSE,0x9000B100) /* read/write */
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#define REG_EFUSE_BOOT FIO_ADDRESS(EFUSE,0x9000B104) /* read/write */
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/*----------------------------------------------------------------------------*/
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/* bit group structures */
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/*----------------------------------------------------------------------------*/
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typedef union { /* EFUSE_Data */
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U32 all;
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struct {
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U32 boot_mode_sel : 1;
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U32 engine_sel : 1;
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U32 user_data : 30;
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} bitc;
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} GH_EFUSE_DATA_S;
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typedef union { /* EFUSE_CTRL */
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U32 all;
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struct {
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U32 wr_progen_high_cnt : 9;
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U32 wr_progen_low_cnt : 6;
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U32 wr_addr_setup_cnt : 4;
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U32 rd_addr_setup_cnt : 3;
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U32 rd_prchg_setup_cnt : 2;
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U32 rd_prchg_hold_cnt : 2;
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U32 rd_sense_hold_cnt : 3;
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U32 wait_rd_addr_update_cnt : 3;
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} bitc;
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} GH_EFUSE_CTRL_S;
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typedef union { /* EFUSE_BOOT */
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U32 all;
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struct {
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U32 en : 1;
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U32 rd_ok : 1;
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U32 : 30;
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} bitc;
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} GH_EFUSE_BOOT_S;
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/*----------------------------------------------------------------------------*/
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/* mirror variables */
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/*----------------------------------------------------------------------------*/
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*----------------------------------------------------------------------------*/
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/* register EFUSE_KEY (read) */
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/*----------------------------------------------------------------------------*/
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/*! \brief Reads the register 'EFUSE_KEY'. */
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U32 GH_EFUSE_get_KEY(U8 index);
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/*----------------------------------------------------------------------------*/
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/* register EFUSE_Data (read) */
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/*----------------------------------------------------------------------------*/
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/*! \brief Reads the register 'EFUSE_Data'. */
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U32 GH_EFUSE_get_Data(U8 index);
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/*! \brief Reads the bit group 'boot_mode_sel' of register 'EFUSE_Data'. */
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U8 GH_EFUSE_get_Data_boot_mode_sel(U8 index);
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/*! \brief Reads the bit group 'engine_sel' of register 'EFUSE_Data'. */
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U8 GH_EFUSE_get_Data_engine_sel(U8 index);
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/*! \brief Reads the bit group 'User_Data' of register 'EFUSE_Data'. */
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U32 GH_EFUSE_get_Data_User_Data(U8 index);
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/*----------------------------------------------------------------------------*/
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/* register EFUSE_User_Data (read) */
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/*----------------------------------------------------------------------------*/
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/*! \brief Reads the register 'EFUSE_User_Data'. */
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U32 GH_EFUSE_get_User_Data(U8 index);
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/*----------------------------------------------------------------------------*/
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/* register EFUSE_CTRL (read/write) */
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/*----------------------------------------------------------------------------*/
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/*! \brief Writes the register 'EFUSE_CTRL'. */
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void GH_EFUSE_set_CTRL(U32 data);
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/*! \brief Reads the register 'EFUSE_CTRL'. */
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U32 GH_EFUSE_get_CTRL(void);
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/*! \brief Writes the bit group 'wr_progen_high_cnt' of register 'EFUSE_CTRL'. */
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void GH_EFUSE_set_CTRL_wr_progen_high_cnt(U16 data);
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/*! \brief Reads the bit group 'wr_progen_high_cnt' of register 'EFUSE_CTRL'. */
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U16 GH_EFUSE_get_CTRL_wr_progen_high_cnt(void);
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/*! \brief Writes the bit group 'wr_progen_low_cnt' of register 'EFUSE_CTRL'. */
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void GH_EFUSE_set_CTRL_wr_progen_low_cnt(U8 data);
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/*! \brief Reads the bit group 'wr_progen_low_cnt' of register 'EFUSE_CTRL'. */
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U8 GH_EFUSE_get_CTRL_wr_progen_low_cnt(void);
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/*! \brief Writes the bit group 'wr_addr_setup_cnt' of register 'EFUSE_CTRL'. */
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void GH_EFUSE_set_CTRL_wr_addr_setup_cnt(U8 data);
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/*! \brief Reads the bit group 'wr_addr_setup_cnt' of register 'EFUSE_CTRL'. */
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U8 GH_EFUSE_get_CTRL_wr_addr_setup_cnt(void);
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/*! \brief Writes the bit group 'rd_addr_setup_cnt' of register 'EFUSE_CTRL'. */
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void GH_EFUSE_set_CTRL_rd_addr_setup_cnt(U8 data);
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/*! \brief Reads the bit group 'rd_addr_setup_cnt' of register 'EFUSE_CTRL'. */
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U8 GH_EFUSE_get_CTRL_rd_addr_setup_cnt(void);
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/*! \brief Writes the bit group 'rd_prchg_setup_cnt' of register 'EFUSE_CTRL'. */
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void GH_EFUSE_set_CTRL_rd_prchg_setup_cnt(U8 data);
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/*! \brief Reads the bit group 'rd_prchg_setup_cnt' of register 'EFUSE_CTRL'. */
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U8 GH_EFUSE_get_CTRL_rd_prchg_setup_cnt(void);
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/*! \brief Writes the bit group 'rd_prchg_hold_cnt' of register 'EFUSE_CTRL'. */
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void GH_EFUSE_set_CTRL_rd_prchg_hold_cnt(U8 data);
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/*! \brief Reads the bit group 'rd_prchg_hold_cnt' of register 'EFUSE_CTRL'. */
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U8 GH_EFUSE_get_CTRL_rd_prchg_hold_cnt(void);
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/*! \brief Writes the bit group 'rd_sense_hold_cnt' of register 'EFUSE_CTRL'. */
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void GH_EFUSE_set_CTRL_rd_sense_hold_cnt(U8 data);
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/*! \brief Reads the bit group 'rd_sense_hold_cnt' of register 'EFUSE_CTRL'. */
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U8 GH_EFUSE_get_CTRL_rd_sense_hold_cnt(void);
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/*! \brief Writes the bit group 'Wait_rd_addr_update_cnt' of register 'EFUSE_CTRL'. */
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void GH_EFUSE_set_CTRL_Wait_rd_addr_update_cnt(U8 data);
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/*! \brief Reads the bit group 'Wait_rd_addr_update_cnt' of register 'EFUSE_CTRL'. */
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U8 GH_EFUSE_get_CTRL_Wait_rd_addr_update_cnt(void);
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/*----------------------------------------------------------------------------*/
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/* register EFUSE_BOOT (read/write) */
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/*----------------------------------------------------------------------------*/
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/*! \brief Writes the register 'EFUSE_BOOT'. */
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void GH_EFUSE_set_BOOT(U32 data);
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/*! \brief Reads the register 'EFUSE_BOOT'. */
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U32 GH_EFUSE_get_BOOT(void);
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/*! \brief Writes the bit group 'EN' of register 'EFUSE_BOOT'. */
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void GH_EFUSE_set_BOOT_EN(U8 data);
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/*! \brief Reads the bit group 'EN' of register 'EFUSE_BOOT'. */
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U8 GH_EFUSE_get_BOOT_EN(void);
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/*! \brief Writes the bit group 'RD_OK' of register 'EFUSE_BOOT'. */
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void GH_EFUSE_set_BOOT_RD_OK(U8 data);
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/*! \brief Reads the bit group 'RD_OK' of register 'EFUSE_BOOT'. */
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U8 GH_EFUSE_get_BOOT_RD_OK(void);
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/*----------------------------------------------------------------------------*/
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/* init function */
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/*----------------------------------------------------------------------------*/
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/*! \brief Initialises the registers and mirror variables. */
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void GH_EFUSE_init(void);
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#ifdef SRC_INLINE
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#define SRC_INC 1
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#include "gh_efuse.c"
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#undef SRC_INC
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif /* _GH_EFUSE_H */
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/*----------------------------------------------------------------------------*/
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/* end of file */
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/*----------------------------------------------------------------------------*/
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