626 lines
20 KiB
C
626 lines
20 KiB
C
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/*
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* Copyright (c) 2015, Freescale Semiconductor, Inc.
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* Copyright 2016-2021 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include "fsl_enc.h"
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/* Component ID definition, used by tools. */
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#ifndef FSL_COMPONENT_ID
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#define FSL_COMPONENT_ID "platform.drivers.enc"
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#endif
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#define ENC_CTRL_W1C_FLAGS (ENC_CTRL_HIRQ_MASK | ENC_CTRL_XIRQ_MASK | ENC_CTRL_DIRQ_MASK | ENC_CTRL_CMPIRQ_MASK)
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#if (defined(FSL_FEATURE_ENC_HAS_NO_CTRL2_SAB_INT) && FSL_FEATURE_ENC_HAS_NO_CTRL2_SAB_INT)
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#define ENC_CTRL2_W1C_FLAGS (ENC_CTRL2_ROIRQ_MASK | ENC_CTRL2_RUIRQ_MASK)
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#else
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#define ENC_CTRL2_W1C_FLAGS (ENC_CTRL2_SABIRQ_MASK | ENC_CTRL2_ROIRQ_MASK | ENC_CTRL2_RUIRQ_MASK)
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#endif
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/*******************************************************************************
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* Prototypes
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******************************************************************************/
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/*!
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* @brief Get instance number for ENC module.
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*
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* @param base ENC peripheral base address
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*/
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static uint32_t ENC_GetInstance(ENC_Type *base);
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/*******************************************************************************
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* Variables
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******************************************************************************/
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/*! @brief Pointers to ENC bases for each instance. */
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static ENC_Type *const s_encBases[] = ENC_BASE_PTRS;
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#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
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/*! @brief Pointers to ENC clocks for each instance. */
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static const clock_ip_name_t s_encClocks[] = ENC_CLOCKS;
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#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
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/*******************************************************************************
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* Code
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******************************************************************************/
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static uint32_t ENC_GetInstance(ENC_Type *base)
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{
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uint32_t instance;
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/* Find the instance index from base address mappings. */
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for (instance = 0; instance < ARRAY_SIZE(s_encBases); instance++)
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{
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if (s_encBases[instance] == base)
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{
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break;
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}
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}
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assert(instance < ARRAY_SIZE(s_encBases));
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return instance;
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}
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/*!
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* brief Initialization for the ENC module.
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*
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* This function is to make the initialization for the ENC module. It should be called firstly before any operation to
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* the ENC with the operations like:
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* - Enable the clock for ENC module.
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* - Configure the ENC's working attributes.
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*
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* param base ENC peripheral base address.
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* param config Pointer to configuration structure. See to "enc_config_t".
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*/
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void ENC_Init(ENC_Type *base, const enc_config_t *config)
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{
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assert(NULL != config);
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uint16_t tmp16;
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#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
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/* Enable the clock. */
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CLOCK_EnableClock(s_encClocks[ENC_GetInstance(base)]);
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#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
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/* ENC_CTRL. */
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tmp16 = base->CTRL & (uint16_t)(~(ENC_CTRL_W1C_FLAGS | ENC_CTRL_HIP_MASK | ENC_CTRL_HNE_MASK | ENC_CTRL_REV_MASK |
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ENC_CTRL_PH1_MASK | ENC_CTRL_XIP_MASK | ENC_CTRL_XNE_MASK | ENC_CTRL_WDE_MASK));
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/* For HOME trigger. */
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if (kENC_HOMETriggerDisabled != config->HOMETriggerMode)
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{
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tmp16 |= ENC_CTRL_HIP_MASK;
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if (kENC_HOMETriggerOnFallingEdge == config->HOMETriggerMode)
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{
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tmp16 |= ENC_CTRL_HNE_MASK;
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}
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}
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/* For encoder work mode. */
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if (config->enableReverseDirection)
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{
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tmp16 |= ENC_CTRL_REV_MASK;
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}
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if (kENC_DecoderWorkAsSignalPhaseCountMode == config->decoderWorkMode)
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{
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tmp16 |= ENC_CTRL_PH1_MASK;
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}
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/* For INDEX trigger. */
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if (kENC_INDEXTriggerDisabled != config->INDEXTriggerMode)
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{
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tmp16 |= ENC_CTRL_XIP_MASK;
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if (kENC_INDEXTriggerOnFallingEdge == config->INDEXTriggerMode)
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{
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tmp16 |= ENC_CTRL_XNE_MASK;
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}
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}
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/* Watchdog. */
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if (config->enableWatchdog)
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{
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tmp16 |= ENC_CTRL_WDE_MASK;
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base->WTR = config->watchdogTimeoutValue; /* WDOG can be only available when the feature is enabled. */
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}
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base->CTRL = tmp16;
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/* ENC_FILT. */
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base->FILT = ENC_FILT_FILT_CNT(config->filterCount) | ENC_FILT_FILT_PER(config->filterSamplePeriod);
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/* ENC_CTRL2. */
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tmp16 = base->CTRL2 & (uint16_t)(~(ENC_CTRL2_W1C_FLAGS | ENC_CTRL2_OUTCTL_MASK | ENC_CTRL2_REVMOD_MASK |
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ENC_CTRL2_MOD_MASK | ENC_CTRL2_UPDPOS_MASK | ENC_CTRL2_UPDHLD_MASK));
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if (kENC_POSMATCHOnReadingAnyPositionCounter == config->positionMatchMode)
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{
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tmp16 |= ENC_CTRL2_OUTCTL_MASK;
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}
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if (kENC_RevolutionCountOnRollOverModulus == config->revolutionCountCondition)
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{
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tmp16 |= ENC_CTRL2_REVMOD_MASK;
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}
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if (config->enableModuloCountMode)
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{
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tmp16 |= ENC_CTRL2_MOD_MASK;
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/* Set modulus value. */
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base->UMOD = (uint16_t)(config->positionModulusValue >> 16U); /* Upper 16 bits. */
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base->LMOD = (uint16_t)(config->positionModulusValue); /* Lower 16 bits. */
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}
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if (config->enableTRIGGERClearPositionCounter)
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{
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tmp16 |= ENC_CTRL2_UPDPOS_MASK;
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}
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if (config->enableTRIGGERClearHoldPositionCounter)
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{
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tmp16 |= ENC_CTRL2_UPDHLD_MASK;
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}
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base->CTRL2 = tmp16;
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#if (defined(FSL_FEATURE_ENC_HAS_CTRL3) && FSL_FEATURE_ENC_HAS_CTRL3)
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/* ENC_CTRL3. */
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tmp16 = base->CTRL3 & (uint16_t)(~(ENC_CTRL3_PMEN_MASK | ENC_CTRL3_PRSC_MASK));
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if (config->enablePeriodMeasurementFunction)
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{
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tmp16 |= ENC_CTRL3_PMEN_MASK;
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/* Set prescaler value. */
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tmp16 |= ((uint16_t)config->prescalerValue << ENC_CTRL3_PRSC_SHIFT);
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}
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base->CTRL3 = tmp16;
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#endif
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/* ENC_UCOMP & ENC_LCOMP. */
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base->UCOMP = (uint16_t)(config->positionCompareValue >> 16U); /* Upper 16 bits. */
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base->LCOMP = (uint16_t)(config->positionCompareValue); /* Lower 16 bits. */
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/* ENC_UINIT & ENC_LINIT. */
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base->UINIT = (uint16_t)(config->positionInitialValue >> 16U); /* Upper 16 bits. */
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base->LINIT = (uint16_t)(config->positionInitialValue); /* Lower 16 bits. */
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}
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/*!
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* brief De-initialization for the ENC module.
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*
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* This function is to make the de-initialization for the ENC module. It could be called when ENC is no longer used with
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* the operations like:
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* - Disable the clock for ENC module.
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*
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* param base ENC peripheral base address.
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*/
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void ENC_Deinit(ENC_Type *base)
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{
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#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
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/* Disable the clock. */
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CLOCK_DisableClock(s_encClocks[ENC_GetInstance(base)]);
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#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
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}
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/*!
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* brief Get an available pre-defined settings for ENC's configuration.
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*
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* This function initializes the ENC configuration structure with an available settings, the default value are:
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* code
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* config->enableReverseDirection = false;
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* config->decoderWorkMode = kENC_DecoderWorkAsNormalMode;
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* config->HOMETriggerMode = kENC_HOMETriggerDisabled;
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* config->INDEXTriggerMode = kENC_INDEXTriggerDisabled;
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* config->enableTRIGGERClearPositionCounter = false;
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* config->enableTRIGGERClearHoldPositionCounter = false;
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* config->enableWatchdog = false;
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* config->watchdogTimeoutValue = 0U;
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* config->filterCount = 0U;
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* config->filterSamplePeriod = 0U;
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* config->positionMatchMode = kENC_POSMATCHOnPositionCounterEqualToComapreValue;
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* config->positionCompareValue = 0xFFFFFFFFU;
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* config->revolutionCountCondition = kENC_RevolutionCountOnINDEXPulse;
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* config->enableModuloCountMode = false;
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* config->positionModulusValue = 0U;
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* config->positionInitialValue = 0U;
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* config->prescalerValue = kENC_ClockDiv1;
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* config->enablePeriodMeasurementFunction = true;
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* endcode
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* param config Pointer to a variable of configuration structure. See to "enc_config_t".
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*/
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void ENC_GetDefaultConfig(enc_config_t *config)
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{
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assert(NULL != config);
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/* Initializes the configure structure to zero. */
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(void)memset(config, 0, sizeof(*config));
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config->enableReverseDirection = false;
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config->decoderWorkMode = kENC_DecoderWorkAsNormalMode;
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config->HOMETriggerMode = kENC_HOMETriggerDisabled;
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config->INDEXTriggerMode = kENC_INDEXTriggerDisabled;
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config->enableTRIGGERClearPositionCounter = false;
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config->enableTRIGGERClearHoldPositionCounter = false;
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config->enableWatchdog = false;
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config->watchdogTimeoutValue = 0U;
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config->filterCount = 0U;
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config->filterSamplePeriod = 0U;
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config->positionMatchMode = kENC_POSMATCHOnPositionCounterEqualToComapreValue;
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config->positionCompareValue = 0xFFFFFFFFU;
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config->revolutionCountCondition = kENC_RevolutionCountOnINDEXPulse;
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config->enableModuloCountMode = false;
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config->positionModulusValue = 0U;
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config->positionInitialValue = 0U;
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#if (defined(FSL_FEATURE_ENC_HAS_CTRL3) && FSL_FEATURE_ENC_HAS_CTRL3)
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config->prescalerValue = kENC_ClockDiv1;
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config->enablePeriodMeasurementFunction = true;
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#endif
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}
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/*!
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* brief Load the initial position value to position counter.
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*
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* This function is to transfer the initial position value (UINIT and LINIT) contents to position counter (UPOS and
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* LPOS), so that to provide the consistent operation the position counter registers.
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*
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* param base ENC peripheral base address.
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*/
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void ENC_DoSoftwareLoadInitialPositionValue(ENC_Type *base)
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{
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uint16_t tmp16 = base->CTRL & (uint16_t)(~ENC_CTRL_W1C_FLAGS);
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tmp16 |= ENC_CTRL_SWIP_MASK; /* Write 1 to trigger the command for loading initial position value. */
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base->CTRL = tmp16;
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}
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/*!
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* brief Enable and configure the self test function.
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*
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* This function is to enable and configuration the self test function. It controls and sets the frequency of a
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* quadrature signal generator. It provides a quadrature test signal to the inputs of the quadrature decoder module.
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* It is a factory test feature; however, it may be useful to customers' software development and testing.
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*
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* param base ENC peripheral base address.
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* param config Pointer to configuration structure. See to "enc_self_test_config_t". Pass "NULL" to disable.
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*/
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void ENC_SetSelfTestConfig(ENC_Type *base, const enc_self_test_config_t *config)
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{
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uint16_t tmp16 = 0U;
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if (NULL == config) /* Pass "NULL" to disable the feature. */
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{
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tmp16 = 0U;
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}
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else
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{
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tmp16 = ENC_TST_TEN_MASK | ENC_TST_TCE_MASK | ENC_TST_TEST_PERIOD(config->signalPeriod) |
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ENC_TST_TEST_COUNT(config->signalCount);
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if (kENC_SelfTestDirectionNegative == config->signalDirection)
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{
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tmp16 |= ENC_TST_QDN_MASK;
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}
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}
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base->TST = tmp16;
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}
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/*!
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* brief Enable watchdog for ENC module.
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*
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* param base ENC peripheral base address
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* param enable Enables or disables the watchdog
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*/
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void ENC_EnableWatchdog(ENC_Type *base, bool enable)
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{
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uint16_t tmp16 = base->CTRL & (uint16_t)(~(ENC_CTRL_W1C_FLAGS | ENC_CTRL_WDE_MASK));
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if (enable)
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{
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tmp16 |= ENC_CTRL_WDE_MASK;
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}
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base->CTRL = tmp16;
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}
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/*!
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* brief Get the status flags.
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*
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* param base ENC peripheral base address.
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*
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* return Mask value of status flags. For available mask, see to "_enc_status_flags".
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*/
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uint32_t ENC_GetStatusFlags(ENC_Type *base)
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{
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uint32_t ret32 = 0U;
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/* ENC_CTRL. */
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if (0U != (ENC_CTRL_HIRQ_MASK & base->CTRL))
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{
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ret32 |= (uint32_t)kENC_HOMETransitionFlag;
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}
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if (0U != (ENC_CTRL_XIRQ_MASK & base->CTRL))
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{
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ret32 |= (uint32_t)kENC_INDEXPulseFlag;
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}
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if (0U != (ENC_CTRL_DIRQ_MASK & base->CTRL))
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{
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ret32 |= (uint32_t)kENC_WatchdogTimeoutFlag;
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}
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if (0U != (ENC_CTRL_CMPIRQ_MASK & base->CTRL))
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{
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ret32 |= (uint32_t)kENC_PositionCompareFlag;
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}
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/* ENC_CTRL2. */
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#if !(defined(FSL_FEATURE_ENC_HAS_NO_CTRL2_SAB_INT) && FSL_FEATURE_ENC_HAS_NO_CTRL2_SAB_INT)
|
||
|
|
if (0U != (ENC_CTRL2_SABIRQ_MASK & base->CTRL2))
|
||
|
|
{
|
||
|
|
ret32 |= (uint32_t)kENC_SimultBothPhaseChangeFlag;
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
if (0U != (ENC_CTRL2_ROIRQ_MASK & base->CTRL2))
|
||
|
|
{
|
||
|
|
ret32 |= (uint32_t)kENC_PositionRollOverFlag;
|
||
|
|
}
|
||
|
|
if (0U != (ENC_CTRL2_RUIRQ_MASK & base->CTRL2))
|
||
|
|
{
|
||
|
|
ret32 |= (uint32_t)kENC_PositionRollUnderFlag;
|
||
|
|
}
|
||
|
|
if (0U != (ENC_CTRL2_DIR_MASK & base->CTRL2))
|
||
|
|
{
|
||
|
|
ret32 |= (uint32_t)kENC_LastCountDirectionFlag;
|
||
|
|
}
|
||
|
|
|
||
|
|
return ret32;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* brief Clear the status flags.
|
||
|
|
*
|
||
|
|
* param base ENC peripheral base address.
|
||
|
|
* param mask Mask value of status flags to be cleared. For available mask, see to "_enc_status_flags".
|
||
|
|
*/
|
||
|
|
void ENC_ClearStatusFlags(ENC_Type *base, uint32_t mask)
|
||
|
|
{
|
||
|
|
uint32_t tmp16 = 0U;
|
||
|
|
|
||
|
|
/* ENC_CTRL. */
|
||
|
|
if (0U != ((uint32_t)kENC_HOMETransitionFlag & mask))
|
||
|
|
{
|
||
|
|
tmp16 |= ENC_CTRL_HIRQ_MASK;
|
||
|
|
}
|
||
|
|
if (0U != ((uint32_t)kENC_INDEXPulseFlag & mask))
|
||
|
|
{
|
||
|
|
tmp16 |= ENC_CTRL_XIRQ_MASK;
|
||
|
|
}
|
||
|
|
if (0U != ((uint32_t)kENC_WatchdogTimeoutFlag & mask))
|
||
|
|
{
|
||
|
|
tmp16 |= ENC_CTRL_DIRQ_MASK;
|
||
|
|
}
|
||
|
|
if (0U != ((uint32_t)kENC_PositionCompareFlag & mask))
|
||
|
|
{
|
||
|
|
tmp16 |= ENC_CTRL_CMPIRQ_MASK;
|
||
|
|
}
|
||
|
|
if (0U != tmp16)
|
||
|
|
{
|
||
|
|
base->CTRL = (uint16_t)(((uint32_t)base->CTRL & (~ENC_CTRL_W1C_FLAGS)) | tmp16);
|
||
|
|
}
|
||
|
|
|
||
|
|
/* ENC_CTRL2. */
|
||
|
|
tmp16 = 0U;
|
||
|
|
#if !(defined(FSL_FEATURE_ENC_HAS_NO_CTRL2_SAB_INT) && FSL_FEATURE_ENC_HAS_NO_CTRL2_SAB_INT)
|
||
|
|
if (0U != ((uint32_t)kENC_SimultBothPhaseChangeFlag & mask))
|
||
|
|
{
|
||
|
|
tmp16 |= ENC_CTRL2_SABIRQ_MASK;
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
if (0U != ((uint32_t)kENC_PositionRollOverFlag & mask))
|
||
|
|
{
|
||
|
|
tmp16 |= ENC_CTRL2_ROIRQ_MASK;
|
||
|
|
}
|
||
|
|
if (0U != ((uint32_t)kENC_PositionRollUnderFlag & mask))
|
||
|
|
{
|
||
|
|
tmp16 |= ENC_CTRL2_RUIRQ_MASK;
|
||
|
|
}
|
||
|
|
if (0U != tmp16)
|
||
|
|
{
|
||
|
|
base->CTRL2 = (uint16_t)(((uint32_t)base->CTRL2 & (~ENC_CTRL2_W1C_FLAGS)) | tmp16);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* brief Enable the interrupts.
|
||
|
|
*
|
||
|
|
* param base ENC peripheral base address.
|
||
|
|
* param mask Mask value of interrupts to be enabled. For available mask, see to "_enc_interrupt_enable".
|
||
|
|
*/
|
||
|
|
void ENC_EnableInterrupts(ENC_Type *base, uint32_t mask)
|
||
|
|
{
|
||
|
|
uint32_t tmp16 = 0U;
|
||
|
|
|
||
|
|
/* ENC_CTRL. */
|
||
|
|
if (0U != ((uint32_t)kENC_HOMETransitionInterruptEnable & mask))
|
||
|
|
{
|
||
|
|
tmp16 |= ENC_CTRL_HIE_MASK;
|
||
|
|
}
|
||
|
|
if (0U != ((uint32_t)kENC_INDEXPulseInterruptEnable & mask))
|
||
|
|
{
|
||
|
|
tmp16 |= ENC_CTRL_XIE_MASK;
|
||
|
|
}
|
||
|
|
if (0U != ((uint32_t)kENC_WatchdogTimeoutInterruptEnable & mask))
|
||
|
|
{
|
||
|
|
tmp16 |= ENC_CTRL_DIE_MASK;
|
||
|
|
}
|
||
|
|
if (0U != ((uint32_t)kENC_PositionCompareInerruptEnable & mask))
|
||
|
|
{
|
||
|
|
tmp16 |= ENC_CTRL_CMPIE_MASK;
|
||
|
|
}
|
||
|
|
if (tmp16 != 0U)
|
||
|
|
{
|
||
|
|
base->CTRL = (uint16_t)(((uint32_t)base->CTRL & (~ENC_CTRL_W1C_FLAGS)) | tmp16);
|
||
|
|
}
|
||
|
|
/* ENC_CTRL2. */
|
||
|
|
tmp16 = 0U;
|
||
|
|
#if !(defined(FSL_FEATURE_ENC_HAS_NO_CTRL2_SAB_INT) && FSL_FEATURE_ENC_HAS_NO_CTRL2_SAB_INT)
|
||
|
|
if (0U != ((uint32_t)kENC_SimultBothPhaseChangeInterruptEnable & mask))
|
||
|
|
{
|
||
|
|
tmp16 |= ENC_CTRL2_SABIE_MASK;
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
if (0U != ((uint32_t)kENC_PositionRollOverInterruptEnable & mask))
|
||
|
|
{
|
||
|
|
tmp16 |= ENC_CTRL2_ROIE_MASK;
|
||
|
|
}
|
||
|
|
if (0U != ((uint32_t)kENC_PositionRollUnderInterruptEnable & mask))
|
||
|
|
{
|
||
|
|
tmp16 |= ENC_CTRL2_RUIE_MASK;
|
||
|
|
}
|
||
|
|
if (tmp16 != 0U)
|
||
|
|
{
|
||
|
|
base->CTRL2 = (uint16_t)(((uint32_t)base->CTRL2 & (~ENC_CTRL2_W1C_FLAGS)) | tmp16);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* brief Disable the interrupts.
|
||
|
|
*
|
||
|
|
* param base ENC peripheral base address.
|
||
|
|
* param mask Mask value of interrupts to be disabled. For available mask, see to "_enc_interrupt_enable".
|
||
|
|
*/
|
||
|
|
void ENC_DisableInterrupts(ENC_Type *base, uint32_t mask)
|
||
|
|
{
|
||
|
|
uint16_t tmp16 = 0U;
|
||
|
|
|
||
|
|
/* ENC_CTRL. */
|
||
|
|
if (0U != ((uint32_t)kENC_HOMETransitionInterruptEnable & mask))
|
||
|
|
{
|
||
|
|
tmp16 |= ENC_CTRL_HIE_MASK;
|
||
|
|
}
|
||
|
|
if (0U != ((uint32_t)kENC_INDEXPulseInterruptEnable & mask))
|
||
|
|
{
|
||
|
|
tmp16 |= ENC_CTRL_XIE_MASK;
|
||
|
|
}
|
||
|
|
if (0U != ((uint32_t)kENC_WatchdogTimeoutInterruptEnable & mask))
|
||
|
|
{
|
||
|
|
tmp16 |= ENC_CTRL_DIE_MASK;
|
||
|
|
}
|
||
|
|
if (0U != ((uint32_t)kENC_PositionCompareInerruptEnable & mask))
|
||
|
|
{
|
||
|
|
tmp16 |= ENC_CTRL_CMPIE_MASK;
|
||
|
|
}
|
||
|
|
if (0U != tmp16)
|
||
|
|
{
|
||
|
|
base->CTRL = (uint16_t)(base->CTRL & (uint16_t)(~ENC_CTRL_W1C_FLAGS)) & (uint16_t)(~tmp16);
|
||
|
|
}
|
||
|
|
/* ENC_CTRL2. */
|
||
|
|
tmp16 = 0U;
|
||
|
|
#if !(defined(FSL_FEATURE_ENC_HAS_NO_CTRL2_SAB_INT) && FSL_FEATURE_ENC_HAS_NO_CTRL2_SAB_INT)
|
||
|
|
if (0U != ((uint32_t)kENC_SimultBothPhaseChangeInterruptEnable & mask))
|
||
|
|
{
|
||
|
|
tmp16 |= ENC_CTRL2_SABIE_MASK;
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
if (0U != ((uint32_t)kENC_PositionRollOverInterruptEnable & mask))
|
||
|
|
{
|
||
|
|
tmp16 |= ENC_CTRL2_ROIE_MASK;
|
||
|
|
}
|
||
|
|
if (0U != ((uint32_t)kENC_PositionRollUnderInterruptEnable & mask))
|
||
|
|
{
|
||
|
|
tmp16 |= ENC_CTRL2_RUIE_MASK;
|
||
|
|
}
|
||
|
|
if (tmp16 != 0U)
|
||
|
|
{
|
||
|
|
base->CTRL2 = (uint16_t)(base->CTRL2 & (uint16_t)(~ENC_CTRL2_W1C_FLAGS)) & (uint16_t)(~tmp16);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* brief Get the enabled interrupts' flags.
|
||
|
|
*
|
||
|
|
* param base ENC peripheral base address.
|
||
|
|
*
|
||
|
|
* return Mask value of enabled interrupts.
|
||
|
|
*/
|
||
|
|
uint32_t ENC_GetEnabledInterrupts(ENC_Type *base)
|
||
|
|
{
|
||
|
|
uint32_t ret32 = 0U;
|
||
|
|
|
||
|
|
/* ENC_CTRL. */
|
||
|
|
if (0U != (ENC_CTRL_HIE_MASK & base->CTRL))
|
||
|
|
{
|
||
|
|
ret32 |= (uint32_t)kENC_HOMETransitionInterruptEnable;
|
||
|
|
}
|
||
|
|
if (0U != (ENC_CTRL_XIE_MASK & base->CTRL))
|
||
|
|
{
|
||
|
|
ret32 |= (uint32_t)kENC_INDEXPulseInterruptEnable;
|
||
|
|
}
|
||
|
|
if (0U != (ENC_CTRL_DIE_MASK & base->CTRL))
|
||
|
|
{
|
||
|
|
ret32 |= (uint32_t)kENC_WatchdogTimeoutInterruptEnable;
|
||
|
|
}
|
||
|
|
if (0U != (ENC_CTRL_CMPIE_MASK & base->CTRL))
|
||
|
|
{
|
||
|
|
ret32 |= (uint32_t)kENC_PositionCompareInerruptEnable;
|
||
|
|
}
|
||
|
|
/* ENC_CTRL2. */
|
||
|
|
#if !(defined(FSL_FEATURE_ENC_HAS_NO_CTRL2_SAB_INT) && FSL_FEATURE_ENC_HAS_NO_CTRL2_SAB_INT)
|
||
|
|
if (0U != (ENC_CTRL2_SABIE_MASK & base->CTRL2))
|
||
|
|
{
|
||
|
|
ret32 |= (uint32_t)kENC_SimultBothPhaseChangeInterruptEnable;
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
if (0U != (ENC_CTRL2_ROIE_MASK & base->CTRL2))
|
||
|
|
{
|
||
|
|
ret32 |= (uint32_t)kENC_PositionRollOverInterruptEnable;
|
||
|
|
}
|
||
|
|
if (0U != (ENC_CTRL2_RUIE_MASK & base->CTRL2))
|
||
|
|
{
|
||
|
|
ret32 |= (uint32_t)kENC_PositionRollUnderInterruptEnable;
|
||
|
|
}
|
||
|
|
return ret32;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* brief Set initial position value for ENC module.
|
||
|
|
*
|
||
|
|
* param base ENC peripheral base address
|
||
|
|
* param value Positive initial value
|
||
|
|
*/
|
||
|
|
void ENC_SetInitialPositionValue(ENC_Type *base, uint32_t value)
|
||
|
|
{
|
||
|
|
base->UINIT = (uint16_t)(value >> 16U); /* Set upper 16 bits. */
|
||
|
|
base->LINIT = (uint16_t)(value); /* Set lower 16 bits. */
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* brief Get the current position counter's value.
|
||
|
|
*
|
||
|
|
* param base ENC peripheral base address.
|
||
|
|
*
|
||
|
|
* return Current position counter's value.
|
||
|
|
*/
|
||
|
|
uint32_t ENC_GetPositionValue(ENC_Type *base)
|
||
|
|
{
|
||
|
|
uint32_t ret32;
|
||
|
|
|
||
|
|
ret32 = base->UPOS; /* Get upper 16 bits and make a snapshot. */
|
||
|
|
ret32 <<= 16U;
|
||
|
|
ret32 |= base->LPOSH; /* Get lower 16 bits from hold register. */
|
||
|
|
|
||
|
|
return ret32;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* brief Get the hold position counter's value.
|
||
|
|
*
|
||
|
|
* When any of the counter registers is read, the contents of each counter register is written to the corresponding hold
|
||
|
|
* register. Taking a snapshot of the counters' values provides a consistent view of a system position and a velocity to
|
||
|
|
* be attained.
|
||
|
|
*
|
||
|
|
* param base ENC peripheral base address.
|
||
|
|
*
|
||
|
|
* return Hold position counter's value.
|
||
|
|
*/
|
||
|
|
uint32_t ENC_GetHoldPositionValue(ENC_Type *base)
|
||
|
|
{
|
||
|
|
uint32_t ret32;
|
||
|
|
|
||
|
|
ret32 = base->UPOSH; /* Get upper 16 bits and make a snapshot. */
|
||
|
|
ret32 <<= 16U;
|
||
|
|
ret32 |= base->LPOSH; /* Get lower 16 bits from hold register. */
|
||
|
|
|
||
|
|
return ret32;
|
||
|
|
}
|