2023-02-03 11:50:39 +08:00
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<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
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<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
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<SchemaVersion>1.1</SchemaVersion>
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<Header>### uVision Project, (C) Keil Software</Header>
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<Targets>
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<Target>
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<TargetName>rtthread</TargetName>
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<ToolsetNumber>0x4</ToolsetNumber>
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<ToolsetName>ARM-ADS</ToolsetName>
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<TargetOption>
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<TargetCommonOption>
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<Device>STM32F407VG</Device>
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<Vendor>STMicroelectronics</Vendor>
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<Cpu>IRAM(0x20000000-0x2001FFFF) IRAM2(0x10000000-0x1000FFFF) IROM(0x8000000-0x80FFFFF) CLOCK(25000000) CPUTYPE("Cortex-M4") FPU2</Cpu>
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<FlashUtilSpec />
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<StartupFile>"Startup\ST\STM32F4xx\startup_stm32f40_41xxx.s" ("STM32F40/41xxx Startup Code")</StartupFile>
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<FlashDriverDll>UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024 -FS08000000 -FL0100000)</FlashDriverDll>
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<DeviceId>6103</DeviceId>
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<RegisterFile>stm32f4xx.h</RegisterFile>
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<MemoryEnv />
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<Cmp />
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<Asm />
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<Linker />
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<OHString />
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<InfinionOptionDll />
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<SLE66CMisc>-DSTM32F40_41xxx</SLE66CMisc>
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<SLE66AMisc />
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<SLE66LinkerMisc />
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<SFDFile>SFD\ST\STM32F4xx\STM32F40x.sfr</SFDFile>
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<bCustSvd>0</bCustSvd>
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<UseEnv>0</UseEnv>
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<BinPath />
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<IncludePath />
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<LibPath />
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<RegisterFilePath>ST\STM32F4xx\</RegisterFilePath>
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<DBRegisterFilePath>ST\STM32F4xx\</DBRegisterFilePath>
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<TargetStatus>
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<Error>0</Error>
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<ExitCodeStop>0</ExitCodeStop>
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<ButtonStop>0</ButtonStop>
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<NotGenerated>0</NotGenerated>
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<InvalidFlash>1</InvalidFlash>
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</TargetStatus>
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<OutputDirectory>.\build\keil\Obj\</OutputDirectory>
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<OutputName>rtthread</OutputName>
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<CreateExecutable>1</CreateExecutable>
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<CreateLib>0</CreateLib>
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<CreateHexFile>0</CreateHexFile>
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<DebugInformation>1</DebugInformation>
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<BrowseInformation>0</BrowseInformation>
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<ListingPath>.\build\keil\List\</ListingPath>
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<HexFormatSelection>1</HexFormatSelection>
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<Merge32K>0</Merge32K>
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<CreateBatchFile>0</CreateBatchFile>
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<BeforeCompile>
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<RunUserProg1>0</RunUserProg1>
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<RunUserProg2>0</RunUserProg2>
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<UserProg1Name />
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<UserProg2Name />
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<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
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<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
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<nStopU1X>0</nStopU1X>
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<nStopU2X>0</nStopU2X>
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</BeforeCompile>
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<BeforeMake>
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<RunUserProg1>0</RunUserProg1>
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<RunUserProg2>0</RunUserProg2>
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<UserProg1Name />
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<UserProg2Name />
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<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
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<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
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</BeforeMake>
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<AfterMake>
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<RunUserProg1>1</RunUserProg1>
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<RunUserProg2>0</RunUserProg2>
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<UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name>
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<UserProg2Name />
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<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
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<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
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</AfterMake>
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<SelectedForBatchBuild>0</SelectedForBatchBuild>
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<SVCSIdString />
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</TargetCommonOption>
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<CommonProperty>
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<UseCPPCompiler>0</UseCPPCompiler>
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<RVCTCodeConst>0</RVCTCodeConst>
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<RVCTZI>0</RVCTZI>
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<RVCTOtherData>0</RVCTOtherData>
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<ModuleSelection>0</ModuleSelection>
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<IncludeInBuild>1</IncludeInBuild>
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<AlwaysBuild>0</AlwaysBuild>
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<GenerateAssemblyFile>0</GenerateAssemblyFile>
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<AssembleAssemblyFile>0</AssembleAssemblyFile>
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<PublicsOnly>0</PublicsOnly>
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<StopOnExitCode>3</StopOnExitCode>
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<CustomArgument />
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<IncludeLibraryModules />
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<ComprImg>1</ComprImg>
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</CommonProperty>
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<DllOption>
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<SimDllName>SARMCM3.DLL</SimDllName>
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<SimDllArguments>-MPU -REMAP</SimDllArguments>
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<SimDlgDll>DCM.DLL</SimDlgDll>
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<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
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<TargetDllName>SARMCM3.DLL</TargetDllName>
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<TargetDllArguments>-MPU</TargetDllArguments>
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<TargetDlgDll>TCM.DLL</TargetDlgDll>
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<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
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</DllOption>
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<DebugOption>
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<OPTHX>
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<HexSelection>1</HexSelection>
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<HexRangeLowAddress>0</HexRangeLowAddress>
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<HexRangeHighAddress>0</HexRangeHighAddress>
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<HexOffset>0</HexOffset>
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<Oh166RecLen>16</Oh166RecLen>
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</OPTHX>
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<Simulator>
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<UseSimulator>0</UseSimulator>
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<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
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<RunToMain>1</RunToMain>
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<RestoreBreakpoints>1</RestoreBreakpoints>
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<RestoreWatchpoints>1</RestoreWatchpoints>
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<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
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<RestoreFunctions>1</RestoreFunctions>
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<RestoreToolbox>1</RestoreToolbox>
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<LimitSpeedToRealTime>0</LimitSpeedToRealTime>
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<RestoreSysVw>1</RestoreSysVw>
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</Simulator>
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<Target>
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<UseTarget>1</UseTarget>
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<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
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<RunToMain>1</RunToMain>
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<RestoreBreakpoints>1</RestoreBreakpoints>
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<RestoreWatchpoints>1</RestoreWatchpoints>
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<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
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<RestoreFunctions>0</RestoreFunctions>
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<RestoreToolbox>1</RestoreToolbox>
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<RestoreTracepoints>0</RestoreTracepoints>
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<RestoreSysVw>1</RestoreSysVw>
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<UsePdscDebugDescription>0</UsePdscDebugDescription>
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</Target>
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<RunDebugAfterBuild>0</RunDebugAfterBuild>
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<TargetSelection>11</TargetSelection>
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<SimDlls>
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<CpuDll />
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<CpuDllArguments />
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<PeripheralDll />
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<PeripheralDllArguments />
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<InitializationFile />
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</SimDlls>
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<TargetDlls>
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<CpuDll />
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<CpuDllArguments />
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<PeripheralDll />
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<PeripheralDllArguments />
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<InitializationFile />
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<Driver>STLink\ST-LINKIII-KEIL_SWO.dll</Driver>
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</TargetDlls>
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</DebugOption>
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<Utilities>
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<Flash1>
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<UseTargetDll>1</UseTargetDll>
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<UseExternalTool>0</UseExternalTool>
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<RunIndependent>0</RunIndependent>
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<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
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<Capability>1</Capability>
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<DriverSelection>4096</DriverSelection>
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</Flash1>
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<bUseTDR>1</bUseTDR>
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<Flash2>BIN\UL2CM3.DLL</Flash2>
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<Flash3>"" ()</Flash3>
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<Flash4 />
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<pFcarmOut />
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<pFcarmGrp />
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<pFcArmRoot />
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<FcArmLst>0</FcArmLst>
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</Utilities>
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<TargetArmAds>
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<ArmAdsMisc>
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<GenerateListings>0</GenerateListings>
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<asHll>1</asHll>
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<asAsm>1</asAsm>
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<asMacX>1</asMacX>
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<asSyms>1</asSyms>
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<asFals>1</asFals>
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<asDbgD>1</asDbgD>
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<asForm>1</asForm>
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<ldLst>0</ldLst>
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<ldmm>1</ldmm>
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<ldXref>1</ldXref>
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<BigEnd>0</BigEnd>
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<AdsALst>1</AdsALst>
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<AdsACrf>1</AdsACrf>
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<AdsANop>0</AdsANop>
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<AdsANot>0</AdsANot>
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<AdsLLst>1</AdsLLst>
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<AdsLmap>1</AdsLmap>
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<AdsLcgr>1</AdsLcgr>
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<AdsLsym>1</AdsLsym>
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<AdsLszi>1</AdsLszi>
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<AdsLtoi>1</AdsLtoi>
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<AdsLsun>1</AdsLsun>
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<AdsLven>1</AdsLven>
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<AdsLsxf>1</AdsLsxf>
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<RvctClst>0</RvctClst>
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<GenPPlst>0</GenPPlst>
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<AdsCpuType>"Cortex-M4"</AdsCpuType>
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<RvctDeviceName />
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<mOS>0</mOS>
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<uocRom>0</uocRom>
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<uocRam>0</uocRam>
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<hadIROM>1</hadIROM>
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<hadIRAM>1</hadIRAM>
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<hadXRAM>0</hadXRAM>
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<uocXRam>0</uocXRam>
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<RvdsVP>2</RvdsVP>
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<hadIRAM2>1</hadIRAM2>
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<hadIROM2>0</hadIROM2>
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<StupSel>8</StupSel>
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<useUlib>0</useUlib>
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<EndSel>0</EndSel>
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<uLtcg>0</uLtcg>
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<RoSelD>3</RoSelD>
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<RwSelD>3</RwSelD>
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<CodeSel>0</CodeSel>
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<OptFeed>0</OptFeed>
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<NoZi1>0</NoZi1>
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<NoZi2>0</NoZi2>
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<NoZi3>0</NoZi3>
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<NoZi4>0</NoZi4>
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<NoZi5>0</NoZi5>
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<Ro1Chk>0</Ro1Chk>
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<Ro2Chk>0</Ro2Chk>
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<Ro3Chk>0</Ro3Chk>
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<Ir1Chk>1</Ir1Chk>
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<Ir2Chk>0</Ir2Chk>
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<Ra1Chk>0</Ra1Chk>
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<Ra2Chk>0</Ra2Chk>
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<Ra3Chk>0</Ra3Chk>
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<Im1Chk>1</Im1Chk>
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<Im2Chk>0</Im2Chk>
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<OnChipMemories>
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<Ocm1>
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<Type>0</Type>
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<StartAddress>0x0</StartAddress>
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<Size>0x0</Size>
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</Ocm1>
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<Ocm2>
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<Type>0</Type>
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<StartAddress>0x0</StartAddress>
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<Size>0x0</Size>
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</Ocm2>
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<Ocm3>
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<Type>0</Type>
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<StartAddress>0x0</StartAddress>
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<Size>0x0</Size>
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</Ocm3>
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<Ocm4>
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<Type>0</Type>
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<StartAddress>0x0</StartAddress>
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<Size>0x0</Size>
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</Ocm4>
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<Ocm5>
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<Type>0</Type>
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<StartAddress>0x0</StartAddress>
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<Size>0x0</Size>
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</Ocm5>
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<Ocm6>
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<Type>0</Type>
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<StartAddress>0x0</StartAddress>
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<Size>0x0</Size>
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</Ocm6>
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<IRAM>
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<Type>0</Type>
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<StartAddress>0x20000000</StartAddress>
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<Size>0x20000</Size>
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</IRAM>
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<IROM>
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<Type>1</Type>
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<StartAddress>0x8000000</StartAddress>
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<Size>0x100000</Size>
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</IROM>
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<XRAM>
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<Type>0</Type>
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<StartAddress>0x0</StartAddress>
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<Size>0x0</Size>
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</XRAM>
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<OCR_RVCT1>
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<Type>1</Type>
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<StartAddress>0x0</StartAddress>
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<Size>0x0</Size>
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</OCR_RVCT1>
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<OCR_RVCT2>
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<Type>1</Type>
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<StartAddress>0x0</StartAddress>
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<Size>0x0</Size>
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</OCR_RVCT2>
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<OCR_RVCT3>
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<Type>1</Type>
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<StartAddress>0x0</StartAddress>
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<Size>0x0</Size>
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</OCR_RVCT3>
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<OCR_RVCT4>
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<Type>1</Type>
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<StartAddress>0x8000000</StartAddress>
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<Size>0x100000</Size>
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</OCR_RVCT4>
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<OCR_RVCT5>
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<Type>1</Type>
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<StartAddress>0x0</StartAddress>
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<Size>0x0</Size>
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</OCR_RVCT5>
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<OCR_RVCT6>
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<Type>0</Type>
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<StartAddress>0x0</StartAddress>
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<Size>0x0</Size>
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</OCR_RVCT6>
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<OCR_RVCT7>
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<Type>0</Type>
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</OCR_RVCT7>
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<OCR_RVCT9>
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2023-10-08 11:01:28 +08:00
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<Define>CY_USING_HAL, __STDC_LIMIT_MACROS, RT_USING_ARMLIBC, CORE_NAME_CM0P_0, COMPONENT_CAT1A, RT_USING_LIBC, __CLK_TCK=RT_TICK_PER_SECOND, COMPONENT_BSP_DESIGN_MODUS, CY_USING_PREBUILT_CM0P_IMAGE, __RTTHREAD__, COMPONENT_CAT1, CY8C6244LQI_S4D92, CORE_NAME_CM4_0</Define>
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2023-02-03 11:50:39 +08:00
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2023-10-08 11:01:28 +08:00
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2023-02-03 11:50:39 +08:00
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<Undefine />
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2023-10-08 11:01:28 +08:00
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2023-02-03 11:50:39 +08:00
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2023-03-31 16:49:48 +08:00
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2023-02-03 11:50:39 +08:00
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2023-03-31 16:49:48 +08:00
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2023-02-03 11:50:39 +08:00
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2023-10-08 11:01:28 +08:00
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2023-02-03 11:50:39 +08:00
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2023-10-08 11:01:28 +08:00
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2023-02-03 11:50:39 +08:00
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2023-10-08 11:01:28 +08:00
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2023-02-03 11:50:39 +08:00
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2023-03-31 16:49:48 +08:00
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2023-02-03 11:50:39 +08:00
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2023-10-08 11:01:28 +08:00
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2023-02-03 11:50:39 +08:00
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2023-03-31 16:49:48 +08:00
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2023-02-03 11:50:39 +08:00
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2023-02-03 11:50:39 +08:00
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2023-10-08 11:01:28 +08:00
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2023-02-03 11:50:39 +08:00
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2023-10-08 11:01:28 +08:00
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2023-02-03 11:50:39 +08:00
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2023-10-08 11:01:28 +08:00
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2023-02-03 11:50:39 +08:00
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2023-10-08 11:01:28 +08:00
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2023-02-03 11:50:39 +08:00
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2023-10-08 11:01:28 +08:00
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2023-02-03 11:50:39 +08:00
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2023-10-08 11:01:28 +08:00
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2023-03-31 16:49:48 +08:00
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2023-02-03 11:50:39 +08:00
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2023-03-31 16:49:48 +08:00
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2023-03-31 16:49:48 +08:00
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2023-02-03 11:50:39 +08:00
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2023-03-31 16:49:48 +08:00
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2023-02-03 11:50:39 +08:00
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2023-10-08 11:01:28 +08:00
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2023-02-03 11:50:39 +08:00
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2023-10-08 11:01:28 +08:00
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2023-02-03 11:50:39 +08:00
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2023-03-31 16:49:48 +08:00
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2023-02-03 11:50:39 +08:00
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2023-03-31 16:49:48 +08:00
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2023-03-31 16:49:48 +08:00
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2023-02-03 11:50:39 +08:00
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2023-03-31 16:49:48 +08:00
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2023-02-03 11:50:39 +08:00
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2023-02-03 11:50:39 +08:00
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2023-02-03 11:50:39 +08:00
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2023-02-03 11:50:39 +08:00
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2023-03-31 16:49:48 +08:00
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2023-02-03 11:50:39 +08:00
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2023-03-31 16:49:48 +08:00
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2023-03-31 16:49:48 +08:00
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2023-02-03 11:50:39 +08:00
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2023-03-31 16:49:48 +08:00
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2023-02-03 11:50:39 +08:00
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2023-10-08 11:01:28 +08:00
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2023-02-03 11:50:39 +08:00
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2023-03-31 16:49:48 +08:00
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2023-02-03 11:50:39 +08:00
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2023-03-31 16:49:48 +08:00
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2023-02-03 11:50:39 +08:00
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2023-03-31 16:49:48 +08:00
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<FileName>cy_device.c</FileName>
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2023-02-03 11:50:39 +08:00
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<FileType>1</FileType>
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2023-03-31 16:49:48 +08:00
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2023-02-03 11:50:39 +08:00
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2023-10-08 11:01:28 +08:00
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2023-02-03 11:50:39 +08:00
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2023-03-31 16:49:48 +08:00
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2023-02-03 11:50:39 +08:00
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2023-03-31 16:49:48 +08:00
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2023-02-03 11:50:39 +08:00
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2023-03-31 16:49:48 +08:00
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2023-02-03 11:50:39 +08:00
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2023-03-31 16:49:48 +08:00
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2023-02-03 11:50:39 +08:00
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2023-03-31 16:49:48 +08:00
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2023-02-03 11:50:39 +08:00
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2023-03-31 16:49:48 +08:00
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2023-02-03 11:50:39 +08:00
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2023-03-31 16:49:48 +08:00
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2023-02-03 11:50:39 +08:00
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2023-03-31 16:49:48 +08:00
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2023-02-03 11:50:39 +08:00
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2023-10-08 11:01:28 +08:00
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2023-03-31 16:49:48 +08:00
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2023-02-03 11:50:39 +08:00
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2023-10-08 11:01:28 +08:00
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2023-02-03 11:50:39 +08:00
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2023-10-08 11:01:28 +08:00
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2023-02-03 11:50:39 +08:00
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2023-10-08 11:01:28 +08:00
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2023-02-03 11:50:39 +08:00
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2023-10-08 11:01:28 +08:00
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2023-03-31 16:49:48 +08:00
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2023-10-08 11:01:28 +08:00
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2023-03-31 16:49:48 +08:00
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2023-10-08 11:01:28 +08:00
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2023-02-03 11:50:39 +08:00
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2023-10-08 11:01:28 +08:00
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2023-02-03 11:50:39 +08:00
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2023-10-08 11:01:28 +08:00
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2023-03-31 16:49:48 +08:00
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2023-10-08 11:01:28 +08:00
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2023-02-03 11:50:39 +08:00
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2023-03-31 16:49:48 +08:00
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2023-10-08 11:01:28 +08:00
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2023-02-03 11:50:39 +08:00
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2023-10-08 11:01:28 +08:00
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2023-02-03 11:50:39 +08:00
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2023-03-31 16:49:48 +08:00
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2023-02-03 11:50:39 +08:00
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2023-03-31 16:49:48 +08:00
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2023-10-08 11:01:28 +08:00
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2023-03-31 16:49:48 +08:00
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<FileType>1</FileType>
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2023-10-08 11:01:28 +08:00
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2023-03-31 16:49:48 +08:00
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<File>
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2023-10-08 11:01:28 +08:00
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<FileName>cycfg_qspi_memslot.c</FileName>
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2023-03-31 16:49:48 +08:00
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2023-10-08 11:01:28 +08:00
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<FilePath>libs\TARGET_CY8CKIT-062S4\config\GeneratedSource\cycfg_qspi_memslot.c</FilePath>
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2023-02-03 11:50:39 +08:00
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