200 lines
8.1 KiB
C
200 lines
8.1 KiB
C
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/*****************************************************************************
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*
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* Copyright Andes Technology Corporation 2007-2008
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* All Rights Reserved.
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*
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* Revision History:
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*
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* Mar.16.2008 Created.
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****************************************************************************/
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/*****************************************************************************
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*
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* FILE NAME VERSION
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*
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* sspd_rts.h
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*
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* DESCRIPTION
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*
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* SPI digital serial interface protocol header for resistive
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* touch screen controller.
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*
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* DATA STRUCTURES
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*
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* None
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*
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* DEPENDENCIES
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*
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* None
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*
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****************************************************************************/
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#ifndef __SSPD_RTS_H__
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#define __SSPD_RTS_H__
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/*****************************************************************************
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* Configuration Options
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****************************************************************************/
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/* Non-zero to enable 16-clock per conversion mode, otherwise 24-clock cycle is applied. */
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#define RTS_16CLK_CONV_CYCLE 1
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#define RTS_LISR_VECTOR INTC_HW0_BIT /* AG101 connects #PENIRQ to hw0 vector */
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/* polling loop counter for waiting hw-reset */
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#define RTS_RESET_WAIT (0x300000)
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/* CPU polling counter to avoid bouncing signals of previous RTS operation */
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#define RTS_DEBOUNCE_WAIT (0x30000)
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/* polling counter for serial data in */
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#define RTS_DIN_TIMEOUT (0x30000)
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/* HISR definitions */
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#define RTS_HISR_PRIORITY 0 /* 0: highest, 2: lowest */
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#define RTS_HISR_STACK_SIZE 2048 /* Please align to 32-bit */
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#define RTS_HISR_AS_TOUCHED 0x00000001 /* Activate HISR for touched interrupt */
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/*****************************************************************************
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* Resistive Touch Screen Digital Interface Definitions
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****************************************************************************/
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/* Definitions for ADS7846 */
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/* Control Byte Bits */
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#define RTS_ADS7846_PD_MASK 0x03 /* Start Bit (MSB) */
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#define RTS_ADS7846_PD_SHIFT 0
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#define RTS_ADS7846_PD 0x00 /* power down between conversion, #penirq enabled */
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#define RTS_ADS7846_ADC 0x01 /* ref off, adc on, #penirq disabled */
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#define RTS_ADS7846_REF 0x02 /* ref on, adc off, #penirq enabled */
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#define RTS_ADS7846_PW 0x03 /* power on, ref on, adc on, #penirq disabled */
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#define RTS_ADS7846_SER_MASK 0x04 /* Single-Ended/#Differential-Reference Register */
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#define RTS_ADS7846_SER_SHIFT 2
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#define RTS_ADS7846_DF 0x00 /* differential */
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#define RTS_ADS7846_SE 0x01 /* single-ended */
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#define RTS_ADS7846_MODE_MASK 0x08 /* Conversion Selection Bit */
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#define RTS_ADS7846_MODE_SHIFT 3
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#define RTS_ADS7846_12_BITS 0x00 /* 12 bits conversion */
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#define RTS_ADS7846_8_BITS 0x01 /* 8 bits conversion */
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#define RTS_ADS7846_MUX_MASK 0x70 /* (A2 ~ A0) Control the setting of multiplexer input */
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#define RTS_ADS7846_MUX_SHIFT 4
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#define RTS_ADS7846_DF_X 0x05 /* [A2:A0] 101b, Driver: X+ X-, Measure Y+ */
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#define RTS_ADS7846_DF_Y 0x01 /* [A2:A0] 001b, Driver: Y+ Y-, Measure X+ */
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#define RTS_ADS7846_DF_Z1 0x03 /* [A2:A0] 011b, Driver: Y+ X-, Measure X+ */
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#define RTS_ADS7846_DF_Z2 0x04 /* [A2:A0] 100b, Driver: Y+ X-, Measure Y- */
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#define RTS_ADS7846_SE_X 0x05 /* [A2:A0] 101b */
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#define RTS_ADS7846_SE_Y 0x01 /* [A2:A0] 001b */
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#define RTS_ADS7846_SE_Z1 0x03 /* [A2:A0] 011b */
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#define RTS_ADS7846_SE_Z2 0x04 /* [A2:A0] 100b */
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#define RTS_ADS7846_SE_BAT 0x02 /* [A2:A0] 010b */
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#define RTS_ADS7846_SE_AUX 0x06 /* [A2:A0] 110b */
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#define RTS_ADS7846_SE_TEMP0 0x00 /* [A2:A0] 000b */
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#define RTS_ADS7846_SE_TEMP1 0x07 /* [A2:A0] 111b */
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#define RTS_ADS7846_START_MASK 0x80 /* Start Bit (MSB) */
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#define RTS_ADS7846_START_BIT 7
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#define RTS_ADS7846_START 1
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/* Supplimental Macros */
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#define RTS_ADS7846_PADDING_BYTE 0 /* Padding byte feed after the command byte to continue serial clocking */
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#define RTS_ADS7846_CTRL_BYTE(mux, mode, ser, pd) \
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((((uint32_t)(mux) << RTS_ADS7846_MUX_SHIFT) & RTS_ADS7846_MUX_MASK) | \
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(((uint32_t)(mode) << RTS_ADS7846_MODE_SHIFT) & RTS_ADS7846_MODE_MASK) | \
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(((uint32_t)(ser) << RTS_ADS7846_SER_SHIFT) & RTS_ADS7846_SER_MASK) | \
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(((uint32_t)(pd) << RTS_ADS7846_PD_SHIFT) & RTS_ADS7846_PD_MASK) | \
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(uint32_t)RTS_ADS7846_START_MASK)
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/* this is correct */
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#define RTS_ADS7846_8BITS_DATA(msb, lsb) ((((uint32_t)(msb) & 0x07) << 5) | (((uint32_t)(lsb) & 0xff) >> 3))
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#ifndef CONFIG_PLAT_QEMU
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#define RTS_ADS7846_12BITS_DATA(msb, lsb) ((((uint32_t)(msb) & 0x7f) << 5) | (((uint32_t)(lsb) & 0xff) >> 3))
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#else
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#define RTS_ADS7846_12BITS_DATA(msb, lsb) msb
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//#define RTS_ADS7846_12BITS_DATA(msb, lsb) ((msb >> 19) & 0xfff)
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#endif
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/* Pre-defined Control-Byte Constants */
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#define RTS_ADS7846_CTL_RY RTS_ADS7846_CTRL_BYTE(RTS_ADS7846_DF_Y, RTS_ADS7846_12_BITS, \
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RTS_ADS7846_DF, RTS_ADS7846_PW)
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#define RTS_ADS7846_CTL_RX RTS_ADS7846_CTRL_BYTE(RTS_ADS7846_DF_X, RTS_ADS7846_12_BITS, \
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RTS_ADS7846_DF, RTS_ADS7846_PW)
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#define RTS_ADS7846_CTL_RZ1 RTS_ADS7846_CTRL_BYTE(RTS_ADS7846_DF_Z1, RTS_ADS7846_12_BITS, \
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RTS_ADS7846_DF, RTS_ADS7846_PW)
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#define RTS_ADS7846_CTL_RZ2 RTS_ADS7846_CTRL_BYTE(RTS_ADS7846_DF_Z2, RTS_ADS7846_12_BITS, \
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RTS_ADS7846_DF, RTS_ADS7846_PW)
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#define RTS_ADS7846_CTL_RY_PD RTS_ADS7846_CTRL_BYTE(RTS_ADS7846_DF_Y, RTS_ADS7846_12_BITS, \
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RTS_ADS7846_DF, RTS_ADS7846_PD)
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#define RTS_ADS7846_CTL_RX_PD RTS_ADS7846_CTRL_BYTE(RTS_ADS7846_DF_X, RTS_ADS7846_12_BITS, \
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RTS_ADS7846_DF, RTS_ADS7846_PD)
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#define RTS_ADS7846_CTL_RZ1_PD RTS_ADS7846_CTRL_BYTE(RTS_ADS7846_DF_Z1, RTS_ADS7846_12_BITS, \
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RTS_ADS7846_DF, RTS_ADS7846_PD)
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#define RTS_ADS7846_CTL_RZ2_PD RTS_ADS7846_CTRL_BYTE(RTS_ADS7846_DF_Z2, RTS_ADS7846_12_BITS, \
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RTS_ADS7846_DF, RTS_ADS7846_PD)
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#define RTS_ADS7846_CTL_PD RTS_ADS7846_CTRL_BYTE(RTS_ADS7846_DF_Y, RTS_ADS7846_12_BITS, \
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RTS_ADS7846_DF, RTS_ADS7846_PD)
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/*
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* DCLK
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* ---------------
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* From pp3:
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* 125 kHz max throughput rate, so ...
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* DCLK_max = 125k * 16(16-clock-per-conversion mode) = 2.0MHz
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*
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* From table VI (p.p.14):
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* (tch + tcl) = 400ns minimum, so ...
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* DCLK_max = 1/400ns = 2.5MHz ?
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*/
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#define RTS_ADS7846_DCLK_MAX 2000000 /* adopt 2.0MHz for safe */
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#define RTS_ADS7846_DCLK_DEFAULT 125000 /* 7812 data per second (3906 x-y/sec, or 1953 x-y-z1-z2/sec) */
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/*****************************************************************************
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* SSP Controller Resistive Touch Screen Driver-Supplement Interfaces
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****************************************************************************/
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struct ts_data {
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int x;
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int y;
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int z1;
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int z2;
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int pressed;
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};
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struct ts_dev {
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int left;
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int right;
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int top;
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int bottom;
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int lcd_width;
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int lcd_height;
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int penirq; /* initialize touch screen driver in #penirq mode or polling mode */
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int penirq_en; /* enable #penirq after initialization if penirq is non-zero */
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void *event_obj; /* (in) Event object to notify app about the interrupt. */
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struct ts_data *event_data; /* Client specified struct pointer to receive {x,y,touched} states */
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hal_semaphore_t sem;
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struct ts_data data;
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};
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extern int _sspd_rts_init(struct ts_dev *ts);
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extern int _sspd_rts_probe(int *x, int *y, int *z1, int *z2, int *pressed);
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extern void ts_adjust(struct ts_dev *ts, int ts_x, int ts_y, int *x, int *y);
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extern void ts_raw_value(struct ts_dev *ts, int *x, int *y);
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extern void ts_value(struct ts_dev *ts, int *x, int *y);
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extern void ts_init(struct ts_dev *ts);
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extern void ts_calibrate(struct ts_dev *ts, void (*draw_cross)(void *param, int x, int y), int count);
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#endif /* __SSPD_RTS_H__ */
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