327 lines
12 KiB
C
327 lines
12 KiB
C
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/**********************************************************************
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* $Id$ lpc_clkpwr.c 2011-06-02
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*//**
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* @file lpc_clkpwr.c
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* @brief Contains all functions support for Clock and Power Control
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* firmware library on LPC
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* @version 1.0
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* @date 02. June. 2011
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* @author NXP MCU SW Application Team
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*
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* Copyright(C) 2011, NXP Semiconductor
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* All rights reserved.
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*
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***********************************************************************
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* products. This software is supplied "AS IS" without any warranties.
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* NXP Semiconductors assumes no responsibility or liability for the
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* use of the software, conveys no license or title under any patent,
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* copyright, or mask work right to the product. NXP Semiconductors
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* reserves the right to make changes in the software without
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* notification. NXP Semiconductors also make no representation or
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* warranty that such application will be suitable for the specified
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* use without further testing or modification.
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors'
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* relevant copyright in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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**********************************************************************/
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/* Peripheral group ----------------------------------------------------------- */
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/** @addtogroup CLKPWR
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* @{
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*/
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#ifdef __BUILD_WITH_EXAMPLE__
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#include "lpc_libcfg.h"
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#else
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#include "lpc_libcfg_default.h"
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#endif /* __BUILD_WITH_EXAMPLE__ */
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#ifdef _CLKPWR
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/* Includes ------------------------------------------------------------------- */
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#include "lpc_clkpwr.h"
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uint32_t USBFrequency = 0;
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/* Public Functions ----------------------------------------------------------- */
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/** @addtogroup CLKPWR_Public_Functions
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* @{
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*/
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/*********************************************************************//**
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* @brief Set value of each Peripheral Clock Selection
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* @param[in] ClkType clock type that will be divided, should be:
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* - CLKPWR_CLKTYPE_CPU : CPU clock
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* - CLKPWR_CLKTYPE_PER : Peripheral clock
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* - CLKPWR_CLKTYPE_EMC : EMC clock
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* - CLKPWR_CLKTYPE_USB : USB clock
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* @param[in] DivVal Value of divider. This value should be set as follows:
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* - CPU clock: DivVal must be in range: 0..31
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* - Peripheral clock: DivVal must be in range: 0..31
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* - EMC clock: DivVal must be:
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* + 0: The EMC uses the same clock as the CPU
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* + 1: The EMC uses a clock at half the rate of the CPU
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* - USB clock: DivVal must be:
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* + 0: the divider is turned off, no clock will
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* be provided to the USB subsystem
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* + 4: PLL0 output is divided by 4. PLL0 output must be 192MHz
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* + 6: PLL0 output is divided by 6. PLL0 output must be 288MHz
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* @return none
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* Note: Pls assign right DivVal, this function will not check if it is illegal.
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**********************************************************************/
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void CLKPWR_SetCLKDiv (uint8_t ClkType, uint8_t DivVal)
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{
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uint32_t tmp;
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switch(ClkType)
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{
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case CLKPWR_CLKTYPE_CPU:
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tmp = LPC_SC->CCLKSEL & ~(0x1F);
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tmp |= DivVal & 0x1F;
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LPC_SC->CCLKSEL = tmp;
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SystemCoreClockUpdate(); //Update clock
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break;
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case CLKPWR_CLKTYPE_PER:
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tmp = LPC_SC->PCLKSEL & ~(0x1F);
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tmp |= DivVal & 0x1F;
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LPC_SC->PCLKSEL = tmp;
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SystemCoreClockUpdate(); //Update clock
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break;
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case CLKPWR_CLKTYPE_EMC:
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tmp = LPC_SC->EMCCLKSEL & ~(0x01);
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tmp |= DivVal & 0x01;
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LPC_SC->EMCCLKSEL = tmp;
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SystemCoreClockUpdate(); //Update clock
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break;
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case CLKPWR_CLKTYPE_USB:
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tmp = LPC_SC->USBCLKSEL & ~(0x1F);
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tmp |= DivVal & 0x1F;
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LPC_SC->USBCLKSEL |= DivVal & 0x1F;
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SystemCoreClockUpdate(); //Update clock
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break;
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default:
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while(1);//Error Loop;
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}
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}
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/*********************************************************************//**
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* @brief Get current clock value
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* @param[in] ClkType clock type that will be divided, should be:
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* - CLKPWR_CLKTYPE_CPU : CPU clock
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* - CLKPWR_CLKTYPE_PER : Peripheral clock
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* - CLKPWR_CLKTYPE_EMC : EMC clock
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* - CLKPWR_CLKTYPE_USB : USB clock
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**********************************************************************/
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uint32_t CLKPWR_GetCLK (uint8_t ClkType)
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{
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switch(ClkType)
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{
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case CLKPWR_CLKTYPE_CPU:
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return SystemCoreClock;
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case CLKPWR_CLKTYPE_PER:
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return PeripheralClock;
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case CLKPWR_CLKTYPE_EMC:
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return EMCClock;
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case CLKPWR_CLKTYPE_USB:
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return USBClock;
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default:
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while(1);//error loop
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}
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}
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/*********************************************************************//**
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* @brief Configure power supply for each peripheral according to NewState
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* @param[in] PPType Type of peripheral used to enable power,
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* should be one of the following:
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* - CLKPWR_PCONP_PCLCD : LCD
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* - CLKPWR_PCONP_PCTIM0 : Timer 0
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* - CLKPWR_PCONP_PCTIM1 : Timer 1
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* - CLKPWR_PCONP_PCUART0 : UART 0
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* - CLKPWR_PCONP_PCUART1 : UART 1
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* - CLKPWR_PCONP_PCPWM0 : PWM 0
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* - CLKPWR_PCONP_PCPWM1 : PWM 1
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* - CLKPWR_PCONP_PCI2C0 : I2C 0
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* - CLKPWR_PCONP_PCUART4 : UART4
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* - CLKPWR_PCONP_PCLCD : LCD
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* - CLKPWR_PCONP_PCTIM0 : Timer 0
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* - CLKPWR_PCONP_PCRTC : RTC
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* - CLKPWR_PCONP_PCSSP1 : SSP 1
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* - CLKPWR_PCONP_PCEMC : EMC
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* - CLKPWR_PCONP_PCADC : ADC
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* - CLKPWR_PCONP_PCAN1 : CAN 1
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* - CLKPWR_PCONP_PCAN2 : CAN 2
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* - CLKPWR_PCONP_PCGPIO : GPIO
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* - CLKPWR_PCONP_PCMC : MCPWM
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* - CLKPWR_PCONP_PCQEI : QEI
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* - CLKPWR_PCONP_PCI2C1 : I2C 1
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* - CLKPWR_PCONP_PCSSP2 : SSP 2
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* - CLKPWR_PCONP_PCSSP0 : SSP 0
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* - CLKPWR_PCONP_PCTIM2 : Timer 2
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* - CLKPWR_PCONP_PCTIM3 : Timer 3
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* - CLKPWR_PCONP_PCUART2 : UART 2
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* - CLKPWR_PCONP_PCUART3 : UART 3
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* - CLKPWR_PCONP_PCI2C2 : I2C 2
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* - CLKPWR_PCONP_PCI2S : I2S
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* - CLKPWR_PCONP_PCSDC : SDC
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* - CLKPWR_PCONP_PCGPDMA : GPDMA
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* - CLKPWR_PCONP_PCENET : Ethernet
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* - CLKPWR_PCONP_PCUSB : USB
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*
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* @param[in] NewState New state of Peripheral Power, should be:
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* - ENABLE : Enable power for this peripheral
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* - DISABLE : Disable power for this peripheral
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*
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* @return none
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**********************************************************************/
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void CLKPWR_ConfigPPWR (uint32_t PPType, FunctionalState NewState)
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{
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if (NewState == ENABLE)
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{
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LPC_SC->PCONP |= PPType;
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}
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else if (NewState == DISABLE)
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{
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LPC_SC->PCONP &= ~PPType;
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}
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}
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#if 0
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// nxp21346
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/*********************************************************************//**
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* @brief Configure hardware reset for each peripheral according to NewState
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* @param[in] PPType Type of peripheral used to enable power,
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* should be one of the following:
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* - CLKPWR_RSTCON0_LCD : LCD
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* - CLKPWR_RSTCON0_TIM0 : Timer 0
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- CLKPWR_RSTCON0_TIM1 : Timer 1
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- CLKPWR_RSTCON0_UART0 : UART 0
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- CLKPWR_RSTCON0_UART1 : UART 1
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- CLKPWR_RSTCON0_PWM0 : PWM 0
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- CLKPWR_RSTCON0_PWM1 : PWM 1
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- CLKPWR_RSTCON0_I2C0 : I2C 0
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- CLKPWR_RSTCON0_UART4 : UART 4
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- CLKPWR_RSTCON0_RTC : RTC
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- CLKPWR_RSTCON0_SSP1 : SSP 1
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- CLKPWR_RSTCON0_EMC : EMC
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- CLKPWR_RSTCON0_ADC : ADC
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- CLKPWR_RSTCON0_CAN1 : CAN 1
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- CLKPWR_RSTCON0_CAN2 : CAN 2
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- CLKPWR_RSTCON0_GPIO : GPIO
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- CLKPWR_RSTCON0_MCPWM : MCPWM
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- CLKPWR_RSTCON0_QEI : QEI
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- CLKPWR_RSTCON0_I2C1 : I2C 1
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- CLKPWR_RSTCON0_SSP2 : SSP 2
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- CLKPWR_RSTCON0_SSP0 : SSP 0
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- CLKPWR_RSTCON0_TIM2 : Timer 2
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- CLKPWR_RSTCON0_TIM3 : Timer 3
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- CLKPWR_RSTCON0_UART2 : UART 2
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- CLKPWR_RSTCON0_UART3 : UART 3
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- CLKPWR_RSTCON0_I2C2 : I2C 2
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- CLKPWR_RSTCON0_I2S : I2S
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- CLKPWR_RSTCON0_SDC : SDC
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- CLKPWR_RSTCON0_GPDMA : GPDMA
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- CLKPWR_RSTCON0_ENET : Ethernet
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- CLKPWR_RSTCON0_USB : USB
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*
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* @param[in] NewState New state of Peripheral Power, should be:
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* - ENABLE : Enable power for this peripheral
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* - DISABLE : Disable power for this peripheral
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*
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* @return none
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**********************************************************************/
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void CLKPWR_ConfigReset(uint8_t PType, FunctionalState NewState)
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{
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if(PType < 32)
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{
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if(NewState == ENABLE)
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LPC_SC->RSTCON0 |=(1<<PType);
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else
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LPC_SC->RSTCON0 &=~(1<<PType);
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}
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else
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{
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if(NewState == ENABLE)
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LPC_SC->RSTCON1 |= (1<<(PType - 31));
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else
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LPC_SC->RSTCON1 &= ~(1<<(PType - 31));
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}
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}
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// nxp21346
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#endif
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/*********************************************************************//**
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* @brief Enter Sleep mode with co-operated instruction by the Cortex-M3.
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* @param[in] None
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* @return None
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**********************************************************************/
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void CLKPWR_Sleep(void)
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{
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LPC_SC->PCON = 0x00;
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/* Sleep Mode*/
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__WFI();
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}
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/*********************************************************************//**
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* @brief Enter Deep Sleep mode with co-operated instruction by the Cortex-M3.
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* @param[in] None
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* @return None
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**********************************************************************/
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void CLKPWR_DeepSleep(void)
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{
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/* Deep-Sleep Mode, set SLEEPDEEP bit */
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SCB->SCR = 0x4;
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LPC_SC->PCON = 0x00;
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/* Deep Sleep Mode*/
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__WFI();
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}
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/*********************************************************************//**
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* @brief Enter Power Down mode with co-operated instruction by the Cortex-M3.
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* @param[in] None
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* @return None
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**********************************************************************/
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void CLKPWR_PowerDown(void)
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{
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/* Deep-Sleep Mode, set SLEEPDEEP bit */
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SCB->SCR = 0x4;
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LPC_SC->PCON = 0x01;
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/* Power Down Mode*/
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__WFI();
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}
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/*********************************************************************//**
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* @brief Enter Deep Power Down mode with co-operated instruction by the Cortex-M3.
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* @param[in] None
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* @return None
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**********************************************************************/
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void CLKPWR_DeepPowerDown(void)
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{
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/* Deep-Sleep Mode, set SLEEPDEEP bit */
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SCB->SCR = 0x4;
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LPC_SC->PCON = 0x03;
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/* Deep Power Down Mode*/
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__WFI();
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}
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/**
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* @}
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*/
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#endif /*_CLKPWR*/
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/**
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* @}
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*/
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/* --------------------------------- End Of File ------------------------------ */
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