2022-08-15 21:25:42 +08:00
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/*
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* Copyright (c) 2006-2022, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2022-02-22 airm2m first version
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*/
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#include <rtdevice.h>
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#include <rtthread.h>
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#include "board.h"
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#include <stdlib.h>
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#ifdef BSP_USING_HW_I2C
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2024-04-11 14:48:56 +08:00
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#define DRV_DEBUG
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#define LOG_TAG "drv.hwi2c"
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#include <drv_log.h>
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2022-08-15 21:25:42 +08:00
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#include <hal_data.h>
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2024-04-11 14:48:56 +08:00
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#define RA_SCI_EVENT_ABORTED 1
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#define RA_SCI_EVENT_RX_COMPLETE 2
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#define RA_SCI_EVENT_TX_COMPLETE 4
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#define RA_SCI_EVENT_ERROR 8
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#define RA_SCI_EVENT_ALL 15
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struct ra_i2c_handle
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{
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struct rt_i2c_bus_device bus;
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char bus_name[RT_NAME_MAX];
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const i2c_master_cfg_t *i2c_cfg;
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void *i2c_ctrl;
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struct rt_event event;
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};
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static struct ra_i2c_handle ra_i2cs[] =
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{
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#ifdef BSP_USING_HW_I2C0
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{.bus_name = "i2c0", .i2c_cfg = &g_i2c_master0_cfg, .i2c_ctrl = &g_i2c_master0_ctrl,},
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#endif
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#ifdef BSP_USING_HW_I2C1
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{.bus_name = "i2c1", .i2c_cfg = &g_i2c_master1_cfg, .i2c_ctrl = &g_i2c_master1_ctrl,},
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#endif
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2024-06-20 21:42:11 +08:00
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#ifdef BSP_USING_HW_I2C2
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{.bus_name = "i2c2", .i2c_cfg = &g_i2c_master2_cfg, .i2c_ctrl = &g_i2c_master2_ctrl,},
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#endif
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2024-04-11 14:48:56 +08:00
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};
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2022-08-15 21:25:42 +08:00
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void i2c_master_callback(i2c_master_callback_args_t *p_args)
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{
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rt_interrupt_enter();
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2022-08-15 21:25:42 +08:00
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if (NULL != p_args)
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{
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/* capture callback event for validating the i2c transfer event*/
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2024-04-11 14:48:56 +08:00
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struct ra_i2c_handle *obj = (struct ra_i2c_handle *)p_args->p_context;
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uint32_t event = 0;
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RT_ASSERT(obj != RT_NULL);
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switch (p_args->event)
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{
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case I2C_MASTER_EVENT_ABORTED:
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event |= RA_SCI_EVENT_ABORTED;
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break;
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case I2C_MASTER_EVENT_RX_COMPLETE:
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event |= RA_SCI_EVENT_RX_COMPLETE;
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break;
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case I2C_MASTER_EVENT_TX_COMPLETE:
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event |= RA_SCI_EVENT_TX_COMPLETE;
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break;
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}
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rt_event_send(&obj->event, event);
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}
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rt_interrupt_leave();
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2022-08-15 21:25:42 +08:00
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}
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static rt_err_t validate_i2c_event(struct ra_i2c_handle *handle)
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{
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rt_uint32_t event = 0;
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if (RT_EOK != rt_event_recv(&handle->event, RA_SCI_EVENT_ALL, RT_EVENT_FLAG_OR | RT_EVENT_FLAG_CLEAR, (int32_t)rt_tick_from_millisecond(100), &event))
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{
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return -RT_ETIMEOUT;
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}
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if ((event & (RA_SCI_EVENT_ABORTED | RA_SCI_EVENT_ERROR)) == 0)
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{
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return RT_EOK;
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2022-08-15 21:25:42 +08:00
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}
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2024-04-11 14:48:56 +08:00
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return -RT_ERROR;
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2022-08-15 21:25:42 +08:00
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}
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2023-02-06 07:35:33 +08:00
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static rt_ssize_t ra_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
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struct rt_i2c_msg msgs[],
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rt_uint32_t num)
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{
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rt_size_t i;
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struct rt_i2c_msg *msg = msgs;
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RT_ASSERT(bus != RT_NULL);
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fsp_err_t err = FSP_SUCCESS;
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2022-08-15 21:25:42 +08:00
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bool restart = false;
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2024-04-11 14:48:56 +08:00
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struct ra_i2c_handle *ra_i2c = rt_container_of(bus, struct ra_i2c_handle, bus);
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i2c_master_ctrl_t *master_ctrl = ra_i2c->i2c_ctrl;
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2022-08-15 21:25:42 +08:00
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for (i = 0; i < num; i++)
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{
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if (msg[i].flags & RT_I2C_NO_START)
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{
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restart = true;
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}
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if (msg[i].flags & RT_I2C_ADDR_10BIT)
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{
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2024-04-11 14:48:56 +08:00
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R_IIC_MASTER_SlaveAddressSet(master_ctrl, msg[i].addr, I2C_MASTER_ADDR_MODE_10BIT);
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2022-08-15 21:25:42 +08:00
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}
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else
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{
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2024-04-11 14:48:56 +08:00
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R_IIC_MASTER_SlaveAddressSet(master_ctrl, msg[i].addr, I2C_MASTER_ADDR_MODE_7BIT);
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2022-08-15 21:25:42 +08:00
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}
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if (msg[i].flags & RT_I2C_RD)
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{
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err = R_IIC_MASTER_Read(master_ctrl, msg[i].buf, msg[i].len, restart);
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if (FSP_SUCCESS == err)
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{
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2024-04-11 14:48:56 +08:00
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if (RT_EOK != validate_i2c_event(ra_i2c))
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{
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LOG_E("POWER_CTL reg I2C read failed");
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break;
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}
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}
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/* handle error */
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else
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{
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/* Write API returns itself is not successful */
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2024-04-11 14:48:56 +08:00
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LOG_E("R_I2C_MASTER_Write API failed");
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2022-08-15 21:25:42 +08:00
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break;
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}
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}
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else
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{
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2024-04-11 14:48:56 +08:00
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err = R_IIC_MASTER_Write(master_ctrl, msg[i].buf, msg[i].len, restart);
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if (FSP_SUCCESS == err)
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{
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2024-04-11 14:48:56 +08:00
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if (RT_EOK != validate_i2c_event(ra_i2c))
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2022-08-15 21:25:42 +08:00
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{
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LOG_E("POWER_CTL reg I2C write failed");
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break;
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}
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}
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/* handle error */
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else
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{
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/* Write API returns itself is not successful */
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2024-04-11 14:48:56 +08:00
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LOG_E("R_I2C_MASTER_Write API failed");
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2022-08-15 21:25:42 +08:00
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break;
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}
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}
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}
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return (rt_ssize_t)i;
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}
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static const struct rt_i2c_bus_device_ops ra_i2c_ops =
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{
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.master_xfer = ra_i2c_mst_xfer,
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.slave_xfer = RT_NULL,
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.i2c_bus_control = RT_NULL
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};
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int ra_hw_i2c_init(void)
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{
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fsp_err_t err = FSP_SUCCESS;
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for (rt_uint32_t i = 0; i < sizeof(ra_i2cs) / sizeof(ra_i2cs[0]); i++)
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{
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ra_i2cs[i].bus.ops = &ra_i2c_ops;
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ra_i2cs[i].bus.priv = 0;
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if (RT_EOK != rt_event_init(&ra_i2cs[i].event, ra_i2cs[i].bus_name, RT_IPC_FLAG_FIFO))
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{
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LOG_E("Init event failed");
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continue;
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}
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/* opening IIC master module */
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err = R_IIC_MASTER_Open(ra_i2cs[i].i2c_ctrl, ra_i2cs[i].i2c_cfg);
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if (FSP_SUCCESS != err)
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{
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LOG_E("R_I2C_MASTER_Open API failed,%d", err);
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continue;
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}
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err = R_IIC_MASTER_CallbackSet(ra_i2cs[i].i2c_ctrl, i2c_master_callback, &ra_i2cs[i], RT_NULL);
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/* handle error */
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if (FSP_SUCCESS != err)
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{
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LOG_E("R_I2C_CallbackSet API failed,%d", err);
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continue;
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}
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rt_i2c_bus_device_register(&ra_i2cs[i].bus, ra_i2cs[i].bus_name);
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2022-08-15 21:25:42 +08:00
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}
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return 0;
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}
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INIT_DEVICE_EXPORT(ra_hw_i2c_init);
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#endif /* BSP_USING_I2C */
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