2022-01-14 18:10:27 +08:00
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/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2018-11-7 SummerGift first version
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*/
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#include <drv_common.h>
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#include <bsp_api.h>
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#include "board.h"
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#ifdef RT_USING_PIN
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#include <drv_gpio.h>
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#endif
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#ifdef RT_USING_SERIAL
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#ifdef RT_USING_SERIAL_V2
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#include <drv_usart_v2.h>
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#else
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2023-06-02 15:47:09 +08:00
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#error "Serial-v1 has been obsoleted, and please select serial-v2 as the default option"
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2022-01-14 18:10:27 +08:00
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#endif
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#endif
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2024-04-11 08:47:53 +08:00
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#ifdef SOC_SERIES_R9A07G0
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#include "gicv3.h"
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static uint64_t rtt_timer_delay;
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extern fsp_vector_t g_sgi_ppi_vector_table[BSP_CORTEX_VECTOR_TABLE_ENTRIES];
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static void SysTimerInterrupt(void);
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#endif
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2022-01-14 18:10:27 +08:00
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#ifdef RT_USING_FINSH
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#include <finsh.h>
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static void reboot(uint8_t argc, char **argv)
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{
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2024-04-11 08:47:53 +08:00
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#ifdef SOC_SERIES_R9A07G0
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return;
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#else
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2022-03-11 09:17:46 +08:00
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NVIC_SystemReset();
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2024-04-11 08:47:53 +08:00
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#endif
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2022-01-14 18:10:27 +08:00
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}
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MSH_CMD_EXPORT(reboot, Reboot System);
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#endif /* RT_USING_FINSH */
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/* SysTick configuration */
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void rt_hw_systick_init(void)
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{
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2024-04-11 08:47:53 +08:00
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#ifdef SOC_SERIES_R9A07G0
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SysTimerInterrupt();
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#else
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2022-01-14 18:10:27 +08:00
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SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
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NVIC_SetPriority(SysTick_IRQn, 0xFF);
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2024-04-11 08:47:53 +08:00
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#endif
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2022-01-14 18:10:27 +08:00
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}
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/**
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* This is the timer interrupt service routine.
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*
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*/
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void SysTick_Handler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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2024-04-11 08:47:53 +08:00
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#ifdef SOC_SERIES_R9A07G0
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__set_CNTP_CVAL(__get_CNTP_CVAL() + rtt_timer_delay);
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#endif
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2022-01-14 18:10:27 +08:00
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rt_tick_increase();
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/* leave interrupt */
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rt_interrupt_leave();
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}
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/**
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* @brief This function is executed in case of error occurrence.
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* @param None
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* @retval None
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*/
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void _Error_Handler(char *s, int num)
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{
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/* USER CODE BEGIN Error_Handler */
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/* User can add his own implementation to report the HAL error return state */
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while (1)
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{
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}
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/* USER CODE END Error_Handler */
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}
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/**
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* This function will delay for some us.
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*
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* @param us the delay time of us
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*/
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void rt_hw_us_delay(rt_uint32_t us)
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{
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2024-04-11 08:47:53 +08:00
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#ifdef ARCH_ARM_CORTEX_M
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2022-01-14 18:10:27 +08:00
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rt_uint32_t ticks;
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rt_uint32_t told, tnow, tcnt = 0;
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rt_uint32_t reload = SysTick->LOAD;
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ticks = us * reload / (1000000 / RT_TICK_PER_SECOND);
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told = SysTick->VAL;
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while (1)
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{
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tnow = SysTick->VAL;
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if (tnow != told)
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{
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if (tnow < told)
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{
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tcnt += told - tnow;
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}
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else
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{
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tcnt += reload - tnow + told;
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}
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told = tnow;
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if (tcnt >= ticks)
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{
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break;
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}
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}
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}
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2024-04-11 08:47:53 +08:00
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#endif
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2022-01-14 18:10:27 +08:00
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}
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2024-04-11 08:47:53 +08:00
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#ifdef SOC_SERIES_R9A07G0
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static void SysTimerInterrupt(void)
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{
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uint64_t tempCNTPCT = __get_CNTPCT();
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/* Wait for counter supply */
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while (__get_CNTPCT() == tempCNTPCT)
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{
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R_BSP_SoftwareDelay(1, BSP_DELAY_UNITS_MICROSECONDS);
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}
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/* generic timer initialize */
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/* set interrupt handler */
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g_sgi_ppi_vector_table[(int32_t) BSP_VECTOR_NUM_OFFSET +
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NonSecurePhysicalTimerInt] = SysTick_Handler;
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rtt_timer_delay = R_GSC->CNTFID0 / RT_TICK_PER_SECOND;
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/* set timer expiration from current counter value */
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__set_CNTP_CVAL(__get_CNTPCT() + rtt_timer_delay);
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/* configure CNTP_CTL to enable timer interrupts */
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__set_CNTP_CTL(1);
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R_BSP_IrqCfgEnable(NonSecurePhysicalTimerInt, (int32_t) BSP_VECTOR_NUM_OFFSET +
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NonSecurePhysicalTimerInt, RT_NULL);
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}
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#endif
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2022-01-14 18:10:27 +08:00
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/**
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2024-04-11 08:47:53 +08:00
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* This function will initial board.
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2022-01-14 18:10:27 +08:00
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*/
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2022-12-12 02:12:03 +08:00
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rt_weak void rt_hw_board_init()
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2022-01-14 18:10:27 +08:00
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{
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2024-04-11 08:47:53 +08:00
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#ifdef SOC_SERIES_R9A07G0
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/* initialize hardware interrupt */
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rt_uint32_t redis_gic_base = platform_get_gic_dist_base();
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rt_int32_t cpu_id = rt_hw_cpu_id();
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arm_gic_redist_address_set(0, redis_gic_base, cpu_id);
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rt_hw_interrupt_init();
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#endif
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2022-01-14 18:10:27 +08:00
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rt_hw_systick_init();
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/* Heap initialization */
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#if defined(RT_USING_HEAP)
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rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
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#endif
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/* Pin driver initialization is open by default */
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#ifdef RT_USING_PIN
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rt_hw_pin_init();
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#endif
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/* USART driver initialization is open by default */
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#ifdef RT_USING_SERIAL
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rt_hw_usart_init();
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#endif
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/* Set the shell console output device */
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#if defined(RT_USING_CONSOLE) && defined(RT_USING_DEVICE)
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rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
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#endif
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/* Board underlying hardware initialization */
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#ifdef RT_USING_COMPONENTS_INIT
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rt_components_board_init();
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#endif
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}
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FSP_CPP_HEADER
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2024-04-11 08:47:53 +08:00
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#ifdef SOC_SERIES_R9A07G0
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void R_BSP_WarmStart(bsp_warm_start_event_t event) BSP_PLACE_IN_SECTION(".warm_start");
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#else
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2022-01-14 18:10:27 +08:00
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void R_BSP_WarmStart(bsp_warm_start_event_t event);
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2024-04-11 08:47:53 +08:00
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#endif
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2022-01-14 18:10:27 +08:00
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FSP_CPP_FOOTER
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/*******************************************************************************************************************//**
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* This function is called at various points during the startup process. This implementation uses the event that is
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* called right before main() to set up the pins.
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*
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* @param[in] event Where at in the start up process the code is currently at
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**********************************************************************************************************************/
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void R_BSP_WarmStart (bsp_warm_start_event_t event)
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{
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if (BSP_WARM_START_RESET == event)
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{
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#if BSP_FEATURE_FLASH_LP_VERSION != 0
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/* Enable reading from data flash. */
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R_FACI_LP->DFLCTL = 1U;
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/* Would normally have to wait tDSTOP(6us) for data flash recovery. Placing the enable here, before clock and
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* C runtime initialization, should negate the need for a delay since the initialization will typically take more than 6us. */
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#endif
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}
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if (BSP_WARM_START_POST_C == event)
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{
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/* C runtime environment and system clocks are setup. */
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/* Configure pins. */
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R_IOPORT_Open(&g_ioport_ctrl, g_ioport.p_cfg);
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}
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}
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#if BSP_TZ_SECURE_BUILD
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BSP_CMSE_NONSECURE_ENTRY void template_nonsecure_callable ();
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/* Trustzone Secure Projects require at least one nonsecure callable function in order to build (Remove this if it is not required to build). */
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BSP_CMSE_NONSECURE_ENTRY void template_nonsecure_callable ()
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{
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}
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2022-09-08 09:05:17 +08:00
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#endif
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