rt-thread-official/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_norflash.h

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2021-02-18 13:29:12 +08:00
#ifndef __SWM320_NORFLASH_H__
#define __SWM320_NORFLASH_H__
typedef struct {
uint8_t DataWidth; // 8<><38>16
uint8_t WELowPulseTime; // WE# pulse width<74><68><EFBFBD><EFBFBD>λΪϵͳʱ<CDB3><CAB1><EFBFBD><EFBFBD><EFBFBD>ڣ<EFBFBD><DAA3><EFBFBD><EFBFBD><EFBFBD>ֵΪ7
uint8_t OEPreValidTime; // Valid data output after OE# low<6F><77><EFBFBD><EFBFBD>λΪϵͳʱ<CDB3><CAB1><EFBFBD><EFBFBD><EFBFBD>ڣ<EFBFBD><DAA3><EFBFBD><EFBFBD><EFBFBD>ֵΪ15
uint8_t OperFinishIEn; // <20><><EFBFBD><EFBFBD><><EFBFBD><EBA1A2><EFBFBD><EFBFBD>)<29><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>ʹ<EFBFBD><CAB9>
uint8_t OperTimeoutIEn;
} NORFL_InitStructure;
void NORFL_Init(NORFL_InitStructure * initStruct);
uint32_t NORFL_ChipErase(void);
uint32_t NORFL_SectorErase(uint32_t addr);
uint32_t NORFL_Write(uint32_t addr, uint32_t data);
uint32_t NORFL_Read(uint32_t addr);
uint16_t NORFL_ReadID(uint32_t id_addr);
/* <20><>ǰ<EFBFBD><EFBFBD><E6B1BE><EFBFBD>߶<EFBFBD>ֻ֧<D6BB><D6A7><EFBFBD>ֶ<EFBFBD>
#define NORFL_Read8(addr) *((volatile uint8_t *)(NORFLM_BASE + addr))
#define NORFL_Read16(addr) *((volatile uint16_t *)(NORFLM_BASE + addr)) */
#define NORFL_Read32(addr) *((volatile uint32_t *)(NORFLM_BASE + addr))
#define NORFL_CMD_READ 0
#define NORFL_CMD_RESET 1
#define NORFL_CMD_AUTO_SELECT 2
#define NORFL_CMD_PROGRAM 3
#define NORFL_CMD_CHIP_ERASE 4
#define NORFL_CMD_SECTOR_ERASE 5
#endif // __SWM320_NORFLASH_H__