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rt-thread-official/bsp/swm320-lq100/Libraries/SWM320_StdPeriph_Driver/SWM320_norflash.c

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[bsp]add swm320-lq100 bsp
2018-12-24 17:17:27 +08:00
/******************************************************************************************************************************************
* <EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: SWM320_norflash.c
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD>: SWM320<EFBFBD><EFBFBD>Ƭ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>NOR Flash<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>֧<EFBFBD><EFBFBD>: http://www.synwit.com.cn/e/tool/gbook/?bid=1
* ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:
* <EFBFBD>汾<EFBFBD><EFBFBD><EFBFBD><EFBFBD>: V1.1.0 2017<EFBFBD><EFBFBD>10<EFBFBD><EFBFBD>25<EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼:
*
*
*******************************************************************************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH CODING INFORMATION
* REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. AS A RESULT, SYNWIT SHALL NOT BE HELD LIABLE
* FOR ANY DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
* OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION CONTAINED HEREIN IN CONN-
* -ECTION WITH THEIR PRODUCTS.
*
* COPYRIGHT 2012 Synwit Technology
*******************************************************************************************************************************************/
#include "SWM320.h"
#include "SWM320_norflash.h"
/******************************************************************************************************************************************
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: NORFL_Init()
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD>: NOR Flash<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: NORFL_InitStructure * initStruct <EFBFBD><EFBFBD><EFBFBD><EFBFBD>NOR Flash<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>趨ֵ<EFBFBD>Ľṹ<EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
* ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
******************************************************************************************************************************************/
void NORFL_Init(NORFL_InitStructure *initStruct)
{
uint32_t i;
// <20><><EFBFBD><EFBFBD>SRAMǰ<4D><C7B0>Ҫˢ<D2AA><CBA2><EFBFBD><EFBFBD>SDRAM<41><4D><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
do
{
SYS->CLKEN |= (1 << SYS_CLKEN_SDRAM_Pos);
while (SDRAMC->REFDONE == 0);
SDRAMC->REFRESH &= ~(1 << SDRAMC_REFRESH_EN_Pos);
for (i = 0; i < 1000; i++) __NOP();
SYS->CLKEN &= ~(1 << SYS_CLKEN_SDRAM_Pos);
}
while (0);
SYS->CLKEN |= (1 << SYS_CLKEN_NORFL_Pos);
NORFLC->CR = ((initStruct->DataWidth == 8 ? 1 : 0) << NORFLC_CR_BYTEIF_Pos) |
(initStruct->WELowPulseTime << NORFLC_CR_WRTIME_Pos) |
(initStruct->OEPreValidTime << NORFLC_CR_RDTIME_Pos);
NORFLC->IE = 3;
NORFLC->IF = 3; // <20><><EFBFBD><EFBFBD><EFBFBD>жϱ<D0B6>־
if (initStruct->OperFinishIEn) NORFLC->IM &= ~(1 << NORFLC_IM_FINISH_Pos);
else NORFLC->IM |= (1 << NORFLC_IM_FINISH_Pos);
if (initStruct->OperTimeoutIEn) NORFLC->IM &= ~(1 << NORFLC_IM_TIMEOUT_Pos);
else NORFLC->IM |= (1 << NORFLC_IM_TIMEOUT_Pos);
}
/******************************************************************************************************************************************
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: NORFL_ChipErase()
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD>: NOR Flash<EFBFBD><EFBFBD>Ƭ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: uint32_t 0 <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD> 1 <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ
* ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
******************************************************************************************************************************************/
uint32_t NORFL_ChipErase(void)
{
uint32_t res;
NORFLC->CMD = (NORFL_CMD_CHIP_ERASE << NORFLC_CMD_CMD_Pos);
while (((NORFLC->IF & NORFLC_IF_FINISH_Msk) == 0) &&
((NORFLC->IF & NORFLC_IF_TIMEOUT_Msk) == 0)) __NOP();
if (NORFLC->IF & NORFLC_IF_FINISH_Msk) res = 0;
else res = 1;
NORFLC->IF = NORFLC_IF_FINISH_Msk | NORFLC_IF_TIMEOUT_Msk;
return res;
}
/******************************************************************************************************************************************
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: NORFL_SectorErase()
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD>: NOR Flash<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: uint32_t addr Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><EFBFBD>ַ
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: uint32_t 0 <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD> 1 <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ
* ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: MX29LV128DB ǰ8<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ8K<EFBFBD><EFBFBD><EFBFBD><EFBFBD>255<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ64K MX29LV128DT ǰ255<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ64K<EFBFBD><EFBFBD><EFBFBD><EFBFBD>8<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ8K
******************************************************************************************************************************************/
uint32_t NORFL_SectorErase(uint32_t addr)
{
uint32_t res;
NORFLC->ADDR = addr;
NORFLC->CMD = (NORFL_CMD_SECTOR_ERASE << NORFLC_CMD_CMD_Pos);
while (((NORFLC->IF & NORFLC_IF_FINISH_Msk) == 0) &&
((NORFLC->IF & NORFLC_IF_TIMEOUT_Msk) == 0)) __NOP();
if (NORFLC->IF & NORFLC_IF_FINISH_Msk) res = 0;
else res = 1;
NORFLC->IF = NORFLC_IF_FINISH_Msk | NORFLC_IF_TIMEOUT_Msk;
return res;
}
/******************************************************************************************************************************************
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: NORFL_Write()
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD>: NOR Flashд
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: uint32_t addr <EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫд<EFBFBD><EFBFBD><EFBFBD>ĵ<EFBFBD>ַ
* uint32_t data Ҫд<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: uint32_t 0 д<EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD> 1 д<EFBFBD>볬ʱ
* ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Ӳ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ16λʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD>룻<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ8λʱ<EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>д<EFBFBD><EFBFBD>
******************************************************************************************************************************************/
uint32_t NORFL_Write(uint32_t addr, uint32_t data)
{
uint32_t res;
NORFLC->ADDR = addr;
NORFLC->CMD = (NORFL_CMD_PROGRAM << NORFLC_CMD_CMD_Pos) | (data << NORFLC_CMD_DATA_Pos);
while (((NORFLC->IF & NORFLC_IF_FINISH_Msk) == 0) &&
((NORFLC->IF & NORFLC_IF_TIMEOUT_Msk) == 0)) __NOP();
if (NORFLC->IF & NORFLC_IF_FINISH_Msk) res = 0;
else res = 1;
NORFLC->IF = NORFLC_IF_FINISH_Msk | NORFLC_IF_TIMEOUT_Msk;
return res;
}
/******************************************************************************************************************************************
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: NORFL_Read()
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD>: NOR Flash<EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: uint32_t addr <EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ĵ<EFBFBD>ַ
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: uint32_t <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Ӳ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ16λʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֶ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ8λʱ<EFBFBD><EFBFBD><EFBFBD>ֽڶ<EFBFBD><EFBFBD><EFBFBD>
******************************************************************************************************************************************/
uint32_t NORFL_Read(uint32_t addr)
{
NORFLC->ADDR = addr;
NORFLC->CMD = (NORFL_CMD_READ << NORFLC_CMD_CMD_Pos);
return (NORFLC->CMD & NORFLC_CMD_DATA_Msk);
}
/******************************************************************************************************************************************
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: NORFL_ReadID()
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD>: NOR Flash<EFBFBD><EFBFBD>ID
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: uint32_t id_addr ID<EFBFBD><EFBFBD>ַ<EFBFBD><EFBFBD><EFBFBD>˲<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>оƬ<EFBFBD><EFBFBD><EFBFBD>صģ<EFBFBD>ÿ<EFBFBD><EFBFBD>оƬ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͬ
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: uint16_t <EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ID
* ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
******************************************************************************************************************************************/
uint16_t NORFL_ReadID(uint32_t id_addr)
{
uint16_t id;
NORFLC->CMD = (NORFL_CMD_AUTO_SELECT << NORFLC_CMD_CMD_Pos);
NORFLC->ADDR = id_addr;
NORFLC->CMD = (NORFL_CMD_READ << NORFLC_CMD_CMD_Pos);
id = NORFLC->CMD & NORFLC_CMD_DATA_Msk;
NORFLC->CMD = (NORFL_CMD_RESET << NORFLC_CMD_CMD_Pos); // <20>˳<EFBFBD>ID<49><44>ȡģʽ
return id;
}