342 lines
8.7 KiB
C
342 lines
8.7 KiB
C
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/*!
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\file gd32f4xx_dci.c
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\brief DCI driver
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*/
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/*
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Copyright (C) 2016 GigaDevice
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2016-08-15, V1.0.0, firmware for GD32F4xx
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*/
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#include "gd32f4xx_dci.h"
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/*!
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\brief DCI deinit
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\param[in] none
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\param[out] none
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\retval none
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*/
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void dci_deinit(void)
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{
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rcu_periph_reset_enable(RCU_DCIRST);
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rcu_periph_reset_disable(RCU_DCIRST);
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}
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/*!
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\brief initialize DCI registers
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\param[in] dci_struct: DCI parameter initialization stuct
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members of the structure and the member values are shown as below:
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capture_mode : DCI_CAPTURE_MODE_CONTINUOUS, DCI_CAPTURE_MODE_SNAPSHOT
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colck_polarity : DCI_CK_POLARITY_FALLING, DCI_CK_POLARITY_RISING
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hsync_polarity : DCI_HSYNC_POLARITY_LOW, DCI_HSYNC_POLARITY_HIGH
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vsync_polarity : DCI_VSYNC_POLARITY_LOW, DCI_VSYNC_POLARITY_HIGH
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frame_rate : DCI_FRAME_RATE_ALL, DCI_FRAME_RATE_1_2, DCI_FRAME_RATE_1_4
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interface_format: DCI_INTERFACE_FORMAT_8BITS, DCI_INTERFACE_FORMAT_10BITS,
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DCI_INTERFACE_FORMAT_12BITS, DCI_INTERFACE_FORMAT_14BITS
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\param[out] none
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\retval none
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*/
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void dci_init(dci_parameter_struct* dci_struct)
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{
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uint32_t reg =0U;
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/* disable capture function and DCI */
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DCI_CTL &= ~(DCI_CTL_CAP | DCI_CTL_DCIEN);
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/* config DCI parameter */
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reg |= dci_struct->capture_mode;
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reg |= dci_struct->clock_polarity;
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reg |= dci_struct->hsync_polarity;
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reg |= dci_struct->vsync_polarity;
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reg |= dci_struct->frame_rate;
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reg |= dci_struct->interface_format;
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DCI_CTL = reg;
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}
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/*!
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\brief enable DCI function
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\param[in] none
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\param[out] none
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\retval none
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*/
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void dci_enable(void)
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{
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DCI_CTL |= DCI_CTL_DCIEN;
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}
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/*!
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\brief disable DCI function
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\param[in] none
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\param[out] none
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\retval none
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*/
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void dci_disable(void)
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{
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DCI_CTL &= ~DCI_CTL_DCIEN;
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}
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/*!
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\brief enable DCI capture
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\param[in] none
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\param[out] none
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\retval none
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*/
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void dci_capture_enable(void)
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{
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DCI_CTL |= DCI_CTL_CAP;
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}
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/*!
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\brief disable DCI capture
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\param[in] none
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\param[out] none
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\retval none
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*/
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void dci_capture_disable(void)
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{
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DCI_CTL &= ~DCI_CTL_CAP;
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}
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/*!
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\brief enable DCI jpeg mode
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\param[in] none
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\param[out] none
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\retval none
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*/
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void dci_jpeg_enable(void)
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{
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DCI_CTL |= DCI_CTL_JM;
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}
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/*!
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\brief disable DCI jpeg mode
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\param[in] none
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\param[out] none
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\retval none
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*/
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void dci_jpeg_disable(void)
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{
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DCI_CTL &= ~DCI_CTL_JM;
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}
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/*!
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\brief enable cropping window function
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\param[in] none
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\param[out] none
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\retval none
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*/
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void dci_crop_window_enable(void)
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{
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DCI_CTL |= DCI_CTL_WDEN;
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}
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/*!
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\brief disable cropping window function
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\param[in] none
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\param[out] none
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\retval none
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*/
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void dci_crop_window_disable(void)
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{
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DCI_CTL &= ~DCI_CTL_WDEN;
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}
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/*!
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\brief config DCI cropping window
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\param[in] start_x: window horizontal start position
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\param[in] start_y: window vertical start position
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\param[in] size_height: window horizontal size
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\param[in] size_width: window vertical size
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\param[out] none
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\retval none
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*/
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void dci_crop_window_config(uint16_t start_x, uint16_t start_y, uint16_t size_width, uint16_t size_height)
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{
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DCI_CWSPOS = ((uint32_t)start_x | ((uint32_t)start_y<<16));
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DCI_CWSZ = ((uint32_t)size_width | ((uint32_t)size_height<<16));
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}
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/*!
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\brief enable sync codes function
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\param[in] none
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\param[out] none
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\retval none
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*/
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void dci_sync_codes_enable(void)
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{
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DCI_CTL |= DCI_CTL_ESM;
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}
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/*!
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\brief disable sync codes function
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\param[in] none
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\param[out] none
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\retval none
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*/
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void dci_sync_codes_disable(void)
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{
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DCI_CTL &= ~DCI_CTL_ESM;
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}
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/*!
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\brief config sync codes
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\param[in] frame_start: frame start code in embedded synchronous mode
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\param[in] line_start: line start code in embedded synchronous mode
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\param[in] line_end: line end code in embedded synchronous mode
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\param[in] frame_end: frame end code in embedded synchronous mode
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\param[out] none
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\retval none
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*/
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void dci_sync_codes_config(uint8_t frame_start, uint8_t line_start, uint8_t line_end, uint8_t frame_end)
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{
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DCI_SC = ((uint32_t)frame_start | ((uint32_t)line_start<<8) | ((uint32_t)line_end<<16) | ((uint32_t)frame_end<<24));
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}
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/*!
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\brief config sync codes unmask
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\param[in] frame_start: frame start code unmask bits in embedded synchronous mode
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\param[in] line_start: line start code unmask bits in embedded synchronous mode
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\param[in] line_end: line end code unmask bits in embedded synchronous mode
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\param[in] frame_end: frame end code unmask bits in embedded synchronous mode
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\param[out] none
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\retval none
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*/
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void dci_sync_codes_unmask_config(uint8_t frame_start, uint8_t line_start, uint8_t line_end, uint8_t frame_end)
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{
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DCI_SCUMSK = ((uint32_t)frame_start | ((uint32_t)line_start<<8) | ((uint32_t)line_end<<16) | ((uint32_t)frame_end<<24));
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}
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/*!
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\brief read DCI data register
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\param[in] none
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\param[out] none
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\retval data
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*/
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uint32_t dci_data_read(void)
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{
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return DCI_DATA;
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}
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/*!
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\brief enable specified DCI interrupt
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\param[in] interrupt:
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\arg DCI_INT_EF: end of frame interrupt
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\arg DCI_INT_OVR: FIFO overrun interrupt
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\arg DCI_INT_ESE: embedded synchronous error interrupt
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\arg DCI_INT_VS: vsync interrupt
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\arg DCI_INT_EL: end of line interrupt
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\param[out] none
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\retval none
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*/
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void dci_interrupt_enable(uint32_t interrupt)
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{
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DCI_INTEN |= interrupt;
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}
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/*!
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\brief disable specified DCI interrupt
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\param[in] interrupt:
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\arg DCI_INT_EF: end of frame interrupt
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\arg DCI_INT_OVR: FIFO overrun interrupt
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\arg DCI_INT_ESE: embedded synchronous error interrupt
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\arg DCI_INT_VS: vsync interrupt
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\arg DCI_INT_EL: end of line interrupt
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\param[out] none
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\retval none
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*/
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void dci_interrupt_disable(uint32_t interrupt)
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{
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DCI_INTEN &= ~interrupt;
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}
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/*!
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\brief clear specified interrupt
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\param[in] interrupt:
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\arg DCI_INT_EF: end of frame interrupt
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\arg DCI_INT_OVR: FIFO overrun interrupt
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\arg DCI_INT_ESE: embedded synchronous error interrupt
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\arg DCI_INT_VS: vsync interrupt
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\arg DCI_INT_EL: end of line interrupt
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\param[out] none
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\retval none
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*/
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void dci_interrupt_clear(uint32_t interrupt)
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{
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DCI_INTC |= interrupt;
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}
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/*!
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\brief get specified flag
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\param[in] flag:
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\arg DCI_FLAG_HS: HS line status
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\arg DCI_FLAG_VS: VS line status
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\arg DCI_FLAG_FV:FIFO valid
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\arg DCI_FLAG_EFF: end of frame flag
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\arg DCI_FLAG_OVRF: FIFO overrun flag
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\arg DCI_FLAG_ESEF: embedded synchronous error flag
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\arg DCI_FLAG_VSF: vsync flag
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\arg DCI_FLAG_ELF: end of line flag
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\param[out] none
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\retval FlagStatus: SET or RESET
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*/
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FlagStatus dci_flag_get(uint32_t flag)
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{
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uint32_t ret = 0U;
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switch(flag){
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/* get flag status from DCI_STAT0 register */
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case DCI_FLAG_HS:
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ret = (DCI_STAT0 & DCI_STAT0_HS);
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break;
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case DCI_FLAG_VS:
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ret = (DCI_STAT0 & DCI_STAT0_VS);
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break;
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case DCI_FLAG_FV:
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ret = (DCI_STAT0 & DCI_STAT0_FV);
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break;
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/* get flag status from DCI_STAT1 register */
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case DCI_FLAG_EFF:
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ret = (DCI_STAT1 & DCI_STAT1_EFF);
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break;
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case DCI_FLAG_OVRF:
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ret = (DCI_STAT1 & DCI_STAT1_OVRF);
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break;
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case DCI_FLAG_ESEF:
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ret = (DCI_STAT1 & DCI_STAT1_ESEF);
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break;
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case DCI_FLAG_VSF:
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ret = (DCI_STAT1 & DCI_STAT1_VSF);
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break;
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case DCI_FLAG_ELF:
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ret = (DCI_STAT1 & DCI_STAT1_ELF);
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break;
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default :
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break;
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}
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if(RESET == ret){
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return RESET;
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}else{
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return SET;
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}
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}
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/*!
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\brief get specified interrupt flag
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\param[in] interrupt:
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\arg DCI_INT_EF: end of frame interrupt
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\arg DCI_INT_OVR: FIFO overrun interrupt
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\arg DCI_INT_ESE: embedded synchronous error interrupt
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\arg DCI_INT_VS: vsync interrupt
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\arg DCI_INT_EL: end of line interrupt
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\param[out] none
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\retval FlagStatus: SET or RESET
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*/
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FlagStatus dci_interrupt_flag_get(uint32_t interrupt)
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{
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if(RESET == (DCI_INTF & interrupt)){
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return RESET;
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}else{
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return SET;
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}
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}
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