2021-08-19 16:19:02 +08:00
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/*
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2021-08-24 09:53:07 +08:00
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* Copyright (c) 2006-2021, RT-Thread Development Team
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2021-08-19 16:19:02 +08:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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2021-08-20 18:23:07 +08:00
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* 2021-08-20 breo.com first version
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2021-08-19 16:19:02 +08:00
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*/
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2021-12-09 15:48:09 +08:00
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#include <stdio.h>
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#include <string.h>
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2021-08-19 16:19:02 +08:00
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#include <rtthread.h>
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2021-08-20 18:23:07 +08:00
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#include <rtdevice.h>
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2021-08-19 16:19:02 +08:00
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#include "n32g45x.h"
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#include "n32_msp.h"
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#ifdef BSP_USING_UART
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void n32_msp_usart_init(void *Instance)
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{
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GPIO_InitType GPIO_InitCtlStruct;
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USART_Module *USARTx = (USART_Module *)Instance;
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GPIO_InitStruct(&GPIO_InitCtlStruct);
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GPIO_InitCtlStruct.GPIO_Speed = GPIO_Speed_50MHz;
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#ifdef BSP_USING_UART1
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2021-10-27 09:57:55 +08:00
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if (USART1 == USARTx)
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2021-08-19 16:19:02 +08:00
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{
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_USART1, ENABLE);
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2022-01-18 17:20:02 +08:00
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#ifdef BSP_USING_UART1_PIN_RMP
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2022-01-18 16:51:46 +08:00
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE);
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GPIO_ConfigPinRemap(GPIO_RMP_USART1, ENABLE);
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB, ENABLE);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_6;
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GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_7;
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GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct);
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2022-01-18 17:20:02 +08:00
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#else
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2021-08-19 16:19:02 +08:00
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA, ENABLE);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_9;
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GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStruct);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_10;
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GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStruct);
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2022-01-18 17:20:02 +08:00
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#endif
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2021-08-19 16:19:02 +08:00
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}
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2022-01-18 17:20:02 +08:00
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#endif /* BSP_USING_UART1 */
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#ifdef BSP_USING_UART2
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if (USART2 == USARTx)
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2021-08-19 16:19:02 +08:00
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{
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RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_USART2, ENABLE);
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2022-01-18 17:20:02 +08:00
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#ifdef BSP_USING_UART2_PIN_RMP1
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2022-01-18 16:51:46 +08:00
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE);
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GPIO_ConfigPinRemap(GPIO_RMP1_USART2, ENABLE);
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOD, ENABLE);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_5;
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GPIO_InitPeripheral(GPIOD, &GPIO_InitCtlStruct);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_6;
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GPIO_InitPeripheral(GPIOD, &GPIO_InitCtlStruct);
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2022-01-18 17:20:02 +08:00
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#elif defined (BSP_USING_UART2_PIN_RMP2)
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2022-01-18 16:51:46 +08:00
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE);
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GPIO_ConfigPinRemap(GPIO_RMCP2_USART2, ENABLE);
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOC, ENABLE);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_8;
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GPIO_InitPeripheral(GPIOC, &GPIO_InitCtlStruct);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_9;
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GPIO_InitPeripheral(GPIOC, &GPIO_InitCtlStruct);
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2022-01-18 17:20:02 +08:00
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#elif defined (BSP_USING_UART2_PIN_RMP3)
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2022-01-18 16:51:46 +08:00
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE);
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GPIO_ConfigPinRemap(GPIO_RMP3_USART2, ENABLE);
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB, ENABLE);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_4;
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GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_5;
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GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct);
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2022-01-18 17:20:02 +08:00
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#else
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2021-08-19 16:19:02 +08:00
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA, ENABLE);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_2;
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GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStruct);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_3;
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GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStruct);
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2022-01-18 17:20:02 +08:00
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#endif
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2021-08-19 16:19:02 +08:00
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}
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2022-01-18 16:51:46 +08:00
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2022-01-18 17:20:02 +08:00
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#endif /* BSP_USING_UART2 */
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#ifdef BSP_USING_UART3
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2022-01-18 17:20:02 +08:00
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if (USART3 == USARTx)
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2021-08-19 16:19:02 +08:00
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{
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RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_USART3, ENABLE);
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2022-01-18 17:20:02 +08:00
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#if defined(BSP_USING_UART3_PIN_PART_RMP)
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2022-01-18 16:51:46 +08:00
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE);
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GPIO_ConfigPinRemap(GPIO_PART_RMP_USART3, ENABLE);
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOC, ENABLE);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_10;
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GPIO_InitPeripheral(GPIOC, &GPIO_InitCtlStruct);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_11;
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GPIO_InitPeripheral(GPIOC, &GPIO_InitCtlStruct);
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2022-01-18 17:20:02 +08:00
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#elif defined(BSP_USING_UART3_PIN_ALL_RMP)
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2022-01-18 16:51:46 +08:00
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE);
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GPIO_ConfigPinRemap(GPIO_ALL_RMP_USART3, ENABLE);
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOD, ENABLE);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_8;
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GPIO_InitPeripheral(GPIOD, &GPIO_InitCtlStruct);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_9;
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GPIO_InitPeripheral(GPIOD, &GPIO_InitCtlStruct);
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2022-01-18 17:20:02 +08:00
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#else
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2021-08-19 16:19:02 +08:00
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB, ENABLE);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_10;
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GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_11;
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GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct);
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2022-01-18 17:20:02 +08:00
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#endif
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2021-08-19 16:19:02 +08:00
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}
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2022-01-18 16:51:46 +08:00
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2022-01-18 17:20:02 +08:00
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#endif /* BSP_USING_UART3 */
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#ifdef BSP_USING_UART4
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2022-01-18 17:20:02 +08:00
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if (UART4 == USARTx)
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2021-08-20 18:23:07 +08:00
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{
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RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_UART4, ENABLE);
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2022-01-18 17:20:02 +08:00
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#if defined(BSP_USING_UART4_PIN_RMP1)
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2022-01-18 16:51:46 +08:00
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE);
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GPIO_ConfigPinRemap(GPIO_RMP1_UART4, ENABLE);
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB | RCC_APB2_PERIPH_GPIOE, ENABLE);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_2;
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GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_7;
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GPIO_InitPeripheral(GPIOE, &GPIO_InitCtlStruct);
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2022-01-18 17:20:02 +08:00
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#elif defined(BSP_USING_UART4_PIN_RMP2)
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2022-01-18 16:51:46 +08:00
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE);
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GPIO_ConfigPinRemap(GPIO_RMP2_UART4, ENABLE);
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA, ENABLE);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_13;
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GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStruct);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_14;
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GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStruct);
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2022-01-18 17:20:02 +08:00
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#elif defined(BSP_USING_UART4_PIN_RMP3)
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2022-01-18 16:51:46 +08:00
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE);
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GPIO_ConfigPinRemap(GPIO_RMP3_UART4, ENABLE);
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOD, ENABLE);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_0;
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GPIO_InitPeripheral(GPIOD, &GPIO_InitCtlStruct);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_1;
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GPIO_InitPeripheral(GPIOD, &GPIO_InitCtlStruct);
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2022-01-18 17:20:02 +08:00
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#else
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2022-01-18 16:51:46 +08:00
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOC, ENABLE);
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2021-08-20 18:23:07 +08:00
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_10;
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2022-01-18 16:51:46 +08:00
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GPIO_InitPeripheral(GPIOC, &GPIO_InitCtlStruct);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_11;
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GPIO_InitPeripheral(GPIOC, &GPIO_InitCtlStruct);
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2022-01-18 17:20:02 +08:00
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#endif
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2022-01-18 16:51:46 +08:00
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}
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2022-01-18 17:20:02 +08:00
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#endif /* BSP_USING_UART4 */
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#ifdef BSP_USING_UART5
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2022-01-18 17:20:02 +08:00
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if (UART5 == USARTx)
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{
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RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_UART5, ENABLE);
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2022-01-18 17:20:02 +08:00
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#if defined(BSP_USING_UART5_PIN_RMP1)
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2022-01-18 16:51:46 +08:00
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE);
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GPIO_ConfigPinRemap(GPIO_RMP1_UART5, ENABLE);
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB, ENABLE);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_13;
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GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_14;
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2021-08-20 18:23:07 +08:00
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GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct);
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2022-01-18 17:20:02 +08:00
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#elif defined(BSP_USING_UART5_PIN_RMP2)
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2022-01-18 16:51:46 +08:00
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE);
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GPIO_ConfigPinRemap(GPIO_RMP2_UART5, ENABLE);
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOE, ENABLE);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_8;
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GPIO_InitPeripheral(GPIOE, &GPIO_InitCtlStruct);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_9;
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GPIO_InitPeripheral(GPIOE, &GPIO_InitCtlStruct);
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2022-01-18 17:20:02 +08:00
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#elif defined(BSP_USING_UART5_PIN_RMP3)
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2022-01-18 16:51:46 +08:00
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE);
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GPIO_ConfigPinRemap(GPIO_RMP3_UART5, ENABLE);
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB, ENABLE);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_8;
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GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_9;
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GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct);
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2022-01-18 17:20:02 +08:00
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#else
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2022-01-18 16:51:46 +08:00
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOC | RCC_APB2_PERIPH_GPIOD, ENABLE);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_12;
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GPIO_InitPeripheral(GPIOC, &GPIO_InitCtlStruct);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_2;
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GPIO_InitPeripheral(GPIOD, &GPIO_InitCtlStruct);
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2022-01-18 17:20:02 +08:00
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#endif
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2022-01-18 16:51:46 +08:00
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}
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2021-08-20 18:23:07 +08:00
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2022-01-18 17:20:02 +08:00
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#endif /* BSP_USING_UART5 */
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#ifdef BSP_USING_UART6
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2022-01-18 16:51:46 +08:00
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2022-01-18 17:20:02 +08:00
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if (UART6 == USARTx)
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2022-01-18 16:51:46 +08:00
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{
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_UART6, ENABLE);
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2022-01-18 17:20:02 +08:00
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#if defined(BSP_USING_UART6_PIN_RMP2)
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2022-01-18 16:51:46 +08:00
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE);
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GPIO_ConfigPinRemap(GPIO_RMP2_UART6, ENABLE);
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOC, ENABLE);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_0;
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GPIO_InitPeripheral(GPIOC, &GPIO_InitCtlStruct);
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2021-08-20 18:23:07 +08:00
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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2022-01-18 16:51:46 +08:00
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GPIO_InitCtlStruct.Pin = GPIO_PIN_1;
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GPIO_InitPeripheral(GPIOC, &GPIO_InitCtlStruct);
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2022-01-18 17:20:02 +08:00
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#elif defined(BSP_USING_UART6_PIN_RMP3)
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2022-01-18 16:51:46 +08:00
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE);
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GPIO_ConfigPinRemap(GPIO_RMP3_UART6, ENABLE);
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB, ENABLE);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_0;
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2021-08-20 18:23:07 +08:00
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GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct);
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2022-01-18 16:51:46 +08:00
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_1;
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GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct);
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2022-01-18 17:20:02 +08:00
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#else /* BSP_USING_UART6_PIN_NORMP */
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2022-01-18 16:51:46 +08:00
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOE, ENABLE);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_2;
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GPIO_InitPeripheral(GPIOE, &GPIO_InitCtlStruct);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_3;
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GPIO_InitPeripheral(GPIOE, &GPIO_InitCtlStruct);
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2022-01-18 17:20:02 +08:00
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#endif
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2021-08-20 18:23:07 +08:00
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}
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2022-01-18 16:51:46 +08:00
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2022-01-18 17:20:02 +08:00
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#endif /* BSP_USING_UART6 */
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#ifdef BSP_USING_UART7
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2022-01-18 16:51:46 +08:00
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2022-01-18 17:20:02 +08:00
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if (UART7 == USARTx)
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2022-01-18 16:51:46 +08:00
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{
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_UART7, ENABLE);
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2022-01-18 17:20:02 +08:00
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#if defined(BSP_USING_UART7_PIN_RMP1)
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2022-01-18 16:51:46 +08:00
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE);
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GPIO_ConfigPinRemap(GPIO_RMP1_UART7, ENABLE);
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOC, ENABLE);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_2;
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GPIO_InitPeripheral(GPIOC, &GPIO_InitCtlStruct);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_3;
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GPIO_InitPeripheral(GPIOC, &GPIO_InitCtlStruct);
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2022-01-18 17:20:02 +08:00
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#elif defined(BSP_USING_UART7_PIN_RMP3)
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2022-01-18 16:51:46 +08:00
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE);
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GPIO_ConfigPinRemap(GPIO_RMP3_UART7, ENABLE);
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOG, ENABLE);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_0;
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GPIO_InitPeripheral(GPIOG, &GPIO_InitCtlStruct);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_1;
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GPIO_InitPeripheral(GPIOG, &GPIO_InitCtlStruct);
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2022-01-18 17:20:02 +08:00
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#else /* BSP_USING_UART7_PIN_NORMP */
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2022-01-18 16:51:46 +08:00
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOC, ENABLE);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_4;
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GPIO_InitPeripheral(GPIOC, &GPIO_InitCtlStruct);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_5;
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GPIO_InitPeripheral(GPIOC, &GPIO_InitCtlStruct);
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2022-01-18 17:20:02 +08:00
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#endif
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2022-01-18 16:51:46 +08:00
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}
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2022-01-18 17:20:02 +08:00
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#endif /* BSP_USING_UART7 */
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2021-08-19 16:19:02 +08:00
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/* Add others */
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}
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#endif /* BSP_USING_SERIAL */
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#ifdef BSP_USING_SPI
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void n32_msp_spi_init(void *Instance)
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{
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GPIO_InitType GPIO_InitCtlStruct;
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SPI_Module *SPIx = (SPI_Module *)Instance;
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GPIO_InitStruct(&GPIO_InitCtlStruct);
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GPIO_InitCtlStruct.GPIO_Speed = GPIO_Speed_50MHz;
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#ifdef BSP_USING_SPI1
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2021-10-27 09:57:55 +08:00
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if (SPI1 == SPIx)
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2021-08-19 16:19:02 +08:00
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{
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_SPI1, ENABLE);
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA, ENABLE);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_Out_PP;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_4;
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GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStruct);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_5 | GPIO_PIN_7;
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GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStruct);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_6;
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GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStruct);
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}
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#endif
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#ifdef BSP_USING_SPI2
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2021-10-27 09:57:55 +08:00
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if (SPI2 == SPIx)
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2021-08-19 16:19:02 +08:00
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{
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RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_SPI2, ENABLE);
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB, ENABLE);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_Out_PP;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_12;
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GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_13 | GPIO_PIN_15;
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GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct);
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_InitCtlStruct.Pin = GPIO_PIN_14;
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GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct);
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}
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#endif
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/* Add others */
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}
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#endif /* BSP_USING_SPI */
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#ifdef BSP_USING_SDIO
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void n32_msp_sdio_init(void *Instance)
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{
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GPIO_InitType GPIO_InitCtlStructure;
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SDIO_Module *SDIOx = (SDIO_Module *)Instance;
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GPIO_InitStruct(&GPIO_InitCtlStructure);
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GPIO_InitCtlStructure.GPIO_Speed = GPIO_Speed_50MHz;
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2021-10-27 09:57:55 +08:00
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if (SDIO == SDIOx)
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2021-08-19 16:19:02 +08:00
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{
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/* if used dma ... */
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RCC_EnableAHBPeriphClk(RCC_AHB_PERIPH_DMA2, ENABLE);
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RCC_EnableAHBPeriphClk(RCC_AHB_PERIPH_SDIO, ENABLE);
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOC | RCC_APB2_PERIPH_GPIOD, ENABLE);
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GPIO_InitCtlStructure.Pin = GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12;
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GPIO_InitCtlStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitPeripheral(GPIOC, &GPIO_InitCtlStructure);
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GPIO_InitCtlStructure.Pin = GPIO_PIN_2;
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GPIO_InitCtlStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitPeripheral(GPIOD, &GPIO_InitCtlStructure);
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}
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}
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#endif /* BSP_USING_SDIO */
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#ifdef BSP_USING_PWM
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2021-08-20 18:23:07 +08:00
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void n32_msp_tim_init(void *Instance)
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2021-08-19 16:19:02 +08:00
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{
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GPIO_InitType GPIO_InitCtlStructure;
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GPIO_InitStruct(&GPIO_InitCtlStructure);
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TIM_Module *TIMx = (TIM_Module *)Instance;
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2021-10-27 09:57:55 +08:00
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if (TIMx == TIM1)
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2021-08-24 15:35:33 +08:00
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{
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_TIM1, ENABLE);
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA, ENABLE);
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2022-01-18 16:51:46 +08:00
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GPIO_InitCtlStructure.Pin = GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10 | GPIO_PIN_11;
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2021-08-24 15:35:33 +08:00
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GPIO_InitCtlStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitCtlStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStructure);
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}
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2021-10-27 09:57:55 +08:00
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if (TIMx == TIM2)
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2021-08-24 15:35:33 +08:00
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{
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RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_TIM2, ENABLE);
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA, ENABLE);
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2021-11-11 15:55:40 +08:00
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GPIO_InitCtlStructure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3;
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2021-08-24 15:35:33 +08:00
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GPIO_InitCtlStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitCtlStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStructure);
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}
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2021-08-24 09:53:07 +08:00
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2021-10-27 09:57:55 +08:00
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if (TIMx == TIM3)
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2021-08-19 16:19:02 +08:00
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{
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2021-08-24 09:53:07 +08:00
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RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_TIM3, ENABLE);
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2021-10-27 09:57:55 +08:00
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA | RCC_APB2_PERIPH_GPIOB, ENABLE);
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2021-08-19 16:19:02 +08:00
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GPIO_InitCtlStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitCtlStructure.GPIO_Speed = GPIO_Speed_50MHz;
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2021-11-11 15:55:40 +08:00
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GPIO_InitCtlStructure.Pin = GPIO_PIN_6 | GPIO_PIN_7;
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2021-08-19 16:19:02 +08:00
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GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStructure);
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GPIO_InitCtlStructure.Pin = GPIO_PIN_0 | GPIO_PIN_1;
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2021-08-24 09:53:07 +08:00
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GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStructure);
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2021-08-19 16:19:02 +08:00
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}
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2021-11-11 15:55:40 +08:00
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if (TIMx == TIM4)
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{
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RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_TIM4, ENABLE);
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB, ENABLE);
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GPIO_InitCtlStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitCtlStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitCtlStructure.Pin = GPIO_PIN_6 | GPIO_PIN_7 | GPIO_PIN_8 | GPIO_PIN_9;
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GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStructure);
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}
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if (TIMx == TIM5)
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{
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RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_TIM5, ENABLE);
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB, ENABLE);
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GPIO_InitCtlStructure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3;
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GPIO_InitCtlStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitCtlStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStructure);
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}
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if (TIMx == TIM8)
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{
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_TIM8, ENABLE);
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOC, ENABLE);
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GPIO_InitCtlStructure.Pin = GPIO_PIN_6 | GPIO_PIN_7 | GPIO_PIN_8 | GPIO_PIN_9;
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GPIO_InitCtlStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitCtlStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitPeripheral(GPIOC, &GPIO_InitCtlStructure);
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}
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2021-08-19 16:19:02 +08:00
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}
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#endif /* BSP_USING_PWM */
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#ifdef BSP_USING_ADC
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void n32_msp_adc_init(void *Instance)
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{
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GPIO_InitType GPIO_InitCtlStruct;
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GPIO_InitStruct(&GPIO_InitCtlStruct);
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ADC_Module *ADCx = (ADC_Module *)Instance;
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#ifdef BSP_USING_ADC1
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2021-10-27 09:57:55 +08:00
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if (ADCx == ADC1)
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2021-08-19 16:19:02 +08:00
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{
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/* ADC1 & GPIO clock enable */
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RCC_EnableAHBPeriphClk(RCC_AHB_PERIPH_ADC1, ENABLE);
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2021-10-27 09:57:55 +08:00
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ADC_ConfigClk(ADC_CTRL3_CKMOD_AHB, RCC_ADCHCLK_DIV8);
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2021-08-19 16:19:02 +08:00
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOC, ENABLE);
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/* Configure ADC Channel as analog input */
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2021-10-27 09:57:55 +08:00
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GPIO_InitCtlStruct.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3;
|
2022-01-18 16:51:46 +08:00
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GPIO_InitCtlStruct.GPIO_Speed = GPIO_INPUT;
|
2021-08-19 16:19:02 +08:00
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GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AIN;
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GPIO_InitPeripheral(GPIOC, &GPIO_InitCtlStruct);
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}
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#endif
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#ifdef BSP_USING_ADC2
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2021-10-27 09:57:55 +08:00
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if (ADCx == ADC2)
|
2021-08-19 16:19:02 +08:00
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{
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/* ADC2 & GPIO clock enable */
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|
RCC_EnableAHBPeriphClk(RCC_AHB_PERIPH_ADC2, ENABLE);
|
2021-10-27 09:57:55 +08:00
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|
ADC_ConfigClk(ADC_CTRL3_CKMOD_AHB, RCC_ADCHCLK_DIV8);
|
2021-08-19 16:19:02 +08:00
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|
RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOC, ENABLE);
|
|
|
|
|
|
|
|
/* Configure ADC Channel as analog input */
|
|
|
|
GPIO_InitCtlStruct.Pin = GPIO_PIN_1;
|
2022-01-18 16:51:46 +08:00
|
|
|
GPIO_InitCtlStruct.GPIO_Speed = GPIO_INPUT;
|
2021-08-19 16:19:02 +08:00
|
|
|
GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AIN;
|
|
|
|
GPIO_InitPeripheral(GPIOC, &GPIO_InitCtlStruct);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
#endif /* BSP_USING_ADC */
|
|
|
|
|
|
|
|
#ifdef BSP_USING_HWTIMER
|
2021-08-20 18:23:07 +08:00
|
|
|
void n32_msp_hwtim_init(void *Instance)
|
2021-08-19 16:19:02 +08:00
|
|
|
{
|
|
|
|
TIM_Module *TIMx = (TIM_Module *)Instance;
|
|
|
|
|
|
|
|
#ifdef BSP_USING_HWTIM3
|
2021-10-27 09:57:55 +08:00
|
|
|
if (TIMx == TIM3)
|
2021-08-19 16:19:02 +08:00
|
|
|
{
|
|
|
|
/* TIM3 clock enable */
|
|
|
|
RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_TIM3, ENABLE);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef BSP_USING_HWTIM4
|
2021-10-27 09:57:55 +08:00
|
|
|
if (TIMx == TIM4)
|
2021-08-19 16:19:02 +08:00
|
|
|
{
|
|
|
|
/* TIM4 clock enable */
|
|
|
|
RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_TIM4, ENABLE);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef BSP_USING_HWTIM5
|
2021-10-27 09:57:55 +08:00
|
|
|
if (TIMx == TIM5)
|
2021-08-19 16:19:02 +08:00
|
|
|
{
|
|
|
|
/* TIM5 clock enable */
|
|
|
|
RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_TIM5, ENABLE);
|
|
|
|
}
|
|
|
|
#endif
|
2021-08-20 18:23:07 +08:00
|
|
|
|
|
|
|
#ifdef BSP_USING_HWTIM6
|
2021-10-27 09:57:55 +08:00
|
|
|
if (TIMx == TIM6)
|
|
|
|
{
|
|
|
|
/* TIM6 clock enable */
|
|
|
|
RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_TIM6, ENABLE);
|
|
|
|
}
|
2021-08-20 18:23:07 +08:00
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef BSP_USING_HWTIM7
|
2021-10-27 09:57:55 +08:00
|
|
|
if (TIMx == TIM7)
|
|
|
|
{
|
|
|
|
/* TIM7 clock enable */
|
|
|
|
RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_TIM7, ENABLE);
|
|
|
|
}
|
2021-08-20 18:23:07 +08:00
|
|
|
#endif
|
2021-08-19 16:19:02 +08:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef BSP_USING_CAN
|
|
|
|
void n32_msp_can_init(void *Instance)
|
|
|
|
{
|
|
|
|
GPIO_InitType GPIO_InitCtlStruct;
|
|
|
|
CAN_Module *CANx = (CAN_Module *)Instance;
|
|
|
|
|
|
|
|
GPIO_InitStruct(&GPIO_InitCtlStruct);
|
|
|
|
GPIO_InitCtlStruct.GPIO_Speed = GPIO_Speed_50MHz;
|
|
|
|
#ifdef BSP_USING_CAN1
|
2021-10-27 09:57:55 +08:00
|
|
|
if (CAN1 == CANx)
|
2021-08-19 16:19:02 +08:00
|
|
|
{
|
|
|
|
RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_CAN1, ENABLE);
|
|
|
|
RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA, ENABLE);
|
|
|
|
GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP;
|
|
|
|
GPIO_InitCtlStruct.Pin = GPIO_PIN_12;
|
|
|
|
GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStruct);
|
|
|
|
|
|
|
|
GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
|
|
|
|
GPIO_InitCtlStruct.Pin = GPIO_PIN_11;
|
|
|
|
GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStruct);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#ifdef BSP_USING_CAN2
|
2021-10-27 09:57:55 +08:00
|
|
|
if (CAN2 == CANx)
|
2021-08-19 16:19:02 +08:00
|
|
|
{
|
|
|
|
RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_CAN2, ENABLE);
|
|
|
|
RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB, ENABLE);
|
|
|
|
GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP;
|
2022-01-18 16:51:46 +08:00
|
|
|
GPIO_InitCtlStruct.Pin = GPIO_PIN_13;
|
2021-08-19 16:19:02 +08:00
|
|
|
GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct);
|
|
|
|
GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
|
2022-01-18 16:51:46 +08:00
|
|
|
GPIO_InitCtlStruct.Pin = GPIO_PIN_12;
|
2021-08-19 16:19:02 +08:00
|
|
|
GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
#endif /* BSP_USING_CAN */
|
|
|
|
|
2022-01-18 17:20:02 +08:00
|
|
|
void n32_msp_jtag_init(void *Instance)
|
2022-01-18 16:51:46 +08:00
|
|
|
{
|
|
|
|
GPIO_InitType GPIO_InitCtlStruct;
|
|
|
|
GPIO_InitStruct(&GPIO_InitCtlStruct);
|
|
|
|
GPIO_InitCtlStruct.GPIO_Speed = GPIO_Speed_50MHz;
|
2022-01-18 17:20:02 +08:00
|
|
|
#if defined(BSP_RMP_SW_JTAG_NO_NJTRST)
|
2022-01-18 16:51:46 +08:00
|
|
|
RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE);
|
|
|
|
GPIO_ConfigPinRemap(GPIO_RMP_SW_JTAG_NO_NJTRST, ENABLE);
|
|
|
|
/* Available pin: PB4 */
|
|
|
|
RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB, ENABLE);
|
|
|
|
GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IPU;
|
|
|
|
GPIO_InitCtlStruct.Pin = GPIO_PIN_4;
|
|
|
|
GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct);
|
2022-01-18 17:20:02 +08:00
|
|
|
#elif defined(BSP_RMP_SW_JTAG_SW_ENABLE)
|
2022-01-18 16:51:46 +08:00
|
|
|
RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE);
|
|
|
|
GPIO_ConfigPinRemap(GPIO_RMP_SW_JTAG_SW_ENABLE, ENABLE);
|
|
|
|
/* Available pin: PB3, PB4, PA15 */
|
|
|
|
RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA, ENABLE);
|
|
|
|
RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB, ENABLE);
|
|
|
|
GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_Out_OD;
|
|
|
|
GPIO_InitCtlStruct.Pin = GPIO_PIN_3;
|
|
|
|
GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct);
|
|
|
|
GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IPU;
|
|
|
|
GPIO_InitCtlStruct.Pin = GPIO_PIN_4;
|
|
|
|
GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct);
|
|
|
|
GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IPU;
|
|
|
|
GPIO_InitCtlStruct.Pin = GPIO_PIN_15;
|
|
|
|
GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStruct);
|
2022-01-18 17:20:02 +08:00
|
|
|
#elif defined(BSP_RMP_SW_JTAG_DISABLE)
|
2022-01-18 16:51:46 +08:00
|
|
|
RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE);
|
|
|
|
GPIO_ConfigPinRemap(GPIO_RMP_SW_JTAG_DISABLE, ENABLE);
|
|
|
|
/* Available pin: PB3, PB4, PA13, PA14, PA15 */
|
|
|
|
RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA, ENABLE);
|
|
|
|
RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB, ENABLE);
|
|
|
|
GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_Out_OD;
|
|
|
|
GPIO_InitCtlStruct.Pin = GPIO_PIN_3;
|
|
|
|
GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct);
|
|
|
|
GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IPU;
|
|
|
|
GDPIO_InitCtlStruct.Pin = GPIO_PIN_4;
|
|
|
|
GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct);
|
|
|
|
GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IPU;
|
|
|
|
GPIO_InitCtlStruct.Pin = GPIO_PIN_13;
|
|
|
|
GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStruct);
|
|
|
|
GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IPD;
|
|
|
|
GPIO_InitCtlStruct.Pin = GPIO_PIN_14;
|
|
|
|
GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStruct);
|
|
|
|
GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IPU;
|
|
|
|
GPIO_InitCtlStruct.Pin = GPIO_PIN_15;
|
|
|
|
GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStruct);
|
2022-01-18 17:20:02 +08:00
|
|
|
#else
|
2022-01-18 16:51:46 +08:00
|
|
|
return;
|
2022-01-18 17:20:02 +08:00
|
|
|
#endif
|
2022-01-18 16:51:46 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
2021-08-20 18:23:07 +08:00
|
|
|
#ifdef RT_USING_FINSH
|
|
|
|
#include <finsh.h>
|
2021-08-24 15:35:33 +08:00
|
|
|
#if defined(BSP_USING_UART2) || defined(BSP_USING_UART3)
|
2021-08-20 18:23:07 +08:00
|
|
|
static void uart_test_rw(rt_device_t uartx, const char *name)
|
|
|
|
{
|
|
|
|
if (uartx == NULL)
|
|
|
|
{
|
|
|
|
uartx = rt_device_find(name);
|
2021-10-27 09:57:55 +08:00
|
|
|
rt_err_t err = rt_device_open(uartx, RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_DMA_RX);
|
2021-08-20 18:23:07 +08:00
|
|
|
RT_ASSERT(err == RT_EOK);
|
|
|
|
}
|
|
|
|
rt_device_write(uartx, 0, name, strlen(name));
|
|
|
|
rt_device_write(uartx, 0, "\r\n", 2);
|
|
|
|
uint8_t recv_buf[64] = {0x0};
|
|
|
|
int ret = rt_device_read(uartx, 0, recv_buf, sizeof(recv_buf));
|
|
|
|
if (ret != 0)
|
|
|
|
{
|
2021-10-27 09:57:55 +08:00
|
|
|
for (int i = 0; i < ret; ++i)
|
2021-08-20 18:23:07 +08:00
|
|
|
rt_kprintf("[%02x]", recv_buf[i]);
|
|
|
|
}
|
|
|
|
rt_device_write(uartx, 0, "\r\n", 2);
|
|
|
|
}
|
|
|
|
static void uart_test(void)
|
|
|
|
{
|
|
|
|
#ifdef BSP_USING_UART2
|
|
|
|
static rt_device_t u2 = NULL;
|
|
|
|
uart_test_rw(u2, "uart2");
|
|
|
|
#endif
|
2021-12-09 15:48:09 +08:00
|
|
|
#ifdef BSP_USING_UART3
|
2021-08-20 18:23:07 +08:00
|
|
|
static rt_device_t u3 = NULL;
|
|
|
|
uart_test_rw(u3, "uart3");
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
MSH_CMD_EXPORT(uart_test, uart_test)
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef BSP_USING_ADC
|
|
|
|
#ifdef BSP_USING_ADC1
|
2021-10-27 09:57:55 +08:00
|
|
|
#define ADC_DEV_NAME "adc1"
|
2021-08-20 18:23:07 +08:00
|
|
|
#else
|
2021-10-27 09:57:55 +08:00
|
|
|
#define ADC_DEV_NAME "adc2"
|
2021-08-20 18:23:07 +08:00
|
|
|
#endif
|
|
|
|
#define REFER_VOLTAGE 3300
|
|
|
|
#define CONVERT_BITS (1 << 12)
|
|
|
|
static int adc_vol_sample(int argc, char *argv[])
|
|
|
|
{
|
|
|
|
rt_adc_device_t adc_dev;
|
|
|
|
rt_uint32_t value, vol;
|
|
|
|
rt_err_t ret = RT_EOK;
|
|
|
|
|
|
|
|
adc_dev = (rt_adc_device_t)rt_device_find(ADC_DEV_NAME);
|
|
|
|
if (adc_dev == RT_NULL)
|
|
|
|
{
|
|
|
|
rt_kprintf("adc sample run failed! can't find %s device!\n", ADC_DEV_NAME);
|
|
|
|
return RT_ERROR;
|
|
|
|
}
|
|
|
|
|
2022-01-18 17:20:02 +08:00
|
|
|
for (int i = 1; i <= 18; ++i)
|
2021-08-20 18:23:07 +08:00
|
|
|
{
|
|
|
|
ret = rt_adc_enable(adc_dev, i);
|
|
|
|
value = rt_adc_read(adc_dev, i);
|
|
|
|
rt_kprintf("ch=[%d] the value is :[%d] \n", i, value);
|
|
|
|
vol = value * REFER_VOLTAGE / CONVERT_BITS;
|
|
|
|
rt_kprintf("ch=[%d] the voltage is :[%d] \n", i, vol);
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
MSH_CMD_EXPORT(adc_vol_sample, adc voltage convert sample);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef BSP_USING_HWTIMER
|
|
|
|
static rt_err_t timeout_cb(rt_device_t dev, rt_size_t size)
|
|
|
|
{
|
|
|
|
rt_kprintf("this is hwtimer timeout callback fucntion!\n");
|
|
|
|
rt_kprintf("timer name is :%s.\n", dev->parent.name);
|
|
|
|
rt_kprintf("tick is :%d !\n", rt_tick_get());
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
static int hwtimer_init(const char *name)
|
|
|
|
{
|
|
|
|
rt_err_t ret = RT_EOK;
|
|
|
|
rt_hwtimerval_t timeout_s;
|
|
|
|
rt_device_t hw_dev = RT_NULL;
|
|
|
|
rt_hwtimer_mode_t mode;
|
|
|
|
hw_dev = rt_device_find(name);
|
|
|
|
if (hw_dev == RT_NULL)
|
|
|
|
{
|
|
|
|
rt_kprintf("hwtimer sample run failed! can't find %s device!\n", name);
|
|
|
|
return RT_ERROR;
|
|
|
|
}
|
|
|
|
ret = rt_device_open(hw_dev, RT_DEVICE_OFLAG_RDWR);
|
|
|
|
if (ret != RT_EOK)
|
|
|
|
{
|
|
|
|
rt_kprintf("open %s device failed!\n", name);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
rt_device_set_rx_indicate(hw_dev, timeout_cb);
|
|
|
|
mode = HWTIMER_MODE_PERIOD;
|
|
|
|
ret = rt_device_control(hw_dev, HWTIMER_CTRL_MODE_SET, &mode);
|
|
|
|
if (ret != RT_EOK)
|
|
|
|
{
|
|
|
|
rt_kprintf("set mode failed! ret is :%d\n", ret);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
timeout_s.sec = 5;
|
|
|
|
timeout_s.usec = 0;
|
|
|
|
if (rt_device_write(hw_dev, 0, &timeout_s, sizeof(timeout_s)) != sizeof(timeout_s))
|
|
|
|
{
|
|
|
|
rt_kprintf("set timeout value failed\n");
|
|
|
|
return RT_ERROR;
|
|
|
|
}
|
|
|
|
|
|
|
|
rt_thread_mdelay(3500);
|
|
|
|
|
|
|
|
rt_device_read(hw_dev, 0, &timeout_s, sizeof(timeout_s));
|
|
|
|
rt_kprintf("Read: Sec = %d, Usec = %d\n", timeout_s.sec, timeout_s.usec);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int hwtimer_sample(int argc, char *argv[])
|
|
|
|
{
|
|
|
|
#ifdef BSP_USING_HWTIM6
|
|
|
|
hwtimer_init("timer6");
|
|
|
|
#endif
|
|
|
|
#ifdef BSP_USING_HWTIM7
|
|
|
|
hwtimer_init("timer7");
|
|
|
|
#endif
|
|
|
|
return RT_EOK;
|
|
|
|
}
|
|
|
|
MSH_CMD_EXPORT(hwtimer_sample, hwtimer sample);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|