53 lines
1.2 KiB
C
53 lines
1.2 KiB
C
|
/*
|
||
|
|
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||
|
|
*
|
||
|
|
* SPDX-License-Identifier: Apache-2.0
|
||
|
|
*
|
||
|
|
* Change Logs:
|
||
|
|
* Date Author Notes
|
||
|
|
* 2021-12-14 supperthomas first version
|
||
|
|
*/
|
||
|
|
|
||
|
|
|
||
|
|
#ifndef __BOARD_H__
|
||
|
|
#define __BOARD_H__
|
||
|
|
|
||
|
|
#include <rtthread.h>
|
||
|
|
#include <stm32h7xx.h>
|
||
|
|
#include "drv_common.h"
|
||
|
|
#include "drv_gpio.h"
|
||
|
|
|
||
|
|
#ifdef __cplusplus
|
||
|
|
extern "C" {
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#define STM32_FLASH_START_ADRESS ((uint32_t)0x08000000)
|
||
|
|
#define STM32_FLASH_SIZE (2048 * 1024)
|
||
|
|
#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
|
||
|
|
|
||
|
|
#define STM32_SRAM1_SIZE (128)
|
||
|
|
#define STM32_SRAM1_START (0x20000000)
|
||
|
|
#define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024)
|
||
|
|
|
||
|
|
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||
|
|
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||
|
|
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||
|
|
#elif __ICCARM__
|
||
|
|
#pragma section="CSTACK"
|
||
|
|
#define HEAP_BEGIN (__segment_end("CSTACK"))
|
||
|
|
#else
|
||
|
|
extern int __bss_end;
|
||
|
|
#define HEAP_BEGIN ((void *)&__bss_end)
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#define HEAP_END STM32_SRAM1_END
|
||
|
|
|
||
|
|
void SystemClock_Config(void);
|
||
|
|
|
||
|
|
#ifdef __cplusplus
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#endif
|
||
|
|
|