2017-12-17 12:08:31 +08:00
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/*
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* File : board.c
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* This file is part of RT-Thread RTOS
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2017-12-12 Bluebear233 first implementation
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*/
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#include <rtconfig.h>
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#include <rtthread.h>
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#include <board.h>
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#include <usart.h>
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#include <NUC472_442.h>
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#ifdef __CC_ARM
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#elif __ICCARM__
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#pragma section="HEAP"
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#else
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2018-03-28 14:40:05 +08:00
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extern int __bss_end;
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2017-12-17 12:08:31 +08:00
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#endif
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/**
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* This function will initial Clock tree.
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*/
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void clock_init(void)
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{
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/*---------------------------------------------------------------------------------------------------------*/
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/* Init System Clock */
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/*---------------------------------------------------------------------------------------------------------*/
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/* Unlock protected registers */
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SYS_UnlockReg();
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/* Enable External XTAL (4~24 MHz) */
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CLK_EnableXtalRC(CLK_PWRCTL_HXTEN_Msk);
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/* Waiting for 12MHz clock ready */
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CLK_WaitClockReady( CLK_STATUS_HXTSTB_Msk);
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/* Switch HCLK clock source to HXT */
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CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HXT,CLK_CLKDIV0_HCLK(1));
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/* Set PLL to power down mode and PLL_STB bit in CLKSTATUS register will be cleared by hardware.*/
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CLK->PLLCTL |= CLK_PLLCTL_PD_Msk;
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/* Set PLL frequency */
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CLK->PLLCTL = CLK_PLLCTL_84MHz_HXT;
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/* Waiting for clock ready */
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CLK_WaitClockReady(CLK_STATUS_PLLSTB_Msk);
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/* Switch HCLK clock source to PLL */
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CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_PLL,CLK_CLKDIV0_HCLK(1));
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/* Update System Core Clock */
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/* User can use SystemCoreClockUpdate() to calculate SystemCoreClock. */
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SystemCoreClockUpdate();
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/* Lock protected registers */
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SYS_LockReg();
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}
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/**
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* This function will initial NUC472 board.
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*/
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void rt_hw_board_init(void)
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{
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clock_init();
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#ifdef RT_USING_HEAP
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#ifdef __CC_ARM
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rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)SRAM_END);
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#elif __ICCARM__
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rt_system_heap_init(__segment_end("HEAP"), (void*)SRAM_END);
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#else
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/* init memory system */
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2018-03-28 14:40:05 +08:00
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rt_system_heap_init((void*)&__bss_end, (void*)SRAM_END);
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2017-12-17 12:08:31 +08:00
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#endif
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#endif /* RT_USING_HEAP */
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rt_hw_usart_init();
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rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
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SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
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}
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/**
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* This is the timer interrupt service routine.
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*
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*/
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void SysTick_Handler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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rt_tick_increase();
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/* leave interrupt */
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rt_interrupt_leave();
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}
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