2023-03-31 08:25:39 +08:00
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/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2023-03-29 rose_man first version
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*/
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#include "board.h"
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#include "drv_adc.h"
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#if defined BSP_USING_ADC
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#define DBG_TAG "drv.adc"
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#define DBG_LVL DBG_INFO
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#include <rtdbg.h>
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#if defined(BSP_USING_BL70X) || defined(BSP_USING_BL60X)
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#define ADC_GPIP_BASE ((uint32_t)0x40002000)
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#elif defined(BSP_USING_BL61X) || defined(BSP_USING_BL808)
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#define ADC_GPIP_BASE ((uint32_t)0x20002000)
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#endif
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2024-02-29 23:22:57 +08:00
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static struct bflb_dma_channel_lli_pool_s lli[1];
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static volatile uint32_t raw_data[16 + 10];
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static struct bflb_adc_result_s adc_value[10];
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2023-03-31 08:25:39 +08:00
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static struct bflb_adc_config_s adc_config =
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{
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2024-02-29 23:22:57 +08:00
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.clk_div = ADC_CLK_DIV_32,
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.scan_conv_mode = false,
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.continuous_conv_mode = true,
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.differential_mode = false,
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.resolution = ADC_RESOLUTION_16B,
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.vref = ADC_VREF_3P2V,
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2023-03-31 08:25:39 +08:00
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};
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struct bl_adc
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{
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struct rt_adc_device bl_adc_device;
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2024-02-29 23:22:57 +08:00
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struct bflb_device_s *adc;
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struct bflb_device_s *dma;
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rt_sem_t sem;
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2023-03-31 08:25:39 +08:00
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};
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static struct bl_adc bl_adc_obj;
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2024-02-29 23:22:57 +08:00
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struct _adc_channel_cfg
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2023-03-31 08:25:39 +08:00
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{
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struct bflb_adc_channel_s chan;
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2024-03-24 09:14:37 +08:00
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uint16_t chan_gpio;
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2024-02-29 23:22:57 +08:00
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};
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2023-03-31 08:25:39 +08:00
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2024-02-29 23:22:57 +08:00
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static struct _adc_channel_cfg chan[] = {
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#ifdef BSP_USING_ADC_CH0
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{ .chan.pos_chan = ADC_CHANNEL_0,
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.chan.neg_chan = ADC_CHANNEL_GND,
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.chan_gpio = BSP_ADC_CH0_PIN,},
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#endif
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#ifdef BSP_USING_ADC_CH1
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{ .chan.pos_chan = ADC_CHANNEL_1,
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.chan.neg_chan = ADC_CHANNEL_GND,
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.chan_gpio = BSP_ADC_CH1_PIN,},
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#endif
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#ifdef BSP_USING_ADC_CH2
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{ .chan.pos_chan = ADC_CHANNEL_2,
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.chan.neg_chan = ADC_CHANNEL_GND,
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.chan_gpio = BSP_ADC_CH2_PIN,},
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#endif
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#ifdef BSP_USING_ADC_CH3
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{ .chan.pos_chan = ADC_CHANNEL_3,
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.chan.neg_chan = ADC_CHANNEL_GND,
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.chan_gpio = BSP_ADC_CH3_PIN,},
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#endif
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#ifdef BSP_USING_ADC_CH4
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{ .chan.pos_chan = ADC_CHANNEL_4,
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.chan.neg_chan = ADC_CHANNEL_GND,
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.chan_gpio = BSP_ADC_CH4_PIN,},
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#endif
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#ifdef BSP_USING_ADC_CH5
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{ .chan.pos_chan = ADC_CHANNEL_5,
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.chan.neg_chan = ADC_CHANNEL_GND,
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.chan_gpio = BSP_ADC_CH5_PIN,},
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#endif
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#ifdef BSP_USING_ADC_CH6
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{ .chan.pos_chan = ADC_CHANNEL_6,
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.chan.neg_chan = ADC_CHANNEL_GND,
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.chan_gpio = BSP_ADC_CH6_PIN,},
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#endif
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#ifdef BSP_USING_ADC_CH7
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{ .chan.pos_chan = ADC_CHANNEL_7,
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.chan.neg_chan = ADC_CHANNEL_GND,
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.chan_gpio = BSP_ADC_CH7_PIN,},
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#endif
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#ifdef BSP_USING_ADC_CH8
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{ .chan.pos_chan = ADC_CHANNEL_8,
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.chan.neg_chan = ADC_CHANNEL_GND,
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.chan_gpio = BSP_ADC_CH8_PIN,},
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#endif
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#ifdef BSP_USING_ADC_CH9
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{ .chan.pos_chan = ADC_CHANNEL_9,
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.chan.neg_chan = ADC_CHANNEL_GND,
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.chan_gpio = BSP_ADC_CH9_PIN,},
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#endif
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#ifdef BSP_USING_ADC_CH10
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{ .chan.pos_chan = ADC_CHANNEL_10,
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.chan.neg_chan = ADC_CHANNEL_GND,
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.chan_gpio = BSP_ADC_CH10_PIN,},
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#endif
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};
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static void bl_adc_pin_init(void)
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{
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struct bflb_device_s *gpio;
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gpio = bflb_device_get_by_name("gpio");
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for (uint8_t i = 0; i < sizeof(chan) / sizeof(chan[0]); i++)
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{
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bflb_gpio_init(gpio, chan[i].chan_gpio, GPIO_ANALOG | GPIO_SMT_EN | GPIO_DRV_0);
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}
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}
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static rt_err_t bl_adc_enabled(struct rt_adc_device *device, rt_int8_t channel, rt_bool_t enabled)
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{
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RT_ASSERT(device != RT_NULL);
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struct bl_adc *_adc;
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struct bflb_dma_channel_lli_transfer_s transfers[1];
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_adc = (struct bl_adc *)device->parent.user_data;
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struct bflb_adc_channel_s chan;
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2023-03-31 08:25:39 +08:00
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chan.pos_chan = channel;
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chan.neg_chan = ADC_CHANNEL_GND;
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2024-02-29 23:22:57 +08:00
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bflb_adc_channel_config(_adc->adc, &chan, channel);
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transfers[0].src_addr = (uint32_t)DMA_ADDR_ADC_RDR;
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transfers[0].dst_addr = (uint32_t)raw_data;
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transfers[0].nbytes = sizeof(raw_data);
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2023-03-31 08:25:39 +08:00
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2024-02-29 23:22:57 +08:00
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bflb_dma_channel_lli_reload(_adc->dma, lli, 1, transfers, 1);
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bflb_dma_channel_start(_adc->dma);
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2023-03-31 08:25:39 +08:00
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if (enabled)
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{
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2024-02-29 23:22:57 +08:00
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bflb_adc_start_conversion(_adc->adc);
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2023-03-31 08:25:39 +08:00
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}
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else
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{
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2024-02-29 23:22:57 +08:00
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bflb_adc_stop_conversion(_adc->adc);
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2023-03-31 08:25:39 +08:00
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}
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return RT_EOK;
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}
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2024-02-29 23:22:57 +08:00
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static rt_err_t bl_adc_get_value(struct rt_adc_device *device, rt_int8_t channel, rt_uint32_t *value)
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2023-03-31 08:25:39 +08:00
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{
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2024-02-29 23:22:57 +08:00
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struct bl_adc *_adc;
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2023-03-31 08:25:39 +08:00
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RT_ASSERT(device != RT_NULL);
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RT_ASSERT(value != RT_NULL);
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2024-02-29 23:22:57 +08:00
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_adc = device->parent.user_data;
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2023-03-31 08:25:39 +08:00
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2024-02-29 23:22:57 +08:00
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rt_sem_take(_adc->sem, RT_WAITING_FOREVER);
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2023-03-31 08:25:39 +08:00
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/* get ADC value */
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*value = (rt_uint32_t)raw_data[10 + channel];
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2023-03-31 08:25:39 +08:00
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return RT_EOK;
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}
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static const struct rt_adc_ops bl_adc_ops =
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{
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.enabled = bl_adc_enabled,
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.convert = bl_adc_get_value,
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};
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2024-02-29 23:22:57 +08:00
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static void bl_adc_dma_isr(void *arg)
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{
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struct bl_adc *_adc = (struct bl_adc *)arg;
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LOG_D("adc dma done ");
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// bflb_adc_parse_result(_adc->adc, raw_data, adc_value, 10);
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rt_sem_release(_adc->sem);
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}
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2023-03-31 08:25:39 +08:00
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int rt_hw_adc_init(void)
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{
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int result = RT_EOK;
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2024-02-29 23:22:57 +08:00
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bl_adc_pin_init();
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bl_adc_obj.adc = bflb_device_get_by_name("adc");
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bl_adc_obj.dma = bflb_device_get_by_name(BSP_ADC_DMA_CHANNEL);
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if(bl_adc_obj.adc == RT_NULL || bl_adc_obj.dma == RT_NULL)
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{
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LOG_E("adc dma device not found");
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return -RT_ERROR;
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}
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2024-03-24 09:14:37 +08:00
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2024-02-29 23:22:57 +08:00
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bl_adc_obj.sem = rt_sem_create("adc_sem", 0, RT_IPC_FLAG_PRIO);
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if(bl_adc_obj.sem == RT_NULL)
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{
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LOG_E("rt_sem_create adc_dma_sem error");
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return -RT_ENOMEM;
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}
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bflb_adc_init(bl_adc_obj.adc, &adc_config);
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bflb_adc_link_rxdma(bl_adc_obj.adc, true);
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struct bflb_dma_channel_config_s config;
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config.direction = DMA_PERIPH_TO_MEMORY;
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config.src_req = DMA_REQUEST_ADC;
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config.dst_req = DMA_REQUEST_NONE;
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config.src_addr_inc = DMA_ADDR_INCREMENT_DISABLE;
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config.dst_addr_inc = DMA_ADDR_INCREMENT_ENABLE;
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config.src_burst_count = DMA_BURST_INCR1;
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config.dst_burst_count = DMA_BURST_INCR1;
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config.src_width = DMA_DATA_WIDTH_32BIT;
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config.dst_width = DMA_DATA_WIDTH_32BIT;
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bflb_dma_channel_init(bl_adc_obj.dma, &config);
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bflb_dma_channel_irq_attach(bl_adc_obj.dma, bl_adc_dma_isr, (void *)&bl_adc_obj);
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2023-03-31 08:25:39 +08:00
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/* register ADC device */
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2024-02-29 23:22:57 +08:00
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if (rt_hw_adc_register(&bl_adc_obj.bl_adc_device, "adc", &bl_adc_ops, &bl_adc_obj) == RT_EOK)
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2023-03-31 08:25:39 +08:00
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{
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LOG_D("adc init success");
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}
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else
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{
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LOG_E("adc register failed");
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result = -RT_ERROR;
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}
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return result;
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}
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INIT_BOARD_EXPORT(rt_hw_adc_init);
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#endif /* BSP_USING_ADC */
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