2017-07-05 18:17:16 +08:00
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/*
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2018-10-16 13:00:37 +08:00
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* Copyright (c) 2006-2018, RT-Thread Development Team
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2017-07-05 18:17:16 +08:00
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*
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2018-10-16 13:00:37 +08:00
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* SPDX-License-Identifier: Apache-2.0
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2017-07-05 18:17:16 +08:00
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*
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* Change Logs:
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* Date Author Notes
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2018-05-16 23:58:59 +08:00
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* 2018-05-14 ZYH first implementation
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2017-07-05 18:17:16 +08:00
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*/
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2018-08-06 14:07:48 +08:00
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2017-07-05 18:17:16 +08:00
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#include <stdint.h>
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#include <rthw.h>
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#include <rtthread.h>
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#include "board.h"
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2018-08-06 14:07:48 +08:00
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2018-05-16 23:58:59 +08:00
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#ifdef BSP_USING_HSI
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#error Can not using HSI on this bsp
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#endif
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2017-07-05 18:17:16 +08:00
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2018-05-16 23:58:59 +08:00
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static void SystemClock_Config(void)
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2017-07-05 18:17:16 +08:00
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{
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2018-08-06 14:07:48 +08:00
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RCC_OscInitTypeDef RCC_OscInitStruct;
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RCC_ClkInitTypeDef RCC_ClkInitStruct;
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RCC_PeriphCLKInitTypeDef PeriphClkInit;
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2017-07-05 18:17:16 +08:00
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2018-08-06 14:07:48 +08:00
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/**Initializes the CPU, AHB and APB busses clocks
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2018-05-16 23:58:59 +08:00
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*/
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2018-08-06 14:07:48 +08:00
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_MSI;
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RCC_OscInitStruct.LSIState = RCC_LSI_ON;
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RCC_OscInitStruct.MSIState = RCC_MSI_ON;
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RCC_OscInitStruct.MSICalibrationValue = 0;
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RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI;
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RCC_OscInitStruct.PLL.PLLM = 1;
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RCC_OscInitStruct.PLL.PLLN = 40;
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RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7;
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RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
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RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
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HAL_RCC_OscConfig(&RCC_OscInitStruct);
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/**Initializes the CPU, AHB and APB busses clocks
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2018-05-16 23:58:59 +08:00
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*/
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2018-08-06 14:07:48 +08:00
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
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| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
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HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4);
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PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2
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| RCC_PERIPHCLK_USART3 | RCC_PERIPHCLK_UART4
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| RCC_PERIPHCLK_UART5 | RCC_PERIPHCLK_LPUART1
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| RCC_PERIPHCLK_USB;
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PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
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PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1;
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PeriphClkInit.Usart3ClockSelection = RCC_USART3CLKSOURCE_PCLK1;
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PeriphClkInit.Uart4ClockSelection = RCC_UART4CLKSOURCE_PCLK1;
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PeriphClkInit.Uart5ClockSelection = RCC_UART5CLKSOURCE_PCLK1;
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PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1;
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PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1;
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PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_MSI;
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PeriphClkInit.PLLSAI1.PLLSAI1M = 1;
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PeriphClkInit.PLLSAI1.PLLSAI1N = 24;
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PeriphClkInit.PLLSAI1.PLLSAI1P = RCC_PLLP_DIV7;
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PeriphClkInit.PLLSAI1.PLLSAI1Q = RCC_PLLQ_DIV2;
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PeriphClkInit.PLLSAI1.PLLSAI1R = RCC_PLLR_DIV2;
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PeriphClkInit.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_48M2CLK;
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HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit);
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/**Configure the main internal regulator output voltage
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2018-05-16 23:58:59 +08:00
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*/
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2018-08-06 14:07:48 +08:00
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HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
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2017-07-05 18:17:16 +08:00
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}
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void SysTick_Handler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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rt_tick_increase();
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/* leave interrupt */
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rt_interrupt_leave();
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}
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HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
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{
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2018-05-16 23:58:59 +08:00
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/**Configure the Systick interrupt time
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*/
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HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq() / RT_TICK_PER_SECOND);
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/**Configure the Systick
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*/
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HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
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/* SysTick_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(SysTick_IRQn, 15, 0);
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2017-07-05 18:17:16 +08:00
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return HAL_OK;
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}
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uint32_t HAL_GetTick(void)
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{
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2018-05-16 23:58:59 +08:00
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return rt_tick_get() * 1000 / RT_TICK_PER_SECOND;
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}
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void HAL_Delay(__IO uint32_t Delay)
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{
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rt_thread_delay(Delay * 1000 / RT_TICK_PER_SECOND);
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2017-07-05 18:17:16 +08:00
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}
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void HAL_SuspendTick(void)
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{
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2018-05-16 23:58:59 +08:00
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/* we should not suspend tick */
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2017-07-05 18:17:16 +08:00
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}
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void HAL_ResumeTick(void)
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{
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2018-05-16 23:58:59 +08:00
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/* we should not resume tick */
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2017-07-05 18:17:16 +08:00
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}
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2018-05-16 23:58:59 +08:00
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void HAL_MspInit(void)
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2017-07-05 18:17:16 +08:00
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{
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2018-05-16 23:58:59 +08:00
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__HAL_RCC_SYSCFG_CLK_ENABLE();
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__HAL_RCC_PWR_CLK_ENABLE();
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HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
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/* System interrupt init*/
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/* MemoryManagement_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(MemoryManagement_IRQn, 0, 0);
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/* BusFault_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(BusFault_IRQn, 0, 0);
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/* UsageFault_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(UsageFault_IRQn, 0, 0);
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/* SVCall_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(SVCall_IRQn, 0, 0);
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/* DebugMonitor_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(DebugMonitor_IRQn, 0, 0);
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/* PendSV_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
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2017-07-05 18:17:16 +08:00
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}
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2018-08-06 14:07:48 +08:00
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2017-07-05 18:17:16 +08:00
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/**
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* This function will initial STM32 board.
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*/
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2018-05-16 23:58:59 +08:00
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void rt_hw_board_init(void)
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2017-07-05 18:17:16 +08:00
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{
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2018-05-16 23:58:59 +08:00
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/* Configure the system clock @ 80 Mhz */
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2017-07-05 18:17:16 +08:00
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SystemClock_Config();
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2018-05-16 23:58:59 +08:00
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HAL_Init();
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#ifdef RT_USING_HEAP
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rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
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#endif
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2017-07-05 18:17:16 +08:00
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#ifdef RT_USING_COMPONENTS_INIT
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rt_components_board_init();
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#endif
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2017-11-20 19:37:05 +08:00
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#ifdef RT_USING_CONSOLE
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2018-05-16 23:58:59 +08:00
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rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
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2017-11-20 19:37:05 +08:00
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#endif
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2017-07-05 18:17:16 +08:00
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}
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/*@}*/
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