rt-thread-official/libcpu/aarch64/common/cpu_gcc.S

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/*
* Copyright (c) 2006-2022, RT-Thread Development Team
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*
* SPDX-License-Identifier: Apache-2.0
*
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* Date Author Notes
* 2018-10-06 ZhaoXiaowei the first version
*/
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.text
.globl rt_hw_get_current_el
rt_hw_get_current_el:
MRS X0, CurrentEL
CMP X0, 0xc
B.EQ 3f
CMP X0, 0x8
B.EQ 2f
CMP X0, 0x4
B.EQ 1f
LDR X0, =0
B 0f
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3:
LDR X0, =3
B 0f
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2:
LDR X0, =2
B 0f
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1:
LDR X0, =1
B 0f
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0:
RET
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.globl rt_hw_set_current_vbar
rt_hw_set_current_vbar:
MRS X1, CurrentEL
CMP X1, 0xc
B.EQ 3f
CMP X1, 0x8
B.EQ 2f
CMP X1, 0x4
B.EQ 1f
B 0f
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3:
MSR VBAR_EL3,X0
B 0f
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2:
MSR VBAR_EL2,X0
B 0f
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1:
MSR VBAR_EL1,X0
B 0f
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0:
RET
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.globl rt_hw_set_elx_env
rt_hw_set_elx_env:
MRS X1, CurrentEL
CMP X1, 0xc
B.EQ 3f
CMP X1, 0x8
B.EQ 2f
CMP X1, 0x4
B.EQ 1f
B 0f
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3:
MRS X0, SCR_EL3
ORR X0, X0, #0xF /* SCR_EL3.NS|IRQ|FIQ|EA */
MSR SCR_EL3, X0
B 0f
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2:
MRS X0, HCR_EL2
ORR X0, X0, #0x38
MSR HCR_EL2, X0
B 0f
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1:
B 0f
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0:
RET