2020-12-03 09:02:36 +08:00
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/*
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2021-03-14 15:33:55 +08:00
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* Copyright (c) 2006-2021, RT-Thread Development Team
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2020-12-03 09:02:36 +08:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2020-08-08 thread-liu first version
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*/
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#include "board.h"
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#include "mfxstm32l152.h"
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#define DRV_DEBUG
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#define LOG_TAG "drv.mfx"
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#include <drv_log.h>
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#define CHIP_ADDRESS 0x42 /* mfx address */
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#define I2C_NAME "i2c2"
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struct st_mfx
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{
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2021-03-14 15:33:55 +08:00
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struct rt_device dev;
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2020-12-03 09:02:36 +08:00
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struct rt_i2c_bus_device *i2c_bus;
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rt_uint8_t id;
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rt_uint16_t type;
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};
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static struct st_mfx rt_mfx = {0};
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static IO_DrvTypeDef *IoDrv = NULL;
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static rt_err_t read_reg(struct rt_i2c_bus_device *bus, rt_uint8_t reg, rt_uint16_t len, rt_uint8_t *buf)
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{
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struct rt_i2c_msg msg[2] = {0, 0};
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2021-03-14 15:33:55 +08:00
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2020-12-03 09:02:36 +08:00
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RT_ASSERT(bus != RT_NULL);
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msg[0].addr = CHIP_ADDRESS;
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msg[0].flags = RT_I2C_WR;
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msg[0].buf = ®
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msg[0].len = 1;
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msg[1].addr = CHIP_ADDRESS;
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msg[1].flags = RT_I2C_RD;
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msg[1].len = len;
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msg[1].buf = buf;
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if (rt_i2c_transfer(bus, msg, 2) == 2)
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{
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return RT_EOK;
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}
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return RT_ERROR;
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}
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/* i2c write reg */
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static rt_err_t write_reg(struct rt_i2c_bus_device *bus, rt_uint8_t reg, rt_uint8_t data)
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{
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rt_uint8_t buf[2];
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struct rt_i2c_msg msgs;
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RT_ASSERT(bus != RT_NULL);
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buf[0] = reg;
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buf[1] = data;
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msgs.addr = CHIP_ADDRESS;
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msgs.flags = RT_I2C_WR;
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msgs.buf = buf;
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msgs.len = sizeof(buf);
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if (rt_i2c_transfer(bus, &msgs, 1) == 1)
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{
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return RT_EOK;
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}
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return RT_ERROR;
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}
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void MFX_IO_Init(void)
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{
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rt_mfx.i2c_bus = rt_i2c_bus_device_find(I2C_NAME);
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if (rt_mfx.i2c_bus == RT_NULL)
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{
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LOG_E("can't find %c deivce", I2C_NAME);
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}
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}
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void MFX_IO_DeInit(void)
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{
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}
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void MFX_IO_ITConfig(void)
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{
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static rt_uint8_t mfx_io_it_enabled = 0;
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GPIO_InitTypeDef gpio_init_structure;
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if(mfx_io_it_enabled == 0)
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{
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mfx_io_it_enabled = 1;
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/* Enable the GPIO EXTI clock */
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__HAL_RCC_GPIOI_CLK_ENABLE();
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gpio_init_structure.Pin = GPIO_PIN_8;
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gpio_init_structure.Pull = GPIO_NOPULL;
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gpio_init_structure.Speed = GPIO_SPEED_FREQ_LOW;
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gpio_init_structure.Mode = GPIO_MODE_IT_RISING;
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HAL_GPIO_Init(GPIOI, &gpio_init_structure);
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/* Enable and set GPIO EXTI Interrupt to the lowest priority */
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HAL_NVIC_SetPriority((IRQn_Type)(EXTI8_IRQn), 0x04, 0x00);
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HAL_NVIC_EnableIRQ((IRQn_Type)(EXTI8_IRQn));
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}
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}
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void MFX_IO_Write(rt_uint16_t Addr, rt_uint8_t Reg, rt_uint8_t Value)
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{
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write_reg(rt_mfx.i2c_bus, Reg, Value);
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}
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rt_uint8_t MFX_IO_Read(rt_uint16_t Addr, rt_uint8_t Reg)
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{
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rt_uint8_t value = 0;
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read_reg(rt_mfx.i2c_bus, Reg, 1, &value);
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return value;
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}
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rt_uint16_t MFX_IO_ReadMultiple(rt_uint16_t Addr, rt_uint8_t Reg, rt_uint8_t *Buffer, rt_uint16_t Length)
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{
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return read_reg(rt_mfx.i2c_bus, Reg, Length, Buffer);
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}
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2022-12-12 02:12:03 +08:00
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rt_weak void MFX_IO_Delay(rt_uint32_t Delay)
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2020-12-03 09:02:36 +08:00
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{
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rt_thread_delay(Delay);
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}
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2022-12-12 02:12:03 +08:00
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rt_weak void MFX_IO_Wakeup(void)
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2020-12-03 09:02:36 +08:00
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{
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}
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2022-12-12 02:12:03 +08:00
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rt_weak void MFX_IO_EnableWakeupPin(void)
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2020-12-03 09:02:36 +08:00
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{
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}
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rt_uint8_t BSP_IO_DeInit(void)
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{
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IoDrv = NULL;
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return RT_EOK;
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}
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rt_uint32_t BSP_IO_ITGetStatus(rt_uint32_t IoPin)
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{
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/* Return the IO Pin IT status */
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return (IoDrv->ITStatus(0, IoPin));
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}
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/**
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* @brief Clears all the IO IT pending bits.
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* @retval None
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*/
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void BSP_IO_ITClear(void)
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{
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/* Clear all IO IT pending bits */
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IoDrv->ClearIT(0, MFXSTM32L152_GPIO_PINS_ALL);
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}
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void BSP_IO_ITClearPin(rt_uint32_t IO_Pins_To_Clear)
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{
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/* Clear only the selected list of IO IT pending bits */
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IoDrv->ClearIT(0, IO_Pins_To_Clear);
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}
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/**
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* @brief Configures the IO pin(s) according to IO mode structure value.
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2021-03-14 15:33:55 +08:00
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* @param IoPin: IO pin(s) to be configured.
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2020-12-03 09:02:36 +08:00
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* This parameter can be one of the following values:
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* @arg MFXSTM32L152_GPIO_PIN_x: where x can be from 0 to 23.
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* @param IoMode: IO pin mode to configure
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* This parameter can be one of the following values:
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* @arg IO_MODE_INPUT
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* @arg IO_MODE_OUTPUT
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* @arg IO_MODE_IT_RISING_EDGE
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* @arg IO_MODE_IT_FALLING_EDGE
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* @arg IO_MODE_IT_LOW_LEVEL
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* @arg IO_MODE_IT_HIGH_LEVEL
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* @arg IO_MODE_ANALOG
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* @arg IO_MODE_OFF
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* @arg IO_MODE_INPUT_PU,
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* @arg IO_MODE_INPUT_PD,
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* @arg IO_MODE_OUTPUT_OD,
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* @arg IO_MODE_OUTPUT_OD_PU,
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* @arg IO_MODE_OUTPUT_OD_PD,
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* @arg IO_MODE_OUTPUT_PP,
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* @arg IO_MODE_OUTPUT_PP_PU,
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* @arg IO_MODE_OUTPUT_PP_PD,
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* @arg IO_MODE_IT_RISING_EDGE_PU
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* @arg IO_MODE_IT_FALLING_EDGE_PU
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* @arg IO_MODE_IT_LOW_LEVEL_PU
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* @arg IO_MODE_IT_HIGH_LEVEL_PU
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* @arg IO_MODE_IT_RISING_EDGE_PD
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* @arg IO_MODE_IT_FALLING_EDGE_PD
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* @arg IO_MODE_IT_LOW_LEVEL_PD
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* @arg IO_MODE_IT_HIGH_LEVEL_PD
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* @retval RT_EOK if all initializations are OK. Other value if error.
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*/
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rt_uint8_t rt_mfx_pin_mode(rt_uint32_t IoPin, IO_ModeTypedef IoMode)
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{
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/* Configure the selected IO pin(s) mode */
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IoDrv->Config(0, IoPin, IoMode);
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2021-03-14 15:33:55 +08:00
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return RT_EOK;
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2020-12-03 09:02:36 +08:00
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}
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/**
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* @brief Sets the IRQ_OUT pin polarity and type
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* @param IoIrqOutPinPolarity: High/Low
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* @param IoIrqOutPinType: OpenDrain/PushPull
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2020-12-03 09:02:36 +08:00
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* @retval OK
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*/
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rt_uint8_t rt_mfx_config_irq(rt_uint8_t IoIrqOutPinPolarity, rt_uint8_t IoIrqOutPinType)
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{
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if((rt_mfx.id == MFXSTM32L152_ID_1) || (rt_mfx.id == MFXSTM32L152_ID_2))
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{
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/* Initialize the IO driver structure */
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mfxstm32l152_SetIrqOutPinPolarity(0, IoIrqOutPinPolarity);
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mfxstm32l152_SetIrqOutPinType(0, IoIrqOutPinType);
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}
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return RT_EOK;
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}
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/**
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* @brief Sets the selected pins state.
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2021-03-14 15:33:55 +08:00
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* @param IoPin: Selected pins to write.
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* This parameter can be any combination of the IO pins.
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* @param PinState: New pins state to write
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2020-12-03 09:02:36 +08:00
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* @retval None
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*/
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void rt_mfx_pin_write(rt_uint32_t IoPin, rt_base_t PinState)
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{
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/* Set the Pin state */
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IoDrv->WritePin(0, IoPin, PinState);
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}
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/**
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* @brief Gets the selected pins current state.
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2021-03-14 15:33:55 +08:00
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* @param IoPin: Selected pins to read.
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* This parameter can be any combination of the IO pins.
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* @retval The current pins state
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2020-12-03 09:02:36 +08:00
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*/
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rt_uint32_t rt_mfx_pin_read(rt_uint32_t IoPin)
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{
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return(IoDrv->ReadPin(0, IoPin));
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}
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/**
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* @brief Toggles the selected pins state.
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2021-03-14 15:33:55 +08:00
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* @param IoPin: Selected pins to toggle.
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* This parameter can be any combination of the IO pins.
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* @note This function is only used to toggle one pin in the same time
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2020-12-03 09:02:36 +08:00
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* @retval None
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*/
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void rt_mfx_pin_toggle(rt_uint32_t IoPin)
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{
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/* Toggle the current pin state */
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if(IoDrv->ReadPin(0, IoPin) != 0)
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{
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IoDrv->WritePin(0, IoPin, 0); /* Reset */
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}
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else
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{
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IoDrv->WritePin(0, IoPin, 1); /* Set */
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}
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2020-12-03 09:02:36 +08:00
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}
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int rt_mfx_init(void)
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{
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/* Read ID and verify the MFX is ready */
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rt_mfx.id = mfxstm32l152_io_drv.ReadID(0);
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if((rt_mfx.id == MFXSTM32L152_ID_1) || (rt_mfx.id == MFXSTM32L152_ID_2))
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{
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/* Initialize the IO driver structure */
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IoDrv = &mfxstm32l152_io_drv;
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/* Initialize MFX */
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IoDrv->Init(0);
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IoDrv->Start(0, IO_PIN_ALL);
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2021-03-14 15:33:55 +08:00
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2020-12-03 09:02:36 +08:00
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LOG_I("mfx init success, id: 0x%x", rt_mfx.id);
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2021-03-14 15:33:55 +08:00
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2020-12-03 09:02:36 +08:00
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return RT_EOK;
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}
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LOG_I("mfx init error, id: 0x%x", rt_mfx.id);
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2021-03-14 15:33:55 +08:00
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2020-12-03 09:02:36 +08:00
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return RT_ERROR;
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}
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INIT_DEVICE_EXPORT(rt_mfx_init);
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