266 lines
8.1 KiB
C
266 lines
8.1 KiB
C
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/**************************************************************************//**
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*
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* @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-9-22 Wayne First version
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*
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* Note: 2 channels of a tpwm have the same output.
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******************************************************************************/
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#include <rtconfig.h>
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#if (defined(BSP_USING_TPWM) && defined(RT_USING_PWM))
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#define LOG_TAG "drv.tpwm"
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#define DBG_ENABLE
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#define DBG_SECTION_NAME LOG_TAG
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#define DBG_LEVEL DBG_INFO
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#define TPWM_CHANNEL_NUM 2
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#include <rtdbg.h>
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#include <rtdevice.h>
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#include "NuMicro.h"
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#include <drv_sys.h>
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/* Private define ---------------------------------------------------------------*/
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#define NU_TPWM_DEVICE(tpwm) (nu_tpwm_t)(tpwm)
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enum
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{
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TPWM_START = -1,
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#if defined(BSP_USING_TPWM0)
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TPWM0_IDX,
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#endif
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#if defined(BSP_USING_TPWM1)
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TPWM1_IDX,
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#endif
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#if defined(BSP_USING_TPWM2)
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TPWM2_IDX,
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#endif
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#if defined(BSP_USING_TPWM3)
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TPWM3_IDX,
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#endif
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#if defined(BSP_USING_TPWM4)
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TPWM4_IDX,
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#endif
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#if defined(BSP_USING_TPWM5)
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TPWM5_IDX,
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#endif
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#if defined(BSP_USING_TPWM6)
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TPWM6_IDX,
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#endif
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#if defined(BSP_USING_TPWM7)
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TPWM7_IDX,
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#endif
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#if defined(BSP_USING_TPWM8)
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TPWM8_IDX,
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#endif
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#if defined(BSP_USING_TPWM9)
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TPWM9_IDX,
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#endif
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#if defined(BSP_USING_TPWM10)
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TPWM10_IDX,
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#endif
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#if defined(BSP_USING_TPWM11)
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TPWM11_IDX,
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#endif
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TPWM_CNT
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};
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/* Private typedef --------------------------------------------------------------*/
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struct nu_tpwm
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{
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struct rt_device_pwm tpwm_dev;
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char *name;
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TIMER_T *base;
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uint32_t rstidx;
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uint32_t modid;
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rt_uint32_t channel_mask; //TPWM_CH0 | TPWM_CH1
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} ;
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typedef struct nu_tpwm *nu_tpwm_t;
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/* Private functions ------------------------------------------------------------*/
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static rt_err_t nu_tpwm_enable(struct rt_device_pwm *tpwm_dev, struct rt_pwm_configuration *tpwm_config, rt_bool_t enable);
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static rt_err_t nu_tpwm_set(struct rt_device_pwm *tpwm_dev, struct rt_pwm_configuration *tpwm_config);
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static rt_err_t nu_tpwm_get(struct rt_device_pwm *tpwm_dev, struct rt_pwm_configuration *tpwm_config);
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static rt_err_t nu_tpwm_control(struct rt_device_pwm *tpwm_dev, int cmd, void *arg);
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/* Private variables ------------------------------------------------------------*/
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static struct nu_tpwm nu_tpwm_arr [] =
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{
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#if defined(BSP_USING_TPWM0)
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{ .name = "tpwm0", .base = TIMER0, .rstidx = TMR0_RST, .modid = TMR0_MODULE },
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#endif
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#if defined(BSP_USING_TPWM1)
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{ .name = "tpwm1", .base = TIMER1, .rstidx = TMR1_RST, .modid = TMR1_MODULE },
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#endif
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#if defined(BSP_USING_TPWM2)
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{ .name = "tpwm2", .base = TIMER2, .rstidx = TMR2_RST, .modid = TMR2_MODULE },
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#endif
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#if defined(BSP_USING_TPWM3)
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{ .name = "tpwm3", .base = TIMER3, .rstidx = TMR3_RST, .modid = TMR3_MODULE },
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#endif
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#if defined(BSP_USING_TPWM4)
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{ .name = "tpwm4", .base = TIMER4, .rstidx = TMR4_RST, .modid = TMR4_MODULE },
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#endif
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#if defined(BSP_USING_TPWM5)
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{ .name = "tpwm5", .base = TIMER5, .rstidx = TMR5_RST, .modid = TMR5_MODULE },
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#endif
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#if defined(BSP_USING_TPWM6)
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{ .name = "tpwm6", .base = TIMER6, .rstidx = TMR6_RST, .modid = TMR6_MODULE },
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#endif
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#if defined(BSP_USING_TPWM7)
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{ .name = "tpwm7", .base = TIMER7, .rstidx = TMR7_RST, .modid = TMR7_MODULE },
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#endif
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#if defined(BSP_USING_TPWM8)
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{ .name = "tpwm8", .base = TIMER8, .rstidx = TMR8_RST, .modid = TMR8_MODULE },
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#endif
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#if defined(BSP_USING_TPWM9)
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{ .name = "tpwm9", .base = TIMER9, .rstidx = TMR9_RST, .modid = TMR9_MODULE },
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#endif
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#if defined(BSP_USING_TPWM10)
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{ .name = "tpwm10", .base = TIMER10, .rstidx = TMR10_RST, .modid = TMR10_MODULE },
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#endif
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#if defined(BSP_USING_TPWM11)
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{ .name = "tpwm11", .base = TIMER11, .rstidx = TMR11_RST, .modid = TMR11_MODULE },
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#endif
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};
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static struct rt_pwm_ops nu_tpwm_ops =
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{
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nu_tpwm_control
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};
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/* Functions define ------------------------------------------------------------*/
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static rt_err_t nu_tpwm_enable(struct rt_device_pwm *tpwm_dev, struct rt_pwm_configuration *tpwm_config, rt_bool_t enable)
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{
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rt_err_t result = RT_EOK;
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rt_uint32_t tpwm_channel = tpwm_config->channel;
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nu_tpwm_t psNuTPWM = NU_TPWM_DEVICE(tpwm_dev->parent.user_data);
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if (enable == RT_TRUE)
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{
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if (psNuTPWM->channel_mask == 0)
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{
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TPWM_START_COUNTER(psNuTPWM->base);
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}
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psNuTPWM->channel_mask |= (1 << tpwm_channel);
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TPWM_ENABLE_OUTPUT(psNuTPWM->base, psNuTPWM->channel_mask);
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}
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else
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{
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psNuTPWM->channel_mask &= ~(1 << tpwm_channel);
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TPWM_ENABLE_OUTPUT(psNuTPWM->base, psNuTPWM->channel_mask);
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if (psNuTPWM->channel_mask == 0)
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{
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TPWM_STOP_COUNTER(psNuTPWM->base);
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}
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}
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return result;
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}
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static rt_err_t nu_tpwm_set(struct rt_device_pwm *tpwm_dev, struct rt_pwm_configuration *tpwm_config)
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{
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if (tpwm_config->period <= 0)
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return -(RT_ERROR);
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rt_uint32_t tpwm_freq, tpwm_dutycycle ;
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rt_uint32_t tpwm_period = tpwm_config->period;
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rt_uint32_t tpwm_pulse = tpwm_config->pulse;
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nu_tpwm_t psNuTPWM = NU_TPWM_DEVICE(tpwm_dev->parent.user_data);
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//rt_uint32_t pre_tpwm_prescaler = TPWM_GET_PRESCALER(psNuTPWM->base);
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tpwm_freq = 1000000000 / tpwm_period;
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tpwm_dutycycle = (tpwm_pulse * 100) / tpwm_period;
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TPWM_ConfigOutputFreqAndDuty(psNuTPWM->base, tpwm_freq, tpwm_dutycycle) ;
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return RT_EOK;
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}
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static rt_err_t nu_tpwm_get(struct rt_device_pwm *tpwm_dev, struct rt_pwm_configuration *tpwm_config)
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{
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rt_uint32_t tpwm_real_period, tpwm_real_duty, time_tick, u32TPWMClockFreq ;
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nu_tpwm_t psNuTPWM = NU_TPWM_DEVICE(tpwm_dev->parent.user_data);
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rt_uint32_t tpwm_prescale = TPWM_GET_PRESCALER(psNuTPWM->base);
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rt_uint32_t tpwm_period = TPWM_GET_PERIOD(psNuTPWM->base);
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rt_uint32_t tpwm_pulse = TPWM_GET_CMPDAT(psNuTPWM->base);
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u32TPWMClockFreq = TIMER_GetModuleClock(psNuTPWM->base);
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time_tick = (uint64_t)1000000000000 / u32TPWMClockFreq;
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LOG_I("%s reg--> %d %d %d %d %d\n", psNuTPWM->name, tpwm_prescale, tpwm_period, tpwm_pulse, u32TPWMClockFreq, time_tick);
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tpwm_real_period = (((tpwm_prescale + 1) * (tpwm_period + 1)) * time_tick) / 1000;
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tpwm_real_duty = (((tpwm_prescale + 1) * tpwm_pulse * time_tick)) / 1000;
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tpwm_config->period = tpwm_real_period;
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tpwm_config->pulse = tpwm_real_duty;
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LOG_I("%s %d %d %d\n", psNuTPWM->name, tpwm_config->channel, tpwm_config->period, tpwm_config->pulse);
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return RT_EOK;
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}
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static rt_err_t nu_tpwm_control(struct rt_device_pwm *tpwm_dev, int cmd, void *arg)
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{
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struct rt_pwm_configuration *tpwm_config = (struct rt_pwm_configuration *)arg;
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RT_ASSERT(tpwm_dev != RT_NULL);
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RT_ASSERT(tpwm_config != RT_NULL);
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nu_tpwm_t psNuTPWM = NU_TPWM_DEVICE(tpwm_dev->parent.user_data);
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RT_ASSERT(psNuTPWM != RT_NULL);
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RT_ASSERT(psNuTPWM->base != RT_NULL);
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if ((tpwm_config->channel + 1) > TPWM_CHANNEL_NUM)
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return -(RT_ERROR);
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switch (cmd)
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{
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case PWM_CMD_ENABLE:
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return nu_tpwm_enable(tpwm_dev, tpwm_config, RT_TRUE);
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case PWM_CMD_DISABLE:
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return nu_tpwm_enable(tpwm_dev, tpwm_config, RT_FALSE);
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case PWM_CMD_SET:
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return nu_tpwm_set(tpwm_dev, tpwm_config);
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case PWM_CMD_GET:
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return nu_tpwm_get(tpwm_dev, tpwm_config);
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default:
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break;
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}
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return -(RT_EINVAL);
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}
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int rt_hw_tpwm_init(void)
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{
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int i;
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rt_err_t ret = RT_EOK;
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for (i = (TPWM_START + 1); i < TPWM_CNT; i++)
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{
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nu_tpwm_arr[i].channel_mask = 0;
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CLK_EnableModuleClock(nu_tpwm_arr[i].modid);
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SYS_ResetModule(nu_tpwm_arr[i].rstidx);
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TPWM_ENABLE_PWM_MODE(nu_tpwm_arr[i].base);
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/* Register RT PWM device. */
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ret = rt_device_pwm_register(&nu_tpwm_arr[i].tpwm_dev, nu_tpwm_arr[i].name, &nu_tpwm_ops, &nu_tpwm_arr[i]);
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RT_ASSERT(ret == RT_EOK);
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}
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return 0;
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}
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INIT_DEVICE_EXPORT(rt_hw_tpwm_init);
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#endif //#if (defined(BSP_USING_TPWM) && defined(RT_USING_PWM))
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