49 lines
1.3 KiB
C
49 lines
1.3 KiB
C
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/*
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* Copyright (c) 2006-2022, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2022-12-12 WangXiaoyao the first version
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*/
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#ifndef __TLB_H__
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#define __TLB_H__
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#include "mm_aspace.h"
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#include <rtthread.h>
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#include <stddef.h>
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#include <stdint.h>
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#define dsb(scope) __asm__ volatile("dsb " #scope : : : "memory")
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#define isb() __asm__ volatile("isb" : : : "memory")
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#define STORE_CP32(r, name...) "mcr " RT_STRINGIFY(CP32(%r, name)) ";"
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#define WRITE_CP32(v, name...) do { \
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register uint32_t _r = (v); \
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asm volatile(STORE_CP32(0, name) : : "r" (_r)); \
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} while (0)
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static inline void rt_hw_tlb_invalidate_all(void)
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{
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asm volatile ("mcr p15, 0, r0, c8, c7, 0\ndsb\nisb" ::: "memory");
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}
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static inline void rt_hw_tlb_invalidate_all_local(void)
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{
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rt_hw_tlb_invalidate_all();
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}
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static inline void rt_hw_tlb_invalidate_aspace(rt_aspace_t aspace)
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{
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rt_hw_tlb_invalidate_all();
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}
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static inline void rt_hw_tlb_invalidate_range(rt_aspace_t aspace, void *start,
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size_t size, size_t stride)
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{
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rt_hw_tlb_invalidate_all();
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}
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#endif /* __TLB_H__ */
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