2021-09-22 17:57:45 +08:00
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/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2013-07-20 Bernard first version
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*/
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#include <rtthread.h>
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#include <rthw.h>
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#include <board.h>
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#include <armv8.h>
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#include <interrupt.h>
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#ifdef RT_USING_FINSH
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extern long list_thread(void);
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#endif
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/**
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* this function will show registers of CPU
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*
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* @param regs the registers point
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*/
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void rt_hw_show_register(struct rt_hw_exp_stack *regs)
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{
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rt_kprintf("Execption:\n");
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rt_kprintf("X00:0x%16.16p X01:0x%16.16p X02:0x%16.16p X03:0x%16.16p\n", (void *)regs->x0, (void *)regs->x1, (void *)regs->x2, (void *)regs->x3);
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rt_kprintf("X04:0x%16.16p X05:0x%16.16p X06:0x%16.16p X07:0x%16.16p\n", (void *)regs->x4, (void *)regs->x5, (void *)regs->x6, (void *)regs->x7);
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rt_kprintf("X08:0x%16.16p X09:0x%16.16p X10:0x%16.16p X11:0x%16.16p\n", (void *)regs->x8, (void *)regs->x9, (void *)regs->x10, (void *)regs->x11);
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rt_kprintf("X12:0x%16.16p X13:0x%16.16p X14:0x%16.16p X15:0x%16.16p\n", (void *)regs->x12, (void *)regs->x13, (void *)regs->x14, (void *)regs->x15);
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rt_kprintf("X16:0x%16.16p X17:0x%16.16p X18:0x%16.16p X19:0x%16.16p\n", (void *)regs->x16, (void *)regs->x17, (void *)regs->x18, (void *)regs->x19);
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rt_kprintf("X20:0x%16.16p X21:0x%16.16p X22:0x%16.16p X23:0x%16.16p\n", (void *)regs->x20, (void *)regs->x21, (void *)regs->x22, (void *)regs->x23);
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rt_kprintf("X24:0x%16.16p X25:0x%16.16p X26:0x%16.16p X27:0x%16.16p\n", (void *)regs->x24, (void *)regs->x25, (void *)regs->x26, (void *)regs->x27);
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rt_kprintf("X28:0x%16.16p X29:0x%16.16p X30:0x%16.16p\n", (void *)regs->x28, (void *)regs->x29, (void *)regs->x30);
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rt_kprintf("SPSR :0x%16.16p\n", (void *)regs->spsr);
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rt_kprintf("EPC :0x%16.16p\n", (void *)regs->pc);
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}
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/**
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* When comes across an instruction which it cannot handle,
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* it takes the undefined instruction trap.
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*
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* @param regs system registers
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*
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* @note never invoke this function in application
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*/
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void rt_hw_trap_error(struct rt_hw_exp_stack *regs)
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{
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rt_kprintf("error exception:\n");
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rt_hw_show_register(regs);
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#ifdef RT_USING_FINSH
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list_thread();
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#endif
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rt_hw_cpu_shutdown();
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}
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void rt_hw_trap_irq(void)
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{
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#ifndef BSP_USING_GIC
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void *param;
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uint32_t irq;
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rt_isr_handler_t isr_func;
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extern struct rt_irq_desc isr_table[];
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2022-01-07 13:49:06 +08:00
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uint32_t value = IRQ_PEND_BASIC & 0x3ff;
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2021-09-22 17:57:45 +08:00
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#ifdef RT_USING_SMP
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2022-01-07 13:49:06 +08:00
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uint32_t cpu_id = rt_hw_cpu_id();
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uint32_t mailbox_data = IPI_MAILBOX_CLEAR(cpu_id);
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#else
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uint32_t cpu_id = 0;
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2021-09-22 17:57:45 +08:00
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#endif
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uint32_t int_source = CORE_IRQSOURCE(cpu_id) & 0x3ff;
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2022-01-07 13:49:06 +08:00
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2021-09-22 17:57:45 +08:00
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if (int_source & 0x02)
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{
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isr_func = isr_table[IRQ_ARM_TIMER].handler;
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#ifdef RT_USING_INTERRUPT_INFO
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isr_table[IRQ_ARM_TIMER].counter++;
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#endif
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if (isr_func)
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{
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param = isr_table[IRQ_ARM_TIMER].param;
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isr_func(IRQ_ARM_TIMER, param);
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}
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2022-01-07 13:49:06 +08:00
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return;
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2021-09-22 17:57:45 +08:00
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}
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2022-01-07 13:49:06 +08:00
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#ifdef RT_USING_SMP
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if (int_source & 0xf0)
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{
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/* it's a ipi interrupt */
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if (mailbox_data & 0x1)
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{
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/* clear mailbox */
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IPI_MAILBOX_CLEAR(cpu_id) = mailbox_data;
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isr_func = isr_table[IRQ_ARM_MAILBOX].handler;
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#ifdef RT_USING_INTERRUPT_INFO
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isr_table[IRQ_ARM_MAILBOX].counter++;
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2021-09-22 17:57:45 +08:00
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#endif
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2022-01-07 13:49:06 +08:00
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if (isr_func)
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{
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param = isr_table[IRQ_ARM_MAILBOX].param;
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isr_func(IRQ_ARM_MAILBOX, param);
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}
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}
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else
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{
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CORE_MAILBOX3_CLEAR(cpu_id) = mailbox_data;
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}
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return;
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}
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#endif /* RT_USING_SMP */
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2021-09-22 17:57:45 +08:00
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/* local interrupt*/
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if (value)
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{
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if (value & (1 << 8))
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{
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value = IRQ_PEND1;
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irq = __rt_ffs(value) - 1;
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}
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else if (value & (1 << 9))
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{
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value = IRQ_PEND2;
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irq = __rt_ffs(value) + 31;
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}
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else
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{
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value &= 0x0f;
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irq = __rt_ffs(value) + 63;
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}
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/* get interrupt service routine */
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isr_func = isr_table[irq].handler;
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#ifdef RT_USING_INTERRUPT_INFO
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isr_table[irq].counter++;
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#endif
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if (isr_func)
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{
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/* Interrupt for myself. */
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param = isr_table[irq].param;
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/* turn to interrupt service routine */
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isr_func(irq, param);
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}
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}
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#else
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void *param;
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2022-02-17 01:00:29 +08:00
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int ir, ir_self;
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2021-09-22 17:57:45 +08:00
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rt_isr_handler_t isr_func;
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extern struct rt_irq_desc isr_table[];
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ir = rt_hw_interrupt_get_irq();
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if (ir == 1023)
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{
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/* Spurious interrupt */
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return;
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}
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2022-02-17 01:00:29 +08:00
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/* bit 10~12 is cpuid, bit 0~9 is interrupt id */
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ir_self = ir & 0x3ffUL;
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2021-09-22 17:57:45 +08:00
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/* get interrupt service routine */
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2022-02-17 01:00:29 +08:00
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isr_func = isr_table[ir_self].handler;
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2021-09-22 17:57:45 +08:00
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#ifdef RT_USING_INTERRUPT_INFO
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2022-02-17 01:00:29 +08:00
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isr_table[ir_self].counter++;
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2021-09-22 17:57:45 +08:00
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#endif
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if (isr_func)
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{
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/* Interrupt for myself. */
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2022-02-17 01:00:29 +08:00
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param = isr_table[ir_self].param;
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2021-09-22 17:57:45 +08:00
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/* turn to interrupt service routine */
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2022-02-17 01:00:29 +08:00
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isr_func(ir_self, param);
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2021-09-22 17:57:45 +08:00
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}
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/* end of interrupt */
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rt_hw_interrupt_ack(ir);
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#endif
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}
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void rt_hw_trap_fiq(void)
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{
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void *param;
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int ir;
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rt_isr_handler_t isr_func;
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extern struct rt_irq_desc isr_table[];
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ir = rt_hw_interrupt_get_irq();
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/* get interrupt service routine */
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isr_func = isr_table[ir].handler;
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param = isr_table[ir].param;
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/* turn to interrupt service routine */
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isr_func(ir, param);
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/* end of interrupt */
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rt_hw_interrupt_ack(ir);
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}
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