308 lines
9.0 KiB
C
308 lines
9.0 KiB
C
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/*
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* @brief LPC15xx I2C Common driver
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*
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* @note
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* Copyright(C) NXP Semiconductors, 2014
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* All rights reserved.
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*
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* @par
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* LPC products. This software is supplied "AS IS" without any warranties of
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* any kind, and NXP Semiconductors and its licensor disclaim any and
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* all warranties, express or implied, including all implied warranties of
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* merchantability, fitness for a particular purpose and non-infringement of
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* intellectual property rights. NXP Semiconductors assumes no responsibility
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* or liability for the use of the software, conveys no license or rights under any
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* patent, copyright, mask work right, or any other intellectual property rights in
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* or to any products. NXP Semiconductors reserves the right to make changes
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* in the software without notification. NXP Semiconductors also makes no
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* representation or warranty that such application will be suitable for the
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* specified use without further testing or modification.
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*
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* @par
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors' and its
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* licensor's relevant copyrights in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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*/
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#include "chip.h"
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/*****************************************************************************
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* Private types/enumerations/variables
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****************************************************************************/
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/*****************************************************************************
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* Public types/enumerations/variables
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****************************************************************************/
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/*****************************************************************************
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* Private functions
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****************************************************************************/
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/* Get the RESET ID corresponding to the given I2C base */
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static CHIP_SYSCTL_PERIPH_RESET_T I2C_GetResetID(LPC_I2C_T *pI2C)
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{
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uint32_t base = (uint32_t) pI2C;
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switch (base) {
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case LPC_I2C1_BASE:
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return RESET_I2C1;
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case LPC_I2C2_BASE:
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return RESET_I2C2;
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case LPC_I2C3_BASE:
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return RESET_I2C3;
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default:
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return RESET_I2C0;
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}
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}
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/* Get the CLOCK ID corresponding to the given I2C base */
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static CHIP_SYSCTL_CLOCK_T I2C_GetClockID(LPC_I2C_T *pI2C)
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{
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uint32_t base = (uint32_t) pI2C;
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switch (base) {
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case LPC_I2C1_BASE:
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return SYSCTL_CLOCK_I2C1;
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case LPC_I2C2_BASE:
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return SYSCTL_CLOCK_I2C2;
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case LPC_I2C3_BASE:
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return SYSCTL_CLOCK_I2C3;
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default:
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return SYSCTL_CLOCK_I2C0;
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}
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}
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/**
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* @brief Sets HIGH and LOW duty cycle registers
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* @param pI2C : Pointer to selected I2C peripheral
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* @param sclH : Number of I2C_PCLK cycles for the SCL HIGH time value between (2 - 9).
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* @param sclL : Number of I2C_PCLK cycles for the SCL LOW time value between (2 - 9).
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* @return Nothing
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* @note The I2C clock divider should be set to the appropriate value before calling this function
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* The I2C baud is determined by the following formula: <br>
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* I2C_bitFrequency = (I2C_PCLK)/(I2C_CLKDIV * (sclH + sclL)) <br>
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* where I2C_PCLK is the frequency of the System clock and I2C_CLKDIV is I2C clock divider
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*/
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static void Chip_I2CM_SetDutyCycle(LPC_I2C_T *pI2C, uint16_t sclH, uint16_t sclL)
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{
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/* Limit to usable range of timing values */
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if (sclH < 2) {
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sclH = 2;
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}
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else if (sclH > 9) {
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sclH = 9;
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}
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if (sclL < 2) {
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sclL = 2;
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}
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else if (sclL > 9) {
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sclL = 9;
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}
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pI2C->MSTTIME = (((sclH - 2) & 0x07) << 4) | ((sclL - 2) & 0x07);
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}
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/*****************************************************************************
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* Public functions
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****************************************************************************/
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/* Initializes the LPC_I2C peripheral */
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void Chip_I2C_Init(LPC_I2C_T *pI2C)
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{
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/* Enable I2C clock */
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Chip_Clock_EnablePeriphClock(I2C_GetClockID(pI2C));
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/* Peripheral reset control to I2C */
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Chip_SYSCTL_PeriphReset(I2C_GetResetID(pI2C));
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}
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/* Shuts down the I2C controller block */
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void Chip_I2C_DeInit(LPC_I2C_T *pI2C)
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{
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/* Disable I2C clock */
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Chip_Clock_DisablePeriphClock(I2C_GetClockID(pI2C));
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}
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/* Set up bus speed for LPC_I2C interface */
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void Chip_I2CM_SetBusSpeed(LPC_I2C_T *pI2C, uint32_t busSpeed)
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{
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uint32_t scl = Chip_Clock_GetSystemClockRate() / (Chip_I2C_GetClockDiv(pI2C) * busSpeed);
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Chip_I2CM_SetDutyCycle(pI2C, (scl >> 1), (scl - (scl >> 1)));
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}
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/* Master transfer state change handler handler */
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uint32_t Chip_I2CM_XferHandler(LPC_I2C_T *pI2C, I2CM_XFER_T *xfer)
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{
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uint32_t status = Chip_I2CM_GetStatus(pI2C);
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/* Master Lost Arbitration */
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if (status & I2C_STAT_MSTRARBLOSS) {
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/* Set transfer status as Arbitration Lost */
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xfer->status = I2CM_STATUS_ARBLOST;
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/* Clear Status Flags */
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Chip_I2CM_ClearStatus(pI2C, I2C_STAT_MSTRARBLOSS);
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}
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/* Master Start Stop Error */
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else if (status & I2C_STAT_MSTSTSTPERR) {
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/* Set transfer status as Bus Error */
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xfer->status = I2CM_STATUS_BUS_ERROR;
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/* Clear Status Flags */
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Chip_I2CM_ClearStatus(pI2C, I2C_STAT_MSTSTSTPERR);
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}
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/* Master is Pending */
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else if (status & I2C_STAT_MSTPENDING) {
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/* Branch based on Master State Code */
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switch (Chip_I2CM_GetMasterState(pI2C)) {
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/* Master idle */
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case I2C_STAT_MSTCODE_IDLE:
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/* Do Nothing */
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break;
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/* Receive data is available */
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case I2C_STAT_MSTCODE_RXREADY:
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/* Read Data */
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*xfer->rxBuff++ = pI2C->MSTDAT;
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xfer->rxSz--;
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if (xfer->rxSz) {
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/* Set Continue if there is more data to read */
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Chip_I2CM_MasterContinue(pI2C);
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}
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else {
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/* Set transfer status as OK */
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xfer->status = I2CM_STATUS_OK;
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/* No data to read send Stop */
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Chip_I2CM_SendStop(pI2C);
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}
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break;
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/* Master Transmit available */
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case I2C_STAT_MSTCODE_TXREADY:
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if (xfer->txSz) {
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/* If Tx data available transmit data and continue */
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pI2C->MSTDAT = *xfer->txBuff++;
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xfer->txSz--;
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Chip_I2CM_MasterContinue(pI2C);
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}
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else {
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/* If receive queued after transmit then initiate master receive transfer*/
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if (xfer->rxSz) {
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/* Write Address and RW bit to data register */
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Chip_I2CM_WriteByte(pI2C, (xfer->slaveAddr << 1) | 0x1);
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/* Enter to Master Transmitter mode */
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Chip_I2CM_SendStart(pI2C);
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}
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else {
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/* If no receive queued then set transfer status as OK */
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xfer->status = I2CM_STATUS_OK;
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/* Send Stop */
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Chip_I2CM_SendStop(pI2C);
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}
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}
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break;
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case I2C_STAT_MSTCODE_NACKADR:
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/* Set transfer status as NACK on address */
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xfer->status = I2CM_STATUS_NAK_ADR;
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Chip_I2CM_SendStop(pI2C);
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break;
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case I2C_STAT_MSTCODE_NACKDAT:
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/* Set transfer status as NACK on data */
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xfer->status = I2CM_STATUS_NAK_DAT;
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Chip_I2CM_SendStop(pI2C);
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break;
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default:
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/* Default case should not occur*/
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xfer->status = I2CM_STATUS_ERROR;
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break;
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}
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}
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else {
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/* Default case should not occur */
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xfer->status = I2CM_STATUS_ERROR;
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}
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return xfer->status != I2CM_STATUS_BUSY;
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}
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/* Transmit and Receive data in master mode */
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void Chip_I2CM_Xfer(LPC_I2C_T *pI2C, I2CM_XFER_T *xfer)
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{
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/* set the transfer status as busy */
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xfer->status = I2CM_STATUS_BUSY;
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/* Clear controller state. */
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Chip_I2CM_ClearStatus(pI2C, I2C_STAT_MSTRARBLOSS | I2C_STAT_MSTSTSTPERR);
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/* Write Address and RW bit to data register */
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Chip_I2CM_WriteByte(pI2C, (xfer->slaveAddr << 1) | (xfer->txSz == 0));
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/* Enter to Master Transmitter mode */
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Chip_I2CM_SendStart(pI2C);
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}
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/* Transmit and Receive data in master mode */
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uint32_t Chip_I2CM_XferBlocking(LPC_I2C_T *pI2C, I2CM_XFER_T *xfer)
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{
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uint32_t ret = 0;
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/* start transfer */
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Chip_I2CM_Xfer(pI2C, xfer);
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while (ret == 0) {
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/* wait for status change interrupt */
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while (!Chip_I2CM_IsMasterPending(pI2C)) {}
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/* call state change handler */
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ret = Chip_I2CM_XferHandler(pI2C, xfer);
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}
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return ret;
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}
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/* Slave transfer state change handler */
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uint32_t Chip_I2CS_XferHandler(LPC_I2C_T *pI2C, const I2CS_XFER_T *xfers)
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{
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uint32_t done = 0;
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uint8_t data;
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uint32_t state;
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/* transfer complete? */
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if ((Chip_I2C_GetPendingInt(pI2C) & I2C_INTENSET_SLVDESEL) != 0) {
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Chip_I2CS_ClearStatus(pI2C, I2C_STAT_SLVDESEL);
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xfers->slaveDone();
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}
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else {
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/* Determine the current I2C slave state */
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state = Chip_I2CS_GetSlaveState(pI2C);
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switch (state) {
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case I2C_STAT_SLVCODE_ADDR: /* Slave address received */
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/* Get slave address that needs servicing */
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data = Chip_I2CS_GetSlaveAddr(pI2C, Chip_I2CS_GetSlaveMatchIndex(pI2C));
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/* Call address callback */
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xfers->slaveStart(data);
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break;
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case I2C_STAT_SLVCODE_RX: /* Data byte received */
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/* Get received data */
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data = Chip_I2CS_ReadByte(pI2C);
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done = xfers->slaveRecv(data);
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break;
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case I2C_STAT_SLVCODE_TX: /* Get byte that needs to be sent */
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/* Get data to send */
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done = xfers->slaveSend(&data);
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Chip_I2CS_WriteByte(pI2C, data);
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break;
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}
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}
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if (done == 0) {
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Chip_I2CS_SlaveContinue(pI2C);
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}
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else {
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Chip_I2CS_SlaveNACK(pI2C);
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}
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return done;
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}
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