rt-thread-official/bsp/beaglebone/beaglebone_ram.icf

46 lines
2.2 KiB
Plaintext
Raw Normal View History

bsp beaglebone: add IAR support (#6443) * bsp beaglebone: add IAR template files and fix it's build error ATTENTION: project.* was generated by scons, so I add it to gitignore. rtconfig.py *FLAGS located in "PLATFORM == 'iccarm'" are unverified and maybe wrong. (我只是从STM32里面抄来,然后根据自己的理解改了一下,并没有验证这些参数的正确性, 我也不知道怎么用命令行调用这些参数来编译) * bsp beaglebone: add beaglebone_ram.icf ROM address from uboot_cmd.txt am335x_DDR.icf use 0x82000000, different to uboot_cmd.txt & gcc beaglebone_ram.lds, the difference will easy cause later developer got below error: => go 0x80200000 ## Starting application at 0x80200000 ... undefined instruction pc : [<8200956c>] lr : [<8ff62497>] reloc pc : [<728a956c>] lr : [<80802497>] sp : 8df37358 ip : 00000000 fp : 00000002 r10: 8df4d448 r9 : 8df3feb8 r8 : 8ffd30f8 r7 : 8ff78089 r6 : 00000002 r5 : 80200000 r4 : 8df4d44c r3 : 80200000 r2 : 8df4d44c r1 : 8df4d44c r0 : 00000001 Flags: nzCv IRQs off FIQs on Mode SVC_32 Code: 5dbffcdd bb9bdf7f abf85423 eff1f77f (7ed7daaf) Resetting CPU ... resetting ... * libcpu am335x: context_iar.S rt_hw_context_switch: add thumb mode support IAR new project defualt Processor mode is Thumb, this will cause user easy occur the following error: ... msh />Execption: r00:0x8800aaa8 r01:0x802080c5 r02:0x00000000 r03:0x88009b4c r04:0x00001000 r05:0x00000000 r06:0x00001403 r07:0x00100000 r08:0x00000000 r09:0x00000000 r10:0x0000000a fp :0x0000000a ip :0x65687374 sp :0x00006c6c lr :0x0000008a pc :0x88008be0 cpsr:0x880001bc software interrupt shutdown... (0) assertion failed at function:rt_hw_cpu_shutdown, line number:160 * bsp beaglebone: change IAR template.ewp code use Arm mode Arm mode bin size will bigger than Thumb mode * libcpu am335x: IAR: use rt_hw_cpu_dcache_enable instead of rt_cpu_dcache_enable Reviewer mysterywolf say: 麻烦把rt_cpu_icache_enable 和 rt_cpu_dcache_enable, 统一改成 rt_hw_cpu_icache_enable 和 rt_hw_cpu_dcache_enable rt_hw_cpu_icache_enable 和 rt_hw_cpu_dcache_enable 是其他bsp也是这么命名的 这是个命名统一的函数
2022-09-22 14:13:34 +08:00
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x80200000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x80200000;
define symbol __ICFEDIT_region_ROM_end__ = 0x87FFFFFF;
define symbol __ICFEDIT_region_RAM_start__ = 0x88000000;
define symbol __ICFEDIT_region_RAM_end__ = 0x8FFFFFFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x100;
define symbol __ICFEDIT_size_svcstack__ = 0x1000;
define symbol __ICFEDIT_size_irqstack__ = 0x100;
define symbol __ICFEDIT_size_fiqstack__ = 0x100;
define symbol __ICFEDIT_size_undstack__ = 0x100;
define symbol __ICFEDIT_size_abtstack__ = 0x100;
define symbol __ICFEDIT_size_heap__ = 0x400;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block SVC_STACK with alignment = 8, size = __ICFEDIT_size_svcstack__ { };
define block IRQ_STACK with alignment = 8, size = __ICFEDIT_size_irqstack__ { };
define block FIQ_STACK with alignment = 8, size = __ICFEDIT_size_fiqstack__ { };
define block UND_STACK with alignment = 8, size = __ICFEDIT_size_undstack__ { };
define block ABT_STACK with alignment = 8, size = __ICFEDIT_size_abtstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
define block RTT_INIT_FUNC with fixed order { readonly section .rti_fn* };
initialize by copy { readwrite };
do not initialize { section .noinit };
keep { section FSymTab };
keep { section VSymTab };
keep { section .rti_fn* };
place at address mem :__ICFEDIT_intvec_start__ {readonly section .intvec};
place in ROM_region { readonly, block RTT_INIT_FUNC };
place in RAM_region { readwrite,
block CSTACK, block SVC_STACK, block IRQ_STACK, block FIQ_STACK,
2023-01-09 10:16:47 +08:00
block UND_STACK, block ABT_STACK, block HEAP };