260 lines
11 KiB
C
260 lines
11 KiB
C
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/*!
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*******************************************************************************
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**
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** \file gh_dma.h
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**
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** \brief DMA Engine Subsystem.
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**
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** Copyright: 2012 - 2016 (C) GoKe Microelectronics
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**
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** \attention THIS SAMPLE CODE IS PROVIDED AS IS. GOKE MICROELECTRONICS
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** ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR
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** OMMISSIONS.
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**
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** \note Do not modify this file as it is generated automatically.
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**
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******************************************************************************/
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#ifndef _GH_DMA_H
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#define _GH_DMA_H
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#ifdef __LINUX__
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#include "reg4linux.h"
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#else
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#define FIO_ADDRESS(block,address) (address)
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#define FIO_MOFFSET(block,moffset) (moffset)
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#endif
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#ifndef __LINUX__
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#include "gtypes.h" /* global type definitions */
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#include "gh_lib_cfg.h" /* configuration */
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#endif
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#define GH_DMA_ENABLE_DEBUG_PRINT 0
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#ifdef __LINUX__
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#define GH_DMA_DEBUG_PRINT_FUNCTION printk
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#else
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#define GH_DMA_DEBUG_PRINT_FUNCTION printf
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#endif
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#ifndef __LINUX__
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#if GH_DMA_ENABLE_DEBUG_PRINT
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#include <stdio.h>
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#endif
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#endif
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/*----------------------------------------------------------------------------*/
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/* registers */
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/*----------------------------------------------------------------------------*/
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#define REG_DMA_CONTROL FIO_ADDRESS(DMA,0x90005300) /* read/write */
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#define REG_DMA_SOURCE_ADDRESS FIO_ADDRESS(DMA,0x90005304) /* read/write */
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#define REG_DMA_DESTINATION_ADDRESS FIO_ADDRESS(DMA,0x90005308) /* read/write */
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#define REG_DMA_STATUS FIO_ADDRESS(DMA,0x9000530C) /* read/write */
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#define REG_DMA_DESCRIPTOR_ADDRESS FIO_ADDRESS(DMA,0x90005380) /* read/write */
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#define REG_DMA_IR FIO_ADDRESS(DMA,0x900053F0) /* read */
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/*----------------------------------------------------------------------------*/
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/* bit group structures */
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/*----------------------------------------------------------------------------*/
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typedef union { /* DMA_Control */
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U32 all;
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struct {
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U32 count : 22;
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U32 ts : 2;
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U32 blk : 3;
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U32 ni : 1;
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U32 rm : 1;
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U32 wm : 1;
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U32 d : 1;
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U32 en : 1;
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} bitc;
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} GH_DMA_CONTROL_S;
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typedef union { /* DMA_Status */
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U32 all;
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struct {
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U32 count : 22;
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U32 dn : 1;
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U32 ae : 1;
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U32 rwe : 1;
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U32 be : 1;
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U32 me : 1;
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U32 od : 1;
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U32 dd : 1;
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U32 da : 1;
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U32 oe : 1;
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U32 dm : 1;
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} bitc;
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} GH_DMA_STATUS_S;
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typedef union { /* DMA_IR */
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U32 all;
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struct {
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U32 i0 : 1;
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U32 i1 : 1;
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U32 i2 : 1;
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U32 i3 : 1;
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U32 : 28;
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} bitc;
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} GH_DMA_IR_S;
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/*----------------------------------------------------------------------------*/
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/* mirror variables */
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/*----------------------------------------------------------------------------*/
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*----------------------------------------------------------------------------*/
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/* register DMA_Control (read/write) */
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/*----------------------------------------------------------------------------*/
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/*! \brief Writes the register 'DMA_Control'. */
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void GH_DMA_set_Control(U8 index, U32 data);
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/*! \brief Reads the register 'DMA_Control'. */
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U32 GH_DMA_get_Control(U8 index);
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/*! \brief Writes the bit group 'count' of register 'DMA_Control'. */
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void GH_DMA_set_Control_count(U8 index, U32 data);
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/*! \brief Reads the bit group 'count' of register 'DMA_Control'. */
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U32 GH_DMA_get_Control_count(U8 index);
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/*! \brief Writes the bit group 'ts' of register 'DMA_Control'. */
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void GH_DMA_set_Control_ts(U8 index, U8 data);
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/*! \brief Reads the bit group 'ts' of register 'DMA_Control'. */
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U8 GH_DMA_get_Control_ts(U8 index);
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/*! \brief Writes the bit group 'blk' of register 'DMA_Control'. */
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void GH_DMA_set_Control_blk(U8 index, U8 data);
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/*! \brief Reads the bit group 'blk' of register 'DMA_Control'. */
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U8 GH_DMA_get_Control_blk(U8 index);
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/*! \brief Writes the bit group 'ni' of register 'DMA_Control'. */
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void GH_DMA_set_Control_ni(U8 index, U8 data);
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/*! \brief Reads the bit group 'ni' of register 'DMA_Control'. */
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U8 GH_DMA_get_Control_ni(U8 index);
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/*! \brief Writes the bit group 'rm' of register 'DMA_Control'. */
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void GH_DMA_set_Control_rm(U8 index, U8 data);
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/*! \brief Reads the bit group 'rm' of register 'DMA_Control'. */
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U8 GH_DMA_get_Control_rm(U8 index);
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/*! \brief Writes the bit group 'wm' of register 'DMA_Control'. */
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void GH_DMA_set_Control_wm(U8 index, U8 data);
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/*! \brief Reads the bit group 'wm' of register 'DMA_Control'. */
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U8 GH_DMA_get_Control_wm(U8 index);
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/*! \brief Writes the bit group 'd' of register 'DMA_Control'. */
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void GH_DMA_set_Control_d(U8 index, U8 data);
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/*! \brief Reads the bit group 'd' of register 'DMA_Control'. */
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U8 GH_DMA_get_Control_d(U8 index);
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/*! \brief Writes the bit group 'en' of register 'DMA_Control'. */
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void GH_DMA_set_Control_en(U8 index, U8 data);
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/*! \brief Reads the bit group 'en' of register 'DMA_Control'. */
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U8 GH_DMA_get_Control_en(U8 index);
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/*----------------------------------------------------------------------------*/
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/* register DMA_Source_Address (read/write) */
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/*----------------------------------------------------------------------------*/
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/*! \brief Writes the register 'DMA_Source_Address'. */
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void GH_DMA_set_Source_Address(U8 index, U32 data);
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/*! \brief Reads the register 'DMA_Source_Address'. */
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U32 GH_DMA_get_Source_Address(U8 index);
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/*----------------------------------------------------------------------------*/
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/* register DMA_Destination_Address (read/write) */
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/*----------------------------------------------------------------------------*/
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/*! \brief Writes the register 'DMA_Destination_Address'. */
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void GH_DMA_set_Destination_Address(U8 index, U32 data);
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/*! \brief Reads the register 'DMA_Destination_Address'. */
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U32 GH_DMA_get_Destination_Address(U8 index);
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/*----------------------------------------------------------------------------*/
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/* register DMA_Status (read/write) */
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/*----------------------------------------------------------------------------*/
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/*! \brief Writes the register 'DMA_Status'. */
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void GH_DMA_set_Status(U8 index, U32 data);
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/*! \brief Reads the register 'DMA_Status'. */
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U32 GH_DMA_get_Status(U8 index);
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/*! \brief Writes the bit group 'count' of register 'DMA_Status'. */
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void GH_DMA_set_Status_count(U8 index, U32 data);
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/*! \brief Reads the bit group 'count' of register 'DMA_Status'. */
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U32 GH_DMA_get_Status_count(U8 index);
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/*! \brief Writes the bit group 'dn' of register 'DMA_Status'. */
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void GH_DMA_set_Status_dn(U8 index, U8 data);
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/*! \brief Reads the bit group 'dn' of register 'DMA_Status'. */
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U8 GH_DMA_get_Status_dn(U8 index);
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/*! \brief Writes the bit group 'ae' of register 'DMA_Status'. */
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void GH_DMA_set_Status_ae(U8 index, U8 data);
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/*! \brief Reads the bit group 'ae' of register 'DMA_Status'. */
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U8 GH_DMA_get_Status_ae(U8 index);
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/*! \brief Writes the bit group 'rwe' of register 'DMA_Status'. */
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void GH_DMA_set_Status_rwe(U8 index, U8 data);
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/*! \brief Reads the bit group 'rwe' of register 'DMA_Status'. */
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U8 GH_DMA_get_Status_rwe(U8 index);
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/*! \brief Writes the bit group 'be' of register 'DMA_Status'. */
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void GH_DMA_set_Status_be(U8 index, U8 data);
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/*! \brief Reads the bit group 'be' of register 'DMA_Status'. */
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U8 GH_DMA_get_Status_be(U8 index);
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/*! \brief Writes the bit group 'me' of register 'DMA_Status'. */
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void GH_DMA_set_Status_me(U8 index, U8 data);
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/*! \brief Reads the bit group 'me' of register 'DMA_Status'. */
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U8 GH_DMA_get_Status_me(U8 index);
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/*! \brief Writes the bit group 'od' of register 'DMA_Status'. */
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void GH_DMA_set_Status_od(U8 index, U8 data);
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/*! \brief Reads the bit group 'od' of register 'DMA_Status'. */
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U8 GH_DMA_get_Status_od(U8 index);
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/*! \brief Writes the bit group 'dd' of register 'DMA_Status'. */
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void GH_DMA_set_Status_dd(U8 index, U8 data);
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/*! \brief Reads the bit group 'dd' of register 'DMA_Status'. */
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U8 GH_DMA_get_Status_dd(U8 index);
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/*! \brief Writes the bit group 'da' of register 'DMA_Status'. */
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void GH_DMA_set_Status_da(U8 index, U8 data);
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/*! \brief Reads the bit group 'da' of register 'DMA_Status'. */
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U8 GH_DMA_get_Status_da(U8 index);
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/*! \brief Writes the bit group 'oe' of register 'DMA_Status'. */
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void GH_DMA_set_Status_oe(U8 index, U8 data);
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/*! \brief Reads the bit group 'oe' of register 'DMA_Status'. */
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U8 GH_DMA_get_Status_oe(U8 index);
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/*! \brief Writes the bit group 'dm' of register 'DMA_Status'. */
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void GH_DMA_set_Status_dm(U8 index, U8 data);
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/*! \brief Reads the bit group 'dm' of register 'DMA_Status'. */
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U8 GH_DMA_get_Status_dm(U8 index);
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/*----------------------------------------------------------------------------*/
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/* register DMA_Descriptor_Address (read/write) */
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/*----------------------------------------------------------------------------*/
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/*! \brief Writes the register 'DMA_Descriptor_Address'. */
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void GH_DMA_set_Descriptor_Address(U8 index, U32 data);
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/*! \brief Reads the register 'DMA_Descriptor_Address'. */
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U32 GH_DMA_get_Descriptor_Address(U8 index);
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/*----------------------------------------------------------------------------*/
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/* register DMA_IR (read) */
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/*----------------------------------------------------------------------------*/
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/*! \brief Reads the register 'DMA_IR'. */
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U32 GH_DMA_get_IR(void);
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/*! \brief Reads the bit group 'i0' of register 'DMA_IR'. */
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U8 GH_DMA_get_IR_i0(void);
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/*! \brief Reads the bit group 'i1' of register 'DMA_IR'. */
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U8 GH_DMA_get_IR_i1(void);
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/*! \brief Reads the bit group 'i2' of register 'DMA_IR'. */
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U8 GH_DMA_get_IR_i2(void);
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/*! \brief Reads the bit group 'i3' of register 'DMA_IR'. */
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U8 GH_DMA_get_IR_i3(void);
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/*----------------------------------------------------------------------------*/
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/* init function */
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/*----------------------------------------------------------------------------*/
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/*! \brief Initialises the registers and mirror variables. */
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void GH_DMA_init(void);
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#ifdef SRC_INLINE
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#define SRC_INC 1
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#include "gh_dma.c"
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#undef SRC_INC
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif /* _GH_DMA_H */
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/*----------------------------------------------------------------------------*/
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/* end of file */
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/*----------------------------------------------------------------------------*/
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