376 lines
15 KiB
C
376 lines
15 KiB
C
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/*!
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*******************************************************************************
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**
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** \file gd_sflash.h
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**
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** \brief Serail Flash memory driver.
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**
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** (C) Goke Microelectronics China 2002 - 2007
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**
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** \attention THIS SAMPLE CODE IS PROVIDED AS IS. GOKE MICROELECTRONICS
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** ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR
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** OMMISSIONS.
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**
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*******************************************************************************
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*/
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#ifndef GD_SFLASH_H
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#define GD_SFLASH_H
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#include <gtypes.h>
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#include <gmodids.h>
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#include "gd_spi.h"
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#define SFLASH_NOT_SUPPORT 0x00000000
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#define SPANSION_MID 0x01
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#define EON_MID 0x1C
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#define XMC_MID EON_MID
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#define NUMONYX_MID 0x20
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#define ATO_MID 0x9B
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#define ISSI_MID 0x9D
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#define SST_MID 0xBF
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#define MXIC_MID 0xC2
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#define GIGA_MID 0xC8
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#define ESMT_MID 0xC8
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#define WINBOND_MID 0xEF
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#define FIDELIX_MID 0xF8
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/*!
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*******************************************************************************
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**
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** \brief Flash channel number.
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**
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*******************************************************************************
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*/
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typedef enum
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{
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GD_SFLASH_CHANNEL_0 = 0x00, // used sflash module, channel 0
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GD_SFLASH_CHANNEL_1, // used sflash module, channel 1
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GD_SFLASH_SPI_CHANNEL_0_0, // used spi module, spi 0, channel 0
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GD_SFLASH_SPI_CHANNEL_0_1, // used spi module, spi 0, channel 1
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GD_SFLASH_SPI_CHANNEL_0_2, // not used
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GD_SFLASH_SPI_CHANNEL_0_3, // not used
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GD_SFLASH_SPI_CHANNEL_0_4, // used spi module, spi 0, channel 4
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GD_SFLASH_SPI_CHANNEL_0_5, // used spi module, spi 0, channel 5
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GD_SFLASH_SPI_CHANNEL_0_6, // used spi module, spi 0, channel 6
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GD_SFLASH_SPI_CHANNEL_0_7, // used spi module, spi 0, channel 7
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GD_SFLASH_SPI_CHANNEL_1_0, // used spi module, spi 1, channel 0
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GD_SFLASH_CHANNEL_0_DIE1 = 0x10,// used sflash module, channel 0, die 1
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GD_SFLASH_CHANNEL_1_DIE1, // used sflash module, channel 1, die 1
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GD_SFLASH_SPI_CHANNEL_0_0_DIE1, // used spi module, spi 0, channel 0
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GD_SFLASH_SPI_CHANNEL_0_1_DIE1, // used spi module, spi 0, channel 1
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GD_SFLASH_SPI_CHANNEL_0_2_DIE1, // not used
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GD_SFLASH_SPI_CHANNEL_0_3_DIE1, // not used
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GD_SFLASH_SPI_CHANNEL_0_4_DIE1, // used spi module, spi 0, channel 4
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GD_SFLASH_SPI_CHANNEL_0_5_DIE1, // used spi module, spi 0, channel 5
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GD_SFLASH_SPI_CHANNEL_0_6_DIE1, // used spi module, spi 0, channel 6
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GD_SFLASH_SPI_CHANNEL_0_7_DIE1, // used spi module, spi 0, channel 7
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GD_SFLASH_SPI_CHANNEL_1_0_DIE1, // used spi module, spi 1, channel 0
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GD_SFLASH_CHANNEL_NUM
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}GD_SFLASH_CHANNEL_E;
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/*!
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*******************************************************************************
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**
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** \brief Flash IOx Mode.
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**
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*******************************************************************************
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*/
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typedef enum
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{
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GD_SFLASH_IO1_MODE = 1,
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GD_SFLASH_IO2_MODE = 2,
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GD_SFLASH_IO4_MODE = 4
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}GD_SFLASH_IO_MODE_E;
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/*!
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*******************************************************************************
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**
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** \brief Flash read or write.
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**
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*******************************************************************************
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*/
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typedef enum
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{
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GD_SFLASH_READ = 0,
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GD_SFLASH_WRITE
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}GD_SFLASH_RW_E;
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/*!
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*******************************************************************************
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**
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** \brief Flash Type.
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**
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*******************************************************************************
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*/
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typedef enum
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{
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GD_SPI_NOR = 0, // normal SPI nor-flash
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GD_SPI_NAND // SPI nand-flash
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}GD_SFLASH_TYPE_E;
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/*
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*******************************************************************************
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**
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** serial flash specific commands and statis register bit definitions
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**
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*******************************************************************************
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*/
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typedef struct
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{
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U32 read_ID; // command to read the chip identification
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U32 write_enable; // command to enable a write/erase sequence
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U32 write_disable; // command to disable a write/erase sequence
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U32 read_status; // command to read from status register
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U32 read_status2; // command to read from status register
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U32 write_status; // command to write to status register
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U32 read_data; // command to read data
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U32 read_io2; // command to read data by IO2
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U32 read_io4; // command to read data by IO4
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U32 program_page; // command to program a sector page
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U32 program_page2; // command to program a sector page by IO2
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U32 program_page4; // command to program a sector page by IO4
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U32 erase_sector; // command to erase a single sector
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U32 erase_chip; // command to erase the entire chip
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U32 read_ext_addr; // command to read_ext_addr
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U32 write_ext_addr; // command to write_ext_addr
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U32 die_sel; // command to die_sel
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U32 status_mask_wip; // status register mask for bit write-in-progress
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U32 status_mask_wel; // status register mask for bit write-enable-latch
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U32 page_read; // command to read page to cache, new added for spi-nand
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U32 program_execute; // command to execute program from cache to page, new added for spi-nand
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U32 reset; // command to reset chip new added for spi-nand
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}GD_SFLASH_CMD_S;
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/*
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*******************************************************************************
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**
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** serial flash specific geometry and information data structure
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**
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*******************************************************************************
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*/
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typedef struct
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{
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U8 manufacture_ID; // Manufacture identification
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U8 commbo; //
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U32 device_ID; // Device identification (memory type/capacity)
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char* manufacture_name; // Pointer to manufacture name
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char* device_name; // Pointer to device name
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U32 device_bytes; // Size of flash device in bytes
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U32 sector_count; // Number of sectors
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U32 sector_bytes; // Size of a single flash sector in bytes
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U32 sector_pages; // Number of pages per sector
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U32 page_bytes; // Size of a programmable page in bytes
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GD_SFLASH_CMD_S* commands; // Device specific access commands
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U32 feature; // bit[0:3] for read, bit[4:7] for write
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U16 lock_mask; // status register mask for bit write-protect
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U16 io4_mask; // status register mask for bit enable io4
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GD_SFLASH_TYPE_E type; // SPI nor flash or nand flash
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}GD_SFLASH_DEV_S;
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typedef struct
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{
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void (*GH_SFLASH_set_Handle)(GD_SPI_STATUS_PARAMS_S*);
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void (*GH_SFLASH_set_Command)(U32);
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void (*GH_SFLASH_set_Data)(U32);
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U32 (*GH_SFLASH_get_Data)(void);
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void (*GH_SFLASH_set_CE)(U32);
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U32 (*GH_SFLASH_get_CE)(void);
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U8 (*GH_SFLASH_get_CE_CHSELECT)(void);
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void (*GH_SFLASH_set_Speed)(U32);
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void (*GH_SFLASH_set_CE_CHSELECT)(U8);
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}GD_SFLASH_FUNC_S;
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typedef struct
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{
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GD_SFLASH_DEV_S* dev;
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GD_SFLASH_FUNC_S func;
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U32 feature;
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U32 channel;
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U32 devicechannel;
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}GD_SFLASH_HANDLE_S;
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/*!
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*******************************************************************************
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**
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** \anchor gd_sflash_error_base
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** \brief he base error code for the serial flash device driver.
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**
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*******************************************************************************
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*/
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#define GD_SFLASH_ERR_BASE (GD_SFLASH_MODULE_ID<<16)
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/*!
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*******************************************************************************
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**
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** \brief Flash driver error codes.
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**
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*******************************************************************************
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*/
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enum
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{
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GD_ERR_SFLASH_TYPE_NOT_SUPPORTED = GD_SFLASH_ERR_BASE, //!< Device not supported.
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GD_ERR_SFLASH_IN_USE, //!< Read error.
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GD_ERR_SFLASH_READ, //!< Read error.
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GD_ERR_SFLASH_WRITE, //!< Write error.
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GD_ERR_SFLASH_ERASE,
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GD_ERR_UNLOCK_FAIL
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};
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// TODO: to be confirmed for each clock value
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// FPGA: SCLK = 40MHz
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// EVM: SCLK = 135MHz
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// 000: SCLK/2
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// 001: SCLK/4
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// 010: SCLK/6
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// 011: SCLK/8
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// 100: SCLK/10
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typedef enum
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{
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GD_SFLASH_FREQ_DIV2 = 0,
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GD_SFLASH_FREQ_DIV4,
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GD_SFLASH_FREQ_DIV6,
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GD_SFLASH_FREQ_DIV8,
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GD_SFLASH_FREQ_DIV10,
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}GD_SFLASH_SPEED_MODE;
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/*-------------------------------------------------------------------------------*/
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/* \brief Flash I/O feature. */
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/*-------------------------------------------------------------------------------*/
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typedef enum
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{
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GD_SFLASH_FEATURE_IO1 = 0,
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GD_SFLASH_FEATURE_IO2,
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GD_SFLASH_FEATURE_IO4
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}GD_SFLASH_FEATURE;
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/*-------------------------------------------------------------------------------*/
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/* sflash cmd attribute */
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/* sflash cmd register bit definition */
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/* bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
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| rsrd |hold time| transfer data bytes |data cycle|adr and dummy cycle |cmd cycle|
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00-100ns 11111 -- 4 bytes 00 -x1
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01-3us other -- n bytes 0-3 cycle 0-3 cycle 01 -x2
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10-100us 10 -x4
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bit 16 15 14 13 12 11 10 9 8 [7: 0]
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| RWN |dummy cycle number| adr byte num | |cmd to DF|
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00 - rd data for SF 0 - 7 bytes cycle 1 - send cmd
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01 - wr data to SF 0-7 bytes 0 - no send cmd
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11 - nothing to do see specific flash cmd */
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/*-------------------------------------------------------------------------------*/
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/* send cmd or not [ 8]*/
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#define SFLASH_SEND_CMD 0x00000100
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#define SFLASH_NO_SEND_CMD 0x00000000
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/* byte number of address to send [11:9]*/
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#define SFLASH_SEND_ADDR_BYTE_NUM_0 0x00000000
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#define SFLASH_SEND_ADDR_BYTE_NUM_1 0x00000200
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#define SFLASH_SEND_ADDR_BYTE_NUM_2 0x00000400
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#define SFLASH_SEND_ADDR_BYTE_NUM_3 0x00000600
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#define SFLASH_SEND_ADDR_BYTE_NUM_4 0x00000800 // 4bytes
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#define SFLASH_SEND_ADDR_BYTE_NUM_5 0x00000a00 // 4bytes
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#define SFLASH_SEND_ADDR_BYTE_NUM_6 0x00000c00 // 4bytes
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#define SFLASH_SEND_ADDR_BYTE_NUM_7 0x00000e00 // 4bytes
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/* byte number of dummy cycle to send [14:12] */
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#define SFLASH_SEND_DUMMY_BYTE_NUM_0 0x000000000
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#define SFLASH_SEND_DUMMY_BYTE_NUM_1 0x000001000
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#define SFLASH_SEND_DUMMY_BYTE_NUM_2 0x000002000
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#define SFLASH_SEND_DUMMY_BYTE_NUM_3 0x000003000
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#define SFLASH_SEND_DUMMY_BYTE_NUM_4 0x000004000 // 4bytes
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#define SFLASH_SEND_DUMMY_BYTE_NUM_5 0x000005000 // 4bytes
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#define SFLASH_SEND_DUMMY_BYTE_NUM_6 0x000006000 // 4bytes
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#define SFLASH_SEND_DUMMY_BYTE_NUM_7 0x000007000 // 4bytes
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/* command operation[16:15]: 00 for read data from SF; 01 for write data to SF; 11 for nothing to do */
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#define SFLASH_RWN_READ 0x00000000
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#define SFLASH_RWN_WRITE 0x00008000
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#define SFLASH_RWN_NOTHING 0x00018000
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/* I/O mode of command cycle to SF[18:17]: 00 for x1; 01 for x2; 10 for x4 */
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#define SFLASH_CMD_MODE_1X 0x00000000
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#define SFLASH_CMD_MODE_2X 0x00020000
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#define SFLASH_CMD_MODE_4X 0x00040000
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/* I/O mode of address and dummy cycle to SF[20:19] */
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#define SFLASH_ADDR_MODE_1X 0x00000000
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#define SFLASH_ADDR_MODE_2X 0x00080000
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#define SFLASH_ADDR_MODE_4X 0x00100000
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//#define SFLASH_ADDR_DUMMY_CYCLE_NUM_3 0x00180000
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/* I/O mode of data cycle to or from SF [22:21] */
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#define SFLASH_DATA_MODE_1X 0x00000000
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#define SFLASH_DATA_MODE_2X 0x00200000
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#define SFLASH_DATA_MODE_4X 0x00400000
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//#define SFLASH_DATA_CYCLE_NUM_3 0x00600000
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/* transfer data byte number to or from SF[27:23]. For 11111 case, transfer 4bytes per request */
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/* for other case, transfer number bytes */
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#define SFLASH_TRANSFER_BYTE_NUM_1 0x00800000
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#define SFLASH_TRANSFER_BYTE_NUM_2 0x01000000
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#define SFLASH_TRANSFER_BYTE_NUM_3 0x01800000
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#define SFLASH_TRANSFER_BYTE_NUM_4 0x0f800000
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#define SFLASH_TRANSFER_BYTE_LOC 23
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#define SFLASH_HOLD_TIME_100ns 0x00000000
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#define SFLASH_HOLD_TIME_3us 0x10000000
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#define SFLASH_HOLD_TIME_100us 0x20000000
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#define GD_SFLASH_1X_READ 0x01
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#define GD_SFLASH_2X_READ 0x02
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#define GD_SFLASH_4X_READ 0x04
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#define GD_SFLASH_1X_WRITE 0x10
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#define GD_SFLASH_2X_WRITE 0x20
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#define GD_SFLASH_4X_WRITE 0x40
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#define GD_SFLASH_16M_SIZE 0x1000000
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/*
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*******************************************************************************
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*******************************************************************************
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**
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** Generic serial flash specific API functions
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**
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*******************************************************************************
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*******************************************************************************
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*/
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#ifdef __cplusplus
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extern "C" {
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#endif
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GERR GD_SFLASH_Init(void);
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GERR GD_SFLASH_Exit(void);
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GERR GD_SFLASH_Open(GD_HANDLE* pHandle, GD_SFLASH_SPEED_MODE speed_mode, GD_SFLASH_CHANNEL_E channel);
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GERR GD_SFLASH_Close(GD_HANDLE* pHandle);
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GERR GD_SFLASH_Read(GD_HANDLE handle, U32 address, U32* buffer, U32 words);
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GERR GD_SFLASH_Write(GD_HANDLE handle, U32 address, U32* buffer, U32 words);
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GERR GD_SFLASH_Program(GD_HANDLE handle, U32 address, U32* buffer, U32 words);
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GERR GD_SFLASH_EraseChip(GD_HANDLE handle);
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GERR GD_SFLASH_EraseSector(GD_HANDLE handle, U16 sector);
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GERR GD_SFLASH_GetCodes(GD_HANDLE handle, U8* manufactureCode, U16* deviceCode);
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GERR GD_SFLASH_GetNames(GD_HANDLE handle, char** manufacture_name, char** deviceName);
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GERR GD_SFLASH_GetNumberOfSectors(GD_HANDLE handle, U16* numberOfSectors);
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GERR GD_SFLASH_GetSectorAddress(GD_HANDLE handle, U16 sector, U32* address);
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GERR GD_SFLASH_GetSize(GD_HANDLE handle, U32* deviceWords);
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GERR GD_SFLASH_GetSectorSize(GD_HANDLE handle, U16 sector, U32* deviceWords);
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GERR GD_SFLASH_GetSector(GD_HANDLE handle, U32 address, U16* sector);
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GERR GD_SFLASH_IsChipEmpty(GD_HANDLE handle, GBOOL* isEmpty);
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GERR GD_SFLASH_IsSectorEmpty(GD_HANDLE handle, U16 sector, GBOOL* isSectorEmpty);
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GERR GD_SFLASH_Unlock(GD_HANDLE handle);
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GERR GD_SFLASH_Lock(GD_HANDLE handle);
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GERR GD_SFLASH_IsChipLocked(GD_HANDLE handle, GBOOL* isChipLocked);
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GERR GD_SFLASH_Getfeature(GD_HANDLE handle, GD_SFLASH_RW_E op, GD_SFLASH_IO_MODE_E* feature);
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GERR GD_SFLASH_Setfeature(GD_HANDLE handle, GD_SFLASH_RW_E op, GD_SFLASH_IO_MODE_E feature);
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GERR GD_SFLASH_SetResetMode(GD_HANDLE handle, GBOOL mode);
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#ifdef __cplusplus
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}
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#endif
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#endif
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