435 lines
17 KiB
Plaintext
435 lines
17 KiB
Plaintext
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/*
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Linker File for Renesas RZ/T2 FSP
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*/
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INCLUDE memory_regions.ld
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/* The memory information for each device is done in memory regions file.
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* The starting address and length of memory not defined in memory regions file are defined as 0. */
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ATCM_PRV_START = DEFINED(ATCM_START) ? ATCM_START : 0;
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ATCM_PRV_LENGTH = DEFINED(ATCM_LENGTH) ? ATCM_LENGTH : 0;
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BTCM_PRV_START = DEFINED(BTCM_START) ? BTCM_START : 0;
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BTCM_PRV_LENGTH = DEFINED(BTCM_LENGTH) ? BTCM_LENGTH : 0;
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SYSTEM_RAM_PRV_START = DEFINED(SYSTEM_RAM_START) ? SYSTEM_RAM_START : 0;
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SYSTEM_RAM_PRV_LENGTH = DEFINED(SYSTEM_RAM_LENGTH) ? SYSTEM_RAM_LENGTH : 0;
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SYSTEM_RAM_MIRROR_PRV_START = DEFINED(SYSTEM_RAM_MIRROR_START) ? SYSTEM_RAM_MIRROR_START : 0;
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SYSTEM_RAM_MIRROR_PRV_LENGTH = DEFINED(SYSTEM_RAM_MIRROR_LENGTH) ? SYSTEM_RAM_MIRROR_LENGTH : 0;
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xSPI0_CS0_SPACE_MIRROR_PRV_START = DEFINED(xSPI0_CS0_SPACE_MIRROR_START) ? xSPI0_CS0_SPACE_MIRROR_START : 0;
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xSPI0_CS0_SPACE_MIRROR_PRV_LENGTH = DEFINED(xSPI0_CS0_SPACE_MIRROR_LENGTH) ? xSPI0_CS0_SPACE_MIRROR_LENGTH : 0;
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xSPI0_CS1_SPACE_MIRROR_PRV_START = DEFINED(xSPI0_CS1_SPACE_MIRROR_START) ? xSPI0_CS1_SPACE_MIRROR_START : 0;
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xSPI0_CS1_SPACE_MIRROR_PRV_LENGTH = DEFINED(xSPI0_CS1_SPACE_MIRROR_LENGTH) ? xSPI0_CS1_SPACE_MIRROR_LENGTH : 0;
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xSPI1_CS0_SPACE_MIRROR_PRV_START = DEFINED(xSPI1_CS0_SPACE_MIRROR_START) ? xSPI1_CS0_SPACE_MIRROR_START : 0;
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xSPI1_CS0_SPACE_MIRROR_PRV_LENGTH = DEFINED(xSPI1_CS0_SPACE_MIRROR_LENGTH) ? xSPI1_CS0_SPACE_MIRROR_LENGTH : 0;
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xSPI1_CS1_SPACE_MIRROR_PRV_START = DEFINED(xSPI1_CS1_SPACE_MIRROR_START) ? xSPI1_CS1_SPACE_MIRROR_START : 0;
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xSPI1_CS1_SPACE_MIRROR_PRV_LENGTH = DEFINED(xSPI1_CS1_SPACE_MIRROR_LENGTH) ? xSPI1_CS1_SPACE_MIRROR_LENGTH : 0;
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CS0_SPACE_MIRROR_PRV_START = DEFINED(CS0_SPACE_MIRROR_START) ? CS0_SPACE_MIRROR_START : 0;
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CS0_SPACE_MIRROR_PRV_LENGTH = DEFINED(CS0_SPACE_MIRROR_LENGTH) ? CS0_SPACE_MIRROR_LENGTH : 0;
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CS2_SPACE_MIRROR_PRV_START = DEFINED(CS2_SPACE_MIRROR_START) ? CS2_SPACE_MIRROR_START : 0;
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CS2_SPACE_MIRROR_PRV_LENGTH = DEFINED(CS2_SPACE_MIRROR_LENGTH) ? CS2_SPACE_MIRROR_LENGTH : 0;
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CS3_SPACE_MIRROR_PRV_START = DEFINED(CS3_SPACE_MIRROR_START) ? CS3_SPACE_MIRROR_START : 0;
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CS3_SPACE_MIRROR_PRV_LENGTH = DEFINED(CS3_SPACE_MIRROR_LENGTH) ? CS3_SPACE_MIRROR_LENGTH : 0;
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CS5_SPACE_MIRROR_PRV_START = DEFINED(CS5_SPACE_MIRROR_START) ? CS5_SPACE_MIRROR_START : 0;
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CS5_SPACE_MIRROR_PRV_LENGTH = DEFINED(CS5_SPACE_MIRROR_LENGTH) ? CS5_SPACE_MIRROR_LENGTH : 0;
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xSPI0_CS0_SPACE_PRV_START = DEFINED(xSPI0_CS0_SPACE_START) ? xSPI0_CS0_SPACE_START : 0;
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xSPI0_CS0_SPACE_PRV_LENGTH = DEFINED(xSPI0_CS0_SPACE_LENGTH) ? xSPI0_CS0_SPACE_LENGTH : 0;
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xSPI0_CS1_SPACE_PRV_START = DEFINED(xSPI0_CS1_SPACE_START) ? xSPI0_CS1_SPACE_START : 0;
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xSPI0_CS1_SPACE_PRV_LENGTH = DEFINED(xSPI0_CS1_SPACE_LENGTH) ? xSPI0_CS1_SPACE_LENGTH : 0;
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xSPI1_CS0_SPACE_PRV_START = DEFINED(xSPI1_CS0_SPACE_START) ? xSPI1_CS0_SPACE_START : 0;
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xSPI1_CS0_SPACE_PRV_LENGTH = DEFINED(xSPI1_CS0_SPACE_LENGTH) ? xSPI1_CS0_SPACE_LENGTH : 0;
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xSPI1_CS1_SPACE_PRV_START = DEFINED(xSPI1_CS1_SPACE_START) ? xSPI1_CS1_SPACE_START : 0;
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xSPI1_CS1_SPACE_PRV_LENGTH = DEFINED(xSPI1_CS1_SPACE_LENGTH) ? xSPI1_CS1_SPACE_LENGTH : 0;
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CS0_SPACE_PRV_START = DEFINED(CS0_SPACE_START) ? CS0_SPACE_START : 0;
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CS0_SPACE_PRV_LENGTH = DEFINED(CS0_SPACE_LENGTH) ? CS0_SPACE_LENGTH : 0;
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CS2_SPACE_PRV_START = DEFINED(CS2_SPACE_START) ? CS2_SPACE_START : 0;
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CS2_SPACE_PRV_LENGTH = DEFINED(CS2_SPACE_LENGTH) ? CS2_SPACE_LENGTH : 0;
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CS3_SPACE_PRV_START = DEFINED(CS3_SPACE_START) ? CS3_SPACE_START : 0;
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CS3_SPACE_PRV_LENGTH = DEFINED(CS3_SPACE_LENGTH) ? CS3_SPACE_LENGTH : 0;
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CS5_SPACE_PRV_START = DEFINED(CS5_SPACE_START) ? CS5_SPACE_START : 0;
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CS5_SPACE_PRV_LENGTH = DEFINED(CS5_SPACE_LENGTH) ? CS5_SPACE_LENGTH : 0;
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LOADER_PARAM_ADDRESS = ALIGN(xSPI0_CS0_SPACE_PRV_START, 0x00020000);
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FLASH_CONTENTS_ADDRESS = LOADER_PARAM_ADDRESS + 0x0000004C;
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LOADER_TEXT_ADDRESS = DEFINED(CR52_0) ? 0x00102000 : 0x10010000;
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INTVEC_ADDRESS = DEFINED(CR52_0) ? 0x00000000 : 0x10000000;
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TEXT_ADDRESS = DEFINED(CR52_0) ? 0x00000100 : 0x10020000;
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NONCACHE_BUFFER_OFFSET = DEFINED(CR52_0) ? 0x00040000 : 0x00020000;
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DMAC_LINK_MODE_OFFSET = DEFINED(CR52_0) ? 0x00068000 : 0x00064000;
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DATA_NONCACHE_OFFSET = DEFINED(CR52_0) ? 0x00070000 : 0x0006C000;
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RAM_START = DEFINED(CR52_0) ? ATCM_PRV_START : SYSTEM_RAM_PRV_START;
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RAM_LENGTH = DEFINED(CR52_0) ? ATCM_PRV_LENGTH : SYSTEM_RAM_PRV_LENGTH;
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LOADER_START = DEFINED(CR52_0) ? BTCM_PRV_START : SYSTEM_RAM_PRV_START;
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LOADER_LENGTH = DEFINED(CR52_0) ? BTCM_PRV_LENGTH : SYSTEM_RAM_PRV_LENGTH;
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/* Define starting addresses and length for data_noncache, DMAC link mode data, CPU-shared non-cache, and CPU-specific non-cache areas. */
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DATA_NONCACHE_START = DEFINED(SYSTEM_RAM_MIRROR_START) ? SYSTEM_RAM_MIRROR_START + SYSTEM_RAM_MIRROR_LENGTH - DATA_NONCACHE_OFFSET : 0;
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DATA_NONCACHE_LENGTH = DEFINED(SYSTEM_RAM_MIRROR_LENGTH) ? 0x00004000 : 0;
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DMAC_LINK_MODE_START = DEFINED(SYSTEM_RAM_MIRROR_START) ? SYSTEM_RAM_MIRROR_START + SYSTEM_RAM_MIRROR_LENGTH - DMAC_LINK_MODE_OFFSET : 0;
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DMAC_LINK_MODE_LENGTH = DEFINED(SYSTEM_RAM_MIRROR_LENGTH) ? 0x00004000 : 0;
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SHARED_NONCACHE_BUFFER_START = DEFINED(SYSTEM_RAM_MIRROR_START) ? SYSTEM_RAM_MIRROR_START + SYSTEM_RAM_MIRROR_LENGTH - 0x00060000 : 0;
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SHARED_NONCACHE_BUFFER_LENGTH = DEFINED(SYSTEM_RAM_MIRROR_LENGTH) ? 0x00020000 : 0;
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NONCACHE_BUFFER_START = DEFINED(SYSTEM_RAM_MIRROR_START) ? SYSTEM_RAM_MIRROR_START + SYSTEM_RAM_MIRROR_LENGTH - NONCACHE_BUFFER_OFFSET : 0;
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NONCACHE_BUFFER_LENGTH = DEFINED(SYSTEM_RAM_MIRROR_LENGTH) ? 0x00020000 : 0;
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MEMORY
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{
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ATCM : ORIGIN = ATCM_PRV_START, LENGTH = ATCM_PRV_LENGTH
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BTCM : ORIGIN = BTCM_PRV_START, LENGTH = BTCM_PRV_LENGTH
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SYSTEM_RAM : ORIGIN = SYSTEM_RAM_PRV_START, LENGTH = SYSTEM_RAM_PRV_LENGTH
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SYSTEM_RAM_MIRROR : ORIGIN = SYSTEM_RAM_MIRROR_PRV_START, LENGTH = SYSTEM_RAM_MIRROR_PRV_LENGTH
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xSPI0_CS0_SPACE_MIRROR : ORIGIN = xSPI0_CS0_SPACE_MIRROR_PRV_START, LENGTH = xSPI0_CS0_SPACE_MIRROR_PRV_LENGTH
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xSPI0_CS1_SPACE_MIRROR : ORIGIN = xSPI0_CS1_SPACE_MIRROR_PRV_START, LENGTH = xSPI0_CS1_SPACE_MIRROR_PRV_LENGTH
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xSPI1_CS0_SPACE_MIRROR : ORIGIN = xSPI1_CS0_SPACE_MIRROR_PRV_START, LENGTH = xSPI1_CS0_SPACE_MIRROR_PRV_LENGTH
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xSPI1_CS1_SPACE_MIRROR : ORIGIN = xSPI1_CS1_SPACE_MIRROR_PRV_START, LENGTH = xSPI1_CS1_SPACE_MIRROR_PRV_LENGTH
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CS0_SPACE_MIRROR : ORIGIN = CS0_SPACE_MIRROR_PRV_START, LENGTH = CS0_SPACE_MIRROR_PRV_LENGTH
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CS2_SPACE_MIRROR : ORIGIN = CS2_SPACE_MIRROR_PRV_START, LENGTH = CS2_SPACE_MIRROR_PRV_LENGTH
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CS3_SPACE_MIRROR : ORIGIN = CS3_SPACE_MIRROR_PRV_START, LENGTH = CS3_SPACE_MIRROR_PRV_LENGTH
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CS5_SPACE_MIRROR : ORIGIN = CS5_SPACE_MIRROR_PRV_START, LENGTH = CS5_SPACE_MIRROR_PRV_LENGTH
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xSPI0_CS0_SPACE : ORIGIN = xSPI0_CS0_SPACE_PRV_START, LENGTH = xSPI0_CS0_SPACE_PRV_LENGTH
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xSPI0_CS1_SPACE : ORIGIN = xSPI0_CS1_SPACE_PRV_START, LENGTH = xSPI0_CS1_SPACE_PRV_LENGTH
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xSPI1_CS0_SPACE : ORIGIN = xSPI1_CS0_SPACE_PRV_START, LENGTH = xSPI1_CS0_SPACE_PRV_LENGTH
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xSPI1_CS1_SPACE : ORIGIN = xSPI1_CS1_SPACE_PRV_START, LENGTH = xSPI1_CS1_SPACE_PRV_LENGTH
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CS0_SPACE : ORIGIN = CS0_SPACE_PRV_START, LENGTH = CS0_SPACE_PRV_LENGTH
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CS2_SPACE : ORIGIN = CS2_SPACE_PRV_START, LENGTH = CS2_SPACE_PRV_LENGTH
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CS3_SPACE : ORIGIN = CS3_SPACE_PRV_START, LENGTH = CS3_SPACE_PRV_LENGTH
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CS5_SPACE : ORIGIN = CS5_SPACE_PRV_START, LENGTH = CS5_SPACE_PRV_LENGTH
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RAM : ORIGIN = RAM_START, LENGTH = RAM_LENGTH
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LOADER_STACK : ORIGIN = LOADER_START, LENGTH = LOADER_LENGTH
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DUMMY : ORIGIN = RAM_START, LENGTH = RAM_LENGTH
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DATA_NONCACHE : ORIGIN = DATA_NONCACHE_START, LENGTH = DATA_NONCACHE_LENGTH
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DMAC_LINK_MODE : ORIGIN = DMAC_LINK_MODE_START, LENGTH = DMAC_LINK_MODE_LENGTH
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SHARED_NONCACHE_BUFFER : ORIGIN = SHARED_NONCACHE_BUFFER_START, LENGTH = SHARED_NONCACHE_BUFFER_LENGTH
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NONCACHE_BUFFER : ORIGIN = NONCACHE_BUFFER_START, LENGTH = NONCACHE_BUFFER_LENGTH
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}
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SECTIONS
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{
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.loader_param LOADER_PARAM_ADDRESS : AT (LOADER_PARAM_ADDRESS)
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{
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KEEP(*(.loader_param))
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} > xSPI0_CS0_SPACE
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.flash_contents FLASH_CONTENTS_ADDRESS : AT (FLASH_CONTENTS_ADDRESS)
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{
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_mloader_text = .;
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. = . + (_loader_text_end - _loader_text_start);
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_mloader_data = .;
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. = . + (_loader_data_end - _loader_data_start);
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_mfvector = .;
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. = . + (_fvector_end - _fvector_start);
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_mtext = .;
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. = . + (_text_end - _text_start);
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_mdummy = .;
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. = . + (_dummy_end - _dummy_start);
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_mdata = .;
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. = . + (_data_end - _data_start);
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_mdata_noncache = .;
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. = . + (_data_noncache_end - _data_noncache_start);
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flash_contents_end = .;
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} > xSPI0_CS0_SPACE
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.image_info :
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{
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_image_info_start = .;
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KEEP(*(.image_info))
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_image_info_end = .;
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} > xSPI0_CS0_SPACE
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SECONDARY_START = ALIGN(_image_info_end, 0x20000);
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.secondary SECONDARY_START : AT (SECONDARY_START)
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{
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_secondary_start = .;
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KEEP(*(.secondary))
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_secondary_end = .;
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} > xSPI0_CS0_SPACE
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.loader_text LOADER_TEXT_ADDRESS : AT (_mloader_text)
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{
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_loader_text_start = .;
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*(.loader_text)
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*/fsp/src/bsp/cmsis/Device/RENESAS/Source/*.o(.text*)
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*/fsp/src/bsp/mcu/all/*/bsp_irq_core.o(.text*)
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*/fsp/src/bsp/mcu/all/bsp_clocks.o(.text*)
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*/fsp/src/bsp/mcu/all/bsp_irq.o(.text*)
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*/fsp/src/bsp/mcu/all/bsp_semaphore.o(.text*)
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*/fsp/src/bsp/mcu/all/bsp_register_protection.o(.text*)
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*/fsp/src/bsp/mcu/all/bsp_cache.o(.text*)
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*/fsp/src/r_ioport/r_ioport.o(.text*)
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KEEP(*(.warm_start))
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. = . + (512 - ((. - _loader_text_start) % 512));
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_loader_text_end = .;
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} > LOADER_STACK
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.loader_data : AT (_mloader_data)
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{
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_loader_data_start = .;
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__loader_data_start = .;
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*/fsp/src/bsp/cmsis/Device/RENESAS/Source/*.o(.data*)
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*/fsp/src/bsp/cmsis/Device/RENESAS/Source/*/system_core.o(.rodata*)
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*/fsp/src/bsp/mcu/all/*/bsp_irq_core.o(.data*)
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*/fsp/src/bsp/mcu/all/bsp_clocks.o(.data*)
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*/fsp/src/bsp/mcu/all/bsp_irq.o(.data*)
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*/fsp/src/bsp/mcu/all/bsp_semaphore.o(.data*)
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*/fsp/src/bsp/mcu/all/bsp_register_protection.o(.data*)
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*/fsp/src/bsp/mcu/all/bsp_cache.o(.data*)
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*/fsp/src/r_ioport/r_ioport.o(.data*)
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. = ALIGN(4);
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__loader_data_end = .;
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__loader_bss_start = .;
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*/fsp/src/bsp/cmsis/Device/RENESAS/Source/*.o(.bss*)
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*/fsp/src/bsp/mcu/all/*/bsp_irq_core.o(.bss*)
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*/fsp/src/bsp/mcu/all/bsp_clocks.o(.bss*)
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*/fsp/src/bsp/mcu/all/bsp_irq.o(.bss*)
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*/fsp/src/bsp/mcu/all/bsp_semaphore.o(.bss*)
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*/fsp/src/bsp/mcu/all/bsp_register_protection.o(.bss*)
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*/fsp/src/bsp/mcu/all/bsp_cache.o(.bss*)
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*/fsp/src/r_ioport/r_ioport.o(.bss*)
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*/fsp/src/bsp/cmsis/Device/RENESAS/Source/*.o(COMMON)
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*/fsp/src/bsp/mcu/all/*/bsp_irq_core.o(COMMON)
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*/fsp/src/bsp/mcu/all/bsp_clocks.o(COMMON)
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*/fsp/src/bsp/mcu/all/bsp_irq.o(COMMON)
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*/fsp/src/bsp/mcu/all/bsp_semaphore.o(COMMON)
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*/fsp/src/bsp/mcu/all/bsp_register_protection.o(.COMMON)
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*/fsp/src/bsp/mcu/all/bsp_cache.o(COMMON)
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*/fsp/src/r_ioport/r_ioport.o(.COMMON)
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. = ALIGN(4);
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__loader_bss_end = . ;
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_loader_data_end = .;
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} > LOADER_STACK
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.intvec INTVEC_ADDRESS : AT (_mfvector)
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{
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_fvector_start = .;
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KEEP(*(.intvec))
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_fvector_end = .;
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} > RAM
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.text TEXT_ADDRESS : AT (_mtext)
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{
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_text_start = .;
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*(.text*)
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KEEP(*(.reset_handler))
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KEEP(*(.init))
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KEEP(*(.fini))
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/* .ctors */
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*crtbegin.o(.ctors)
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*crtbegin?.o(.ctors)
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*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
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*(SORT(.ctors.*))
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*(.ctors)
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_ctor_end = .;
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/* .dtors */
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*crtbegin.o(.dtors)
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*crtbegin?.o(.dtors)
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*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
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*(SORT(.dtors.*))
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*(.dtors)
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_dtor_end = .;
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/* section information for utest */
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. = ALIGN(4);
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__rt_utest_tc_tab_start = .;
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KEEP(*(UtestTcTab))
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__rt_utest_tc_tab_end = .;
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/* section information for finsh shell */
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. = ALIGN(4);
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__fsymtab_start = .;
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KEEP(*(FSymTab))
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__fsymtab_end = .;
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. = ALIGN(4);
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__vsymtab_start = .;
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KEEP(*(VSymTab))
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__vsymtab_end = .;
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/* section information for initial. */
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. = ALIGN(4);
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__rt_init_start = .;
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KEEP(*(SORT(.rti_fn*)))
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__rt_init_end = .;
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/* new GCC version uses .init_array */
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PROVIDE(__ctors_start__ = .);
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KEEP (*(SORT(.init_array.*)))
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KEEP (*(.init_array))
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PROVIDE(__ctors_end__ = .);
|
||
|
|
||
|
. = ALIGN(4);
|
||
|
KEEP(*(FalPartTable))
|
||
|
|
||
|
KEEP(*(.eh_frame*))
|
||
|
} > RAM
|
||
|
.rvectors :
|
||
|
{
|
||
|
_rvectors_start = .;
|
||
|
KEEP(*(.rvectors))
|
||
|
_rvectors_end = .;
|
||
|
} > RAM
|
||
|
.ARM.extab :
|
||
|
{
|
||
|
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||
|
} > RAM
|
||
|
__exidx_start = .;
|
||
|
.ARM.exidx :
|
||
|
{
|
||
|
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||
|
} > RAM
|
||
|
__exidx_end = .;
|
||
|
.got :
|
||
|
{
|
||
|
*(.got)
|
||
|
*(.got.plt)
|
||
|
. = ALIGN(4);
|
||
|
_text_end = .;
|
||
|
} > RAM
|
||
|
.dummy _fvector_end : AT (_mdummy)
|
||
|
{
|
||
|
_dummy_start = .;
|
||
|
KEEP(*(.dummy));
|
||
|
_dummy_end = .;
|
||
|
} > DUMMY
|
||
|
.data : AT (_mdata)
|
||
|
{
|
||
|
_data_start = .;
|
||
|
|
||
|
*(vtable)
|
||
|
*(.data.*)
|
||
|
*(.data)
|
||
|
|
||
|
*(.rodata*)
|
||
|
_erodata = .;
|
||
|
|
||
|
. = ALIGN(4);
|
||
|
/* preinit data */
|
||
|
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||
|
KEEP(*(.preinit_array))
|
||
|
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||
|
|
||
|
. = ALIGN(4);
|
||
|
/* init data */
|
||
|
PROVIDE_HIDDEN (__init_array_start = .);
|
||
|
KEEP(*(SORT(.init_array.*)))
|
||
|
KEEP(*(.init_array))
|
||
|
PROVIDE_HIDDEN (__init_array_end = .);
|
||
|
|
||
|
. = ALIGN(4);
|
||
|
/* finit data */
|
||
|
PROVIDE_HIDDEN (__fini_array_start = .);
|
||
|
KEEP(*(SORT(.fini_array.*)))
|
||
|
KEEP(*(.fini_array))
|
||
|
PROVIDE_HIDDEN (__fini_array_end = .);
|
||
|
|
||
|
KEEP(*(.jcr*))
|
||
|
|
||
|
. = ALIGN(4);
|
||
|
|
||
|
/* All data end */
|
||
|
_data_end = .;
|
||
|
} > RAM
|
||
|
.bss :
|
||
|
{
|
||
|
. = ALIGN(4);
|
||
|
__bss_start__ = .;
|
||
|
_bss = .;
|
||
|
*(.bss*)
|
||
|
*(COMMON)
|
||
|
. = ALIGN(4);
|
||
|
__bss_end__ = .;
|
||
|
_ebss = .;
|
||
|
_end = .;
|
||
|
} > RAM
|
||
|
.heap (NOLOAD) :
|
||
|
{
|
||
|
. = ALIGN(8);
|
||
|
__HeapBase = .;
|
||
|
/* Place the STD heap here. */
|
||
|
KEEP(*(.heap))
|
||
|
__HeapLimit = .;
|
||
|
} > RAM
|
||
|
.thread_stack (NOLOAD):
|
||
|
{
|
||
|
. = ALIGN(8);
|
||
|
__ThreadStackBase = .;
|
||
|
/* Place the Thread stacks here. */
|
||
|
KEEP(*(.stack*))
|
||
|
__ThreadStackLimit = .;
|
||
|
} > RAM
|
||
|
.sys_stack (NOLOAD) :
|
||
|
{
|
||
|
. = ALIGN(8);
|
||
|
__SysStackBase = .;
|
||
|
/* Place the sys_stack here. */
|
||
|
KEEP(*(.sys_stack))
|
||
|
__SysStackLimit = .;
|
||
|
} > LOADER_STACK
|
||
|
.svc_stack (NOLOAD) :
|
||
|
{
|
||
|
. = ALIGN(8);
|
||
|
__SvcStackBase = .;
|
||
|
/* Place the svc_stack here. */
|
||
|
KEEP(*(.svc_stack))
|
||
|
__SvcStackLimit = .;
|
||
|
} > LOADER_STACK
|
||
|
.irq_stack (NOLOAD) :
|
||
|
{
|
||
|
. = ALIGN(8);
|
||
|
__IrqStackBase = .;
|
||
|
/* Place the irq_stack here. */
|
||
|
KEEP(*(.irq_stack))
|
||
|
__IrqStackLimit = .;
|
||
|
} > LOADER_STACK
|
||
|
.fiq_stack (NOLOAD) :
|
||
|
{
|
||
|
. = ALIGN(8);
|
||
|
__FiqStackBase = .;
|
||
|
/* Place the fiq_stack here. */
|
||
|
KEEP(*(.fiq_stack))
|
||
|
__FiqStackLimit = .;
|
||
|
} > LOADER_STACK
|
||
|
.und_stack (NOLOAD) :
|
||
|
{
|
||
|
. = ALIGN(8);
|
||
|
__UndStackBase = .;
|
||
|
/* Place the und_stack here. */
|
||
|
KEEP(*(.und_stack))
|
||
|
__UndStackLimit = .;
|
||
|
} > LOADER_STACK
|
||
|
.abt_stack (NOLOAD) :
|
||
|
{
|
||
|
. = ALIGN(8);
|
||
|
__AbtStackBase = .;
|
||
|
/* Place the abt_stack here. */
|
||
|
KEEP(*(.abt_stack))
|
||
|
__AbtStackLimit = .;
|
||
|
} > LOADER_STACK
|
||
|
.data_noncache DATA_NONCACHE_START : AT (_mdata_noncache)
|
||
|
{
|
||
|
. = ALIGN(4);
|
||
|
_data_noncache_start = .;
|
||
|
KEEP(*(.data_noncache*))
|
||
|
_data_noncache_end = .;
|
||
|
} > DATA_NONCACHE
|
||
|
.dmac_link_mode DMAC_LINK_MODE_START : AT (DMAC_LINK_MODE_START)
|
||
|
{
|
||
|
. = ALIGN(4);
|
||
|
_DmacLinkMode_start = .;
|
||
|
KEEP(*(.dmac_link_mode*))
|
||
|
_DmacLinkMode_end = .;
|
||
|
} > DMAC_LINK_MODE
|
||
|
.shared_noncache_buffer SHARED_NONCACHE_BUFFER_START (NOLOAD) : AT (SHARED_NONCACHE_BUFFER_START)
|
||
|
{
|
||
|
. = ALIGN(32);
|
||
|
_sncbuffer_start = .;
|
||
|
KEEP(*(.shared_noncache_buffer*))
|
||
|
_sncbuffer_end = .;
|
||
|
} > SHARED_NONCACHE_BUFFER
|
||
|
.noncache_buffer NONCACHE_BUFFER_START (NOLOAD) : AT (NONCACHE_BUFFER_START)
|
||
|
{
|
||
|
. = ALIGN(32);
|
||
|
_ncbuffer_start = .;
|
||
|
KEEP(*(.noncache_buffer*))
|
||
|
_ncbuffer_end = .;
|
||
|
} > NONCACHE_BUFFER
|
||
|
}
|
||
|
|
||
|
__ddsc_xSPI0_CS0_SPACE_START = LOADER_PARAM_ADDRESS;
|
||
|
__ddsc_xSPI0_CS0_SPACE_END = _image_info_end;
|
||
|
__ddsc_xSPI0_CS0_SPACE_ALIGNMENT = ALIGN(_image_info_end, 0x20000);
|