726 lines
28 KiB
C
726 lines
28 KiB
C
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/*
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* Copyright (c) 2006-2018, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2019-01-10 zylx first version
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*/
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#include <rtthread.h>
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#include <rtdevice.h>
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#include <board.h>
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#ifdef BSP_USING_DSI
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#include <lcd_port_dsi.h>
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#include <string.h>
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#include "drv_gpio.h"
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#include "gfxmmu_lut_390x390_24bpp.h"
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#define DRV_DEBUG
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#define LOG_TAG "drv.lcd"
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#include <drv_log.h>
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static DSI_HandleTypeDef DsiHandle;
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struct drv_lcd_dsi_device
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{
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struct rt_device parent;
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struct rt_device_graphic_info lcd_info;
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struct rt_semaphore lcd_lock;
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rt_uint8_t *front_buf;
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};
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struct drv_lcd_dsi_device _lcd;
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static DMA2D_HandleTypeDef Dma2dHandle;
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static void CopyInVirtualBuffer(uint32_t *pSrc, uint32_t *pDst, uint16_t x, uint16_t y, uint16_t xsize, uint16_t ysize)
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{
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uint32_t destination = (uint32_t)pDst + (y * 390 + x) * 4;
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uint32_t source = (uint32_t)pSrc;
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Dma2dHandle.Instance = DMA2D;
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/*##-1- Configure the DMA2D Mode, Color Mode and output offset #############*/
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Dma2dHandle.Init.Mode = DMA2D_M2M_PFC;
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Dma2dHandle.Init.ColorMode = DMA2D_OUTPUT_RGB888;
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Dma2dHandle.Init.OutputOffset = 1024 - 390;
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/* No Output Alpha Inversion */
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Dma2dHandle.Init.AlphaInverted = DMA2D_REGULAR_ALPHA;
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/* No Output Red & Blue swap */
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Dma2dHandle.Init.RedBlueSwap = DMA2D_RB_REGULAR;
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/* Regular output byte order */
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Dma2dHandle.Init.BytesSwap = DMA2D_BYTES_REGULAR;
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/* Pixel mode */
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Dma2dHandle.Init.LineOffsetMode = DMA2D_LOM_PIXELS;
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/*##-2- Foreground Configuration ###########################################*/
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Dma2dHandle.LayerCfg[1].InputColorMode = DMA2D_INPUT_ARGB8888;
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Dma2dHandle.LayerCfg[1].InputOffset = 0;
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Dma2dHandle.LayerCfg[1].AlphaMode = DMA2D_NO_MODIF_ALPHA;
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/* Not used */
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Dma2dHandle.LayerCfg[1].InputAlpha = 0xFF;
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/* No ForeGround Red/Blue swap */
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Dma2dHandle.LayerCfg[1].RedBlueSwap = DMA2D_RB_REGULAR;
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/* No ForeGround Alpha inversion */
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Dma2dHandle.LayerCfg[1].AlphaInverted = DMA2D_REGULAR_ALPHA;
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/* DMA2D Initialization */
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if (HAL_DMA2D_Init(&Dma2dHandle) == HAL_OK)
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{
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if (HAL_DMA2D_ConfigLayer(&Dma2dHandle, 1) == HAL_OK)
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{
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if (HAL_DMA2D_Start(&Dma2dHandle, source, destination, xsize, ysize) == HAL_OK)
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{
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/* Polling For DMA transfer */
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HAL_DMA2D_PollForTransfer(&Dma2dHandle, 100);
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}
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}
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}
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}
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static rt_err_t drv_lcd_init(struct rt_device *device)
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{
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struct drv_lcd_dsi_device *lcd = (struct drv_lcd_dsi_device *)device;
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/* nothing, right now */
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lcd = lcd;
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return RT_EOK;
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}
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static rt_err_t drv_lcd_control(struct rt_device *device, int cmd, void *args)
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{
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struct drv_lcd_dsi_device *lcd = (struct drv_lcd_dsi_device *)device;
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rt_uint8_t color = 0;
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switch (cmd)
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{
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case RTGRAPHIC_CTRL_RECT_UPDATE:
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{
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/* update */
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rt_sem_take(&_lcd.lcd_lock, RT_TICK_PER_SECOND / 20);
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CopyInVirtualBuffer((uint32_t *)_lcd.lcd_info.framebuffer, (uint32_t *)LAYER_ADDRESS, 0, 0, 390, 390);
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HAL_DSI_Refresh(&DsiHandle);
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}
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break;
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case RTGRAPHIC_CTRL_GET_INFO:
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{
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struct rt_device_graphic_info *info = (struct rt_device_graphic_info *)args;
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RT_ASSERT(info != RT_NULL);
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info->pixel_format = lcd->lcd_info.pixel_format;
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info->bits_per_pixel = 32;
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info->width = lcd->lcd_info.width;
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info->height = lcd->lcd_info.height;
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info->framebuffer = lcd->lcd_info.framebuffer;
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}
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break;
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}
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return RT_EOK;
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}
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LTDC_HandleTypeDef LtdcHandle;
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rt_err_t stm32_lcd_init(struct drv_lcd_dsi_device *lcd)
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{
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DSI_PLLInitTypeDef dsiPllInit = {0};
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DSI_PHY_TimerTypeDef PhyTimings = {0};
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DSI_HOST_TimeoutTypeDef HostTimeouts = {0};
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DSI_LPCmdTypeDef LPCmd = {0};
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DSI_CmdCfgTypeDef CmdCfg = {0};
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GFXMMU_HandleTypeDef GfxmmuHandle = {0};
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LTDC_LayerCfgTypeDef LayerCfg = {0};
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/* GFXMMU CONFIGURATION */
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__HAL_GFXMMU_RESET_HANDLE_STATE(&GfxmmuHandle);
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GfxmmuHandle.Instance = GFXMMU;
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GfxmmuHandle.Init.BlocksPerLine = GFXMMU_192BLOCKS;
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GfxmmuHandle.Init.DefaultValue = 0xFFFFFFFF;
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GfxmmuHandle.Init.Buffers.Buf0Address = (uint32_t)lcd->front_buf;
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GfxmmuHandle.Init.Buffers.Buf1Address = 0;
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GfxmmuHandle.Init.Buffers.Buf2Address = 0;
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GfxmmuHandle.Init.Buffers.Buf3Address = 0;
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GfxmmuHandle.Init.Interrupts.Activation = DISABLE;
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GfxmmuHandle.Init.Interrupts.UsedInterrupts = GFXMMU_AHB_MASTER_ERROR_IT;
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if (HAL_OK != HAL_GFXMMU_Init(&GfxmmuHandle))
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{
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return -RT_ERROR;
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}
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/* Initialize LUT */
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if (HAL_OK != HAL_GFXMMU_ConfigLut(&GfxmmuHandle, 0, 390, (uint32_t) gfxmmu_lut_config_rgb888))
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{
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return -RT_ERROR;
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}
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/* Disable non visible lines : from line 390 to 1023 (634 lines) */
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if (HAL_OK != HAL_GFXMMU_DisableLutLines(&GfxmmuHandle, 390, 634))
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{
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return -RT_ERROR;
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}
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/**********************/
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/* LTDC CONFIGURATION */
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/**********************/
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/* LTDC initialization */
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__HAL_LTDC_RESET_HANDLE_STATE(&LtdcHandle);
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LtdcHandle.Instance = LTDC;
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LtdcHandle.Init.HSPolarity = LTDC_HSPOLARITY_AL;
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LtdcHandle.Init.VSPolarity = LTDC_VSPOLARITY_AL;
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LtdcHandle.Init.DEPolarity = LTDC_DEPOLARITY_AL;
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LtdcHandle.Init.PCPolarity = LTDC_PCPOLARITY_IPC;
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/* HSYNC width - 1 */
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LtdcHandle.Init.HorizontalSync = 0;
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/* VSYNC width - 1 */
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LtdcHandle.Init.VerticalSync = 0;
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/* HSYNC width + HBP - 1 */
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LtdcHandle.Init.AccumulatedHBP = 1;
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/* VSYNC width + VBP - 1 */
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LtdcHandle.Init.AccumulatedVBP = 1;
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/* HSYNC width + HBP + Active width - 1 */
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LtdcHandle.Init.AccumulatedActiveW = 391;
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/* VSYNC width + VBP + Active height - 1 */
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LtdcHandle.Init.AccumulatedActiveH = 391;
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/* HSYNC width + HBP + Active width + HFP - 1 */
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LtdcHandle.Init.TotalWidth = 392;
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/* VSYNC width + VBP + Active height + VFP - 1 */
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LtdcHandle.Init.TotalHeigh = 392;
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LtdcHandle.Init.Backcolor.Red = 0;
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LtdcHandle.Init.Backcolor.Green = 0;
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LtdcHandle.Init.Backcolor.Blue = 0;
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LtdcHandle.Init.Backcolor.Reserved = 0xFF;
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if (HAL_LTDC_Init(&LtdcHandle) != HAL_OK)
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{
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return -RT_ERROR;
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}
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/* LTDC layer 1 configuration */
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LayerCfg.WindowX0 = 0;
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LayerCfg.WindowX1 = 390;
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LayerCfg.WindowY0 = 0;
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LayerCfg.WindowY1 = 390;
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LayerCfg.PixelFormat = LTDC_PIXEL_FORMAT_RGB888;
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LayerCfg.Alpha = 0xFF;
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LayerCfg.Alpha0 = 0;
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LayerCfg.BlendingFactor1 = LTDC_BLENDING_FACTOR1_PAxCA;
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LayerCfg.BlendingFactor2 = LTDC_BLENDING_FACTOR2_PAxCA;
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LayerCfg.FBStartAdress = LAYER_ADDRESS;
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/* virtual frame buffer contains 768 pixels per line for 24bpp */
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/* (192 blocs * 16) / (24bpp/3) = 1024 pixels per ligne */
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LayerCfg.ImageWidth = 1024;
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LayerCfg.ImageHeight = 390;
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LayerCfg.Backcolor.Red = 0;
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LayerCfg.Backcolor.Green = 0;
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LayerCfg.Backcolor.Blue = 0;
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LayerCfg.Backcolor.Reserved = 0xFF;
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if (HAL_LTDC_ConfigLayer(&LtdcHandle, &LayerCfg, LTDC_LAYER_1) != HAL_OK)
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{
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return -RT_ERROR;
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}
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/*********************/
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/* DSI CONFIGURATION */
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/*********************/
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/* DSI initialization */
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__HAL_DSI_RESET_HANDLE_STATE(&DsiHandle);
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DsiHandle.Instance = DSI;
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DsiHandle.Init.AutomaticClockLaneControl = DSI_AUTO_CLK_LANE_CTRL_DISABLE;
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/* We have 1 data lane at 500Mbps => lane byte clock at 500/8 = 62,5 MHZ */
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/* We want TX escape clock at arround 20MHz and under 20MHz so clock division is set to 4 */
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DsiHandle.Init.TXEscapeCkdiv = 4;
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DsiHandle.Init.NumberOfLanes = DSI_ONE_DATA_LANE;
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/* We have HSE value at 16 Mhz and we want data lane at 500Mbps */
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dsiPllInit.PLLNDIV = 20;
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dsiPllInit.PLLIDF = DSI_PLL_IN_DIV1;
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dsiPllInit.PLLODF = DSI_PLL_OUT_DIV2;
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if (HAL_DSI_Init(&DsiHandle, &dsiPllInit) != HAL_OK)
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{
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return -RT_ERROR;
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}
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/* Tclk-post + Tclk-trail + Ths-exit = [(60ns + 52xUI) + (60ns) + (300ns)]/16ns */
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PhyTimings.ClockLaneHS2LPTime = 33;
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/* Tlpx + (Tclk-prepare + Tclk-zero) + Tclk-pre = [150ns + 300ns + 8xUI]/16ns */
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PhyTimings.ClockLaneLP2HSTime = 30;
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/* Ths-trail + Ths-exit = [(60ns + 4xUI) + 100ns]/16ns */
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PhyTimings.DataLaneHS2LPTime = 11;
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/* Tlpx + (Ths-prepare + Ths-zero) + Ths-sync = [150ns + (145ns + 10xUI) + 8xUI]/16ns */
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PhyTimings.DataLaneLP2HSTime = 21;
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PhyTimings.DataLaneMaxReadTime = 0;
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PhyTimings.StopWaitTime = 7;
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if (HAL_DSI_ConfigPhyTimer(&DsiHandle, &PhyTimings) != HAL_OK)
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{
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return -RT_ERROR;
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}
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HostTimeouts.TimeoutCkdiv = 1;
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HostTimeouts.HighSpeedTransmissionTimeout = 0;
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HostTimeouts.LowPowerReceptionTimeout = 0;
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HostTimeouts.HighSpeedReadTimeout = 0;
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HostTimeouts.LowPowerReadTimeout = 0;
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HostTimeouts.HighSpeedWriteTimeout = 0;
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HostTimeouts.HighSpeedWritePrespMode = 0;
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HostTimeouts.LowPowerWriteTimeout = 0;
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HostTimeouts.BTATimeout = 0;
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if (HAL_DSI_ConfigHostTimeouts(&DsiHandle, &HostTimeouts) != HAL_OK)
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{
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return -RT_ERROR;
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}
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LPCmd.LPGenShortWriteNoP = DSI_LP_GSW0P_ENABLE;
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LPCmd.LPGenShortWriteOneP = DSI_LP_GSW1P_ENABLE;
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LPCmd.LPGenShortWriteTwoP = DSI_LP_GSW2P_ENABLE;
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LPCmd.LPGenShortReadNoP = DSI_LP_GSR0P_ENABLE;
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LPCmd.LPGenShortReadOneP = DSI_LP_GSR1P_ENABLE;
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LPCmd.LPGenShortReadTwoP = DSI_LP_GSR2P_ENABLE;
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LPCmd.LPGenLongWrite = DSI_LP_GLW_DISABLE;
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LPCmd.LPDcsShortWriteNoP = DSI_LP_DSW0P_ENABLE;
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LPCmd.LPDcsShortWriteOneP = DSI_LP_DSW1P_ENABLE;
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LPCmd.LPDcsShortReadNoP = DSI_LP_DSR0P_ENABLE;
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LPCmd.LPDcsLongWrite = DSI_LP_DLW_DISABLE;
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LPCmd.LPMaxReadPacket = DSI_LP_MRDP_DISABLE;
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LPCmd.AcknowledgeRequest = DSI_ACKNOWLEDGE_DISABLE;
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if (HAL_DSI_ConfigCommand(&DsiHandle, &LPCmd) != HAL_OK)
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{
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return -RT_ERROR;
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}
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CmdCfg.VirtualChannelID = 0;
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#if LCD_BITS_PER_PIXEL == 16
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CmdCfg.ColorCoding = DSI_RGB565;
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#else
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CmdCfg.ColorCoding = DSI_RGB888;
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#endif
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CmdCfg.CommandSize = 390;
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CmdCfg.TearingEffectSource = DSI_TE_DSILINK;
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CmdCfg.TearingEffectPolarity = DSI_TE_FALLING_EDGE;
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CmdCfg.HSPolarity = DSI_HSYNC_ACTIVE_LOW;
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CmdCfg.VSPolarity = DSI_VSYNC_ACTIVE_LOW;
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CmdCfg.DEPolarity = DSI_DATA_ENABLE_ACTIVE_HIGH;
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CmdCfg.VSyncPol = DSI_VSYNC_FALLING;
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CmdCfg.AutomaticRefresh = DSI_AR_ENABLE;
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CmdCfg.TEAcknowledgeRequest = DSI_TE_ACKNOWLEDGE_ENABLE;
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if (HAL_DSI_ConfigAdaptedCommandMode(&DsiHandle, &CmdCfg) != HAL_OK)
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{
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return -RT_ERROR;
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}
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/* Disable the Tearing Effect interrupt activated by default on previous function */
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__HAL_DSI_DISABLE_IT(&DsiHandle, DSI_IT_TE);
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if (HAL_DSI_ConfigFlowControl(&DsiHandle, DSI_FLOW_CONTROL_BTA) != HAL_OK)
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{
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return -RT_ERROR;
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}
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/* Enable DSI */
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__HAL_DSI_ENABLE(&DsiHandle);
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/*************************/
|
||
|
|
/* LCD POWER ON SEQUENCE */
|
||
|
|
/*************************/
|
||
|
|
/* Step 1 */
|
||
|
|
/* Go to command 2 */
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0xFE, 0x01);
|
||
|
|
/* IC Frame rate control, set power, sw mapping, mux swithc timing command */
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x06, 0x62);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x0E, 0x80);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x0F, 0x80);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x10, 0x71);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x13, 0x81);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x14, 0x81);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x15, 0x82);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x16, 0x82);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x18, 0x88);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x19, 0x55);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x1A, 0x10);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x1C, 0x99);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x1D, 0x03);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x1E, 0x03);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x1F, 0x03);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x20, 0x03);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x25, 0x03);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x26, 0x8D);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x2A, 0x03);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x2B, 0x8D);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x36, 0x00);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x37, 0x10);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x3A, 0x00);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x3B, 0x00);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x3D, 0x20);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x3F, 0x3A);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x40, 0x30);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x41, 0x1A);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x42, 0x33);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x43, 0x22);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x44, 0x11);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x45, 0x66);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x46, 0x55);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x47, 0x44);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x4C, 0x33);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x4D, 0x22);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x4E, 0x11);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x4F, 0x66);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x50, 0x55);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x51, 0x44);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x57, 0x33);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x6B, 0x1B);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x70, 0x55);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x74, 0x0C);
|
||
|
|
|
||
|
|
/* Go to command 3 */
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0xFE, 0x02);
|
||
|
|
/* Set the VGMP/VGSP coltage control */
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x9B, 0x40);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x9C, 0x00);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x9D, 0x20);
|
||
|
|
|
||
|
|
/* Go to command 4 */
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0xFE, 0x03);
|
||
|
|
/* Set the VGMP/VGSP coltage control */
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x9B, 0x40);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x9C, 0x00);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x9D, 0x20);
|
||
|
|
|
||
|
|
/* Go to command 5 */
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0xFE, 0x04);
|
||
|
|
/* VSR command */
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x5D, 0x10);
|
||
|
|
/* VSR1 timing set */
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x00, 0x8D);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x01, 0x00);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x02, 0x01);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x03, 0x01);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x04, 0x10);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x05, 0x01);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x06, 0xA7);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x07, 0x20);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x08, 0x00);
|
||
|
|
/* VSR2 timing set */
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x09, 0xC2);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x0A, 0x00);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x0B, 0x02);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x0C, 0x01);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x0D, 0x40);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x0E, 0x06);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x0F, 0x01);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x10, 0xA7);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x11, 0x00);
|
||
|
|
/* VSR3 timing set */
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x12, 0xC2);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x13, 0x00);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x14, 0x02);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x15, 0x01);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x16, 0x40);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x17, 0x07);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x18, 0x01);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x19, 0xA7);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x1A, 0x00);
|
||
|
|
/* VSR4 timing set */
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x1B, 0x82);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x1C, 0x00);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x1D, 0xFF);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x1E, 0x05);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x1F, 0x60);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x20, 0x02);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x21, 0x01);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x22, 0x7C);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x23, 0x00);
|
||
|
|
/* VSR5 timing set */
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x24, 0xC2);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x25, 0x00);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x26, 0x04);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x27, 0x02);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x28, 0x70);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x29, 0x05);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x2A, 0x74);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x2B, 0x8D);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x2D, 0x00);
|
||
|
|
/* VSR6 timing set */
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x2F, 0xC2);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x30, 0x00);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x31, 0x04);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x32, 0x02);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x33, 0x70);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x34, 0x07);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x35, 0x74);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x36, 0x8D);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x37, 0x00);
|
||
|
|
/* VSR marping command */
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x5E, 0x20);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x5F, 0x31);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x60, 0x54);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x61, 0x76);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x62, 0x98);
|
||
|
|
|
||
|
|
/* Go to command 6 */
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0xFE, 0x05);
|
||
|
|
/* Set the ELVSS voltage */
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x05, 0x17);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x2A, 0x04);
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x91, 0x00);
|
||
|
|
|
||
|
|
/* Go back in standard commands */
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0xFE, 0x00);
|
||
|
|
|
||
|
|
/* Set the Pixel format */
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x3A, 0x07);
|
||
|
|
|
||
|
|
/* Set tear off */
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, DSI_SET_TEAR_OFF, 0x0);
|
||
|
|
|
||
|
|
/* Set DSI mode to internal timing added vs ORIGINAL for Command mode */
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0xC2, 0x0);
|
||
|
|
|
||
|
|
/* Set memory address MODIFIED vs ORIGINAL */
|
||
|
|
{
|
||
|
|
uint8_t InitParam1[4] = {0x00, 0x04, 0x01, 0x89};
|
||
|
|
uint8_t InitParam2[4] = {0x00, 0x00, 0x01, 0x85};
|
||
|
|
|
||
|
|
HAL_DSI_LongWrite(&DsiHandle, 0, DSI_DCS_LONG_PKT_WRITE, 4, DSI_SET_COLUMN_ADDRESS, InitParam1);
|
||
|
|
HAL_DSI_LongWrite(&DsiHandle, 0, DSI_DCS_LONG_PKT_WRITE, 4, DSI_SET_PAGE_ADDRESS, InitParam2);
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Sleep out */
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P0, DSI_EXIT_SLEEP_MODE, 0x0);
|
||
|
|
|
||
|
|
HAL_Delay(120);
|
||
|
|
|
||
|
|
/* Set default Brightness */
|
||
|
|
HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x51, BRIGHTNESS_NORMAL);
|
||
|
|
|
||
|
|
/* Set display on */
|
||
|
|
if (HAL_DSI_ShortWrite(&DsiHandle,
|
||
|
|
0,
|
||
|
|
DSI_DCS_SHORT_PKT_WRITE_P0,
|
||
|
|
DSI_SET_DISPLAY_ON,
|
||
|
|
0x0) != HAL_OK)
|
||
|
|
{
|
||
|
|
LOG_E("set display on failed");
|
||
|
|
return -RT_ERROR;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Enable DSI Wrapper */
|
||
|
|
__HAL_DSI_WRAPPER_ENABLE(&DsiHandle);
|
||
|
|
|
||
|
|
/* NVIC configuration for DSI interrupt that is now enabled */
|
||
|
|
HAL_NVIC_SetPriority(DSI_IRQn, 3, 0);
|
||
|
|
HAL_NVIC_EnableIRQ(DSI_IRQn);
|
||
|
|
|
||
|
|
HAL_DSI_Refresh(&DsiHandle);
|
||
|
|
LOG_D("LCD init success");
|
||
|
|
|
||
|
|
return RT_EOK;
|
||
|
|
}
|
||
|
|
|
||
|
|
#if defined(LCD_BACKLIGHT_USING_PWM)
|
||
|
|
void turn_on_lcd_backlight(void)
|
||
|
|
{
|
||
|
|
struct rt_device_pwm *pwm_dev;
|
||
|
|
|
||
|
|
/* turn on the LCD backlight */
|
||
|
|
pwm_dev = (struct rt_device_pwm *)rt_device_find(PWM_DEV_NAME);
|
||
|
|
/* pwm frequency:100K = 10000ns */
|
||
|
|
rt_pwm_set(pwm_dev, PWM_DEV_CHANNEL, 10000, 10000);
|
||
|
|
rt_pwm_enable(pwm_dev, PWM_DEV_CHANNEL);
|
||
|
|
}
|
||
|
|
#elif defined(LCD_BACKLIGHT_USING_GPIO)
|
||
|
|
void turn_on_lcd_backlight(void)
|
||
|
|
{
|
||
|
|
rt_pin_mode(LCD_BL_GPIO_NUM, PIN_MODE_OUTPUT);
|
||
|
|
|
||
|
|
rt_pin_write(LCD_BL_GPIO_NUM, PIN_HIGH);
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
void DSI_IRQHandler(void)
|
||
|
|
{
|
||
|
|
HAL_DSI_IRQHandler(&DsiHandle);
|
||
|
|
}
|
||
|
|
|
||
|
|
void HAL_DSI_EndOfRefreshCallback(DSI_HandleTypeDef *hdsi)
|
||
|
|
{
|
||
|
|
rt_sem_release(&_lcd.lcd_lock);
|
||
|
|
}
|
||
|
|
|
||
|
|
#ifdef RT_USING_DEVICE_OPS
|
||
|
|
const static struct rt_device_ops lcd_ops =
|
||
|
|
{
|
||
|
|
drv_lcd_init,
|
||
|
|
RT_NULL,
|
||
|
|
RT_NULL,
|
||
|
|
RT_NULL,
|
||
|
|
RT_NULL,
|
||
|
|
drv_lcd_control
|
||
|
|
};
|
||
|
|
#endif
|
||
|
|
|
||
|
|
int drv_lcd_hw_init(void)
|
||
|
|
{
|
||
|
|
rt_err_t result = RT_EOK;
|
||
|
|
struct rt_device *device = &_lcd.parent;
|
||
|
|
|
||
|
|
/* memset _lcd to zero */
|
||
|
|
memset(&_lcd, 0x00, sizeof(_lcd));
|
||
|
|
|
||
|
|
/* init lcd_lock semaphore */
|
||
|
|
result = rt_sem_init(&_lcd.lcd_lock, "lcd_lock", 0, RT_IPC_FLAG_FIFO);
|
||
|
|
if (result != RT_EOK)
|
||
|
|
{
|
||
|
|
LOG_E("init semaphore failed!\n");
|
||
|
|
result = -RT_ENOMEM;
|
||
|
|
goto __exit;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* config LCD dev info */
|
||
|
|
_lcd.lcd_info.height = LCD_HEIGHT;
|
||
|
|
_lcd.lcd_info.width = LCD_WIDTH;
|
||
|
|
_lcd.lcd_info.bits_per_pixel = LCD_BITS_PER_PIXEL;
|
||
|
|
_lcd.lcd_info.pixel_format = LCD_PIXEL_FORMAT;
|
||
|
|
|
||
|
|
/* malloc memory */
|
||
|
|
_lcd.lcd_info.framebuffer = rt_malloc_align(LCD_DSI_BUF_SIZE, 16);
|
||
|
|
_lcd.front_buf = rt_malloc_align(LCD_DSI_BUF_SIZE_ROUND, 16);
|
||
|
|
if (_lcd.lcd_info.framebuffer == RT_NULL || _lcd.front_buf == RT_NULL)
|
||
|
|
{
|
||
|
|
LOG_E("init frame buffer failed!\n");
|
||
|
|
result = -RT_ENOMEM;
|
||
|
|
goto __exit;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* memset buff to 0xFF */
|
||
|
|
memset(_lcd.lcd_info.framebuffer, 0xFF, LCD_DSI_BUF_SIZE);
|
||
|
|
memset(_lcd.front_buf, 0xFF, LCD_DSI_BUF_SIZE_ROUND);
|
||
|
|
|
||
|
|
device->type = RT_Device_Class_Graphic;
|
||
|
|
#ifdef RT_USING_DEVICE_OPS
|
||
|
|
device->ops = &lcd_ops;
|
||
|
|
#else
|
||
|
|
device->init = drv_lcd_init;
|
||
|
|
device->control = drv_lcd_control;
|
||
|
|
#endif
|
||
|
|
|
||
|
|
/* register lcd device */
|
||
|
|
rt_device_register(device, "lcd_dsi", RT_DEVICE_FLAG_RDWR);
|
||
|
|
|
||
|
|
/* init stm32 LTDC */
|
||
|
|
if (stm32_lcd_init(&_lcd) != RT_EOK)
|
||
|
|
{
|
||
|
|
result = -RT_ERROR;
|
||
|
|
goto __exit;
|
||
|
|
}
|
||
|
|
else
|
||
|
|
{
|
||
|
|
turn_on_lcd_backlight();
|
||
|
|
}
|
||
|
|
|
||
|
|
__exit:
|
||
|
|
if (result != RT_EOK)
|
||
|
|
{
|
||
|
|
rt_sem_delete(&_lcd.lcd_lock);
|
||
|
|
|
||
|
|
if (_lcd.lcd_info.framebuffer)
|
||
|
|
{
|
||
|
|
rt_free(_lcd.lcd_info.framebuffer);
|
||
|
|
}
|
||
|
|
|
||
|
|
if (_lcd.front_buf)
|
||
|
|
{
|
||
|
|
|
||
|
|
rt_free(_lcd.front_buf);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
return result;
|
||
|
|
}
|
||
|
|
INIT_DEVICE_EXPORT(drv_lcd_hw_init);
|
||
|
|
|
||
|
|
#if defined(PKG_USING_GUIENGINE)
|
||
|
|
|
||
|
|
#include <rtgui/driver.h>
|
||
|
|
int graphic_device_init(void)
|
||
|
|
{
|
||
|
|
struct rt_device *device;
|
||
|
|
device = rt_device_find("lcd_dsi");
|
||
|
|
if (device)
|
||
|
|
{
|
||
|
|
rtgui_graphic_set_device(device);
|
||
|
|
}
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
INIT_ENV_EXPORT(graphic_device_init);
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#ifdef DRV_DEBUG
|
||
|
|
#ifdef FINSH_USING_MSH
|
||
|
|
int lcd_dsi_test()
|
||
|
|
{
|
||
|
|
struct drv_lcd_dsi_device *lcd;
|
||
|
|
lcd = (struct drv_lcd_dsi_device *)rt_device_find("lcd_dsi");
|
||
|
|
rt_uint8_t *ptr = lcd->lcd_info.framebuffer;
|
||
|
|
while (1)
|
||
|
|
{
|
||
|
|
/* red */
|
||
|
|
for (unsigned long long i = 0; i < LCD_DSI_BUF_SIZE/4; i++)
|
||
|
|
{
|
||
|
|
ptr[4 * i] = 0x00;
|
||
|
|
ptr[4 * i + 1] = 0x00;
|
||
|
|
ptr[4 * i + 2] = 0xFF;
|
||
|
|
ptr[4 * i + 3] = 0xFF;
|
||
|
|
}
|
||
|
|
rt_device_control(&lcd->parent, RTGRAPHIC_CTRL_RECT_UPDATE, RT_NULL);
|
||
|
|
rt_thread_mdelay(1000);
|
||
|
|
|
||
|
|
/* green */
|
||
|
|
for (int i = 0; i < LCD_DSI_BUF_SIZE/4; i++)
|
||
|
|
{
|
||
|
|
ptr[4 * i] = 0x00;
|
||
|
|
ptr[4 * i + 1] = 0xFF;
|
||
|
|
ptr[4 * i + 2] = 0x00;
|
||
|
|
ptr[4 * i + 3] = 0xFF;
|
||
|
|
}
|
||
|
|
rt_device_control(&lcd->parent, RTGRAPHIC_CTRL_RECT_UPDATE, RT_NULL);
|
||
|
|
rt_thread_mdelay(1000);
|
||
|
|
|
||
|
|
/* blue */
|
||
|
|
for (int i = 0; i < LCD_DSI_BUF_SIZE/4; i++)
|
||
|
|
{
|
||
|
|
ptr[4 * i] = 0xFF;
|
||
|
|
ptr[4 * i + 1] = 0x00;
|
||
|
|
ptr[4 * i + 2] = 0x00;
|
||
|
|
ptr[4 * i + 3] = 0xFF;
|
||
|
|
}
|
||
|
|
rt_device_control(&lcd->parent, RTGRAPHIC_CTRL_RECT_UPDATE, RT_NULL);
|
||
|
|
rt_thread_mdelay(1000);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
MSH_CMD_EXPORT(lcd_dsi_test, lcd_dsi_test);
|
||
|
|
|
||
|
|
//draw a line in screen
|
||
|
|
void line()
|
||
|
|
{
|
||
|
|
struct drv_lcd_dsi_device *lcd;
|
||
|
|
lcd = (struct drv_lcd_dsi_device *)rt_device_find("lcd_dsi");
|
||
|
|
rt_uint8_t *ptr = lcd->lcd_info.framebuffer;
|
||
|
|
|
||
|
|
/* red */
|
||
|
|
for (unsigned long long i = LCD_DSI_BUF_SIZE/4/2; i <LCD_DSI_BUF_SIZE/4/2+390; i++)
|
||
|
|
{
|
||
|
|
ptr[4 * i] = 0x00;
|
||
|
|
ptr[4 * i + 1] = 0x00;
|
||
|
|
ptr[4 * i + 2] = 0xFF;
|
||
|
|
ptr[4 * i + 3] = 0xFF;
|
||
|
|
}
|
||
|
|
rt_device_control(&lcd->parent, RTGRAPHIC_CTRL_RECT_UPDATE, RT_NULL);
|
||
|
|
|
||
|
|
|
||
|
|
}
|
||
|
|
MSH_CMD_EXPORT(line, line);
|
||
|
|
|
||
|
|
#endif /* FINSH_USING_MSH */
|
||
|
|
#endif /* DRV_DEBUG */
|
||
|
|
#endif /* BSP_USING_LCD */
|