2025-02-03 23:29:27 +08:00
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/*
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* Copyright (c) 2022-2025, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2025-01-22 chasel first version
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2025-02-12 14:26:35 +08:00
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* 2025-02-10 chasel fix adc calibration did not clear flag bits
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2025-02-03 23:29:27 +08:00
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*/
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#include <rtdevice.h>
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#include "board.h"
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#include "drv_adc.h"
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#include <hal_gpio.h>
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#include <hal_adc.h>
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#include <hal_rcc.h>
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#include <hal_misc.h>
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#if defined(BSP_USING_ADC)
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struct mm32_adc
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{
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struct rt_adc_device mm32_adc_device;
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ADC_TypeDef *adc_x;
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char *name;
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};
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#if defined(BSP_USING_ADC1)
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struct mm32_adc mm32_adc1_config = {
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.adc_x = ADC1,
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.name = "adc1",
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};
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#endif /* BSP_USING_ADC1 */
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#if defined(BSP_USING_ADC2)
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struct mm32_adc mm32_adc2_config = {
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.adc_x = ADC2,
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.name = "adc2",
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};
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#endif /* BSP_USING_ADC2 */
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static void ADCxChannelEnable(ADC_TypeDef* ADCn, rt_uint32_t channel)
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{
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ADCn->ADCHS &= ~(1 << channel);
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ADCn->ADCHS |= (1 << channel);
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}
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static rt_err_t mm32_adc_init(struct rt_adc_device *device, rt_int8_t channel, rt_bool_t enabled)
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{
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ADC_InitTypeDef ADC_InitStruct;
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ADC_TypeDef *adc_x;
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RT_ASSERT(device != RT_NULL);
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adc_x = device->parent.user_data;
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if (enabled) {
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mm32_msp_adc_init((void *)adc_x);
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ADC_CalibrationConfig(adc_x, 0x1FE);
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ADC_StructInit(&ADC_InitStruct);
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ADC_InitStruct.ADC_Resolution = ADC_Resolution_12b;
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ADC_InitStruct.ADC_Prescaler = ADC_Prescaler_16; //ADC prescale factor
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ADC_InitStruct.ADC_Mode = ADC_Mode_Scan; //Set ADC mode to scan conversion mode
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ADC_InitStruct.ADC_DataAlign = ADC_DataAlign_Right; //AD data right-justified
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ADC_Init(adc_x, &ADC_InitStruct);
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ADC_SampleTimeConfig(adc_x, channel, ADC_SampleTime_240_5);
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ADC_ChannelCmd(adc_x, channel, ENABLE);
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ADC_DifferentialConversionConfig(adc_x, ADC_Pseudo_Differential_Conversion_4_5);
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ADC_Cmd(adc_x, ENABLE);
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} else {
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#if defined(BSP_USING_ADC1)
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, DISABLE); //disable ADC1 clock
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#endif /* BSP_USING_ADC1 */
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#if defined(BSP_USING_ADC2)
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC2, DISABLE); //disable ADC2 clock
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#endif /* BSP_USING_ADC2 */
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ADC_DeInit(adc_x);
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ADC_Cmd(adc_x, DISABLE);
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}
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return RT_EOK;
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}
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static rt_err_t mm32_get_adc_value(struct rt_adc_device *device, rt_int8_t channel, rt_uint32_t *value)
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{
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ADC_TypeDef *adc_x;
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RT_ASSERT(device != RT_NULL);
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adc_x = device->parent.user_data;
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ADC_SoftwareStartConvCmd(adc_x, ENABLE);
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2025-02-12 14:26:35 +08:00
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while(ADC_GetFlagStatus(adc_x, ADC_FLAG_EOC) == 0);
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ADC_ClearFlag(adc_x, ADC_FLAG_EOC);
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2025-02-03 23:29:27 +08:00
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*value = ADC_GetChannelConvertedValue(adc_x, channel);
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return RT_EOK;
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}
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static rt_uint8_t mm32_adc_get_resolution(struct rt_adc_device *device)
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{
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ADC_TypeDef *adc_x = device->parent.user_data;
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RT_ASSERT(device != RT_NULL);
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switch( ((adc_x->ADCFG)&(0x00000380)) )
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{
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case ADC_Resolution_12b:
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return 12;
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case ADC_Resolution_11b:
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return 11;
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case ADC_Resolution_10b:
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return 10;
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case ADC_Resolution_9b:
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return 9;
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case ADC_Resolution_8b:
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return 8;
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default:
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return 12;
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}
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}
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static rt_int16_t mm32_adc_get_vref(struct rt_adc_device *device)
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{
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if(device == RT_NULL)
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return -RT_ERROR;
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return 3300;
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}
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static const struct rt_adc_ops mm32_adc_ops =
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{
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.enabled = mm32_adc_init,
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.convert = mm32_get_adc_value,
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.get_resolution = mm32_adc_get_resolution,
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.get_vref = mm32_adc_get_vref,
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};
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int rt_hw_adc_init(void)
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{
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#if defined(BSP_USING_ADC1)
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rt_hw_adc_register(&mm32_adc1_config.mm32_adc_device, mm32_adc1_config.name, &mm32_adc_ops, mm32_adc1_config.adc_x);
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#endif /* BSP_USING_ADC1 */
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#if defined(BSP_USING_ADC2)
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rt_hw_adc_register(&mm32_adc2_config.mm32_adc_device, mm32_adc2_config.name, &mm32_adc_ops, mm32_adc2_config.adc_x);
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#endif /* BSP_USING_ADC2 */
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return RT_EOK;
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}
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INIT_BOARD_EXPORT(rt_hw_adc_init);
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#endif /* BSP_USING_ADC */
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