2019-10-24 17:56:09 +08:00
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/*
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2023-02-28 07:27:42 +08:00
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* Copyright (c) 2006-2023, RT-Thread Development Team
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2019-10-28 14:35:50 +08:00
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* Copyright (c) 2019-2020, Arm Limited. All rights reserved.
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2019-10-24 17:56:09 +08:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2009-01-05 Bernard first implementation
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* 2010-02-04 Magicoe ported to LPC17xx
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* 2010-05-02 Aozima update CMSIS to 130
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* 2017-08-02 XiaoYang porting to LPC54608 bsp
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* 2019-08-05 Magicoe porting to LPC55S69-EVK bsp
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2020-02-15 19:26:35 +08:00
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* 2020-01-01 Karl Add PKG_USING_TFM support
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2019-10-24 17:56:09 +08:00
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*/
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#include <rthw.h>
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#include <rtthread.h>
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#include "board.h"
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#include "clock_config.h"
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#include "drv_uart.h"
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/**
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* This is the timer interrupt service routine.
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*
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*/
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void SysTick_Handler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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rt_tick_increase();
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/* leave interrupt */
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rt_interrupt_leave();
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}
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/**
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* This function will initial LPC55Sxx board.
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*/
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void rt_hw_board_init()
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{
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/* Hardware Initialization */
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BOARD_InitPins();
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2021-03-17 02:26:35 +08:00
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2019-10-24 17:56:09 +08:00
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CLOCK_EnableClock(kCLOCK_InputMux);
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2021-03-17 02:26:35 +08:00
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2019-10-24 17:56:09 +08:00
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CLOCK_EnableClock(kCLOCK_Gpio0);
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CLOCK_EnableClock(kCLOCK_Gpio1);
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2021-03-17 02:26:35 +08:00
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2019-10-24 17:56:09 +08:00
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GPIO_PortInit(GPIO, 0);
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GPIO_PortInit(GPIO, 1);
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2021-03-17 02:26:35 +08:00
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2023-02-28 07:27:42 +08:00
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DMA_Init(DMA0);
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DMA_Init(DMA1);
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2019-10-24 17:56:09 +08:00
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/* NVIC Configuration */
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#define NVIC_VTOR_MASK 0x3FFFFF80
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#ifdef VECT_TAB_RAM
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/* Set the Vector Table base location at 0x10000000 */
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SCB->VTOR = (0x10000000 & NVIC_VTOR_MASK);
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#else /* VECT_TAB_FLASH */
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2019-10-28 14:35:50 +08:00
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2020-02-15 19:26:35 +08:00
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#ifdef PKG_USING_TFM
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2019-10-28 14:35:50 +08:00
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/* Set the Vector Table base location at 0x00020000 when RTT with TF-M*/
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SCB->VTOR = (0x00020000 & NVIC_VTOR_MASK);
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#else
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2019-10-24 17:56:09 +08:00
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/* Set the Vector Table base location at 0x00000000 */
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SCB->VTOR = (0x00000000 & NVIC_VTOR_MASK);
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#endif
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2019-10-28 14:35:50 +08:00
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#endif
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2019-10-24 17:56:09 +08:00
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2020-02-15 19:26:35 +08:00
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#ifndef PKG_USING_TFM
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2019-10-28 14:35:50 +08:00
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/* This init has finished in secure side of TF-M */
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2019-10-24 17:56:09 +08:00
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BOARD_BootClockPLL150M();
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2019-10-28 14:35:50 +08:00
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#endif
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2019-10-24 17:56:09 +08:00
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//BOARD_BootClockFROHF96M();
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2021-03-17 02:26:35 +08:00
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2019-10-24 17:56:09 +08:00
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SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
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/* set pend exception priority */
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NVIC_SetPriority(PendSV_IRQn, (1 << __NVIC_PRIO_BITS) - 1);
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/*init uart device*/
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rt_hw_uart_init();
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2021-03-17 02:26:35 +08:00
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2022-01-08 23:29:41 +08:00
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#if defined(RT_USING_CONSOLE) && defined(RT_USING_DEVICE)
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2019-10-24 17:56:09 +08:00
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rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
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#endif
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#ifdef RT_USING_COMPONENTS_INIT
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/* initialization board with RT-Thread Components */
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rt_components_board_init();
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#endif
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#ifdef RT_USING_HEAP
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rt_kprintf("sram heap, begin: 0x%p, end: 0x%p\n", HEAP_BEGIN, HEAP_END);
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rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
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#endif
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}
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/**
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* This function will called when memory fault.
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*/
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void MemManage_Handler(void)
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{
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extern void HardFault_Handler(void);
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rt_kprintf("Memory Fault!\n");
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HardFault_Handler();
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}
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2021-10-10 21:06:03 +08:00
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void rt_hw_us_delay(rt_uint32_t us)
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{
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rt_uint32_t ticks;
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rt_uint32_t told, tnow, tcnt = 0;
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rt_uint32_t reload = SysTick->LOAD;
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ticks = us * reload / (1000000 / RT_TICK_PER_SECOND);
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told = SysTick->VAL;
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while (1)
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{
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tnow = SysTick->VAL;
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if (tnow != told)
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{
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if (tnow < told)
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{
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tcnt += told - tnow;
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}
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else
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{
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tcnt += reload - tnow + told;
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}
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told = tnow;
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if (tcnt >= ticks)
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{
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break;
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}
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}
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}
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}
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