241 lines
8.6 KiB
C
241 lines
8.6 KiB
C
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/*
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* @brief LPC5410x basic chip inclusion file
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*
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* @note
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* Copyright(C) NXP Semiconductors, 2014
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* All rights reserved.
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*
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* @par
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* LPC products. This software is supplied "AS IS" without any warranties of
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* any kind, and NXP Semiconductors and its licensor disclaim any and
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* all warranties, express or implied, including all implied warranties of
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* merchantability, fitness for a particular purpose and non-infringement of
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* intellectual property rights. NXP Semiconductors assumes no responsibility
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* or liability for the use of the software, conveys no license or rights under any
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* patent, copyright, mask work right, or any other intellectual property rights in
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* or to any products. NXP Semiconductors reserves the right to make changes
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* in the software without notification. NXP Semiconductors also makes no
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* representation or warranty that such application will be suitable for the
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* specified use without further testing or modification.
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*
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* @par
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors' and its
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* licensor's relevant copyrights in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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*/
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#ifndef __CHIP_H_
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#define __CHIP_H_
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#include "lpc_types.h"
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#include "sys_config.h"
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#include "cmsis.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifndef CORE_M4
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#ifndef CORE_M0PLUS
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#error "CORE_M4 or CORE_M0PLUS is not defined for the LPC5410x architecture"
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#error "CORE_M4 or CORE_M0PLUS should be defined as part of your compiler define list"
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#endif
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#endif
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#ifndef CHIP_LPC5410X
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#error "The LPC5410X Chip include path is used for this build, but"
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#error "CHIP_LPC5410X is not defined!"
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#endif
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/** @defgroup PERIPH_5410X_BASE CHIP: LPC5410x Peripheral addresses and register set declarations
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* @ingroup CHIP_5410X_DRIVERS
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* @{
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*/
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/* Main memory addresses */
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#define LPC_FLASHMEM_BASE 0x00000000UL
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#define LPC_SRAM0_BASE 0x02000000UL
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#define LPC_SRAM1_BASE 0x02010000UL
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#define LPC_ROM_BASE 0x03000000UL
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#define LPC_SRAM2_BASE 0x03400000UL
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#define LPC_GPIO_PORT_BASE 0x1C000000UL
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#define LPC_DMA_BASE 0x1C004000UL
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#define LPC_CRC_BASE 0x1C010000UL
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#define LPC_SCT_BASE 0x1C018000UL
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#define LPC_MBOX_BASE 0x1C02C000UL
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#define LPC_ADC_BASE 0x1C034000UL
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#define LPC_FIFO_BASE 0x1C038000UL
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/* APB0 peripheral group addresses */
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#define LPC_SYSCON_BASE 0x40000000UL
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#define LPC_TIMER2_BASE 0x40004000UL
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#define LPC_TIMER3_BASE 0x40008000UL
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#define LPC_TIMER4_BASE 0x4000C000UL
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#define LPC_GPIO_GROUPINT0_BASE 0x40010000UL
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#define LPC_GPIO_GROUPINT1_BASE 0x40014000UL
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#define LPC_PIN_INT_BASE 0x40018000UL
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#define LPC_IOCON_BASE 0x4001C000UL
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#define LPC_UTICK_BASE 0x40020000UL
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#define LPC_FMC_BASE 0x40024000UL
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#define LPC_PMU_BASE 0x4002C000UL
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#define LPC_WWDT_BASE 0x40038000UL
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#define LPC_RTC_BASE 0x4003C000UL
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/* APB1 peripheral group addresses */
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#define LPC_ASYNC_SYSCON_BASE 0x40080000UL
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#define LPC_USART0_BASE 0x40084000UL
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#define LPC_USART1_BASE 0x40088000UL
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#define LPC_USART2_BASE 0x4008C000UL
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#define LPC_USART3_BASE 0x40090000UL
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#define LPC_I2C0_BASE 0x40094000UL
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#define LPC_I2C1_BASE 0x40098000UL
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#define LPC_I2C2_BASE 0x4009C000UL
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#define LPC_SPI0_BASE 0x400A4000UL
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#define LPC_SPI1_BASE 0x400A8000UL
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#define LPC_TIMER0_BASE 0x400B4000UL
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#define LPC_TIMER1_BASE 0x400B8000UL
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#define LPC_INMUX_BASE 0x40050000UL
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#define LPC_RITIMER_BASE 0x40070000UL
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#define LPC_MRT_BASE 0x40074000UL
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/* Main memory register access */
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#define LPC_GPIO ((LPC_GPIO_T *) LPC_GPIO_PORT_BASE)
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#define LPC_DMA ((LPC_DMA_T *) LPC_DMA_BASE)
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#define LPC_CRC ((LPC_CRC_T *) LPC_CRC_BASE)
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#define LPC_SCT ((LPC_SCT_T *) LPC_SCT_BASE)
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#define LPC_MBOX ((LPC_MBOX_T *) LPC_MBOX_BASE)
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#define LPC_ADC ((LPC_ADC_T *) LPC_ADC_BASE)
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#define LPC_FIFO ((LPC_FIFO_T *) LPC_FIFO_BASE)
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/* APB0 peripheral group register access */
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#define LPC_SYSCON ((LPC_SYSCON_T *) LPC_SYSCON_BASE)
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#define LPC_TIMER2 ((LPC_TIMER_T *) LPC_TIMER2_BASE)
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#define LPC_TIMER3 ((LPC_TIMER_T *) LPC_TIMER3_BASE)
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#define LPC_TIMER4 ((LPC_TIMER_T *) LPC_TIMER4_BASE)
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#define LPC_GINT ((LPC_GPIOGROUPINT_T *) LPC_GPIO_GROUPINT0_BASE)
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#define LPC_PININT ((LPC_PIN_INT_T *) LPC_PIN_INT_BASE)
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#define LPC_IOCON ((LPC_IOCON_T *) LPC_IOCON_BASE)
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#define LPC_UTICK ((LPC_UTICK_T *) LPC_UTICK_BASE)
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#define LPC_WWDT ((LPC_WWDT_T *) LPC_WWDT_BASE)
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#define LPC_RTC ((LPC_RTC_T *) LPC_RTC_BASE)
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/* APB1 peripheral group register access */
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#define LPC_ASYNC_SYSCON ((LPC_ASYNC_SYSCON_T *) LPC_ASYNC_SYSCON_BASE)
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#define LPC_USART0 ((LPC_USART_T *) LPC_USART0_BASE)
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#define LPC_USART1 ((LPC_USART_T *) LPC_USART1_BASE)
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#define LPC_USART2 ((LPC_USART_T *) LPC_USART2_BASE)
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#define LPC_USART3 ((LPC_USART_T *) LPC_USART3_BASE)
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#define LPC_I2C0 ((LPC_I2C_T *) LPC_I2C0_BASE)
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#define LPC_I2C1 ((LPC_I2C_T *) LPC_I2C1_BASE)
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#define LPC_I2C2 ((LPC_I2C_T *) LPC_I2C2_BASE)
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#define LPC_SCT0 LPC_SCT
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#define LPC_SPI0 ((LPC_SPI_T *) LPC_SPI0_BASE)
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#define LPC_SPI1 ((LPC_SPI_T *) LPC_SPI1_BASE)
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#define LPC_TIMER0 ((LPC_TIMER_T *) LPC_TIMER0_BASE)
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#define LPC_TIMER1 ((LPC_TIMER_T *) LPC_TIMER1_BASE)
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#define LPC_INMUX ((LPC_INMUX_T *) LPC_INMUX_BASE)
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#define LPC_RITIMER ((LPC_RITIMER_T *) LPC_RITIMER_BASE)
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#define LPC_MRT ((LPC_MRT_T *) LPC_MRT_BASE)
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#define LPC_PMU ((LPC_PMU_T *) LPC_PMU_BASE)
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/**
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* @}
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*/
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/** @ingroup CHIP_5410X_DRIVER_OPTIONS
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* @{
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*/
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/**
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* @brief Clock rate on the CLKIN pin
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* This value is defined externally to the chip layer and contains
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* the value in Hz for the CLKIN pin for the board. If this pin isn't used,
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* this rate can be 0.
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*/
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extern const uint32_t ExtClockIn;
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/**
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* @}
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*/
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/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ī<EFBFBD><C4AA><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD>ȥ<EFBFBD><C8A5><EFBFBD><EFBFBD>Ӧ<EFBFBD><D3A6><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
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/* Include order is important! */
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#include "romapi_5410x.h"
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#include "syscon_5410x.h"
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#include "cpuctrl_5410x.h"
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#include "clock_5410x.h"
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#include "pmu_5410x.h"
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#include "iocon_5410x.h"
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#include "pinint_5410x.h"
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#include "inmux_5410x.h"
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#include "crc_5410x.h"
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#include "gpio_5410x.h"
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#include "fifo_5410x.h"
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#include "mrt_5410x.h"
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#include "wwdt_5410x.h"
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#include "sct_5410x.h"
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#include "sct_pwm_5410x.h"
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#include "rtc_5410x.h"
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#include "timer_5410x.h"
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#include "ritimer_5410x.h"
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#include "utick_5410x.h"
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#include "gpiogroup_5410x.h"
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#include "mailbox_5410x.h"
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#include "fpu_init.h"
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#include "power_lib_5410x.h"
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/** @defgroup SUPPORT_5410X_FUNC CHIP: LPC5410x support functions
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* @ingroup CHIP_5410X_DRIVERS
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* @{
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*/
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/**
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* @brief Current system clock rate, mainly used for peripherals in SYSCON
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*/
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extern uint32_t SystemCoreClock;
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/**
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* @brief Update system core and ASYNC syscon clock rate, should be called if the
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* system has a clock rate change
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* @return None
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*/
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void SystemCoreClockUpdate(void);
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/**
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* @brief Set up and initialize hardware prior to call to main()
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* @return None
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* @note Chip_SystemInit() is called prior to the application and sets up
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* system clocking prior to the application starting.
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*/
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void Chip_SystemInit(void);
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/**
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* @brief Clock and PLL initialization based on the internal oscillator
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* @param iFreq : Rate (in Hz) to set the main system clock to
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* @return None
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*/
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void Chip_SetupIrcClocking(uint32_t iFreq);
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/**
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* @brief Clock and PLL initialization based on the external clock input
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* @param iFreq : Rate (in Hz) to set the main system clock to
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* @return None
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*/
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void Chip_SetupExtInClocking(uint32_t iFreq);
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* __CHIP_H_ */
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