2020-01-10 10:38:21 +08:00
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/*
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2021-03-14 12:58:10 +08:00
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* Copyright (c) 2006-2021, RT-Thread Development Team
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2020-01-10 10:38:21 +08:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2019-07-29 zdzn first version
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*/
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#include "drv_spi.h"
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#ifdef RT_USING_SPI
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#define RPI_CORE_CLK_HZ 250000000
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#define BSP_SPI_MAX_HZ (30* 1000 *1000)
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#define SPITIMEOUT 0x0FFF
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void spi_gpio_write(rt_uint8_t pin, rt_uint8_t val)
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{
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if (val)
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2020-02-06 16:03:31 +08:00
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BCM283X_GPIO_GPSET((pin / 32)) = 1 << (pin % 32);
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2020-01-10 10:38:21 +08:00
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else
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2020-02-06 16:03:31 +08:00
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BCM283X_GPIO_GPCLR((pin / 32)) = 1 << (pin % 32);
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2020-01-10 10:38:21 +08:00
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}
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struct raspi_spi_hw_config
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{
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rt_uint8_t spi_num;
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raspi_gpio_pin sclk_pin;
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raspi_pin_select sclk_mode;
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raspi_gpio_pin mosi_pin;
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raspi_pin_select mosi_mode;
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raspi_gpio_pin miso_pin;
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raspi_pin_select miso_mode;
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#if defined (BSP_USING_SPI0_DEVICE0) || defined (BSP_USING_SPI1_DEVICE0)
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raspi_gpio_pin ce0_pin;
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raspi_pin_select ce0_mode;
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#endif
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#if defined (BSP_USING_SPI0_DEVICE1) || defined (BSP_USING_SPI1_DEVICE1)
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raspi_gpio_pin ce1_pin;
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raspi_pin_select ce1_mode;
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#endif
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#if defined (BSP_USING_SPI1_DEVICE2)
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raspi_gpio_pin ce2_pin;
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raspi_pin_select ce2_mode;
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#endif
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};
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struct raspi_spi_device
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{
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char *device_name;
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struct rt_spi_bus *spi_bus;
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struct rt_spi_device *spi_device;
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raspi_gpio_pin cs_pin;
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};
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static rt_err_t raspi_spi_configure(struct rt_spi_device *device, struct rt_spi_configuration *cfg)
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{
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RT_ASSERT(cfg != RT_NULL);
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RT_ASSERT(device != RT_NULL);
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rt_uint16_t divider;
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// spi clear fifo
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BCM283X_SPI0_CS(BCM283X_SPI0_BASE) |= BCM283X_SPI0_CS_CLEAR;
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if (cfg->mode & RT_SPI_CPOL)
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BCM283X_SPI0_CS(BCM283X_SPI0_BASE) |= BCM283X_SPI0_CS_CPOL;
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if (cfg->mode & RT_SPI_CPHA)
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BCM283X_SPI0_CS(BCM283X_SPI0_BASE) |= BCM283X_SPI0_CS_CPHA;
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if (cfg->mode & RT_SPI_CS_HIGH)
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BCM283X_SPI0_CS(BCM283X_SPI0_BASE) |= BCM283X_SPI0_CS_CSPOL;
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//set clk
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if (cfg->max_hz > BSP_SPI_MAX_HZ)
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cfg->max_hz = BSP_SPI_MAX_HZ;
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divider = (rt_uint16_t) ((rt_uint32_t) RPI_CORE_CLK_HZ / cfg->max_hz);
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divider &= 0xFFFE;
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BCM283X_SPI0_CLK(BCM283X_SPI0_BASE) = divider;
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return RT_EOK;
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}
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rt_uint8_t correct_order(rt_uint8_t b, rt_uint8_t flag)
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{
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if (flag)
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return raspi_byte_reverse_table[b];
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else
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return b;
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}
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static rt_err_t spi_transfernb(rt_uint8_t* tbuf, rt_uint8_t* rbuf, rt_uint32_t len, rt_uint8_t flag)
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{
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rt_uint32_t TXCnt=0;
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rt_uint32_t RXCnt=0;
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/* Clear TX and RX fifos */
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BCM283X_SPI0_CS(BCM283X_SPI0_BASE) |= (BCM283X_SPI0_CS_CLEAR & BCM283X_SPI0_CS_CLEAR);
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/* Set TA = 1 */
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BCM283X_SPI0_CS(BCM283X_SPI0_BASE) |= (BCM283X_SPI0_CS_TA & BCM283X_SPI0_CS_TA);
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/* Use the FIFO's to reduce the interbyte times */
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while ((TXCnt < len) || (RXCnt < len))
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{
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/* TX fifo not full, so add some more bytes */
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while (((BCM283X_SPI0_CS(BCM283X_SPI0_BASE) & BCM283X_SPI0_CS_TXD)) && (TXCnt < len))
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{
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BCM283X_SPI0_FIFO(BCM283X_SPI0_BASE) = correct_order(tbuf[TXCnt],flag);
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TXCnt++;
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}
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/* Rx fifo not empty, so get the next received bytes */
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while (((BCM283X_SPI0_CS(BCM283X_SPI0_BASE) & BCM283X_SPI0_CS_RXD)) && (RXCnt < len))
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{
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rbuf[RXCnt] = correct_order(BCM283X_SPI0_FIFO(BCM283X_SPI0_BASE),flag);
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RXCnt++;
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}
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}
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/* Wait for DONE to be set */
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while (!(BCM283X_SPI0_CS(BCM283X_SPI0_BASE) & BCM283X_SPI0_CS_DONE));
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/* Set TA = 0, and also set the barrier */
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BCM283X_SPI0_CS(BCM283X_SPI0_BASE) |= (0 & BCM283X_SPI0_CS_TA);
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return RT_EOK;
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}
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static rt_uint32_t raspi_spi_xfer(struct rt_spi_device *device, struct rt_spi_message *message)
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{
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RT_ASSERT(device != RT_NULL);
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RT_ASSERT(device->bus != RT_NULL);
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RT_ASSERT(device->parent.user_data != RT_NULL);
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RT_ASSERT(message->send_buf != RT_NULL || message->recv_buf != RT_NULL);
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rt_err_t res;
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rt_uint8_t flag;
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struct rt_spi_configuration config = device->config;
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raspi_gpio_pin cs_pin = (raspi_gpio_pin)device->parent.user_data;
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if (config.mode & RT_SPI_MSB)
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flag = 0;
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else
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flag = 1;
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2020-02-06 16:03:31 +08:00
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if (message->cs_take);
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// (config.mode & RT_SPI_CS_HIGH)?
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// spi_gpio_write(cs_pin, 1):
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// spi_gpio_write(cs_pin, 0);
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2020-01-10 10:38:21 +08:00
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/* deal data */
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res = spi_transfernb((rt_uint8_t *)message->send_buf, (rt_uint8_t *)message->recv_buf,
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(rt_int32_t)message->length, flag);
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if (message->cs_release)
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(config.mode & RT_SPI_CS_HIGH)?
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spi_gpio_write(cs_pin, 0):
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spi_gpio_write(cs_pin, 1);
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if (res != RT_EOK)
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return RT_ERROR;
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return message->length;
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}
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rt_err_t raspi_spi_bus_attach_device(const char *bus_name, struct raspi_spi_device *device)
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{
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rt_err_t ret;
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RT_ASSERT(device != RT_NULL);
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ret = rt_spi_bus_attach_device(device->spi_device, device->device_name, bus_name, (void *)(device->cs_pin));
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return ret;
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}
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rt_err_t raspi_spi_hw_init(struct raspi_spi_hw_config *hwcfg)
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{
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GPIO_FSEL(hwcfg->sclk_pin, hwcfg->sclk_mode);
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GPIO_FSEL(hwcfg->miso_pin, hwcfg->miso_mode);
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GPIO_FSEL(hwcfg->mosi_pin, hwcfg->mosi_mode);
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#if defined (BSP_USING_SPI0_DEVICE0)
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GPIO_FSEL(hwcfg->ce0_pin, hwcfg->ce0_mode);
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#endif
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#if defined (BSP_USING_SPI0_DEVICE1)
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GPIO_FSEL(hwcfg->ce1_pin, hwcfg->ce1_mode);
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#endif
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BCM283X_SPI0_CS(BCM283X_SPI0_BASE) = 0;
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BCM283X_SPI0_CS(BCM283X_SPI0_BASE) = BCM283X_SPI0_CS_CLEAR;
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//enable chip select
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#if defined (BSP_USING_SPI0_DEVICE0)
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BCM283X_SPI0_CS(BCM283X_SPI0_BASE) |= 0;
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#endif
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#if defined (BSP_USING_SPI0_DEVICE1)
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BCM283X_SPI0_CS(BCM283X_SPI0_BASE) |= 0x2;
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#endif
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#if defined (BSP_USING_SPI0_DEVICE0) && defined (BSP_USING_SPI0_DEVICE1)
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BCM283X_SPI0_CS(BCM283X_SPI0_BASE) |= BCM283X_SPI0_CS_CS;
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#endif
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return RT_EOK;
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}
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static struct rt_spi_ops raspi_spi_ops =
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{
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.configure = raspi_spi_configure,
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.xfer = raspi_spi_xfer
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};
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#if defined (BSP_USING_SPI0_BUS)
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#define SPI0_BUS_NAME "spi0"
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#define SPI0_DEVICE0_NAME "spi0.0"
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#define SPI0_DEVICE1_NAME "spi0.1"
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struct rt_spi_bus spi0_bus;
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#if defined (BSP_USING_SPI0_DEVICE0)
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struct rt_spi_device spi0_device0;
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#endif
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#if defined (BSP_USING_SPI0_DEVICE1)
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static struct rt_spi_device spi0_device1;
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#endif
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struct raspi_spi_hw_config raspi_spi0_hw =
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{
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.spi_num = 0,
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.sclk_pin = RPI_GPIO_P1_23,
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.sclk_mode = BCM283X_GPIO_FSEL_ALT0,
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.mosi_pin = RPI_GPIO_P1_19,
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.mosi_mode = BCM283X_GPIO_FSEL_ALT0,
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.miso_pin = RPI_GPIO_P1_21,
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.miso_mode = BCM283X_GPIO_FSEL_ALT0,
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#if defined (BSP_USING_SPI0_DEVICE0)
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.ce0_pin = RPI_GPIO_P1_24,
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.ce0_mode = BCM283X_GPIO_FSEL_ALT0,
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#endif
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#if defined (BSP_USING_SPI0_DEVICE1)
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.ce1_pin = RPI_GPIO_P1_26,
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.ce1_mode = BCM283X_GPIO_FSEL_ALT0,
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#endif
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};
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#endif
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int rt_hw_spi_init(void)
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{
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#if defined (BSP_USING_SPI0_BUS)
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raspi_spi_hw_init(&raspi_spi0_hw);
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rt_spi_bus_register(&spi0_bus, SPI0_BUS_NAME, &raspi_spi_ops);
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#if defined (BSP_USING_SPI0_DEVICE0)
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struct raspi_spi_device raspi_spi0_device0 =
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{
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.device_name = SPI0_DEVICE0_NAME,
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.spi_bus = &spi0_bus,
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.spi_device = &spi0_device0,
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.cs_pin = raspi_spi0_hw.ce0_pin,
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};
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raspi_spi_bus_attach_device(SPI0_BUS_NAME, &raspi_spi0_device0);
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#endif
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#if defined (BSP_USING_SPI0_DEVICE1)
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struct raspi_spi_device raspi_spi0_device1 =
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{
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.device_name = SPI0_DEVICE1_NAME,
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.spi_bus = &spi0_bus,
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.spi_device = &spi0_device1,
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.cs_pin = raspi_spi0_hw.ce1_pin,
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};
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raspi_spi_bus_attach_device(SPI0_BUS_NAME, &raspi_spi0_device1);
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#endif
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#endif
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return RT_EOK;
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}
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INIT_DEVICE_EXPORT(rt_hw_spi_init);
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#endif
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