623 lines
18 KiB
C
623 lines
18 KiB
C
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/**************************************************************************//**
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*
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* @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2020-3-31 Philo First version
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*
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******************************************************************************/
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#include <rtconfig.h>
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#if defined(BSP_USING_USPI)
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#include <rthw.h>
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#include <rtdevice.h>
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#include <rtdef.h>
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#include <NuMicro.h>
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#include <nu_bitutil.h>
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#if defined(BSP_USING_USPI_PDMA)
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#include <drv_pdma.h>
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#endif
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/* Private define ---------------------------------------------------------------*/
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enum
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{
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USPI_START = -1,
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#if defined(BSP_USING_USPI0)
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USPI0_IDX,
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#endif
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#if defined(BSP_USING_USPI1)
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USPI1_IDX,
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#endif
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USPI_CNT
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};
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/* Private typedef --------------------------------------------------------------*/
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struct nu_uspi
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{
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struct rt_spi_bus dev;
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char *name;
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USPI_T *uspi_base;
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struct rt_spi_configuration configuration;
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uint32_t dummy;
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#if defined(BSP_USING_USPI_PDMA)
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int16_t pdma_perp_tx;
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int8_t pdma_chanid_tx;
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int16_t pdma_perp_rx;
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int8_t pdma_chanid_rx;
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rt_sem_t m_psSemBus;
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#endif
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};
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typedef struct nu_uspi *uspi_t;
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/* Private functions ------------------------------------------------------------*/
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static rt_err_t nu_uspi_bus_configure(struct rt_spi_device *device, struct rt_spi_configuration *configuration);
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static rt_uint32_t nu_uspi_bus_xfer(struct rt_spi_device *device, struct rt_spi_message *message);
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static void nu_uspi_transmission_with_poll(struct nu_uspi *uspi_bus,
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uint8_t *send_addr, uint8_t *recv_addr, int length, uint8_t bytes_per_word);
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static int nu_uspi_register_bus(struct nu_uspi *uspi_bus, const char *name);
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static void nu_uspi_drain_rxfifo(USPI_T *uspi_base);
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#if defined(BSP_USING_USPI_PDMA)
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static void nu_pdma_uspi_rx_cb(void *pvUserData, uint32_t u32EventFilter);
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static void nu_pdma_uspi_tx_cb(void *pvUserData, uint32_t u32EventFilter);
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static rt_err_t nu_pdma_uspi_rx_config(struct nu_uspi *uspi_bus, uint8_t *pu8Buf, int32_t i32RcvLen, uint8_t bytes_per_word);
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static rt_err_t nu_pdma_uspi_tx_config(struct nu_uspi *uspi_bus, const uint8_t *pu8Buf, int32_t i32SndLen, uint8_t bytes_per_word);
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static rt_size_t nu_uspi_pdma_transmit(struct nu_uspi *uspi_bus, const uint8_t *send_addr, uint8_t *recv_addr, int length, uint8_t bytes_per_word);
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static rt_err_t nu_hw_uspi_pdma_allocate(struct nu_uspi *uspi_bus);
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#endif
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/* Public functions -------------------------------------------------------------*/
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/* Private variables ------------------------------------------------------------*/
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static struct rt_spi_ops nu_uspi_poll_ops =
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{
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.configure = nu_uspi_bus_configure,
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.xfer = nu_uspi_bus_xfer,
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};
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static struct nu_uspi nu_uspi_arr [] =
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{
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#if defined(BSP_USING_USPI0)
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{
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.name = "uspi0",
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.uspi_base = USPI0,
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#if defined(BSP_USING_USPI_PDMA)
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#if defined(BSP_USING_USPI0_PDMA)
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.pdma_perp_tx = PDMA_USCI0_TX,
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.pdma_perp_rx = PDMA_USCI0_RX,
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#else
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.pdma_perp_tx = NU_PDMA_UNUSED,
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.pdma_perp_rx = NU_PDMA_UNUSED,
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#endif //BSP_USING_USPI0_PDMA
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#endif //BSP_USING_USPI_PDMA
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},
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#endif
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#if defined(BSP_USING_USPI1)
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{
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.name = "uspi1",
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.uspi_base = USPI1,
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#if defined(BSP_USING_USPI_PDMA)
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#if defined(BSP_USING_USPI1_PDMA)
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.pdma_perp_tx = PDMA_USCI1_TX,
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.pdma_perp_rx = PDMA_USCI1_RX,
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#else
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.pdma_perp_tx = NU_PDMA_UNUSED,
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.pdma_perp_rx = NU_PDMA_UNUSED,
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#endif //BSP_USING_USPI1_PDMA
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#endif //BSP_USING_USPI_PDMA
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},
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#endif
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{0}
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}; /* uspi nu_uspi */
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static rt_err_t nu_uspi_bus_configure(struct rt_spi_device *device,
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struct rt_spi_configuration *configuration)
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{
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struct nu_uspi *uspi_bus;
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uint32_t u32SPIMode;
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uint32_t u32BusClock;
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rt_err_t ret = RT_EOK;
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RT_ASSERT(device != RT_NULL);
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RT_ASSERT(configuration != RT_NULL);
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uspi_bus = (struct nu_uspi *) device->bus;
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/* Check mode */
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switch (configuration->mode & RT_SPI_MODE_3)
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{
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case RT_SPI_MODE_0:
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u32SPIMode = USPI_MODE_0;
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break;
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case RT_SPI_MODE_1:
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u32SPIMode = USPI_MODE_1;
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break;
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case RT_SPI_MODE_2:
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u32SPIMode = USPI_MODE_2;
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break;
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case RT_SPI_MODE_3:
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u32SPIMode = USPI_MODE_3;
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break;
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default:
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ret = RT_EIO;
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goto exit_nu_uspi_bus_configure;
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}
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/* Check data width */
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if (!(configuration->data_width == 8 ||
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configuration->data_width == 16))
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{
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ret = RT_EINVAL;
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goto exit_nu_uspi_bus_configure;
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}
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/* Try to set clock and get actual uspi bus clock */
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u32BusClock = USPI_SetBusClock(uspi_bus->uspi_base, configuration->max_hz);
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if (configuration->max_hz > u32BusClock)
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{
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rt_kprintf("%s clock max frequency is %dHz (!= %dHz)\n", uspi_bus->name, u32BusClock, configuration->max_hz);
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configuration->max_hz = u32BusClock;
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}
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/* Need to initialize new configuration? */
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if (rt_memcmp(configuration, &uspi_bus->configuration, sizeof(*configuration)) != 0)
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{
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rt_memcpy(&uspi_bus->configuration, configuration, sizeof(*configuration));
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USPI_Open(uspi_bus->uspi_base, USPI_MASTER, u32SPIMode, configuration->data_width, u32BusClock);
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if (configuration->mode & RT_SPI_CS_HIGH)
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{
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/* Set CS pin to LOW */
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USPI_SET_SS_LOW(uspi_bus->uspi_base);
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}
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else
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{
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/* Set CS pin to HIGH */
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USPI_SET_SS_HIGH(uspi_bus->uspi_base);
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}
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if (configuration->mode & RT_SPI_MSB)
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{
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/* Set sequence to MSB first */
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SPI_SET_MSB_FIRST(uspi_bus->uspi_base);
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}
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else
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{
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/* Set sequence to LSB first */
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SPI_SET_LSB_FIRST(uspi_bus->uspi_base);
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}
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}
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/* Clear SPI RX FIFO */
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nu_uspi_drain_rxfifo(uspi_bus->uspi_base);
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exit_nu_uspi_bus_configure:
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return -(ret);
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}
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#if defined(BSP_USING_USPI_PDMA)
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static void nu_pdma_uspi_rx_cb(void *pvUserData, uint32_t u32EventFilter)
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{
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struct nu_uspi *uspi_bus;
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uspi_bus = (struct nu_uspi *)pvUserData;
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RT_ASSERT(uspi_bus != RT_NULL);
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/* Get base address of uspi register */
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USPI_T *uspi_base = uspi_bus->uspi_base;
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if (u32EventFilter & NU_PDMA_EVENT_TRANSFER_DONE)
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{
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USPI_DISABLE_RX_PDMA(uspi_base); // Stop DMA TX transfer
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}
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}
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static rt_err_t nu_pdma_uspi_rx_config(struct nu_uspi *uspi_bus, uint8_t *pu8Buf, int32_t i32RcvLen, uint8_t bytes_per_word)
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{
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rt_err_t result = RT_EOK;
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rt_uint8_t *dst_addr = NULL;
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nu_pdma_memctrl_t memctrl = eMemCtl_Undefined;
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/* Get base address of uspi register */
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USPI_T *uspi_base = uspi_bus->uspi_base;
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rt_uint8_t uspi_pdma_rx_chid = uspi_bus->pdma_chanid_rx;
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result = nu_pdma_callback_register(uspi_pdma_rx_chid,
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nu_pdma_uspi_rx_cb,
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(void *)uspi_bus,
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NU_PDMA_EVENT_TRANSFER_DONE);
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if (result != RT_EOK)
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{
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goto exit_nu_pdma_uspi_rx_config;
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}
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if (pu8Buf == RT_NULL)
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{
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memctrl = eMemCtl_SrcFix_DstFix;
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dst_addr = (rt_uint8_t *) &uspi_bus->dummy;
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}
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else
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{
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memctrl = eMemCtl_SrcFix_DstInc;
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dst_addr = pu8Buf;
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}
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result = nu_pdma_channel_memctrl_set(uspi_pdma_rx_chid, memctrl);
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if (result != RT_EOK)
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{
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goto exit_nu_pdma_uspi_rx_config;
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}
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result = nu_pdma_transfer(uspi_pdma_rx_chid,
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bytes_per_word * 8,
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(uint32_t)&uspi_base->RXDAT,
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(uint32_t)dst_addr,
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i32RcvLen / bytes_per_word,
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0);
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exit_nu_pdma_uspi_rx_config:
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return result;
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}
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static void nu_pdma_uspi_tx_cb(void *pvUserData, uint32_t u32EventFilter)
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{
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struct nu_uspi *uspi_bus;
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uspi_bus = (struct nu_uspi *)pvUserData;
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RT_ASSERT(uspi_bus != RT_NULL);
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/* Get base address of uspi register */
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USPI_T *uspi_base = uspi_bus->uspi_base;
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if (u32EventFilter & NU_PDMA_EVENT_TRANSFER_DONE)
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{
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USPI_DISABLE_TX_PDMA(uspi_base); // Stop DMA TX transfer
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}
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rt_sem_release(uspi_bus->m_psSemBus);
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}
|
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static rt_err_t nu_pdma_uspi_tx_config(struct nu_uspi *uspi_bus, const uint8_t *pu8Buf, int32_t i32SndLen, uint8_t bytes_per_word)
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{
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rt_err_t result = RT_EOK;
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rt_uint8_t *src_addr = NULL;
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nu_pdma_memctrl_t memctrl = eMemCtl_Undefined;
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/* Get base address of uspi register */
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USPI_T *uspi_base = uspi_bus->uspi_base;
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rt_uint8_t uspi_pdma_tx_chid = uspi_bus->pdma_chanid_tx;
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result = nu_pdma_callback_register(uspi_pdma_tx_chid,
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nu_pdma_uspi_tx_cb,
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(void *)uspi_bus,
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NU_PDMA_EVENT_TRANSFER_DONE);
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if (result != RT_EOK)
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{
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goto exit_nu_pdma_uspi_tx_config;
|
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}
|
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if (pu8Buf == RT_NULL)
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{
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uspi_bus->dummy = 0;
|
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memctrl = eMemCtl_SrcFix_DstFix;
|
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src_addr = (rt_uint8_t *)&uspi_bus->dummy;
|
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}
|
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else
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{
|
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memctrl = eMemCtl_SrcInc_DstFix;
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src_addr = (rt_uint8_t *)pu8Buf;
|
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}
|
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|
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result = nu_pdma_channel_memctrl_set(uspi_pdma_tx_chid, memctrl);
|
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if (result != RT_EOK)
|
||
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{
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goto exit_nu_pdma_uspi_tx_config;
|
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|
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}
|
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result = nu_pdma_transfer(uspi_pdma_tx_chid,
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|
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bytes_per_word * 8,
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(uint32_t)src_addr,
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|
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(uint32_t)&uspi_base->TXDAT,
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i32SndLen / bytes_per_word,
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0);
|
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exit_nu_pdma_uspi_tx_config:
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return result;
|
||
|
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}
|
||
|
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|
||
|
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|
||
|
|
/**
|
||
|
|
* SPI PDMA transfer
|
||
|
|
*/
|
||
|
|
static rt_size_t nu_uspi_pdma_transmit(struct nu_uspi *uspi_bus, const uint8_t *send_addr, uint8_t *recv_addr, int length, uint8_t bytes_per_word)
|
||
|
|
{
|
||
|
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rt_err_t result = RT_EOK;
|
||
|
|
|
||
|
|
/* Get base address of uspi register */
|
||
|
|
USPI_T *uspi_base = uspi_bus->uspi_base;
|
||
|
|
|
||
|
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result = nu_pdma_uspi_rx_config(uspi_bus, recv_addr, length, bytes_per_word);
|
||
|
|
RT_ASSERT(result == RT_EOK);
|
||
|
|
result = nu_pdma_uspi_tx_config(uspi_bus, send_addr, length, bytes_per_word);
|
||
|
|
RT_ASSERT(result == RT_EOK);
|
||
|
|
|
||
|
|
/* Trigger TX/RX at the same time. */
|
||
|
|
USPI_TRIGGER_TX_PDMA(uspi_base);
|
||
|
|
USPI_TRIGGER_RX_PDMA(uspi_base);
|
||
|
|
|
||
|
|
/* Wait PDMA transfer done */
|
||
|
|
rt_sem_take(uspi_bus->m_psSemBus, RT_WAITING_FOREVER);
|
||
|
|
|
||
|
|
while (USPI_IS_BUSY(uspi_base));
|
||
|
|
|
||
|
|
return result;
|
||
|
|
}
|
||
|
|
|
||
|
|
static rt_err_t nu_hw_uspi_pdma_allocate(struct nu_uspi *uspi_bus)
|
||
|
|
{
|
||
|
|
/* Allocate USPI_TX nu_dma channel */
|
||
|
|
if ((uspi_bus->pdma_chanid_tx = nu_pdma_channel_allocate(uspi_bus->pdma_perp_tx)) < 0)
|
||
|
|
{
|
||
|
|
goto exit_nu_hw_uspi_pdma_allocate;
|
||
|
|
}
|
||
|
|
/* Allocate USPI_RX nu_dma channel */
|
||
|
|
else if ((uspi_bus->pdma_chanid_rx = nu_pdma_channel_allocate(uspi_bus->pdma_perp_rx)) < 0)
|
||
|
|
{
|
||
|
|
nu_pdma_channel_free(uspi_bus->pdma_chanid_tx);
|
||
|
|
goto exit_nu_hw_uspi_pdma_allocate;
|
||
|
|
}
|
||
|
|
|
||
|
|
uspi_bus->m_psSemBus = rt_sem_create("uspibus_sem", 0, RT_IPC_FLAG_FIFO);
|
||
|
|
|
||
|
|
return RT_EOK;
|
||
|
|
|
||
|
|
exit_nu_hw_uspi_pdma_allocate:
|
||
|
|
|
||
|
|
return -(RT_ERROR);
|
||
|
|
}
|
||
|
|
|
||
|
|
#endif
|
||
|
|
|
||
|
|
static void nu_uspi_drain_rxfifo(USPI_T *uspi_base)
|
||
|
|
{
|
||
|
|
while (USPI_IS_BUSY(uspi_base));
|
||
|
|
|
||
|
|
// Drain USPI RX FIFO, make sure RX FIFO is empty
|
||
|
|
while (!USPI_GET_RX_EMPTY_FLAG(uspi_base))
|
||
|
|
{
|
||
|
|
USPI_ClearRxBuf(uspi_base);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
static int nu_uspi_read(USPI_T *uspi_base, uint8_t *recv_addr, uint8_t bytes_per_word)
|
||
|
|
{
|
||
|
|
int size = 0;
|
||
|
|
uint32_t val;
|
||
|
|
|
||
|
|
// Read RX data
|
||
|
|
if (!USPI_GET_RX_EMPTY_FLAG(uspi_base))
|
||
|
|
{
|
||
|
|
// Read data from USPI RX FIFO
|
||
|
|
switch (bytes_per_word)
|
||
|
|
{
|
||
|
|
case 2:
|
||
|
|
val = USPI_READ_RX(uspi_base);
|
||
|
|
nu_set16_le(recv_addr, val);
|
||
|
|
break;
|
||
|
|
case 1:
|
||
|
|
*recv_addr = USPI_READ_RX(uspi_base);
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
size = bytes_per_word;
|
||
|
|
}
|
||
|
|
return size;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int nu_uspi_write(USPI_T *uspi_base, const uint8_t *send_addr, uint8_t bytes_per_word)
|
||
|
|
{
|
||
|
|
// Wait USPI TX send data
|
||
|
|
while (USPI_GET_TX_FULL_FLAG(uspi_base));
|
||
|
|
|
||
|
|
// Input data to SPI TX
|
||
|
|
switch (bytes_per_word)
|
||
|
|
{
|
||
|
|
case 2:
|
||
|
|
USPI_WRITE_TX(uspi_base, nu_get16_le(send_addr));
|
||
|
|
break;
|
||
|
|
case 1:
|
||
|
|
USPI_WRITE_TX(uspi_base, *((uint8_t *)send_addr));
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
|
||
|
|
return bytes_per_word;
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief SPI bus polling
|
||
|
|
* @param dev : The pointer of the specified SPI module.
|
||
|
|
* @param send_addr : Source address
|
||
|
|
* @param recv_addr : Destination address
|
||
|
|
* @param length : Data length
|
||
|
|
*/
|
||
|
|
static void nu_uspi_transmission_with_poll(struct nu_uspi *uspi_bus,
|
||
|
|
uint8_t *send_addr, uint8_t *recv_addr, int length, uint8_t bytes_per_word)
|
||
|
|
{
|
||
|
|
USPI_T *uspi_base = uspi_bus->uspi_base;
|
||
|
|
|
||
|
|
// Write-only
|
||
|
|
if ((send_addr != RT_NULL) && (recv_addr == RT_NULL))
|
||
|
|
{
|
||
|
|
while (length > 0)
|
||
|
|
{
|
||
|
|
send_addr += nu_uspi_write(uspi_base, send_addr, bytes_per_word);
|
||
|
|
length -= bytes_per_word;
|
||
|
|
}
|
||
|
|
} // if (send_addr != RT_NULL && recv_addr == RT_NULL)
|
||
|
|
// Read-only
|
||
|
|
else if ((send_addr == RT_NULL) && (recv_addr != RT_NULL))
|
||
|
|
{
|
||
|
|
uspi_bus->dummy = 0;
|
||
|
|
while (length > 0)
|
||
|
|
{
|
||
|
|
/* Input data to SPI TX FIFO */
|
||
|
|
length -= nu_uspi_write(uspi_base, (const uint8_t *)&uspi_bus->dummy, bytes_per_word);
|
||
|
|
|
||
|
|
/* Read data from RX FIFO */
|
||
|
|
recv_addr += nu_uspi_read(uspi_base, recv_addr, bytes_per_word);
|
||
|
|
}
|
||
|
|
} // else if (send_addr == RT_NULL && recv_addr != RT_NULL)
|
||
|
|
// Read&Write
|
||
|
|
else
|
||
|
|
{
|
||
|
|
while (length > 0)
|
||
|
|
{
|
||
|
|
/* Input data to SPI TX FIFO */
|
||
|
|
send_addr += nu_uspi_write(uspi_base, send_addr, bytes_per_word);
|
||
|
|
length -= bytes_per_word;
|
||
|
|
|
||
|
|
/* Read data from RX FIFO */
|
||
|
|
recv_addr += nu_uspi_read(uspi_base, recv_addr, bytes_per_word);
|
||
|
|
}
|
||
|
|
} // else
|
||
|
|
|
||
|
|
/* Wait RX or drian RX-FIFO */
|
||
|
|
if (recv_addr)
|
||
|
|
{
|
||
|
|
// Wait SPI transmission done
|
||
|
|
while (USPI_IS_BUSY(uspi_base))
|
||
|
|
{
|
||
|
|
while (!USPI_GET_RX_EMPTY_FLAG(uspi_base))
|
||
|
|
{
|
||
|
|
recv_addr += nu_uspi_read(uspi_base, recv_addr, bytes_per_word);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
while (!USPI_GET_RX_EMPTY_FLAG(uspi_base))
|
||
|
|
{
|
||
|
|
recv_addr += nu_uspi_read(uspi_base, recv_addr, bytes_per_word);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
else
|
||
|
|
{
|
||
|
|
/* Clear SPI RX FIFO */
|
||
|
|
nu_uspi_drain_rxfifo(uspi_base);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
static void nu_uspi_transfer(struct nu_uspi *uspi_bus, uint8_t *tx, uint8_t *rx, int length, uint8_t bytes_per_word)
|
||
|
|
{
|
||
|
|
#if defined(BSP_USING_USPI_PDMA)
|
||
|
|
/* DMA transfer constrains */
|
||
|
|
if ((uspi_bus->pdma_chanid_rx >= 0) &&
|
||
|
|
(!(uint32_t)tx % bytes_per_word) &&
|
||
|
|
(!(uint32_t)rx % bytes_per_word) &&
|
||
|
|
(bytes_per_word != 3))
|
||
|
|
nu_uspi_pdma_transmit(uspi_bus, tx, rx, length, bytes_per_word);
|
||
|
|
else
|
||
|
|
nu_uspi_transmission_with_poll(uspi_bus, tx, rx, length, bytes_per_word);
|
||
|
|
#else
|
||
|
|
nu_uspi_transmission_with_poll(uspi_bus, tx, rx, length, bytes_per_word);
|
||
|
|
#endif
|
||
|
|
}
|
||
|
|
|
||
|
|
static rt_uint32_t nu_uspi_bus_xfer(struct rt_spi_device *device, struct rt_spi_message *message)
|
||
|
|
{
|
||
|
|
struct nu_uspi *uspi_bus;
|
||
|
|
struct rt_spi_configuration *configuration;
|
||
|
|
uint8_t bytes_per_word;
|
||
|
|
|
||
|
|
RT_ASSERT(device != RT_NULL);
|
||
|
|
RT_ASSERT(device->bus != RT_NULL);
|
||
|
|
RT_ASSERT(message != RT_NULL);
|
||
|
|
|
||
|
|
uspi_bus = (struct nu_uspi *) device->bus;
|
||
|
|
configuration = &uspi_bus->configuration;
|
||
|
|
bytes_per_word = configuration->data_width / 8;
|
||
|
|
|
||
|
|
if ((message->length % bytes_per_word) != 0)
|
||
|
|
{
|
||
|
|
/* Say bye. */
|
||
|
|
rt_kprintf("%s: error payload length(%d%%%d != 0).\n", uspi_bus->name, message->length, bytes_per_word);
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
if (message->length > 0)
|
||
|
|
{
|
||
|
|
if (message->cs_take && !(configuration->mode & RT_SPI_NO_CS))
|
||
|
|
{
|
||
|
|
if (configuration->mode & RT_SPI_CS_HIGH)
|
||
|
|
{
|
||
|
|
USPI_SET_SS_HIGH(uspi_bus->uspi_base);
|
||
|
|
}
|
||
|
|
else
|
||
|
|
{
|
||
|
|
USPI_SET_SS_LOW(uspi_bus->uspi_base);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
nu_uspi_transfer(uspi_bus, (uint8_t *)message->send_buf, (uint8_t *)message->recv_buf, message->length, bytes_per_word);
|
||
|
|
|
||
|
|
if (message->cs_release && !(configuration->mode & RT_SPI_NO_CS))
|
||
|
|
{
|
||
|
|
if (configuration->mode & RT_SPI_CS_HIGH)
|
||
|
|
{
|
||
|
|
USPI_SET_SS_LOW(uspi_bus->uspi_base);
|
||
|
|
}
|
||
|
|
else
|
||
|
|
{
|
||
|
|
USPI_SET_SS_HIGH(uspi_bus->uspi_base);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
}
|
||
|
|
|
||
|
|
return message->length;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int nu_uspi_register_bus(struct nu_uspi *uspi_bus, const char *name)
|
||
|
|
{
|
||
|
|
return rt_spi_bus_register(&uspi_bus->dev, name, &nu_uspi_poll_ops);
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
* Hardware USPI Initial
|
||
|
|
*/
|
||
|
|
static int rt_hw_uspi_init(void)
|
||
|
|
{
|
||
|
|
int i;
|
||
|
|
|
||
|
|
for (i = (USPI_START + 1); i < USPI_CNT; i++)
|
||
|
|
{
|
||
|
|
nu_uspi_register_bus(&nu_uspi_arr[i], nu_uspi_arr[i].name);
|
||
|
|
#if defined(BSP_USING_USPI_PDMA)
|
||
|
|
nu_uspi_arr[i].pdma_chanid_tx = -1;
|
||
|
|
nu_uspi_arr[i].pdma_chanid_rx = -1;
|
||
|
|
if ((nu_uspi_arr[i].pdma_perp_tx != NU_PDMA_UNUSED) && (nu_uspi_arr[i].pdma_perp_rx != NU_PDMA_UNUSED))
|
||
|
|
{
|
||
|
|
if (nu_hw_uspi_pdma_allocate(&nu_uspi_arr[i]) != RT_EOK)
|
||
|
|
{
|
||
|
|
rt_kprintf("Failed to allocate DMA channels for %s. We will use poll-mode for this bus.\n", nu_uspi_arr[i].name);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
}
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
INIT_DEVICE_EXPORT(rt_hw_uspi_init);
|
||
|
|
|
||
|
|
#endif //#if defined(BSP_USING_USPI)
|