484 lines
13 KiB
ArmAsm
484 lines
13 KiB
ArmAsm
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/**
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******************************************************************************
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* @file startup_stm32f10x_hd.s
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* @author MCD Application Team
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* @version V3.1.2
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* @date 09/28/2009
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* @brief STM32F10x High Density Devices vector table for RIDE7 toolchain.
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* This module performs:
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* - Set the initial SP
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* - Set the initial PC == Reset_Handler,
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* - Set the vector table entries with the exceptions ISR address,
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* - Configure external SRAM mounted on STM3210E-EVAL board
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* to be used as data memory (optional, to be enabled by user)
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* - Branches to main in the C library (which eventually
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* calls main()).
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* After Reset the Cortex-M3 processor is in Thread mode,
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* priority is Privileged, and the Stack is set to Main.
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******************************************************************************
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* @copy
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*
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* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*
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* <h2><center>© COPYRIGHT 2009 STMicroelectronics</center></h2>
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*/
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.syntax unified
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.cpu cortex-m3
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.fpu softvfp
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.thumb
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.global g_pfnVectors
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.global SystemInit_ExtMemCtl_Dummy
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.global Default_Handler
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/* start address for the initialization values of the .data section.
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defined in linker script */
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.word _sidata
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/* start address for the .data section. defined in linker script */
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.word _sdata
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/* end address for the .data section. defined in linker script */
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.word _edata
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/* start address for the .bss section. defined in linker script */
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.word _sbss
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/* end address for the .bss section. defined in linker script */
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.word _ebss
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/* stack used for SystemInit_ExtMemCtl; always internal RAM used */
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.equ Initial_spTop, 0x20000400
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.equ BootRAM, 0xF1E0F85F
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/**
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* @brief This is the code that gets called when the processor first
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* starts execution following a reset event. Only the absolutely
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* necessary set is performed, after which the application
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* supplied main() routine is called.
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* @param None
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* @retval : None
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*/
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.section .text.Reset_Handler
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.weak Reset_Handler
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.type Reset_Handler, %function
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Reset_Handler:
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/* FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is
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required, then adjust the Register Addresses */
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bl SystemInit_ExtMemCtl
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/* restore original stack pointer */
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LDR r0, =_estack
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MSR msp, r0
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/* Copy the data segment initializers from flash to SRAM */
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movs r1, #0
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b LoopCopyDataInit
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CopyDataInit:
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ldr r3, =_sidata
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ldr r3, [r3, r1]
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str r3, [r0, r1]
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adds r1, r1, #4
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LoopCopyDataInit:
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ldr r0, =_sdata
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ldr r3, =_edata
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adds r2, r0, r1
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cmp r2, r3
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bcc CopyDataInit
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ldr r2, =_sbss
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b LoopFillZerobss
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/* Zero fill the bss segment. */
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FillZerobss:
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movs r3, #0
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str r3, [r2], #4
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LoopFillZerobss:
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ldr r3, = _ebss
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cmp r2, r3
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bcc FillZerobss
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/* Call the application's entry point.*/
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bl main
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bx lr
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.size Reset_Handler, .-Reset_Handler
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/**
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* @brief Dummy SystemInit_ExtMemCtl function
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* @param None
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* @retval : None
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*/
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.section .text.SystemInit_ExtMemCtl_Dummy,"ax",%progbits
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SystemInit_ExtMemCtl_Dummy:
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bx lr
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.size SystemInit_ExtMemCtl_Dummy, .-SystemInit_ExtMemCtl_Dummy
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/**
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* @brief This is the code that gets called when the processor receives an
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* unexpected interrupt. This simply enters an infinite loop, preserving
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* the system state for examination by a debugger.
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*
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* @param None
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* @retval : None
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*/
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.section .text.Default_Handler,"ax",%progbits
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Default_Handler:
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Infinite_Loop:
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b Infinite_Loop
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.size Default_Handler, .-Default_Handler
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/******************************************************************************
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*
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* The minimal vector table for a Cortex M3. Note that the proper constructs
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* must be placed on this to ensure that it ends up at physical address
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* 0x0000.0000.
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*
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******************************************************************************/
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.section .isr_vector,"a",%progbits
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.type g_pfnVectors, %object
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.size g_pfnVectors, .-g_pfnVectors
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g_pfnVectors:
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.word Initial_spTop
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.word Reset_Handler
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.word NMI_Handler
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.word HardFault_Handler
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.word MemManage_Handler
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.word BusFault_Handler
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.word UsageFault_Handler
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.word 0
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.word 0
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.word 0
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.word 0
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.word SVC_Handler
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.word DebugMon_Handler
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.word 0
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.word PendSV_Handler
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.word SysTick_Handler
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.word WWDG_IRQHandler
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.word PVD_IRQHandler
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.word TAMPER_IRQHandler
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.word RTC_IRQHandler
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.word FLASH_IRQHandler
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.word RCC_IRQHandler
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.word EXTI0_IRQHandler
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.word EXTI1_IRQHandler
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.word EXTI2_IRQHandler
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.word EXTI3_IRQHandler
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.word EXTI4_IRQHandler
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.word DMA1_Channel1_IRQHandler
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.word DMA1_Channel2_IRQHandler
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.word DMA1_Channel3_IRQHandler
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.word DMA1_Channel4_IRQHandler
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.word DMA1_Channel5_IRQHandler
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.word DMA1_Channel6_IRQHandler
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.word DMA1_Channel7_IRQHandler
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.word ADC1_2_IRQHandler
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.word USB_HP_CAN1_TX_IRQHandler
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.word USB_LP_CAN1_RX0_IRQHandler
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.word CAN1_RX1_IRQHandler
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.word CAN1_SCE_IRQHandler
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.word EXTI9_5_IRQHandler
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.word TIM1_BRK_IRQHandler
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.word TIM1_UP_IRQHandler
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.word TIM1_TRG_COM_IRQHandler
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.word TIM1_CC_IRQHandler
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.word TIM2_IRQHandler
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.word TIM3_IRQHandler
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.word TIM4_IRQHandler
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.word I2C1_EV_IRQHandler
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.word I2C1_ER_IRQHandler
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.word I2C2_EV_IRQHandler
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.word I2C2_ER_IRQHandler
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.word SPI1_IRQHandler
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.word SPI2_IRQHandler
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.word USART1_IRQHandler
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.word USART2_IRQHandler
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.word USART3_IRQHandler
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.word EXTI15_10_IRQHandler
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.word RTCAlarm_IRQHandler
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.word USBWakeUp_IRQHandler
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.word TIM8_BRK_IRQHandler
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.word TIM8_UP_IRQHandler
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.word TIM8_TRG_COM_IRQHandler
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.word TIM8_CC_IRQHandler
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.word ADC3_IRQHandler
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.word FSMC_IRQHandler
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.word SDIO_IRQHandler
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.word TIM5_IRQHandler
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.word SPI3_IRQHandler
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.word UART4_IRQHandler
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.word UART5_IRQHandler
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.word TIM6_IRQHandler
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.word TIM7_IRQHandler
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.word DMA2_Channel1_IRQHandler
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.word DMA2_Channel2_IRQHandler
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.word DMA2_Channel3_IRQHandler
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.word DMA2_Channel4_5_IRQHandler
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word BootRAM /* @0x1E0. This is for boot in RAM mode for
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STM32F10x High Density devices. */
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/*******************************************************************************
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*
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* Provide weak aliases for each Exception handler to the Default_Handler.
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* As they are weak aliases, any function with the same name will override
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* this definition.
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*
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*******************************************************************************/
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.weak NMI_Handler
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.thumb_set NMI_Handler,Default_Handler
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.weak HardFault_Handler
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.thumb_set HardFault_Handler,Default_Handler
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.weak MemManage_Handler
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.thumb_set MemManage_Handler,Default_Handler
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.weak BusFault_Handler
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.thumb_set BusFault_Handler,Default_Handler
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.weak UsageFault_Handler
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.thumb_set UsageFault_Handler,Default_Handler
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.weak SVC_Handler
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.thumb_set SVC_Handler,Default_Handler
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.weak DebugMon_Handler
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.thumb_set DebugMon_Handler,Default_Handler
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.weak PendSV_Handler
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.thumb_set PendSV_Handler,Default_Handler
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.weak SysTick_Handler
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.thumb_set SysTick_Handler,Default_Handler
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.weak WWDG_IRQHandler
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.thumb_set WWDG_IRQHandler,Default_Handler
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.weak PVD_IRQHandler
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.thumb_set PVD_IRQHandler,Default_Handler
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.weak TAMPER_IRQHandler
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.thumb_set TAMPER_IRQHandler,Default_Handler
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.weak RTC_IRQHandler
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.thumb_set RTC_IRQHandler,Default_Handler
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.weak FLASH_IRQHandler
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.thumb_set FLASH_IRQHandler,Default_Handler
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.weak RCC_IRQHandler
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.thumb_set RCC_IRQHandler,Default_Handler
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.weak EXTI0_IRQHandler
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.thumb_set EXTI0_IRQHandler,Default_Handler
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.weak EXTI1_IRQHandler
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.thumb_set EXTI1_IRQHandler,Default_Handler
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.weak EXTI2_IRQHandler
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.thumb_set EXTI2_IRQHandler,Default_Handler
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.weak EXTI3_IRQHandler
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.thumb_set EXTI3_IRQHandler,Default_Handler
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.weak EXTI4_IRQHandler
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.thumb_set EXTI4_IRQHandler,Default_Handler
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.weak DMA1_Channel1_IRQHandler
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.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
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.weak DMA1_Channel2_IRQHandler
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.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
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.weak DMA1_Channel3_IRQHandler
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.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
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.weak DMA1_Channel4_IRQHandler
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.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
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.weak DMA1_Channel5_IRQHandler
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.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
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.weak DMA1_Channel6_IRQHandler
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.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
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.weak DMA1_Channel7_IRQHandler
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.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
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.weak ADC1_2_IRQHandler
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.thumb_set ADC1_2_IRQHandler,Default_Handler
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.weak USB_HP_CAN1_TX_IRQHandler
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.thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler
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.weak USB_LP_CAN1_RX0_IRQHandler
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.thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler
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.weak CAN1_RX1_IRQHandler
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.thumb_set CAN1_RX1_IRQHandler,Default_Handler
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.weak CAN1_SCE_IRQHandler
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.thumb_set CAN1_SCE_IRQHandler,Default_Handler
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.weak EXTI9_5_IRQHandler
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.thumb_set EXTI9_5_IRQHandler,Default_Handler
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.weak TIM1_BRK_IRQHandler
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.thumb_set TIM1_BRK_IRQHandler,Default_Handler
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.weak TIM1_UP_IRQHandler
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.thumb_set TIM1_UP_IRQHandler,Default_Handler
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.weak TIM1_TRG_COM_IRQHandler
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.thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
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.weak TIM1_CC_IRQHandler
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.thumb_set TIM1_CC_IRQHandler,Default_Handler
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.weak TIM2_IRQHandler
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.thumb_set TIM2_IRQHandler,Default_Handler
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.weak TIM3_IRQHandler
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.thumb_set TIM3_IRQHandler,Default_Handler
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.weak TIM4_IRQHandler
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.thumb_set TIM4_IRQHandler,Default_Handler
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|
||
|
|
.weak I2C1_EV_IRQHandler
|
||
|
|
.thumb_set I2C1_EV_IRQHandler,Default_Handler
|
||
|
|
|
||
|
|
.weak I2C1_ER_IRQHandler
|
||
|
|
.thumb_set I2C1_ER_IRQHandler,Default_Handler
|
||
|
|
|
||
|
|
.weak I2C2_EV_IRQHandler
|
||
|
|
.thumb_set I2C2_EV_IRQHandler,Default_Handler
|
||
|
|
|
||
|
|
.weak I2C2_ER_IRQHandler
|
||
|
|
.thumb_set I2C2_ER_IRQHandler,Default_Handler
|
||
|
|
|
||
|
|
.weak SPI1_IRQHandler
|
||
|
|
.thumb_set SPI1_IRQHandler,Default_Handler
|
||
|
|
|
||
|
|
.weak SPI2_IRQHandler
|
||
|
|
.thumb_set SPI2_IRQHandler,Default_Handler
|
||
|
|
|
||
|
|
.weak USART1_IRQHandler
|
||
|
|
.thumb_set USART1_IRQHandler,Default_Handler
|
||
|
|
|
||
|
|
.weak USART2_IRQHandler
|
||
|
|
.thumb_set USART2_IRQHandler,Default_Handler
|
||
|
|
|
||
|
|
.weak USART3_IRQHandler
|
||
|
|
.thumb_set USART3_IRQHandler,Default_Handler
|
||
|
|
|
||
|
|
.weak EXTI15_10_IRQHandler
|
||
|
|
.thumb_set EXTI15_10_IRQHandler,Default_Handler
|
||
|
|
|
||
|
|
.weak RTCAlarm_IRQHandler
|
||
|
|
.thumb_set RTCAlarm_IRQHandler,Default_Handler
|
||
|
|
|
||
|
|
.weak USBWakeUp_IRQHandler
|
||
|
|
.thumb_set USBWakeUp_IRQHandler,Default_Handler
|
||
|
|
|
||
|
|
.weak TIM8_BRK_IRQHandler
|
||
|
|
.thumb_set TIM8_BRK_IRQHandler,Default_Handler
|
||
|
|
|
||
|
|
.weak TIM8_UP_IRQHandler
|
||
|
|
.thumb_set TIM8_UP_IRQHandler,Default_Handler
|
||
|
|
|
||
|
|
.weak TIM8_TRG_COM_IRQHandler
|
||
|
|
.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
|
||
|
|
|
||
|
|
.weak TIM8_CC_IRQHandler
|
||
|
|
.thumb_set TIM8_CC_IRQHandler,Default_Handler
|
||
|
|
|
||
|
|
.weak ADC3_IRQHandler
|
||
|
|
.thumb_set ADC3_IRQHandler,Default_Handler
|
||
|
|
|
||
|
|
.weak FSMC_IRQHandler
|
||
|
|
.thumb_set FSMC_IRQHandler,Default_Handler
|
||
|
|
|
||
|
|
.weak SDIO_IRQHandler
|
||
|
|
.thumb_set SDIO_IRQHandler,Default_Handler
|
||
|
|
|
||
|
|
.weak TIM5_IRQHandler
|
||
|
|
.thumb_set TIM5_IRQHandler,Default_Handler
|
||
|
|
|
||
|
|
.weak SPI3_IRQHandler
|
||
|
|
.thumb_set SPI3_IRQHandler,Default_Handler
|
||
|
|
|
||
|
|
.weak UART4_IRQHandler
|
||
|
|
.thumb_set UART4_IRQHandler,Default_Handler
|
||
|
|
|
||
|
|
.weak UART5_IRQHandler
|
||
|
|
.thumb_set UART5_IRQHandler,Default_Handler
|
||
|
|
|
||
|
|
.weak TIM6_IRQHandler
|
||
|
|
.thumb_set TIM6_IRQHandler,Default_Handler
|
||
|
|
|
||
|
|
.weak TIM7_IRQHandler
|
||
|
|
.thumb_set TIM7_IRQHandler,Default_Handler
|
||
|
|
|
||
|
|
.weak DMA2_Channel1_IRQHandler
|
||
|
|
.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
|
||
|
|
|
||
|
|
.weak DMA2_Channel2_IRQHandler
|
||
|
|
.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
|
||
|
|
|
||
|
|
.weak DMA2_Channel3_IRQHandler
|
||
|
|
.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
|
||
|
|
|
||
|
|
.weak DMA2_Channel4_5_IRQHandler
|
||
|
|
.thumb_set DMA2_Channel4_5_IRQHandler,Default_Handler
|
||
|
|
|
||
|
|
.weak SystemInit_ExtMemCtl
|
||
|
|
.thumb_set SystemInit_ExtMemCtl,SystemInit_ExtMemCtl_Dummy
|
||
|
|
|