445 lines
11 KiB
C
445 lines
11 KiB
C
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/*
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* Copyright (c) 2006-2022, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2022-7-20 wudiyidashi first version
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*/
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#include <board.h>
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#include "drv_gpio.h"
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#ifdef RT_USING_PIN
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#define PIN_NUM(port, no) (((((port)&0xFu) << 4) | ((no)&0xFu)))
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#define PIN_PORT(pin) ((uint8_t)(((pin) >> 4) & 0xFu))
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#define PIN_NO(pin) ((uint8_t)((pin)&0xFu))
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#define PIN_STPORT(pin) ((GPIO_Type *)(GPIOA_BASE + (0x40u * PIN_PORT(pin))))
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#define PIN_STPIN(pin) ((uint16_t)(1u << PIN_NO(pin)))
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#define PIN_STPORT_MAX 4u
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/*
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--GPIO-- | EXTI INPUT | --EXTI--
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PA0~PA3 | EXTI_ASEL[1:0] | EXTI[0]
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PA4~PA7 | EXTI_ASEL[3:2] | EXTI[1]
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PA8~PA11 | EXTI_ASEL[5:4] | EXTI[2]
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PA12~PA15| EXTI_ASEL[7:6] | EXTI[3]
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PB0~PB3 | EXTI_BSEL[1:0] | EXTI[4]
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PB4~PB7 | EXTI_BSEL[3:2] | EXTI[5]
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PB8~PB11 | EXTI_BSEL[5:4] | EXTI[6]
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PB12~PB15 | EXTI_BSEL[7:6] | EXTI[7]
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PC0~PC3 | EXTI_CSEL[1:0] | EXTI[8]
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PC4~PC7 | EXTI_CSEL[3:2] | EXTI[9]
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PC8~PC11 | EXTI_CSEL[5:4] | EXTI[10]
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PC12 | - | EXTI[11]
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PD0~PD3 | EXTI_DSEL[1:0] | EXTI[12]
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PD4~PD7 | EXTI_DSEL[3:2] | EXTI[13]
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PD8~PD11 | EXTI_DSEL[5:4] | EXTI[14]
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PD12 | - | EXTI[15]
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{PIN_NUM(PA3),FL_GPIO_EXTI_LINE_0}
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{PIN_NUM(PA7),FL_GPIO_EXTI_LINE_0}
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...
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{PIN_NUM(PD12),FL_GPIO_EXTI_LINE_0}
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*/
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static const struct pin_irq_map pin_irq_map[] =
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{
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{3, FL_GPIO_EXTI_LINE_0},
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{7, FL_GPIO_EXTI_LINE_1},
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{11, FL_GPIO_EXTI_LINE_2},
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{15, FL_GPIO_EXTI_LINE_3},
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{19, FL_GPIO_EXTI_LINE_4},
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{23, FL_GPIO_EXTI_LINE_5},
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{27, FL_GPIO_EXTI_LINE_6},
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{31, FL_GPIO_EXTI_LINE_7},
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{35, FL_GPIO_EXTI_LINE_8},
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{39, FL_GPIO_EXTI_LINE_9},
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{43, FL_GPIO_EXTI_LINE_10},
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{44, FL_GPIO_EXTI_LINE_11},
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{51, FL_GPIO_EXTI_LINE_12},
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{55, FL_GPIO_EXTI_LINE_13},
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{59, FL_GPIO_EXTI_LINE_14},
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{60, FL_GPIO_EXTI_LINE_15},
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};
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static struct rt_pin_irq_hdr pin_irq_hdr_tab[] =
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{
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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};
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static uint32_t pin_irq_enable_mask = 0;
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#define ITEM_NUM(items) sizeof(items) / sizeof(items[0])
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static rt_base_t fm33_pin_get(const char *name)
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{
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rt_base_t pin = 0;
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int hw_port_num, hw_pin_num = 0;
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int i, name_len;
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name_len = rt_strlen(name);
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if ((name_len < 4) || (name_len >= 6))
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{
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return -RT_EINVAL;
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}
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if ((name[0] != 'P') || (name[2] != '.'))
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{
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return -RT_EINVAL;
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}
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if ((name[1] >= 'A') && (name[1] <= 'Z'))
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{
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hw_port_num = (int)(name[1] - 'A');
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}
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else
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{
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return -RT_EINVAL;
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}
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for (i = 3; i < name_len; i++)
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{
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hw_pin_num *= 10;
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hw_pin_num += name[i] - '0';
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}
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pin = PIN_NUM(hw_port_num, hw_pin_num);
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return pin;
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}
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static void fm33_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
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{
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GPIO_Type *gpio_port;
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uint16_t gpio_pin;
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if (PIN_PORT(pin) < PIN_STPORT_MAX)
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{
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gpio_port = PIN_STPORT(pin);
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gpio_pin = PIN_STPIN(pin);
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if (value == PIN_LOW)
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{
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FL_GPIO_ResetOutputPin(gpio_port, gpio_pin);
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}
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else
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{
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FL_GPIO_SetOutputPin(gpio_port, gpio_pin);
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}
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}
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}
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static int fm33_pin_read(rt_device_t dev, rt_base_t pin)
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{
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GPIO_Type *gpio_port;
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uint16_t gpio_pin;
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int value = PIN_LOW;
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if (PIN_PORT(pin) < PIN_STPORT_MAX)
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{
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gpio_port = PIN_STPORT(pin);
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gpio_pin = PIN_STPIN(pin);
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value = FL_GPIO_GetInputPin(gpio_port, gpio_pin);
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}
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return value;
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}
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static void fm33_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
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{
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FL_GPIO_InitTypeDef GPIO_InitStruct;
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if (PIN_PORT(pin) >= PIN_STPORT_MAX)
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{
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return;
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}
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/* Configure GPIO_InitStructure */
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GPIO_InitStruct.pin = PIN_STPIN(pin);
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GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL;
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GPIO_InitStruct.pull = FL_DISABLE;
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GPIO_InitStruct.remapPin = FL_DISABLE;
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if (mode == PIN_MODE_OUTPUT)
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{
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/* output setting */
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GPIO_InitStruct.mode = FL_GPIO_MODE_OUTPUT;
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GPIO_InitStruct.pull = FL_DISABLE;
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}
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else if (mode == PIN_MODE_INPUT)
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{
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/* input setting: not pull. */
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GPIO_InitStruct.mode = FL_GPIO_MODE_INPUT;
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GPIO_InitStruct.pull = FL_DISABLE;
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}
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else if (mode == PIN_MODE_INPUT_PULLUP)
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{
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/* input setting: pull up. */
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GPIO_InitStruct.mode = FL_GPIO_MODE_INPUT;
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GPIO_InitStruct.pull = FL_ENABLE;
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}
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else if (mode == PIN_MODE_INPUT_PULLDOWN)
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{
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/* input setting: pull down. */
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GPIO_InitStruct.mode = FL_GPIO_MODE_INPUT;
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GPIO_InitStruct.pull = FL_DISABLE;
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}
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else if (mode == PIN_MODE_OUTPUT_OD)
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{
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/* output setting: od. */
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GPIO_InitStruct.mode = FL_GPIO_OUTPUT_OPENDRAIN;
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GPIO_InitStruct.pull = FL_DISABLE;
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}
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FL_GPIO_Init(PIN_STPORT(pin), &GPIO_InitStruct);
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}
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rt_inline rt_int32_t pin2irqindex(rt_uint32_t pin)
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{
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rt_uint8_t irqindex;
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for (irqindex = 4 * PIN_PORT(pin); irqindex <= ITEM_NUM(pin_irq_map); irqindex++)
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{
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if (pin_irq_map[irqindex].pin >= pin && pin_irq_map[irqindex - 1].pin < pin)
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{
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return irqindex;
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}
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}
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return -1;
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}
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rt_inline const struct pin_irq_map *get_pin_irq_map(rt_base_t pin)
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{
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rt_int32_t mapindex;
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mapindex = pin2irqindex(pin);
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if (mapindex < 0 || mapindex >= ITEM_NUM(pin_irq_map))
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{
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return RT_NULL;
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}
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return &pin_irq_map[mapindex];
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};
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static rt_err_t fm33_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
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rt_uint32_t mode, void (*hdr)(void *args), void *args)
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{
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rt_base_t level;
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rt_int32_t irqindex = -1;
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if (PIN_PORT(pin) >= PIN_STPORT_MAX)
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{
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return -RT_ENOSYS;
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}
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irqindex = pin2irqindex(pin);
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if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
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{
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return RT_ENOSYS;
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}
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level = rt_hw_interrupt_disable();
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if (pin_irq_hdr_tab[irqindex].pin == pin &&
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pin_irq_hdr_tab[irqindex].hdr == hdr &&
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pin_irq_hdr_tab[irqindex].mode == mode &&
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pin_irq_hdr_tab[irqindex].args == args)
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{
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rt_hw_interrupt_enable(level);
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return RT_EOK;
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}
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if (pin_irq_hdr_tab[irqindex].pin != -1)
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{
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rt_hw_interrupt_enable(level);
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return RT_EBUSY;
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}
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pin_irq_hdr_tab[irqindex].pin = pin;
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pin_irq_hdr_tab[irqindex].hdr = hdr;
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pin_irq_hdr_tab[irqindex].mode = mode;
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pin_irq_hdr_tab[irqindex].args = args;
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rt_hw_interrupt_enable(level);
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return RT_EOK;
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}
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static rt_err_t fm33_pin_dettach_irq(struct rt_device *device, rt_int32_t pin)
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{
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rt_base_t level;
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rt_int32_t irqindex = -1;
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if (PIN_PORT(pin) >= PIN_STPORT_MAX)
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{
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return -RT_ENOSYS;
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}
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irqindex = pin2irqindex(PIN_STPIN(pin));
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if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
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{
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return RT_ENOSYS;
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}
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level = rt_hw_interrupt_disable();
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if (pin_irq_hdr_tab[irqindex].pin == -1)
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{
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rt_hw_interrupt_enable(level);
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return RT_EOK;
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}
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pin_irq_hdr_tab[irqindex].pin = -1;
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pin_irq_hdr_tab[irqindex].hdr = RT_NULL;
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pin_irq_hdr_tab[irqindex].mode = 0;
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pin_irq_hdr_tab[irqindex].args = RT_NULL;
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rt_hw_interrupt_enable(level);
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return RT_EOK;
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}
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static rt_err_t fm33_pin_irq_enable(struct rt_device *device, rt_base_t pin,
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rt_uint32_t enabled)
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{
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const struct pin_irq_map *irqmap;
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rt_base_t level;
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rt_int8_t irqindex = 0;
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FL_GPIO_InitTypeDef GPIO_InitStruct;
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FL_EXTI_InitTypeDef extiInitStruct = {0};
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FL_EXTI_CommonInitTypeDef extiCommonInitStruct = {0};
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FL_RCC_EnableEXTIOnSleep();
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extiCommonInitStruct.clockSource = FL_RCC_EXTI_CLK_SOURCE_HCLK;
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FL_EXTI_CommonInit(&extiCommonInitStruct);
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if (PIN_PORT(pin) >= PIN_STPORT_MAX)
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{
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return -RT_ENOSYS;
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}
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if (enabled == PIN_IRQ_ENABLE)
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{
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if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
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{
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return RT_ENOSYS;
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}
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irqindex = pin2irqindex(pin);
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irqmap = &pin_irq_map[irqindex];
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level = rt_hw_interrupt_disable();
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if (pin_irq_hdr_tab[irqindex].pin == -1)
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{
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rt_hw_interrupt_enable(level);
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return RT_ENOSYS;
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}
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/* Configure GPIO_InitStructure */
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GPIO_InitStruct.pin = PIN_STPIN(pin);
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GPIO_InitStruct.mode = FL_GPIO_MODE_INPUT;
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GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL;
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GPIO_InitStruct.pull = FL_DISABLE;
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GPIO_InitStruct.remapPin = FL_DISABLE;
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extiInitStruct.input = pin - pin_irq_map[irqindex - 1].pin - 1;
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extiInitStruct.filter = FL_ENABLE;
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switch (pin_irq_hdr_tab[irqindex].mode)
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{
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case PIN_IRQ_MODE_RISING:
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|
|
extiInitStruct.triggerEdge = FL_GPIO_EXTI_TRIGGER_EDGE_RISING;
|
||
|
|
break;
|
||
|
|
case PIN_IRQ_MODE_FALLING:
|
||
|
|
extiInitStruct.triggerEdge = FL_GPIO_EXTI_TRIGGER_EDGE_FALLING;
|
||
|
|
break;
|
||
|
|
case PIN_IRQ_MODE_RISING_FALLING:
|
||
|
|
extiInitStruct.triggerEdge = FL_GPIO_EXTI_TRIGGER_EDGE_BOTH;
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
FL_GPIO_Init(PIN_STPORT(pin), &GPIO_InitStruct);
|
||
|
|
FL_EXTI_Init(irqmap->irqno, &extiInitStruct);
|
||
|
|
|
||
|
|
NVIC_DisableIRQ(GPIO_IRQn);
|
||
|
|
NVIC_SetPriority(GPIO_IRQn, 2);
|
||
|
|
NVIC_EnableIRQ(GPIO_IRQn);
|
||
|
|
pin_irq_enable_mask |= irqmap->irqno;
|
||
|
|
|
||
|
|
rt_hw_interrupt_enable(level);
|
||
|
|
}
|
||
|
|
else if (enabled == PIN_IRQ_DISABLE)
|
||
|
|
{
|
||
|
|
irqmap = get_pin_irq_map(PIN_STPIN(pin));
|
||
|
|
if (irqmap == RT_NULL)
|
||
|
|
{
|
||
|
|
return RT_ENOSYS;
|
||
|
|
}
|
||
|
|
|
||
|
|
level = rt_hw_interrupt_disable();
|
||
|
|
|
||
|
|
FL_GPIO_DeInit(PIN_STPORT(pin), PIN_STPIN(pin));
|
||
|
|
|
||
|
|
pin_irq_enable_mask &= ~irqmap->irqno;
|
||
|
|
|
||
|
|
NVIC_DisableIRQ(GPIO_IRQn);
|
||
|
|
|
||
|
|
rt_hw_interrupt_enable(level);
|
||
|
|
}
|
||
|
|
else
|
||
|
|
{
|
||
|
|
return -RT_ENOSYS;
|
||
|
|
}
|
||
|
|
|
||
|
|
return RT_EOK;
|
||
|
|
}
|
||
|
|
const static struct rt_pin_ops _fm33_pin_ops =
|
||
|
|
{
|
||
|
|
fm33_pin_mode,
|
||
|
|
fm33_pin_write,
|
||
|
|
fm33_pin_read,
|
||
|
|
fm33_pin_attach_irq,
|
||
|
|
fm33_pin_dettach_irq,
|
||
|
|
fm33_pin_irq_enable,
|
||
|
|
fm33_pin_get,
|
||
|
|
};
|
||
|
|
|
||
|
|
rt_inline void pin_irq_hdr(int irqno)
|
||
|
|
{
|
||
|
|
if (pin_irq_hdr_tab[irqno].hdr)
|
||
|
|
{
|
||
|
|
pin_irq_hdr_tab[irqno].hdr(pin_irq_hdr_tab[irqno].args);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
void GPIO_IRQHandler(void)
|
||
|
|
{
|
||
|
|
rt_interrupt_enter();
|
||
|
|
for (uint8_t extinum = 0; extinum < 16; ++extinum)
|
||
|
|
{
|
||
|
|
if (FL_GPIO_IsActiveFlag_EXTI(GPIO, 0x1U << extinum))
|
||
|
|
{
|
||
|
|
FL_GPIO_ClearFlag_EXTI(GPIO, 0x1U << extinum);
|
||
|
|
pin_irq_hdr(extinum);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
rt_interrupt_leave();
|
||
|
|
}
|
||
|
|
|
||
|
|
int rt_hw_pin_init(void)
|
||
|
|
{
|
||
|
|
return rt_device_pin_register("pin", &_fm33_pin_ops, RT_NULL);
|
||
|
|
}
|
||
|
|
|
||
|
|
#endif /* RT_USING_PIN */
|