277 lines
11 KiB
C
277 lines
11 KiB
C
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/*
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* Copyright (c) 2012, Freescale Semiconductor, Inc.
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* All rights reserved.
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*
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* THIS SOFTWARE IS PROVIDED BY FREESCALE "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
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* SHALL FREESCALE BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
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* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
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* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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* OF SUCH DAMAGE.
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*/
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/*
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* WARNING! DO NOT EDIT THIS FILE DIRECTLY!
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*
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* This file was generated automatically and any changes may be lost.
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*/
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#ifndef __HW_SPBA_REGISTERS_H__
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#define __HW_SPBA_REGISTERS_H__
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#include "regs.h"
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/*
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* i.MX6UL SPBA
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*
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* Temperature Monitor
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*
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* Registers defined in this header file:
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* - HW_SPBA_PRRn - Peripheral Rights Register
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*
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* - hw_spba_t - Struct containing all module registers.
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*/
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//! @name Module base addresses
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//@{
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#ifndef REGS_SPBA_BASE
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#define HW_SPBA_INSTANCE_COUNT (1) //!< Number of instances of the SPBA module.
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#define REGS_SPBA_BASE (0x0203c000) //!< Base address for SPBA.
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#endif
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//@}
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//-------------------------------------------------------------------------------------------
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// HW_SPBA_PRRn - Peripheral Rights Register
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//-------------------------------------------------------------------------------------------
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#ifndef __LANGUAGE_ASM__
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/*!
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* @brief HW_SPBA_PRRn - Peripheral Rights Register (RW)
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*
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* Reset value: 0x00000007
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*
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* This register controls master ownership and access for a peripheral.
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*/
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typedef union _hw_spba_prrn
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{
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reg32_t U;
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struct _hw_spba_prrn_bitfields
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{
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unsigned RARA : 1; //!< [0] Resource Access Right.
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unsigned RARB : 1; //!< [1] Resource Access Right.
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unsigned RARC : 1; //!< [2] Resource Access Right.
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unsigned RESERVED0 : 13; //!< [15:3] Reserved
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unsigned ROI : 2; //!< [17:16] Resource Owner ID.
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unsigned RESERVED1 : 12; //!< [29:18] Reserved
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unsigned RMO : 2; //!< [31:30] Requesting Master Owner.
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} B;
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} hw_spba_prrn_t;
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#endif
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/*!
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* @name Constants and macros for entire SPBA_PRRn register
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*/
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//@{
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//! @brief Number of instances of the SPBA_PRRn register.
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#define HW_SPBA_PRRn_COUNT (32)
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#define HW_SPBA_PRRn_ADDR(n) (REGS_SPBA_BASE + 0x0 + (0x4 * (n)))
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#ifndef __LANGUAGE_ASM__
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#define HW_SPBA_PRRn(n) (*(volatile hw_spba_prrn_t *) HW_SPBA_PRRn_ADDR(n))
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#define HW_SPBA_PRRn_RD(n) (HW_SPBA_PRRn(n).U)
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#define HW_SPBA_PRRn_WR(n, v) (HW_SPBA_PRRn(n).U = (v))
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#define HW_SPBA_PRRn_SET(n, v) (HW_SPBA_PRRn_WR(n, HW_SPBA_PRRn_RD(n) | (v)))
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#define HW_SPBA_PRRn_CLR(n, v) (HW_SPBA_PRRn_WR(n, HW_SPBA_PRRn_RD(n) & ~(v)))
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#define HW_SPBA_PRRn_TOG(n, v) (HW_SPBA_PRRn_WR(n, HW_SPBA_PRRn_RD(n) ^ (v)))
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#endif
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//@}
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/*
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* constants & macros for individual SPBA_PRRn bitfields
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*/
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/*! @name Register SPBA_PRRn, field RARA[0] (RW)
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*
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* Resource Access Right. Control and Status bit for master A. This field indicates whether master A
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* can access the peripheral. From 0 up to 3 masters can have permission to access a resource (all
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* the master can be granted on a peripheral, but only one access at a time will be granted by
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* SPBA).
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*
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* Values:
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* - PROHIBITED = 0 - Access to peripheral is not allowed.
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* - ALLOWED = 1 - Access to peripheral is granted.
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*/
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//@{
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#define BP_SPBA_PRRn_RARA (0) //!< Bit position for SPBA_PRRn_RARA.
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#define BM_SPBA_PRRn_RARA (0x00000001) //!< Bit mask for SPBA_PRRn_RARA.
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//! @brief Get value of SPBA_PRRn_RARA from a register value.
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#define BG_SPBA_PRRn_RARA(r) ((__REG_VALUE_TYPE((r), reg32_t) & BM_SPBA_PRRn_RARA) >> BP_SPBA_PRRn_RARA)
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//! @brief Format value for bitfield SPBA_PRRn_RARA.
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#define BF_SPBA_PRRn_RARA(v) ((__REG_VALUE_TYPE((v), reg32_t) << BP_SPBA_PRRn_RARA) & BM_SPBA_PRRn_RARA)
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#ifndef __LANGUAGE_ASM__
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//! @brief Set the RARA field to a new value.
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#define BW_SPBA_PRRn_RARA(n, v) (HW_SPBA_PRRn_WR(n, (HW_SPBA_PRRn_RD(n) & ~BM_SPBA_PRRn_RARA) | BF_SPBA_PRRn_RARA(v)))
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#endif
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//! @brief Macro to simplify usage of value macros.
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#define BF_SPBA_PRRn_RARA_V(v) BF_SPBA_PRRn_RARA(BV_SPBA_PRRn_RARA__##v)
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#define BV_SPBA_PRRn_RARA__PROHIBITED (0x0) //!< Access to peripheral is not allowed.
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#define BV_SPBA_PRRn_RARA__ALLOWED (0x1) //!< Access to peripheral is granted.
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//@}
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/*! @name Register SPBA_PRRn, field RARB[1] (RW)
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*
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* Resource Access Right. Control and Status bit for master B. This field indicates whether master B
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* can access the peripheral. From 0 up to 3 masters can have permission to access a resource (all
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* the master can be granted on a peripheral, but only one access at a time will be granted by
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* SPBA).
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*
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* Values:
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* - PROHIBITED = 0 - Access to peripheral is not allowed.
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* - ALLOWED = 1 - Access to peripheral is granted.
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*/
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//@{
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#define BP_SPBA_PRRn_RARB (1) //!< Bit position for SPBA_PRRn_RARB.
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#define BM_SPBA_PRRn_RARB (0x00000002) //!< Bit mask for SPBA_PRRn_RARB.
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//! @brief Get value of SPBA_PRRn_RARB from a register value.
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#define BG_SPBA_PRRn_RARB(r) ((__REG_VALUE_TYPE((r), reg32_t) & BM_SPBA_PRRn_RARB) >> BP_SPBA_PRRn_RARB)
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//! @brief Format value for bitfield SPBA_PRRn_RARB.
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#define BF_SPBA_PRRn_RARB(v) ((__REG_VALUE_TYPE((v), reg32_t) << BP_SPBA_PRRn_RARB) & BM_SPBA_PRRn_RARB)
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#ifndef __LANGUAGE_ASM__
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//! @brief Set the RARB field to a new value.
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#define BW_SPBA_PRRn_RARB(n, v) (HW_SPBA_PRRn_WR(n, (HW_SPBA_PRRn_RD(n) & ~BM_SPBA_PRRn_RARB) | BF_SPBA_PRRn_RARB(v)))
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#endif
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//! @brief Macro to simplify usage of value macros.
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#define BF_SPBA_PRRn_RARB_V(v) BF_SPBA_PRRn_RARB(BV_SPBA_PRRn_RARB__##v)
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#define BV_SPBA_PRRn_RARB__PROHIBITED (0x0) //!< Access to peripheral is not allowed.
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#define BV_SPBA_PRRn_RARB__ALLOWED (0x1) //!< Access to peripheral is granted.
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//@}
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/*! @name Register SPBA_PRRn, field RARC[2] (RW)
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*
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* Resource Access Right. Control and Status bit for master C. This field indicates whether master C
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* can access the peripheral. From 0 up to 3 masters can have permission to access a resource (all
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* the master can be granted on a peripheral, but only one access at a time will be granted by
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* SPBA).
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*
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* Values:
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* - PROHIBITED = 0 - Access to peripheral is not allowed.
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* - ALLOWED = 1 - Access to peripheral is granted.
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*/
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//@{
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#define BP_SPBA_PRRn_RARC (2) //!< Bit position for SPBA_PRRn_RARC.
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#define BM_SPBA_PRRn_RARC (0x00000004) //!< Bit mask for SPBA_PRRn_RARC.
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//! @brief Get value of SPBA_PRRn_RARC from a register value.
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#define BG_SPBA_PRRn_RARC(r) ((__REG_VALUE_TYPE((r), reg32_t) & BM_SPBA_PRRn_RARC) >> BP_SPBA_PRRn_RARC)
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//! @brief Format value for bitfield SPBA_PRRn_RARC.
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#define BF_SPBA_PRRn_RARC(v) ((__REG_VALUE_TYPE((v), reg32_t) << BP_SPBA_PRRn_RARC) & BM_SPBA_PRRn_RARC)
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#ifndef __LANGUAGE_ASM__
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//! @brief Set the RARC field to a new value.
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#define BW_SPBA_PRRn_RARC(n, v) (HW_SPBA_PRRn_WR(n, (HW_SPBA_PRRn_RD(n) & ~BM_SPBA_PRRn_RARC) | BF_SPBA_PRRn_RARC(v)))
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#endif
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//! @brief Macro to simplify usage of value macros.
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#define BF_SPBA_PRRn_RARC_V(v) BF_SPBA_PRRn_RARC(BV_SPBA_PRRn_RARC__##v)
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#define BV_SPBA_PRRn_RARC__PROHIBITED (0x0) //!< Access to peripheral is not allowed.
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#define BV_SPBA_PRRn_RARC__ALLOWED (0x1) //!< Access to peripheral is granted.
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//@}
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/*! @name Register SPBA_PRRn, field ROI[17:16] (RO)
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*
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* Resource Owner ID. This field indicates which master (one at a time) can access to the PRR for
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* rights modification. This is a read-only register. After reset, ROI bits are cleared ("00" -> un-
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* owned resource). A master performing a write access to the an un-owned PRR will get its ID
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* automatically written into ROI, while modifying RARx bits. It can then read back the RMO, RAR,
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* ROI bits to make sure RMO returns the right value, ROI bits contain its ID and RARx bits are
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* correctly asserted. Then no other master (whom ID is different from the one stored in ROI) will
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* be able to modify RAR fields. Owner master of a peripheral can assert its dead_owner signal, or
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* write 1'b0 in the RARx to release the ownership (ROI[1:0] reset to 2'b0).
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*
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* Values:
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* - UNOWNED = 00 - Unowned resource.
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* - MASTER_A = 01 - The resource is owned by master A port.
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* - MASTER_B = 10 - The resource is owned by master B port.
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* - MASTER_C = 11 - The resource is owned by master C port.
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*/
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//@{
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#define BP_SPBA_PRRn_ROI (16) //!< Bit position for SPBA_PRRn_ROI.
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#define BM_SPBA_PRRn_ROI (0x00030000) //!< Bit mask for SPBA_PRRn_ROI.
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//! @brief Get value of SPBA_PRRn_ROI from a register value.
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#define BG_SPBA_PRRn_ROI(r) ((__REG_VALUE_TYPE((r), reg32_t) & BM_SPBA_PRRn_ROI) >> BP_SPBA_PRRn_ROI)
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//! @brief Macro to simplify usage of value macros.
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#define BF_SPBA_PRRn_ROI_V(v) BF_SPBA_PRRn_ROI(BV_SPBA_PRRn_ROI__##v)
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#define BV_SPBA_PRRn_ROI__UNOWNED (0x0) //!< Unowned resource.
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#define BV_SPBA_PRRn_ROI__MASTER_A (0x1) //!< The resource is owned by master A port.
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#define BV_SPBA_PRRn_ROI__MASTER_B (0x2) //!< The resource is owned by master B port.
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#define BV_SPBA_PRRn_ROI__MASTER_C (0x3) //!< The resource is owned by master C port.
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//@}
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/*! @name Register SPBA_PRRn, field RMO[31:30] (RO)
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*
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* Requesting Master Owner. This 2-bit register field indicates if the corresponding resource is
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* owned by the requesting master or not. This register is reset to 2'b0 if ROI = 2'b0.
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*
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* Values:
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* - UNOWNED = 00 - The resource is unowned.
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* - 01 - Reserved.
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* - ANOTHER_MASTER = 10 - The resource is owned by another master.
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* - REQUESTING_MASTER = 11 - The resource is owned by the requesting master.
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*/
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//@{
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#define BP_SPBA_PRRn_RMO (30) //!< Bit position for SPBA_PRRn_RMO.
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#define BM_SPBA_PRRn_RMO (0xc0000000) //!< Bit mask for SPBA_PRRn_RMO.
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//! @brief Get value of SPBA_PRRn_RMO from a register value.
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#define BG_SPBA_PRRn_RMO(r) ((__REG_VALUE_TYPE((r), reg32_t) & BM_SPBA_PRRn_RMO) >> BP_SPBA_PRRn_RMO)
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//! @brief Macro to simplify usage of value macros.
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#define BF_SPBA_PRRn_RMO_V(v) BF_SPBA_PRRn_RMO(BV_SPBA_PRRn_RMO__##v)
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#define BV_SPBA_PRRn_RMO__UNOWNED (0x0) //!< The resource is unowned.
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#define BV_SPBA_PRRn_RMO__ANOTHER_MASTER (0x2) //!< The resource is owned by another master.
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#define BV_SPBA_PRRn_RMO__REQUESTING_MASTER (0x3) //!< The resource is owned by the requesting master.
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//@}
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//-------------------------------------------------------------------------------------------
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// hw_spba_t - module struct
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//-------------------------------------------------------------------------------------------
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/*!
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* @brief All SPBA module registers.
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*/
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#ifndef __LANGUAGE_ASM__
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#pragma pack(1)
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typedef struct _hw_spba
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{
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volatile hw_spba_prrn_t PRRn[32]; //!< Peripheral Rights Register
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} hw_spba_t;
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#pragma pack()
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//! @brief Macro to access all SPBA registers.
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//! @return Reference (not a pointer) to the registers struct. To get a pointer to the struct,
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//! use the '&' operator, like <code>&HW_SPBA</code>.
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#define HW_SPBA (*(hw_spba_t *) REGS_SPBA_BASE)
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#endif
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#endif // __HW_SPBA_REGISTERS_H__
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// v18/121106/1.2.2
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// EOF
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