569 lines
17 KiB
C
569 lines
17 KiB
C
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/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-06-16 songchao support emac driver
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* 2021-06-29 songchao add phy link detect
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* 2021-08-13 songchao support dual mac and reduse copy
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*/
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#include "drv_eth.h"
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#define DBG_TAG "drv.enet"
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#define DBG_LVL DBG_LOG
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#include <rtdbg.h>
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#define BSP_USING_IMX6ULL_ART_PI
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#if (defined(RT_USING_ENET1)) || (defined(RT_USING_ENET2))
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#ifdef BSP_USING_IMX6ULL_ART_PI
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static struct imx6ull_iomuxc mdio_gpio[2] =
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{
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{IOMUXC_GPIO1_IO06_ENET1_MDIO,0U,0xB029},
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{IOMUXC_GPIO1_IO07_ENET1_MDC,0U,0xB0E9}
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};
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#else
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static struct imx6ull_iomuxc mdio_gpio[2] =
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{
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{IOMUXC_GPIO1_IO06_ENET2_MDIO,0U,0xB029},
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{IOMUXC_GPIO1_IO07_ENET2_MDC,0U,0xB0E9},
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};
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#endif
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enum
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{
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#ifdef RT_USING_ENET1
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DEV_ENET1,
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#endif
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#ifdef RT_USING_ENET2
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DEV_ENET2,
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#endif
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DEV_ENET_MAX,
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};
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static struct rt_imx6ul_ethps _imx6ul_eth_device[DEV_ENET_MAX] =
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{
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#ifdef RT_USING_ENET1
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{
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.dev_addr = {0xa8,0x5e,0x45,0x91,0x92,0x93},
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.mac_name = "e1",
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.irq_name = "emac1_intr",
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.enet_phy_base_addr = ENET1,
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.irq_num = IMX_INT_ENET1,
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.phy_num = ENET_PHY1,
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.mac_num = 1,
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.phy_base_addr = GPIO5,
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.phy_gpio_pin = 9,
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.phy_id = 7,
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.buffConfig =
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{
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ENET_RXBD_NUM,
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ENET_TXBD_NUM,
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ENET_RXBUFF_ALIGN_SIZE,
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ENET_TXBUFF_ALIGN_SIZE,
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RT_NULL,
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RT_NULL,
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RT_NULL,
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RT_NULL,
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RT_NULL,
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RT_NULL,
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RT_NULL,
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RT_NULL,
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ENET_RXBUFF_TOTAL_SIZE,
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ENET_TXBUFF_TOTAL_SIZE
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},
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.gpio =
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{
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{IOMUXC_SNVS_SNVS_TAMPER9_GPIO5_IO09,0U,0x110B0},
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{IOMUXC_ENET1_RX_DATA0_ENET1_RDATA00,0U,0xB0E9},
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{IOMUXC_ENET1_RX_DATA1_ENET1_RDATA01,0U,0xB0E9},
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{IOMUXC_ENET1_RX_EN_ENET1_RX_EN,0U,0xB0E9},
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{IOMUXC_ENET1_RX_ER_ENET1_RX_ER,0U,0xB0E9},
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{IOMUXC_ENET1_TX_CLK_ENET1_REF_CLK1,1U,0x00F0},
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{IOMUXC_ENET1_TX_DATA0_ENET1_TDATA00,0U,0xB0E9},
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{IOMUXC_ENET1_TX_DATA1_ENET1_TDATA01,0U,0xB0E9},
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{IOMUXC_ENET1_TX_EN_ENET1_TX_EN,0U,0xB0E9}
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}
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},
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#endif
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#ifdef RT_USING_ENET2
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{
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.dev_addr = {0xa8,0x5e,0x45,0x01,0x02,0x03},
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.mac_name = "e2",
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.irq_name = "emac2_intr",
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.enet_phy_base_addr = ENET2,
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.irq_num = IMX_INT_ENET2,
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.phy_num = ENET_PHY2,
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.mac_num = 2,
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.phy_base_addr = GPIO5,
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.phy_gpio_pin = 6,
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.phy_id = 7,
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.buffConfig =
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{
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ENET_RXBD_NUM,
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ENET_TXBD_NUM,
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ENET_RXBUFF_ALIGN_SIZE,
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ENET_TXBUFF_ALIGN_SIZE,
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RT_NULL,
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RT_NULL,
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RT_NULL,
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RT_NULL,
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RT_NULL,
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RT_NULL,
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RT_NULL,
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RT_NULL,
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ENET_RXBUFF_TOTAL_SIZE,
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ENET_TXBUFF_TOTAL_SIZE
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},
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.gpio =
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{
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{IOMUXC_SNVS_SNVS_TAMPER6_GPIO5_IO06,0U,0x110B0},
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{IOMUXC_ENET2_RX_DATA0_ENET2_RDATA00,0U,0xB0E9},
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{IOMUXC_ENET2_RX_DATA1_ENET2_RDATA01,0U,0xB0E9},
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{IOMUXC_ENET2_RX_EN_ENET2_RX_EN,0U,0xB0E9},
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{IOMUXC_ENET2_RX_ER_ENET2_RX_ER,0U,0xB0E9},
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{IOMUXC_ENET2_TX_CLK_ENET2_REF_CLK2,1U,0x00F0},
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{IOMUXC_ENET2_TX_DATA0_ENET2_TDATA00,0U,0xB0E9},
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{IOMUXC_ENET2_TX_DATA1_ENET2_TDATA01,0U,0xB0E9},
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{IOMUXC_ENET2_TX_EN_ENET2_TX_EN,0U,0xB0E9}
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}
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},
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#endif
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};
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void imx6ul_eth_link_change(struct rt_imx6ul_ethps *imx6ul_device,rt_bool_t up)
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{
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if(up)
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{
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LOG_D("enet%d link up",imx6ul_device->mac_num);
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eth_device_linkchange(&imx6ul_device->parent, RT_TRUE);
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imx6ul_device->phy_link_status = RT_TRUE;
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}
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else
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{
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LOG_D("enet%d link down",imx6ul_device->mac_num);
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eth_device_linkchange(&imx6ul_device->parent, RT_FALSE);
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imx6ul_device->phy_link_status = RT_FALSE;
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}
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}
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void ENET_InitModuleClock(void)
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{
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const clock_enet_pll_config_t config = {true, true, false, 1, 1};
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CLOCK_InitEnetPll(&config);
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}
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rt_err_t enet_buffer_init(enet_buffer_config_t *buffConfig)
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{
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void *tx_buff_addr = RT_NULL;
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void *rx_buff_addr = RT_NULL;
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void *tx_bd_addr = RT_NULL;
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void *rx_bd_addr = RT_NULL;
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if(((SYS_PAGE_SIZE<<RX_BUFFER_INDEX_NUM)<buffConfig->rxBufferTotalSize)||
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((SYS_PAGE_SIZE<<TX_BUFFER_INDEX_NUM)<buffConfig->txBufferTotalSize))
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{
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LOG_E("ERROR: alloc mem not enough for enet driver");
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return RT_ERROR;
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}
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rx_buff_addr = rt_pages_alloc(RX_BUFFER_INDEX_NUM);
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if(!rx_buff_addr)
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{
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LOG_E("ERROR: rx buff page alloc failed");
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return RT_ERROR;
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}
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buffConfig->rxBufferAlign = (void *)rt_ioremap_nocache(virtual_to_physical(rx_buff_addr), (SYS_PAGE_SIZE<<RX_BUFFER_INDEX_NUM));
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buffConfig->rxPhyBufferAlign = (void *)virtual_to_physical(rx_buff_addr);
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tx_buff_addr = rt_pages_alloc(TX_BUFFER_INDEX_NUM);
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if(!tx_buff_addr)
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{
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LOG_E("ERROR: tx buff page alloc failed");
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return RT_ERROR;
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}
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buffConfig->txBufferAlign = (void *)rt_ioremap_nocache(virtual_to_physical(tx_buff_addr), (SYS_PAGE_SIZE<<TX_BUFFER_INDEX_NUM));
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buffConfig->txPhyBufferAlign = (void *)virtual_to_physical(tx_buff_addr);
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rx_bd_addr = rt_pages_alloc(RX_BD_INDEX_NUM);
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if(!rx_bd_addr)
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{
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LOG_E("ERROR: rx bd page alloc failed");
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return RT_ERROR;
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}
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buffConfig->rxBdStartAddrAlign = (void *)rt_ioremap_nocache(virtual_to_physical(rx_bd_addr), (SYS_PAGE_SIZE<<RX_BD_INDEX_NUM));
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buffConfig->rxPhyBdStartAddrAlign = virtual_to_physical(rx_bd_addr);
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tx_bd_addr = rt_pages_alloc(TX_BD_INDEX_NUM);
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if(!tx_bd_addr)
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{
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LOG_E("ERROR: tx bd page alloc failed");
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return RT_ERROR;
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}
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buffConfig->txBdStartAddrAlign = (void *)rt_ioremap_nocache(virtual_to_physical(tx_bd_addr), (SYS_PAGE_SIZE<<TX_BD_INDEX_NUM));
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buffConfig->txPhyBdStartAddrAlign = virtual_to_physical(tx_bd_addr);
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return RT_EOK;
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}
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/* EMAC initialization function */
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static rt_err_t rt_imx6ul_eth_init(rt_device_t dev)
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{
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rt_err_t state;
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struct rt_imx6ul_ethps *imx6ul_device = (struct rt_imx6ul_ethps *)dev;
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ENET_Type *base_addr = RT_NULL;
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enet_config_t *config;
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enet_handle_t *handle;
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enet_buffer_config_t *buffConfig;
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rt_uint32_t reg_value;
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imx6ul_device->enet_virtual_base_addr = (ENET_Type *)rt_ioremap((void *)imx6ul_device->enet_phy_base_addr,SYS_PAGE_SIZE);
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base_addr = imx6ul_device->enet_virtual_base_addr;
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config = &imx6ul_device->config;
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handle = &imx6ul_device->handle;
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buffConfig = &imx6ul_device->buffConfig;
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for (int i=0; i<GET_ARRAY_NUM(imx6ul_device->gpio); i++)
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{
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imx6ull_gpio_init(&imx6ul_device->gpio[i]);
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}
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IOMUXC_GPR_Type *GPR1 = (IOMUXC_GPR_Type *)rt_ioremap((void *)IOMUXC_GPR,0x1000);
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if(imx6ul_device->mac_num == 1)
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{
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reg_value = GPR1->GPR1;
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reg_value &= ~(IOMUXC_GPR_GPR1_ENET1_CLK_SEL_MASK
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| IOMUXC_GPR_GPR1_ENET1_CLK_SEL_MASK);
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reg_value |= IOMUXC_GPR_GPR1_ENET1_TX_CLK_DIR(1);
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reg_value |= IOMUXC_GPR_GPR1_ENET1_CLK_SEL(0);
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GPR1->GPR1 = reg_value;
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}
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else if(imx6ul_device->mac_num == 2)
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{
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reg_value = GPR1->GPR1;
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reg_value &= ~(IOMUXC_GPR_GPR1_ENET2_CLK_SEL_MASK
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| IOMUXC_GPR_GPR1_ENET2_CLK_SEL_MASK);
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reg_value |= IOMUXC_GPR_GPR1_ENET2_TX_CLK_DIR(1);
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reg_value |= IOMUXC_GPR_GPR1_ENET2_CLK_SEL(0);
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GPR1->GPR1 = reg_value;
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}
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ENET_InitModuleClock();
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ENET_GetDefaultConfig(config);
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config->interrupt |= (ENET_RX_INTERRUPT);
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state = enet_buffer_init(buffConfig);
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if(state != RT_EOK)
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{
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return state;
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}
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ENET_Init(base_addr, handle, config, buffConfig, &imx6ul_device->dev_addr[0], SYS_CLOCK_HZ);
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ENET_ActiveRead(base_addr);
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rt_hw_interrupt_install(imx6ul_device->irq_num, (rt_isr_handler_t)ENET_DriverIRQHandler, (void *)base_addr,imx6ul_device->irq_name);
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rt_hw_interrupt_umask(imx6ul_device->irq_num);
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return RT_EOK;
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}
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static rt_err_t rt_imx6ul_eth_control(rt_device_t dev, int cmd, void *args)
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{
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struct rt_imx6ul_ethps *imx6ul_device = (struct rt_imx6ul_ethps *)dev;
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switch (cmd)
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{
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case NIOCTL_GADDR:
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/* get MAC address */
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if (args)
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{
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OCOTP_Type *ocotp_base;
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rt_uint32_t uid[2];
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rt_uint32_t uid_crc = 0;
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ocotp_base = (OCOTP_Type *)rt_ioremap((void*)OCOTP_BASE, 0x1000);
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uid[0] = ocotp_base->CFG0;
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uid[1] = ocotp_base->CFG1;
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rt_iounmap(ocotp_base);
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LOG_D("UNIQUE_ID is %x%x",uid[0], uid[1]);
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uid_crc = uid[0] - uid[1];
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LOG_D("UNIQUE_ID change to 32 bits %x", uid_crc);
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if (imx6ul_device->enet_phy_base_addr == ENET1)
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{
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imx6ul_device->dev_addr[0] = 0xa8;
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imx6ul_device->dev_addr[1] = 0x5e;
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imx6ul_device->dev_addr[2] = 0x45;
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imx6ul_device->dev_addr[3] = (uid_crc>>16) & 0x7f;
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imx6ul_device->dev_addr[4] = (uid_crc>>8) & 0xff;
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imx6ul_device->dev_addr[5] = uid_crc & 0xff;
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}
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else /*if (imx6ul_device->enet_phy_base_addr == ENET2)*/
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{
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imx6ul_device->dev_addr[0] = 0xa8;
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imx6ul_device->dev_addr[1] = 0x5e;
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imx6ul_device->dev_addr[2] = 0x46;
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imx6ul_device->dev_addr[3] = (uid_crc >> 16) & 0x7f;
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imx6ul_device->dev_addr[4] = (uid_crc >> 8) & 0xff;
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imx6ul_device->dev_addr[5] = uid_crc & 0xff;
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}
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rt_memcpy(args, imx6ul_device->dev_addr, MAX_ADDR_LEN);
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}
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else
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{
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return -RT_ERROR;
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}
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break;
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default :
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break;
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||
|
|
}
|
||
|
|
return RT_EOK;
|
||
|
|
}
|
||
|
|
|
||
|
|
static status_t read_data_from_eth(rt_device_t dev,void *read_data,uint16_t *read_length)
|
||
|
|
{
|
||
|
|
status_t status = 0;
|
||
|
|
uint16_t length = 0;
|
||
|
|
ENET_Type *base_addr = RT_NULL;
|
||
|
|
enet_config_t *config;
|
||
|
|
enet_handle_t *handle;
|
||
|
|
enet_buffer_config_t *buffConfig;
|
||
|
|
struct rt_imx6ul_ethps *imx6ul_device = (struct rt_imx6ul_ethps *)dev;
|
||
|
|
base_addr = imx6ul_device->enet_virtual_base_addr;
|
||
|
|
config = &imx6ul_device->config;
|
||
|
|
handle = &imx6ul_device->handle;
|
||
|
|
buffConfig = &imx6ul_device->buffConfig;
|
||
|
|
/* Get the Frame size */
|
||
|
|
status = ENET_ReadFrame(base_addr,handle,config,read_data,&length);
|
||
|
|
if((status == kStatus_ENET_RxFrameEmpty)||(status == kStatus_ENET_RxFrameError))
|
||
|
|
{
|
||
|
|
ENET_EnableInterrupts(base_addr,ENET_RX_INTERRUPT);
|
||
|
|
if(status == kStatus_ENET_RxFrameError)
|
||
|
|
{
|
||
|
|
/*recv error happend reinitialize mac*/
|
||
|
|
ENET_Init(base_addr, handle, config, buffConfig, &imx6ul_device->dev_addr[0], SYS_CLOCK_HZ);
|
||
|
|
ENET_ActiveRead(base_addr);
|
||
|
|
return kStatus_ENET_RxFrameError;
|
||
|
|
}
|
||
|
|
else if(status == kStatus_ENET_RxFrameEmpty)
|
||
|
|
{
|
||
|
|
return kStatus_ENET_RxFrameEmpty;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
*read_length = length;
|
||
|
|
return status;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* transmit data*/
|
||
|
|
rt_err_t rt_imx6ul_eth_tx(rt_device_t dev, struct pbuf *p)
|
||
|
|
{
|
||
|
|
rt_err_t ret = RT_ERROR;
|
||
|
|
struct pbuf *q = RT_NULL;
|
||
|
|
uint16_t offset = 0;
|
||
|
|
uint32_t last_flag = 0;
|
||
|
|
status_t status;
|
||
|
|
ENET_Type *base_addr = RT_NULL;
|
||
|
|
enet_handle_t *handle;
|
||
|
|
struct rt_imx6ul_ethps *imx6ul_device = (struct rt_imx6ul_ethps *)dev;
|
||
|
|
base_addr = imx6ul_device->enet_virtual_base_addr;
|
||
|
|
handle = &imx6ul_device->handle;
|
||
|
|
RT_ASSERT(p);
|
||
|
|
|
||
|
|
for(q = p;q != RT_NULL;q=q->next)
|
||
|
|
{
|
||
|
|
if(q->next == RT_NULL)
|
||
|
|
{
|
||
|
|
last_flag = 1;
|
||
|
|
}
|
||
|
|
else
|
||
|
|
{
|
||
|
|
last_flag = 0;
|
||
|
|
}
|
||
|
|
status = ENET_SendFrame(base_addr, handle, q->payload, q->len,last_flag);
|
||
|
|
offset = offset + q->len;
|
||
|
|
if(status == kStatus_Success)
|
||
|
|
{
|
||
|
|
}
|
||
|
|
else
|
||
|
|
{
|
||
|
|
return RT_ERROR;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
if(offset > ENET_FRAME_MAX_FRAMELEN)
|
||
|
|
{
|
||
|
|
LOG_E("net error send length %d exceed max length",offset);
|
||
|
|
}
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
struct pbuf *rt_imx6ul_eth_rx(rt_device_t dev)
|
||
|
|
{
|
||
|
|
static struct pbuf *p_s = RT_NULL;
|
||
|
|
struct pbuf *p = RT_NULL;
|
||
|
|
status_t status;
|
||
|
|
uint16_t length = 0;
|
||
|
|
|
||
|
|
if(p_s == RT_NULL)
|
||
|
|
{
|
||
|
|
p_s = pbuf_alloc(PBUF_RAW, ENET_FRAME_MAX_FRAMELEN, PBUF_POOL);
|
||
|
|
if(p_s == RT_NULL)
|
||
|
|
{
|
||
|
|
return RT_NULL;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
p = p_s;
|
||
|
|
status = read_data_from_eth(dev,p->payload,&length);
|
||
|
|
if(status == kStatus_ENET_RxFrameEmpty)
|
||
|
|
{
|
||
|
|
return RT_NULL;
|
||
|
|
}
|
||
|
|
else if(status == kStatus_ENET_RxFrameError)
|
||
|
|
{
|
||
|
|
return RT_NULL;
|
||
|
|
}
|
||
|
|
if(length > ENET_FRAME_MAX_FRAMELEN)
|
||
|
|
{
|
||
|
|
LOG_E("net error recv length %d exceed max length",length);
|
||
|
|
return RT_NULL;
|
||
|
|
}
|
||
|
|
pbuf_realloc(p, length);
|
||
|
|
p_s = RT_NULL;
|
||
|
|
return p;
|
||
|
|
}
|
||
|
|
|
||
|
|
int32_t get_instance_by_base(void *base)
|
||
|
|
{
|
||
|
|
int32_t i = 0;
|
||
|
|
int32_t instance = 0;
|
||
|
|
for(i = 0; i < DEV_ENET_MAX; i ++)
|
||
|
|
{
|
||
|
|
if((void *)_imx6ul_eth_device[i].enet_virtual_base_addr == base)
|
||
|
|
{
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
if(i == DEV_ENET_MAX)
|
||
|
|
{
|
||
|
|
return -1;
|
||
|
|
}
|
||
|
|
return instance;
|
||
|
|
|
||
|
|
}
|
||
|
|
void rx_enet_callback(void *base)
|
||
|
|
{
|
||
|
|
int32_t instance = 0;
|
||
|
|
instance = get_instance_by_base(base);
|
||
|
|
if(instance == -1)
|
||
|
|
{
|
||
|
|
LOG_E("interrput match base addr error");
|
||
|
|
return;
|
||
|
|
}
|
||
|
|
eth_device_ready(&(_imx6ul_eth_device[instance].parent));
|
||
|
|
ENET_DisableInterrupts(base,ENET_RX_INTERRUPT);
|
||
|
|
}
|
||
|
|
|
||
|
|
void tx_enet_callback(void *base)
|
||
|
|
{
|
||
|
|
ENET_DisableInterrupts(base,ENET_TX_INTERRUPT);
|
||
|
|
}
|
||
|
|
|
||
|
|
/*phy link detect thread*/
|
||
|
|
static void phy_detect_thread_entry(void *param)
|
||
|
|
{
|
||
|
|
bool link = false;
|
||
|
|
phy_speed_t speed;
|
||
|
|
phy_duplex_t duplex;
|
||
|
|
ENET_Type *base_addr = RT_NULL;
|
||
|
|
struct rt_imx6ul_ethps *imx6ul_device = (struct rt_imx6ul_ethps *)param;
|
||
|
|
base_addr = imx6ul_device->enet_virtual_base_addr;
|
||
|
|
|
||
|
|
phy_reset(imx6ul_device->phy_base_addr,imx6ul_device->phy_gpio_pin);
|
||
|
|
PHY_Init(base_addr, imx6ul_device->phy_num, SYS_CLOCK_HZ,imx6ul_device->phy_id);
|
||
|
|
PHY_GetLinkStatus(base_addr, imx6ul_device->phy_num, &link);
|
||
|
|
if (link)
|
||
|
|
{
|
||
|
|
/* Get the actual PHY link speed. */
|
||
|
|
PHY_GetLinkSpeedDuplex(base_addr, imx6ul_device->phy_num, &speed, &duplex);
|
||
|
|
/* Change the MII speed and duplex for actual link status. */
|
||
|
|
imx6ul_device->config.miiSpeed = (enet_mii_speed_t)speed;
|
||
|
|
imx6ul_device->config.miiDuplex = (enet_mii_duplex_t)duplex;
|
||
|
|
}
|
||
|
|
else
|
||
|
|
{
|
||
|
|
LOG_W("PHY Link down, please check the cable connection and link partner setting.");
|
||
|
|
}
|
||
|
|
|
||
|
|
while(1)
|
||
|
|
{
|
||
|
|
PHY_GetLinkStatus(base_addr, imx6ul_device->phy_num, &link);
|
||
|
|
if(link != imx6ul_device->phy_link_status)
|
||
|
|
{
|
||
|
|
if(link == true)
|
||
|
|
{
|
||
|
|
PHY_StartNegotiation(base_addr,imx6ul_device->phy_num);
|
||
|
|
|
||
|
|
}
|
||
|
|
imx6ul_eth_link_change(imx6ul_device,link);
|
||
|
|
}
|
||
|
|
rt_thread_delay(DETECT_DELAY_ONE_SECOND);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
_internal_ro struct rt_device_ops _k_enet_ops =
|
||
|
|
{
|
||
|
|
.init = rt_imx6ul_eth_init,
|
||
|
|
.control = rt_imx6ul_eth_control,
|
||
|
|
};
|
||
|
|
|
||
|
|
static int imx6ul_eth_init(void)
|
||
|
|
{
|
||
|
|
rt_err_t state = RT_EOK;
|
||
|
|
char link_detect[10];
|
||
|
|
|
||
|
|
imx6ull_gpio_init(&mdio_gpio[0]);
|
||
|
|
imx6ull_gpio_init(&mdio_gpio[1]);
|
||
|
|
|
||
|
|
for (int idx=0; idx<GET_ARRAY_NUM(_imx6ul_eth_device); idx++)
|
||
|
|
{
|
||
|
|
_imx6ul_eth_device[idx].parent.parent.ops = &_k_enet_ops;
|
||
|
|
_imx6ul_eth_device[idx].parent.eth_rx = rt_imx6ul_eth_rx;
|
||
|
|
_imx6ul_eth_device[idx].parent.eth_tx = rt_imx6ul_eth_tx;
|
||
|
|
_imx6ul_eth_device[idx].phy_link_status = RT_FALSE;
|
||
|
|
|
||
|
|
/* register eth device */
|
||
|
|
state = eth_device_init(&(_imx6ul_eth_device[idx].parent), _imx6ul_eth_device[idx].mac_name);
|
||
|
|
if (RT_EOK == state)
|
||
|
|
{
|
||
|
|
LOG_I("emac device init success");
|
||
|
|
}
|
||
|
|
else
|
||
|
|
{
|
||
|
|
LOG_E("emac device init faild: %d", state);
|
||
|
|
state = -RT_ERROR;
|
||
|
|
}
|
||
|
|
|
||
|
|
rt_sprintf(link_detect,"link_d%d",_imx6ul_eth_device[idx].mac_num);
|
||
|
|
/* start phy link detect */
|
||
|
|
rt_thread_t phy_link_tid;
|
||
|
|
phy_link_tid = rt_thread_create(link_detect,
|
||
|
|
phy_detect_thread_entry,
|
||
|
|
&_imx6ul_eth_device[idx],
|
||
|
|
4096,
|
||
|
|
RT_THREAD_PRIORITY_MAX - 2,
|
||
|
|
2);
|
||
|
|
if (phy_link_tid != RT_NULL)
|
||
|
|
{
|
||
|
|
rt_thread_startup(phy_link_tid);
|
||
|
|
}
|
||
|
|
memset(link_detect,0,sizeof(link_detect));
|
||
|
|
}
|
||
|
|
|
||
|
|
return state;
|
||
|
|
}
|
||
|
|
INIT_DEVICE_EXPORT(imx6ul_eth_init);
|
||
|
|
#endif
|