rt-thread-official/bsp/ls1cdev/libraries/ls1c_i2c.h

/*
 * Copyright (c) 2006-2018, RT-Thread Development Team
 *
 * SPDX-License-Identifier: Apache-2.0
 *
 * Change Logs:
 * Date           Author       Notes
 * 2017-09-06     <EFBFBD><EFBFBD>Ϊ<EFBFBD><EFBFBD>       first version
 */


// Ӳ<><D3B2>i2c<32>ӿڵ<D3BF>ͷ<EFBFBD>ļ<EFBFBD>

#ifndef __OPENLOONGSON_I2C_H
#define __OPENLOONGSON_I2C_H



// I2C<32><43>ʱ<EFBFBD><CAB1>Ƶ<EFBFBD><C6B5>
#define LS1C_I2C_CLOCK_DEFAULT              (100000)  // Hz. Ĭ<><C4AC>Ƶ<EFBFBD><C6B5>
#define LS1C_I2C_CLOCK_MAX                  (400000)  // Hz, max 400 Kbits/sec


// I2Cģ<43><C4A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
typedef enum
{
    LS1C_I2C_0 = 0,
    LS1C_I2C_1,
    LS1C_I2C_2
}ls1c_i2c_t;


// I2C<32><43><EFBFBD>ݴ<EFBFBD><DDB4>䷽<EFBFBD><E4B7BD>
typedef enum
{
    LS1C_I2C_DIRECTION_WRITE = 0,       // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӻ<EFBFBD>д<EFBFBD><D0B4>Ϣ
    LS1C_I2C_DIRECTION_READ,            // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӻ<EFBFBD><D3BB><EFBFBD><EFBFBD><EFBFBD>Ϣ
}ls1c_i2c_direction_t;


// Ӳ<><D3B2>I2C<32><43>Ϣ
typedef struct
{
    ls1c_i2c_t I2Cx;                    // i2cģ<63><C4A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
    unsigned long clock;                // i2cʱ<63><CAB1>Ƶ<EFBFBD>ʣ<EFBFBD><CAA3><EFBFBD>λhz
}ls1c_i2c_info_t;


// I2CӦ<43><D3A6>
typedef enum
{
    LS1C_I2C_ACK = 0,                   // <20>յ<EFBFBD>Ӧ<EFBFBD><D3A6>
    LS1C_I2C_NACK = 1,                  // û<>յ<EFBFBD>Ӧ<EFBFBD><D3A6>
}ls1c_i2c_ack_t;


// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ
typedef enum
{
    LS1C_I2C_RET_OK = 0,                // OK
    LS1C_I2C_RET_TIMEOUT,               // <20><>ʱ
}ls1c_i2c_ret_t;



/*
 * <EFBFBD><EFBFBD>ʼ<EFBFBD><EFBFBD>ָ<EFBFBD><EFBFBD>i2cģ<EFBFBD><EFBFBD>
 * @i2c_info_p ij<EFBFBD><EFBFBD>i2cģ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ
 */
void i2c_init(ls1c_i2c_info_t *i2c_info_p);


/*
 * (<EFBFBD>ٷ<EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>֮<EFBFBD><EFBFBD>)<EFBFBD><EFBFBD><EFBFBD>մӻ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>͵<EFBFBD>ACK<EFBFBD>ź<EFBFBD>
 * @i2c_info_p i2cģ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ
 * @ret LS1C_I2C_ACK or LS1C_I2C_NACK
 */
ls1c_i2c_ack_t i2c_receive_ack(ls1c_i2c_info_t *i2c_info_p);


/*
 * <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
 * @i2c_info_p i2cģ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ
 * @buf <EFBFBD><EFBFBD><EFBFBD>ݻ<EFBFBD><EFBFBD><EFBFBD>
 * @len <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵij<EFBFBD><EFBFBD><EFBFBD>
 */
ls1c_i2c_ret_t i2c_receive_data(ls1c_i2c_info_t *i2c_info_p, unsigned char *buf, int len);



/*
 * <EFBFBD><EFBFBD><EFBFBD><EFBFBD>START<EFBFBD>źź͵<EFBFBD>ַ
 * @i2c_info_p i2cģ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ
 * @slave_addr <EFBFBD>ӻ<EFBFBD><EFBFBD><EFBFBD>ַ
 * @direction <EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><EFBFBD>䷽<EFBFBD><EFBFBD>(<EFBFBD><EFBFBD><EFBFBD><EFBFBD>д)
 */
ls1c_i2c_ret_t i2c_send_start_and_addr(ls1c_i2c_info_t *i2c_info_p, 
                                       unsigned char slave_addr,
                                       ls1c_i2c_direction_t direction);


/*
 * <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
 * @i2c_info_p i2cģ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ
 * @data <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>͵<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
 * @len <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵij<EFBFBD><EFBFBD><EFBFBD>
 */
ls1c_i2c_ret_t i2c_send_data(ls1c_i2c_info_t *i2c_info_p, unsigned char *data, int len);


/*
 * <EFBFBD><EFBFBD><EFBFBD><EFBFBD>STOP<EFBFBD>ź<EFBFBD>
 * @i2c_info_p i2cģ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ
 */
void i2c_send_stop(ls1c_i2c_info_t *i2c_info_p);



#endif