248 lines
10 KiB
Plaintext
248 lines
10 KiB
Plaintext
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/*******************************************************************************
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* \file cy8c6xxa_cm4_dual.icf
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* \version 2.91
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*
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* Linker file for the IAR compiler.
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*
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* The main purpose of the linker script is to describe how the sections in the
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* input files should be mapped into the output file, and to control the memory
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* layout of the output file.
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*
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* \note The entry point is fixed and starts at 0x10000000. The valid application
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* image should be placed there.
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*
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* \note The linker files included with the PDL template projects must be generic
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* and handle all common use cases. Your project may not use every section
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* defined in the linker files. In that case you may see warnings during the
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* build process. In your project, you can simply comment out or remove the
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* relevant code in the linker file.
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*
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********************************************************************************
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* \copyright
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* Copyright 2016-2021 Cypress Semiconductor Corporation
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*******************************************************************************/
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/*###ICF### Section handled by ICF editor, don't touch! ****/
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/*-Editor annotation file-*/
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/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_4.xml" */
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/*-Specials-*/
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define symbol __ICFEDIT_intvec_start__ = 0x00000000;
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/* The symbols below define the location and size of blocks of memory in the target.
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* Use these symbols to specify the memory regions available for allocation.
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*/
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/* The following symbols control RAM and flash memory allocation for the CM4 core.
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* You can change the memory allocation by editing RAM and Flash symbols.
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* Note that 2 KB of RAM (at the end of the SRAM) are reserved for system use.
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* Using this memory region for other purposes will lead to unexpected behavior.
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* Your changes must be aligned with the corresponding symbols for CM0+ core in 'xx_cm0plus.icf',
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* where 'xx' is the device group; for example, 'cy8c6xx7_cm0plus.icf'.
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*/
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/* RAM */
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define symbol __ICFEDIT_region_IRAM1_start__ = 0x08002000;
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define symbol __ICFEDIT_region_IRAM1_end__ = 0x080FF7FF;
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/* Flash */
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define symbol __ICFEDIT_region_IROM1_start__ = 0x10000000;
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define symbol __ICFEDIT_region_IROM1_end__ = 0x101FFFFF;
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/* The following symbols define a 32K flash region used for EEPROM emulation.
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* This region can also be used as the general purpose flash.
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* You can assign sections to this memory region for only one of the cores.
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* Note some middleware (e.g. BLE, Emulated EEPROM) can place their data into this memory region.
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* Therefore, repurposing this memory region will prevent such middleware from operation.
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*/
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define symbol __ICFEDIT_region_IROM2_start__ = 0x14000000;
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define symbol __ICFEDIT_region_IROM2_end__ = 0x14007FFF;
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/* The following symbols define device specific memory regions and must not be changed. */
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/* Supervisory FLASH - User Data */
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define symbol __ICFEDIT_region_IROM3_start__ = 0x16000800;
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define symbol __ICFEDIT_region_IROM3_end__ = 0x16000FFF;
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/* Supervisory FLASH - Normal Access Restrictions (NAR) */
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define symbol __ICFEDIT_region_IROM4_start__ = 0x16001A00;
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define symbol __ICFEDIT_region_IROM4_end__ = 0x16001BFF;
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/* Supervisory FLASH - Public Key */
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define symbol __ICFEDIT_region_IROM5_start__ = 0x16005A00;
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define symbol __ICFEDIT_region_IROM5_end__ = 0x160065FF;
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/* Supervisory FLASH - Table of Content # 2 */
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define symbol __ICFEDIT_region_IROM6_start__ = 0x16007C00;
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define symbol __ICFEDIT_region_IROM6_end__ = 0x16007DFF;
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/* Supervisory FLASH - Table of Content # 2 Copy */
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define symbol __ICFEDIT_region_IROM7_start__ = 0x16007E00;
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define symbol __ICFEDIT_region_IROM7_end__ = 0x16007FFF;
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/* eFuse */
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define symbol __ICFEDIT_region_IROM8_start__ = 0x90700000;
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define symbol __ICFEDIT_region_IROM8_end__ = 0x907FFFFF;
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/* XIP */
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define symbol __ICFEDIT_region_EROM1_start__ = 0x18000000;
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define symbol __ICFEDIT_region_EROM1_end__ = 0x1FFFFFFF;
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define symbol __ICFEDIT_region_EROM2_start__ = 0x0;
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define symbol __ICFEDIT_region_EROM2_end__ = 0x0;
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define symbol __ICFEDIT_region_EROM3_start__ = 0x0;
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define symbol __ICFEDIT_region_EROM3_end__ = 0x0;
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define symbol __ICFEDIT_region_IRAM2_start__ = 0x0;
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define symbol __ICFEDIT_region_IRAM2_end__ = 0x0;
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define symbol __ICFEDIT_region_ERAM1_start__ = 0x0;
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define symbol __ICFEDIT_region_ERAM1_end__ = 0x0;
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define symbol __ICFEDIT_region_ERAM2_start__ = 0x0;
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define symbol __ICFEDIT_region_ERAM2_end__ = 0x0;
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define symbol __ICFEDIT_region_ERAM3_start__ = 0x0;
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define symbol __ICFEDIT_region_ERAM3_end__ = 0x0;
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/*-Sizes-*/
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if (!isdefinedsymbol(__STACK_SIZE)) {
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define symbol __ICFEDIT_size_cstack__ = 0x1000;
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} else {
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define symbol __ICFEDIT_size_cstack__ = __STACK_SIZE;
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}
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define symbol __ICFEDIT_size_proc_stack__ = 0x0;
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/* Defines the minimum heap size. The actual heap size will be expanded to the end of the stack region */
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if (!isdefinedsymbol(__HEAP_SIZE)) {
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define symbol __ICFEDIT_size_heap__ = 0x0400;
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} else {
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define symbol __ICFEDIT_size_heap__ = __HEAP_SIZE;
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}
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/**** End of ICF editor section. ###ICF###*/
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/* By default, the COMPONENT_CM0P_SLEEP prebuilt image is used for the CM0p core.
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* More about CM0+ prebuilt images, see here:
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* https://github.com/cypresssemiconductorco/psoc6cm0p
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*/
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/* The size of the Cortex-M0+ application image */
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define symbol FLASH_CM0P_SIZE = 0x2000;
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define memory mem with size = 4G;
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define region IROM1_region = mem:[from __ICFEDIT_region_IROM1_start__ to __ICFEDIT_region_IROM1_end__];
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define region IROM2_region = mem:[from __ICFEDIT_region_IROM2_start__ to __ICFEDIT_region_IROM2_end__];
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define region IROM3_region = mem:[from __ICFEDIT_region_IROM3_start__ to __ICFEDIT_region_IROM3_end__];
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define region IROM4_region = mem:[from __ICFEDIT_region_IROM4_start__ to __ICFEDIT_region_IROM4_end__];
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define region IROM5_region = mem:[from __ICFEDIT_region_IROM5_start__ to __ICFEDIT_region_IROM5_end__];
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define region IROM6_region = mem:[from __ICFEDIT_region_IROM6_start__ to __ICFEDIT_region_IROM6_end__];
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define region IROM7_region = mem:[from __ICFEDIT_region_IROM7_start__ to __ICFEDIT_region_IROM7_end__];
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define region IROM8_region = mem:[from __ICFEDIT_region_IROM8_start__ to __ICFEDIT_region_IROM8_end__];
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define region EROM1_region = mem:[from __ICFEDIT_region_EROM1_start__ to __ICFEDIT_region_EROM1_end__];
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define region IRAM1_region = mem:[from __ICFEDIT_region_IRAM1_start__ to __ICFEDIT_region_IRAM1_end__];
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define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
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define block PROC_STACK with alignment = 8, size = __ICFEDIT_size_proc_stack__ { };
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define block HEAP with expanding size, alignment = 8, minimum size = __ICFEDIT_size_heap__ { };
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define block HSTACK {block HEAP, block PROC_STACK, last block CSTACK};
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define block CM0P_RO with size = FLASH_CM0P_SIZE { readonly section .cy_m0p_image };
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define block RO {first section .intvec, readonly};
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define block cy_xip { section .cy_xip };
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/*-Initializations-*/
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initialize by copy { readwrite };
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do not initialize { section .noinit, section .intvec_ram };
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/*-Placement-*/
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/* Flash - Cortex-M0+ application image */
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place at start of IROM1_region { block CM0P_RO };
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/* Flash - Cortex-M4 application */
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place in IROM1_region { block RO };
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/* Used for the digital signature of the secure application and the Bootloader SDK application. */
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".cy_app_signature" : place at address (__ICFEDIT_region_IROM1_end__ - 0x200) { section .cy_app_signature };
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/* Emulated EEPROM Flash area */
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".cy_em_eeprom" : place at start of IROM2_region { section .cy_em_eeprom };
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/* Supervisory Flash - User Data */
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".cy_sflash_user_data" : place at start of IROM3_region { section .cy_sflash_user_data };
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/* Supervisory Flash - NAR */
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".cy_sflash_nar" : place at start of IROM4_region { section .cy_sflash_nar };
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/* Supervisory Flash - Public Key */
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".cy_sflash_public_key" : place at start of IROM5_region { section .cy_sflash_public_key };
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/* Supervisory Flash - TOC2 */
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".cy_toc_part2" : place at start of IROM6_region { section .cy_toc_part2 };
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/* Supervisory Flash - RTOC2 */
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".cy_rtoc_part2" : place at start of IROM7_region { section .cy_rtoc_part2 };
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/* eFuse */
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".cy_efuse" : place at start of IROM8_region { section .cy_efuse };
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/* Execute in Place (XIP). See the smif driver documentation for details. */
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"cy_xip" : place at start of EROM1_region { block cy_xip };
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/* RAM */
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place at start of IRAM1_region { readwrite section .intvec_ram};
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place in IRAM1_region { readwrite };
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place at end of IRAM1_region { block HSTACK };
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/* These sections are used for additional metadata (silicon revision, Silicon/JTAG ID, etc.) storage. */
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".cymeta" : place at address mem : 0x90500000 { readonly section .cymeta };
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keep { section .cy_m0p_image,
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section .cy_app_signature,
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section .cy_em_eeprom,
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section .cy_sflash_user_data,
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section .cy_sflash_nar,
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section .cy_sflash_public_key,
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section .cy_toc_part2,
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section .cy_rtoc_part2,
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section .cy_efuse,
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section .cy_xip,
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section .cymeta,
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};
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/* The following symbols used by the cymcuelftool. */
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/* Flash */
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define exported symbol __cy_memory_0_start = 0x10000000;
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define exported symbol __cy_memory_0_length = 0x00200000;
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define exported symbol __cy_memory_0_row_size = 0x200;
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/* Emulated EEPROM Flash area */
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define exported symbol __cy_memory_1_start = 0x14000000;
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define exported symbol __cy_memory_1_length = 0x8000;
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define exported symbol __cy_memory_1_row_size = 0x200;
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/* Supervisory Flash */
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define exported symbol __cy_memory_2_start = 0x16000000;
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define exported symbol __cy_memory_2_length = 0x8000;
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define exported symbol __cy_memory_2_row_size = 0x200;
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/* XIP */
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define exported symbol __cy_memory_3_start = 0x18000000;
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define exported symbol __cy_memory_3_length = 0x08000000;
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define exported symbol __cy_memory_3_row_size = 0x200;
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/* eFuse */
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define exported symbol __cy_memory_4_start = 0x90700000;
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define exported symbol __cy_memory_4_length = 0x100000;
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define exported symbol __cy_memory_4_row_size = 1;
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/* EOF */
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