/** @defgroup IP_SPI_001 IP: SPI register block and driver
*@ingroupIP_Drivers
*@{
*/
/**
*@briefSPIregisterblockstructure
*/
typedefstruct{/*!< SPI Structure */
__IOuint32_tCR;/*!< SPI Control Register. This register controls the operation of the SPI. */
__Iuint32_tSR;/*!< SPI Status Register. This register shows the status of the SPI. */
__IOuint32_tDR;/*!< SPI Data Register. This bi-directional register provides the transmit and receive data for the SPI. Transmit data is provided to the SPI0 by writing to this register. Data received by the SPI0 can be read from this register. */
__IOuint32_tCCR;/*!< SPI Clock Counter Register. This register controls the frequency of a master's SCK0. */
__Iuint32_tRESERVED0[3];
__IOuint32_tINT;/*!< SPI Interrupt Flag. This register contains the interrupt flag for the SPI interface. */