234 lines
6.0 KiB
C
234 lines
6.0 KiB
C
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/*
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* Copyright (c) 2006-2018, Synwit Technology Co.,Ltd.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2018-12-10 Zohar_Lee first version
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* 2020-07-10 lik format file
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*/
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#include "drv_pwm.h"
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#ifdef RT_USING_PWM
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#ifdef BSP_USING_PWM
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//#define DRV_DEBUG
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#define LOG_TAG "drv.pwm"
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#include <drv_log.h>
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#define MIN_PERIOD 2
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#define MIN_PULSE 1
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static struct swm_pwm_cfg pwm_cfg[] =
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{
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#ifdef BSP_USING_PWM0
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PWM0_CFG,
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#endif
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#ifdef BSP_USING_PWM1
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PWM1_CFG,
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#endif
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#ifdef BSP_USING_PWM2
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PWM2_CFG,
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#endif
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#ifdef BSP_USING_PWM3
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PWM3_CFG,
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#endif
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#ifdef BSP_USING_PWM4
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PWM4_CFG,
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#endif
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#ifdef BSP_USING_PWM5
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PWM5_CFG,
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#endif
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};
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static struct swm_pwm pwm_drv[sizeof(pwm_cfg) / sizeof(pwm_cfg[0])] = {0};
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static rt_err_t swm_pwm_control(struct rt_device_pwm *pwm_device, int cmd, void *arg);
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static struct rt_pwm_ops pwm_ops =
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{
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swm_pwm_control};
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static rt_err_t swm_pwm_enable(struct rt_device_pwm *pwm_device, struct rt_pwm_configuration *configuration, rt_bool_t enable)
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{
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struct swm_pwm_cfg *cfg = RT_NULL;
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RT_ASSERT(pwm_device != RT_NULL);
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cfg = pwm_device->parent.user_data;
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if (!enable)
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{
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if (PWM_CH_A == configuration->channel)
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{
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PWM_Stop(cfg->PWMx, 1, 0);
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}
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if (PWM_CH_B == configuration->channel)
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{
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PWM_Stop(cfg->PWMx, 0, 1);
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}
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}
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else
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{
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if (PWM_CH_A == configuration->channel)
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{
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PWM_Start(cfg->PWMx, 1, 0);
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}
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if (PWM_CH_B == configuration->channel)
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{
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PWM_Start(cfg->PWMx, 0, 1);
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}
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}
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return RT_EOK;
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}
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static rt_err_t swm_pwm_get(struct rt_device_pwm *pwm_device, struct rt_pwm_configuration *configuration)
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{
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rt_uint64_t tim_clock;
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tim_clock = SystemCoreClock / 8;
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struct swm_pwm_cfg *cfg = RT_NULL;
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RT_ASSERT(pwm_device != RT_NULL);
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cfg = pwm_device->parent.user_data;
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/* Convert nanosecond to frequency and duty cycle. 1s = 1 * 1000 * 1000 * 1000 ns */
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tim_clock /= 1000000UL;
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configuration->period = PWM_GetCycle(cfg->PWMx, configuration->channel) * 1000UL / tim_clock;
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configuration->pulse = PWM_GetHDuty(cfg->PWMx, configuration->channel) * 1000UL / tim_clock;
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return RT_EOK;
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}
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static rt_err_t swm_pwm_set(struct rt_device_pwm *pwm_device, struct rt_pwm_configuration *configuration)
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{
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rt_uint32_t period, pulse;
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rt_uint64_t tim_clock;
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tim_clock = SystemCoreClock / 8;
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struct swm_pwm_cfg *cfg = RT_NULL;
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RT_ASSERT(pwm_device != RT_NULL);
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cfg = pwm_device->parent.user_data;
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/* Convert nanosecond to frequency and duty cycle. 1s = 1 * 1000 * 1000 * 1000 ns */
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/* when SystemCoreClock = 120MHz, configuration->period max 4.369ms */
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/* when SystemCoreClock = 20MHz, configuration->period max 26.214ms */
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tim_clock /= 1000000UL;
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period = (unsigned long long)configuration->period * tim_clock / 1000ULL;
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pulse = (unsigned long long)configuration->pulse * tim_clock / 1000ULL;
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if (period < MIN_PERIOD)
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{
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period = MIN_PERIOD;
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}
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if (pulse < MIN_PULSE)
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{
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pulse = MIN_PULSE;
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}
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PWM_SetCycle(cfg->PWMx, configuration->channel, period);
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PWM_SetHDuty(cfg->PWMx, configuration->channel, pulse);
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return RT_EOK;
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}
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static rt_err_t swm_pwm_control(struct rt_device_pwm *pwm_device, int cmd, void *arg)
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{
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RT_ASSERT(pwm_device != RT_NULL);
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struct rt_pwm_configuration *configuration = (struct rt_pwm_configuration *)arg;
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switch (cmd)
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{
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case PWM_CMD_ENABLE:
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return swm_pwm_enable(pwm_device, configuration, RT_TRUE);
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case PWM_CMD_DISABLE:
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return swm_pwm_enable(pwm_device, configuration, RT_FALSE);
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case PWM_CMD_SET:
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return swm_pwm_set(pwm_device, configuration);
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case PWM_CMD_GET:
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return swm_pwm_get(pwm_device, configuration);
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default:
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return RT_EINVAL;
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}
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}
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int rt_hw_pwm_init(void)
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{
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int i = 0;
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int result = RT_EOK;
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for (i = 0; i < sizeof(pwm_cfg) / sizeof(pwm_cfg[0]); i++)
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{
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pwm_drv[i].cfg = &pwm_cfg[i];
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if (pwm_drv[i].cfg->PWMx == PWM0)
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{
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#ifdef BSP_USING_PWM0A
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PORT_Init(PORTC, PIN2, FUNMUX0_PWM0A_OUT, 0);
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#endif
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#ifdef BSP_USING_PWM0B
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PORT_Init(PORTC, PIN4, FUNMUX0_PWM0B_OUT, 0);
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#endif
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}
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else if (pwm_drv[i].cfg->PWMx == PWM1)
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{
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#ifdef BSP_USING_PWM1A
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PORT_Init(PORTC, PIN3, FUNMUX1_PWM1A_OUT, 0);
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#endif
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#ifdef BSP_USING_PWM1B
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PORT_Init(PORTC, PIN5, FUNMUX1_PWM1B_OUT, 0);
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#endif
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}
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else if (pwm_drv[i].cfg->PWMx == PWM2)
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{
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#ifdef BSP_USING_PWM2A
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PORT_Init(PORTN, PIN4, FUNMUX0_PWM2A_OUT, 0);
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#endif
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#ifdef BSP_USING_PWM2B
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PORT_Init(PORTN, PIN6, FUNMUX0_PWM2B_OUT, 0);
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#endif
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}
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else if (pwm_drv[i].cfg->PWMx == PWM3)
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{
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#ifdef BSP_USING_PWM3A
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PORT_Init(PORTN, PIN3, FUNMUX1_PWM3A_OUT, 0);
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#endif
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#ifdef BSP_USING_PWM3B
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PORT_Init(PORTN, PIN5, FUNMUX1_PWM3B_OUT, 0);
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#endif
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}
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else if (pwm_drv[i].cfg->PWMx == PWM4)
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{
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#ifdef BSP_USING_PWM4A
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PORT_Init(PORTN, PIN8, FUNMUX0_PWM4A_OUT, 0);
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#endif
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#ifdef BSP_USING_PWM4B
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PORT_Init(PORTN, PIN10, FUNMUX0_PWM4B_OUT, 0);
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#endif
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}
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else if (pwm_drv[i].cfg->PWMx == PWM5)
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{
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#ifdef BSP_USING_PWM5A
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PORT_Init(PORTN, PIN7, FUNMUX1_PWM5A_OUT, 0);
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#endif
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#ifdef BSP_USING_PWM5B
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PORT_Init(PORTN, PIN9, FUNMUX1_PWM5B_OUT, 0);
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#endif
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}
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PWM_Init(pwm_drv[i].cfg->PWMx, &(pwm_drv[i].cfg->pwm_initstruct));
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if (rt_device_pwm_register(&pwm_drv[i].pwm_device, pwm_drv[i].cfg->name, &pwm_ops, pwm_drv[i].cfg) == RT_EOK)
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{
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LOG_D("%s register success", pwm_drv[i].cfg->name);
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}
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else
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{
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LOG_E("%s register failed", pwm_drv[i].cfg->name);
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result = -RT_ERROR;
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}
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}
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return result;
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}
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INIT_DEVICE_EXPORT(rt_hw_pwm_init);
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#endif /* BSP_USING_PWM */
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#endif /* RT_USING_PWM */
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