2017-07-05 18:17:16 +08:00
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/*
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2018-10-16 13:00:37 +08:00
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* Copyright (c) 2006-2018, RT-Thread Development Team
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2017-07-05 18:17:16 +08:00
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*
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2018-10-16 13:00:37 +08:00
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* SPDX-License-Identifier: Apache-2.0
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2017-07-05 18:17:16 +08:00
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*
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* Change Logs:
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* Date Author Notes
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2018-05-16 23:58:59 +08:00
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* 2018-05-14 ZYH add board.h to this bsp
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2017-07-05 18:17:16 +08:00
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*/
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#ifndef __BOARD_H__
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#define __BOARD_H__
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2018-05-16 23:58:59 +08:00
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#include <stm32l4xx_hal.h>
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2017-07-05 18:17:16 +08:00
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#ifdef __ICCARM__
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// Use *.icf ram symbal, to avoid hardcode.
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extern char __ICFEDIT_region_RAM_end__;
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#define STM32_SRAM_END &__ICFEDIT_region_RAM_end__
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#else
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#define STM32_SRAM_SIZE 96
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#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
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#endif
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2018-10-04 17:06:21 +08:00
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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2017-07-05 18:17:16 +08:00
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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#pragma section="HEAP"
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#define HEAP_BEGIN (__segment_end("HEAP"))
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#else
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extern int __bss_end;
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#define HEAP_BEGIN (&__bss_end)
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#endif
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#define HEAP_END STM32_SRAM_END
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2018-05-16 23:58:59 +08:00
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extern void rt_hw_board_init(void);
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2017-07-05 18:17:16 +08:00
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#endif
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