2023-04-15 15:34:36 +08:00
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/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2023-04-01 wcx1024979076 first version
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*/
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2023-05-04 11:49:38 +08:00
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#include "drv_hwtimer.h"
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2023-04-15 15:34:36 +08:00
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#include <rtthread.h>
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#include <rtdevice.h>
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2023-05-04 11:49:38 +08:00
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#ifdef BSP_USING_HWTIMER
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2023-04-15 15:34:36 +08:00
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#define DBG_LEVEL DBG_LOG
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#include <rtdbg.h>
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#define LOG_TAG "DRV.HWTIMER"
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typedef struct _gptimer
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{
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const char *name;
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rt_hwtimer_t timer;
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struct bflb_device_s *bflb_timer;
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} _gptimer_t;
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static void _hwtimer_init(rt_hwtimer_t *timer, rt_uint32_t state);
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static rt_err_t _hwtimer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t mode);
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static void _hwtimer_stop(rt_hwtimer_t *timer);
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static rt_uint32_t _hwtimer_count_get(rt_hwtimer_t *timer);
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static rt_err_t _hwtimer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args);
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static void _hwtmr_isr(_gptimer_t *gptmr);
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static const struct rt_hwtimer_ops _hwtimer_ops = {
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.init = _hwtimer_init,
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.start = _hwtimer_start,
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.stop = _hwtimer_stop,
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.count_get = _hwtimer_count_get,
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.control = _hwtimer_control
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};
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static const struct rt_hwtimer_info _hwtimer_info = {
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.maxfreq = 1000000UL,
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.minfreq = 1000000UL,
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.maxcnt = 0xFFFFFFFFUL,
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.cntmode = HWTIMER_MODE_PERIOD
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};
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#ifdef BSP_USING_TIMER0
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static _gptimer_t timer0 = {.name = "timer0"};
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#endif /* BSP_USING_TIMER0 */
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#ifdef BSP_USING_TIMER1
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static _gptimer_t timer1 = {.name = "timer1" };
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#endif /* BSP_USING_TIMER1 */
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static _gptimer_t *s_gptimers[] = {
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#ifdef BSP_USING_TIMER0
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&timer0,
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#endif /* BSP_USING_TIMER0 */
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#ifdef BSP_USING_TIMER1
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&timer1,
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#endif /* BSP_USING_TIMER1 */
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};
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#ifdef BSP_USING_TIMER0
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void timer0_isr(int irq, void *arg)
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{
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_hwtmr_isr(&timer0);
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}
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#endif /* BSP_USING_TIMER0 */
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#ifdef BSP_USING_TIMER1
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void timer1_isr(int irq, void *arg)
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{
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_hwtmr_isr(&timer1);
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}
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#endif /* BSP_USING_TIMER1 */
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static void _hwtmr_isr(_gptimer_t *timer)
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{
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bool hwtmr_stat = bflb_timer_get_compint_status(timer->bflb_timer, TIMER_COMP_ID_0);
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if (hwtmr_stat)
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{
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rt_device_hwtimer_isr(&timer->timer);
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bflb_timer_compint_clear(timer->bflb_timer, TIMER_COMP_ID_0);
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}
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}
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static void _hwtimer_init(rt_hwtimer_t *timer, rt_uint32_t state)
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{
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_gptimer_t *_gptmr = (_gptimer_t*)timer->parent.user_data;
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struct bflb_timer_config_s cfg;
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cfg.counter_mode = TIMER_COUNTER_MODE_PROLOAD;
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cfg.clock_source = TIMER_CLKSRC_XTAL;
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cfg.clock_div = 40;
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cfg.trigger_comp_id = TIMER_COMP_ID_0;
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cfg.comp0_val = 0;
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cfg.comp1_val = 0;
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cfg.comp2_val = 0;
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cfg.preload_val = 0;
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bflb_timer_init(_gptmr->bflb_timer, &cfg);
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}
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static rt_err_t _hwtimer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t mode)
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{
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_gptimer_t *_gptmr = (_gptimer_t*) timer->parent.user_data;
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struct bflb_timer_config_s cfg;
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if(mode == HWTIMER_MODE_ONESHOT)
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cfg.counter_mode = TIMER_COUNTER_MODE_UP;
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else
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cfg.counter_mode = TIMER_COUNTER_MODE_PROLOAD;
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cfg.clock_source = TIMER_CLKSRC_XTAL;
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cfg.clock_div = 40;
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cfg.trigger_comp_id = TIMER_COMP_ID_0;
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cfg.comp0_val = cnt;
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cfg.comp1_val = cnt;
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cfg.comp2_val = cnt;
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cfg.preload_val = 0;
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bflb_timer_init(_gptmr->bflb_timer, &cfg);
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bflb_irq_enable(_gptmr->bflb_timer->irq_num);
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bflb_timer_start(_gptmr->bflb_timer);
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return RT_EOK;
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}
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static void _hwtimer_stop(rt_hwtimer_t *timer)
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{
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_gptimer_t *_gptmr = (_gptimer_t*)timer->parent.user_data;
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bflb_timer_stop(_gptmr->bflb_timer);
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}
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static rt_uint32_t _hwtimer_count_get(rt_hwtimer_t *timer)
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{
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_gptimer_t *_gptmr = (_gptimer_t*)timer->parent.user_data;
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rt_uint32_t current_cnt = bflb_timer_get_countervalue(_gptmr->bflb_timer);
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return current_cnt;
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}
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static rt_err_t _hwtimer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args)
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{
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rt_err_t err = RT_EOK;
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_gptimer_t *_gptmr = (_gptimer_t*) timer->parent.user_data;
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switch (cmd)
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{
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case HWTIMER_CTRL_FREQ_SET:
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err = -RT_ERROR;
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break;
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case HWTIMER_CTRL_INFO_GET:
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*(rt_hwtimer_t*)args = _gptmr->timer;
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break;
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case HWTIMER_CTRL_MODE_SET:
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_gptmr->timer.mode = *(rt_uint32_t*)args;
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break;
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case HWTIMER_CTRL_STOP:
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bflb_timer_stop(_gptmr->bflb_timer);
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break;
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}
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return err;
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}
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int rt_hw_hwtimer_init(void)
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{
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int ret = RT_EOK;
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for (uint32_t i = 0; i < sizeof(s_gptimers) / sizeof(s_gptimers[0]); i++)
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{
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s_gptimers[i]->timer.info = &_hwtimer_info;
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s_gptimers[i]->timer.ops = &_hwtimer_ops;
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s_gptimers[i]->bflb_timer = bflb_device_get_by_name(s_gptimers[i]->name);
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ret = rt_device_hwtimer_register(&s_gptimers[i]->timer, s_gptimers[i]->name, s_gptimers[i]);
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if (ret != RT_EOK)
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{
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LOG_E("%s register failed", s_gptimers[i]->name);
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}
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}
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#ifdef BSP_USING_TIMER0
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bflb_irq_attach(bflb_device_get_by_name("timer0")->irq_num, timer0_isr, NULL);
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#endif /* BSP_USING_TIMER0 */
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#ifdef BSP_USING_TIMER1
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bflb_irq_attach(bflb_device_get_by_name("timer1")->irq_num, timer1_isr, NULL);
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#endif /* BSP_USING_TIMER1 */
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return ret;
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}
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INIT_DEVICE_EXPORT(rt_hw_hwtimer_init);
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2023-05-04 11:49:38 +08:00
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#endif /* BSP_USING_HWTIMER */
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